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CN101795155B - Method and device for synchronizing wireless communication system - Google Patents

Method and device for synchronizing wireless communication system Download PDF

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Publication number
CN101795155B
CN101795155B CN 201010116953 CN201010116953A CN101795155B CN 101795155 B CN101795155 B CN 101795155B CN 201010116953 CN201010116953 CN 201010116953 CN 201010116953 A CN201010116953 A CN 201010116953A CN 101795155 B CN101795155 B CN 101795155B
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max
last
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region
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CN101795155A (en
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郭义武
孙建勋
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DATANG LINKTECH INFOSYSTEM Co Ltd
Datang Liancheng Information System Technology Co Ltd
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DATANG LINKTECH INFOSYSTEM Co Ltd
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Abstract

The invention discloses a method and a device for synchronizing a wireless communication system. The method comprises the following steps: receiving a sequence, determining a search interval according to a CRC verification result, and only calculating complex related power values of the search interval; and comparing the complex related power values of the search interval, taking a sequence position corresponding to the maximum complex related power value as a synchronous position, and demodulating the whole frame sequence by using the position as a reference point, wherein the CRC verification result is determined by performing CRC verification on the data demodulated after the last synchronous operation. Compared with the traditional synchronous scheme, the method and the device greatly reduce the length of the search interval so as to greatly reduce the calculation overhead. Because of the reduction of the search range, the synchronous probability is greatly improved so that the wireless communication system can adapt to the condition of low signal-to-noise ratio.

Description

The method for synchronous of wireless communication system and device
Technical field
The present invention relates to wireless communication technology field, relate in particular to a kind of method for synchronous and device of wireless communication system.
Background technology
In wireless communication system, be the basis of all communications synchronously, only have accurately the synchronously correct demodulation performance of guarantee.In existing communication system, synchronized algorithm mostly is to utilize local synchronizing sequence and receiving sequence to carry out multiple correlation to seek peak-peak, and maximal peak point is judged to synchronous point.The schematic diagram of this synchronization scenario is referring to Fig. 1.Its main process comprises: step 1, and sequence buffer receiving sequence, wherein, sequence length is the length of one frame+synchronizing sequence; Step 2, complex correlator is slided sequence and local synchronization sequence relevant, and calculates every bit related power value; The related power value that step 3, decision device comparison are had a few, the position that maximal correlation power is corresponding be as sync bit, then sends into demodulator and carry out demodulation with this sync bit whole frame sequence of naming a person for a particular job as a reference.
In wireless communication system, general terminal all is mobile, or even high-speed mobile, for example, the maximum relative speed of portable terminal can reach 5000km/h in the airborne communication system.In this case, for a certain specific receiving terminal, the sync bit of the different subframes of same launch terminal can be different along with relatively moving of transceiver terminal, so, need to carry out at each received frame of launch terminal synchronously, this just need to reuse synchronized algorithm, namely, all whole receiving sequences is searched at each frame of launch terminal.Because each frame all is to the full sequence correlation computations of sliding, so this mode computation complexity is higher, in addition, because search sequence is longer, in low signal-to-noise ratio (signal power is less) situation, the related power point of asynchronous position is judged to the probability (false alarm probability) of sync bit and probability (false dismissal probability) that sync bit does not detect all can increase, and causes synchronous probability lower.
Summary of the invention
The invention provides a kind of method for synchronous and device of wireless communication system, can realize low amount of calculation, high synchronous probability, be particularly suitable for the scene that receiving terminal moves.
For this reason, the embodiment of the invention adopts following technical scheme:
A kind of method for synchronous of wireless communication system comprises: receiving sequence, and determine the region of search according to CRC (CyclicalRedundancy Check, CRC) check results, and only calculate the multiple correlation performance number of the region of search; The multiple correlation performance number in comparison search interval, the sequence location that maximum multiple correlation performance number is corresponding are carried out demodulation so that this position is as a reference point to whole frame sequence as sync bit; Wherein, described CRC check result carries out CRC check to the data of demodulation after the last simultaneous operation to determine.
Wherein, describedly determine that according to the CRC check result region of search comprises: if the CRC check is correct, determine the region of search according to relative velocity and the frame emission interval of launch terminal and receiving terminal; If CRC checks mistake, then determine the region of search according to errors number.
When CRC checks when correct, determine the region of search by following formula:
[search_min,search_max]=[pos_last-L max,pos_last+L max]
Wherein, pos_last is last sync bit, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V · T interval C · T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
When the CRC check mistake, determine the region of search by following formula:
search _ min = pos _ last - ( n + 1 ) L max , pos _ last - ( n + 1 ) L max &GreaterEqual; 0 0 , pos _ last - ( n + 1 ) L max < 0
search _ max = pos _ last + ( n + 1 ) L max , pos _ last + ( n + 1 ) L max &le; L - 1 L - 1 , pos _ last + ( n + 1 ) L max > L - 1
Wherein, pos_last is last sync bit, and n is the continuously number of times of mistake of CRC check, and L is the length of multiple correlation value cor, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V &CenterDot; T interval C &CenterDot; T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
Determine that according to the region of search [search_min, search_max] length of search sequence is:
L search=search_max-search_min
The multiple correlation performance number of the described region of search is according to L SearchSize determine.
A kind of synchronizer of wireless communication system, comprise sequence buffer, complex correlator, decision device and demodulator, also comprise the CRC check ultramagnifier, wherein: described CRC check ultramagnifier, determine this CRC check result in subsynchronous according to the CRC check of demodulating data after the last simultaneous operation; Described complex correlator, the last synchronous afterwards CRC check result of demodulating data who provides according to the CRC check ultramagnifier determines this hyposynchronous region of search, and only calculates the multiple correlation performance number of the region of search for the sequence that described sequence buffer provides; Described decision device, the multiple correlation performance number in comparison search interval, the sequence location that maximum multiple correlation performance number is corresponding is as sync bit, and informs that described demodulator carries out demodulation so that this position is as a reference point to whole frame sequence.
Described complex correlator comprises the correct corresponding subelement of verification, the corresponding subelement of check errors and multiple correlation performance number computation subunit, wherein, the correct corresponding subelement of described verification, check when correct at CRC, determine the region of search according to relative velocity and the frame emission interval of launch terminal and receiving terminal; The corresponding subelement of described check errors when the CRC check is wrong, is then determined the region of search according to errors number.
The correct corresponding subelement of described verification, determine the region of search by following formula:
[search_min,search_max]=[pos_last-L max,pos_last+L max]
Wherein, pos_last is last sync bit, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V &CenterDot; T interval C &CenterDot; T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
The corresponding subelement of described check errors, determine the region of search by following formula:
search _ min = pos _ last - ( n + 1 ) L max , pos _ last - ( n + 1 ) L max &GreaterEqual; 0 0 , pos _ last - ( n + 1 ) L max < 0
search _ max = pos _ last + ( n + 1 ) L max , pos _ last + ( n + 1 ) L max &le; L - 1 L - 1 , pos _ last + ( n + 1 ) L max > L - 1
Wherein, pos_last is last sync bit, and n is the continuously number of times of mistake of CRC check, and L is the length of multiple correlation value cor, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V &CenterDot; T interval C &CenterDot; T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
Described multiple correlation performance number computation subunit determines that according to the region of search [search_min, search_max] length of search sequence is:
L search=search_max-search_min
And according to L SearchSize determine the multiple correlation performance number of the described region of search.
As seen, the present invention adopts the CRC check result to indicate synchronized result, and determines this hyposynchronous region of search according to correctness, and the whole sequence length of traditional search is changed into smaller interval of search.When the CRC check mistake, the present invention expands the region of search of last time to be twice, and just no longer enlarges until the region of search surpasses the bound of former search sequence.
To sum up, the present invention has reduced the length of the region of search greatly than the conventional synchronization scheme, thereby has also just greatly reduced computing cost.Because reducing of hunting zone also improved synchronous probability, greatly so that wireless communication system can adapt to the situation of low signal-to-noise ratio.
Description of drawings
Fig. 1 is prior art wireless communication systme synchronization scheme schematic diagram;
Fig. 2 is wireless communication systme synchronization scheme schematic diagram of the present invention;
Fig. 3 is wireless communication system synchronization method flow chart of the present invention.
Embodiment
For certain terminal A, if particular terminal B is correct synchronously when present frame receiving terminal A data, when then arriving next frame emission of terminal A, terminal B only need to search for one near the sync bit in last time and get final product among a small circle, based on above-mentioned analysis, the present invention proposes a kind of wireless communication system synchronization method, can realize low amount of calculation, high synchronous probability, is particularly suitable for the scene that receiving terminal moves.
Referring to Fig. 2, be wireless communication systme synchronization scheme schematic diagram of the present invention, compare with existing scheme, the present invention program has increased the CRC check feedback module, complex correlator can be determined according to upper hyposynchronous CRC check result the size of this hyposynchronous region of search, reducing search length, thereby can reduce the amount of calculation of complex correlator, increase synchronous probability.
Referring to Fig. 3, the method for synchronous flow chart for wireless communication system of the present invention comprises:
S301: sequence buffer receiving sequence, offer complex correlator behind the buffer memory, wherein, the length of the sequence that receives is the length of one frame+synchronizing sequence;
S302: complex correlator is determined the region of search according to the CRC check result, and only calculates the multiple correlation performance number of the region of search, and offers decision device;
Wherein, the CRC check ultramagnifier is that the check results that the data of demodulator institute demodulation after the last synchronizing process are carried out after CRC deciphers and will decipher is sent to complex correlator.
Wherein, the computational process of multiple correlation performance number is: complex correlator is slided the sequence in the region of search and local synchronization sequence relevant, then determines the related power value of the region of search.
S303: the multiple correlation performance number in decision device comparison search interval, the position that the maximal correlation performance number is corresponding be as sync bit, then sends to demodulator and carry out demodulation with this position whole frame sequence of naming a person for a particular job as a reference.
The below describes in detail to the embodiment of the invention.
The operation principle of modules is as follows:
(1) complex correlator
Complex correlator of the present invention increases to some extent with respect to the complex correlator function in traditional synchronization scenario: do not obtain when synchronous complex correlator of the present invention and traditional similar with launch terminal at receiving terminal; Receiving terminal and launch terminal synchronously after, complex correlator is different, is described in detail as follows:
Before not synchronous
Assumes synchronization code SYNC is S = ( s 0 , s 1 , . . . , s L sync - 1 ) , Sequence to be searched is e=(e 0, e 1..., e L-1), then the region of search is:
[search_min,search_max]=[0,L-1]
... ... .. formula 1
Wherein the region of search is to determine according to the maximum communication distance (frame protection interval) that network allows.
S is mended 0 to L obtains S_fft, then e and S_fft are carried out the multiple correlation computing as follows:
cor=IFFT(FFT(e)·*conj(FFT(S_fft)))
... ... .. formula 2
Wherein conj represents to get conjugation, " .* " expression sequence dot product, and cor length is L.
Calculate related power power_cor as follows:
power_cor i=|cor i| 2,i=0,1,…,L-1
... ... .. formula 3
Synchronously
A determines the region of search
● if the CRC check is correct, then illustrate for same launch terminal, receiving terminal is correct the upper frame of this launch terminal synchronously, at this moment only need to determine that the region of search gets final product according to relative velocity and the frame emission interval of launch terminal and receiving terminal, and method is as follows:
If the relative velocity of launch terminal and receiving terminal is V, the light velocity is C, and the time of a chip is T c, for same terminal, the largest interval of adjacent frame emission is T Interval, then should the time interval in the corresponding number of chips of ultimate range increment of launch terminal and receiving terminal:
L max = V &CenterDot; T interval C &CenterDot; T c
... ... formula 4
If last sync bit is pos_last, determine that then this region of search is:
[search_min,search_max]=[pos_last-L max,pos_last+L max]
● if CRC checks mistake, then determines the region of search according to errors number, and method is as follows:
If the sync bit of last accurate synchronization is pos_last, the CRC check continuously number of times of mistake is n, and then this region of search is determined according to following rule:
search _ min = pos _ last - ( n + 1 ) L max , pos _ last - ( n + 1 ) L max &GreaterEqual; 0 0 , pos _ last - ( n + 1 ) L max < 0
... ... formula 5
search _ max = pos _ last + ( n + 1 ) L max , pos _ last + ( n + 1 ) L max &le; L - 1 L - 1 , pos _ last + ( n + 1 ) L max > L - 1
... ... formula 6
The b multiple correlation is calculated
The length that can be obtained search sequence by the region of search [search_min, search_max] is
L search=search_max-search_min
... ... formula 7
The multiple correlation algorithm can be according to L SearchSize determine: if L SearchLess, then can utilize the method for direct calculating correlation to calculate multiple correlation value cor in the region of search [search_min, search_max]; If L SearchLarger, then can calculate cor according to the method for " not front synchronously ".Then calculate multiple correlation power power_cor.
(2) CRC check ultramagnifier
The CRC check ultramagnifier be exactly with last time decoded CRC check result feedback in complex correlator, how this operates the indication complex correlator in subsynchronous at this.
(3) decision device
Seek the maximal correlation performance number in the region of search [search_min, search_max], the position judgement that it is corresponding is sync bit pos_final.
Corresponding with said method, the present invention also provides a kind of synchronizer of wireless communication system, this device can pass through hardware, software or software and hardware combining to be realized, particularly, this device comprises sequence buffer, complex correlator, decision device and demodulator, especially, this device also comprises the CRC check ultramagnifier, and the below introduces in detail to modules:
The CRC check ultramagnifier is determined this CRC check result in subsynchronous according to the CRC check of demodulating data after the last simultaneous operation;
Complex correlator, the last synchronous afterwards CRC check result of demodulating data who provides according to the CRC check ultramagnifier determines this hyposynchronous region of search, and only calculates the multiple correlation performance number of the region of search for the sequence that described sequence buffer provides;
Decision device, the multiple correlation performance number in comparison search interval, the sequence location that maximum multiple correlation performance number is corresponding is as sync bit, and informs that described demodulator carries out demodulation so that this position is as a reference point to whole frame sequence.
Wherein, described complex correlator comprises the correct corresponding subelement of verification, the corresponding subelement of check errors and multiple correlation performance number computation subunit, wherein,
The correct corresponding subelement of verification is checked when correct at CRC, determines the region of search according to relative velocity and the frame emission interval of launch terminal and receiving terminal;
The corresponding subelement of check errors when the CRC check is wrong, is then determined the region of search according to errors number.
Particularly, the correct corresponding subelement of verification, determine the region of search by following formula:
[search_min,search_max]=[pos_last-L max,pos_last+L max]
Wherein, pos_last is last sync bit, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V &CenterDot; T interval C &CenterDot; T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
Particularly, the corresponding subelement of check errors, determine the region of search by following formula:
search _ min = pos _ last - ( n + 1 ) L max , pos _ last - ( n + 1 ) L max &GreaterEqual; 0 0 , pos _ last - ( n + 1 ) L max < 0
search _ max = pos _ last + ( n + 1 ) L max , pos _ last + ( n + 1 ) L max &le; L - 1 L - 1 , pos _ last + ( n + 1 ) L max > L - 1
Wherein, pos_last is last sync bit, and n is the continuously number of times of mistake of CRC check, and L is the length of multiple correlation value cor, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V &CenterDot; T interval C &CenterDot; T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
Particularly, multiple correlation performance number computation subunit determines that according to the region of search [search_min, search_max] length of search sequence is:
L search=search_max-search_min
And according to L SearchSize determine the multiple correlation performance number of the described region of search.
As seen, the present invention adopts the CRC check result to indicate synchronized result, and determines this hyposynchronous region of search according to correctness, and the whole sequence length of traditional search is changed into smaller interval of search.When the CRC check mistake, the present invention expands the region of search of last time to be twice, and just no longer enlarges until the region of search surpasses the bound of former search sequence.
To sum up, the present invention has reduced the length of the region of search greatly than the conventional synchronization scheme, thereby has also just greatly reduced computing cost.Because reducing of hunting zone also improved synchronous probability, greatly so that wireless communication system can adapt to the situation of low signal-to-noise ratio.
One of ordinary skill in the art will appreciate that, the process of the method for realization above-described embodiment can be finished by the relevant hardware of program command, described program can be stored in the read/write memory medium, and this program is carried out the corresponding step in the said method when carrying out.Described storage medium can be such as ROM/RAM, magnetic disc, CD etc.
The above only is preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (8)

1. the method for synchronous of a wireless communication system is characterized in that, comprising:
Receiving sequence, and determine the region of search according to the CRC check result, and only calculate the multiple correlation performance number of the region of search;
The multiple correlation performance number in comparison search interval, the sequence location that maximum multiple correlation performance number is corresponding are carried out demodulation so that this position is as a reference point to whole frame sequence as sync bit;
Wherein, described CRC check result carries out CRC check to the data of demodulation after the last simultaneous operation to determine;
Describedly determine that according to the CRC check result region of search comprises:
If CRC check is correct, determine the region of search according to relative velocity and the frame emission interval of launch terminal and receiving terminal;
If the CRC check mistake is then determined the region of search according to errors number.
2. described method according to claim 1 is characterized in that, when CRC check is correct, determines the region of search by following formula:
[search_min,search_max]=[pos_last-L max,pos_last+L max]
Wherein, pos_last is last sync bit, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal:
Figure FDA00002039097600011
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
3. described method according to claim 1 is characterized in that, when the CRC check mistake, determines the region of search by following formula:
search _ min = pos _ last - ( n + 1 ) L max , pos _ last - ( n + 1 ) L max &GreaterEqual; 0 0 , pos _ last - ( n + 1 ) L max < 0
search _ max = pos _ last + ( n + 1 ) L max , pos _ last + ( n + 1 ) L max &le; L - 1 L - 1 , pos _ last + ( n + 1 ) L max > L - 1
Wherein, pos_last is last sync bit, and n is the continuously number of times of mistake of CRC check, and L is the length of multiple correlation value cor, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V &CenterDot; T interval C &CenterDot; T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
4. according to claim 2 or 3 described methods, it is characterized in that, determine that according to the region of search [search_min, search_max] length of search sequence is:
L search=search_max-search_min
The multiple correlation performance number of the described region of search is according to L SearchSize determine.
5. the synchronizer of a wireless communication system comprises sequence buffer, complex correlator, decision device and demodulator, it is characterized in that, also comprises the CRC check ultramagnifier, wherein:
Described CRC check ultramagnifier is determined this CRC check result in subsynchronous according to the CRC check of demodulating data after the last simultaneous operation;
Described complex correlator, the last synchronous afterwards CRC check result of demodulating data who provides according to the CRC check ultramagnifier determines this hyposynchronous region of search, and only calculates the multiple correlation performance number of the region of search for the sequence that described sequence buffer provides;
Described decision device, the multiple correlation performance number in comparison search interval, the sequence location that maximum multiple correlation performance number is corresponding is as sync bit, and informs that described demodulator carries out demodulation so that this position is as a reference point to whole frame sequence;
Wherein, described complex correlator comprises the correct corresponding subelement of verification, the corresponding subelement of check errors and multiple correlation performance number computation subunit, wherein,
The correct corresponding subelement of described verification when CRC check is correct, is determined the region of search according to relative velocity and the frame emission interval of launch terminal and receiving terminal;
The corresponding subelement of described check errors when the CRC check mistake, is then determined the region of search according to errors number.
6. described device according to claim 5 is characterized in that the correct corresponding subelement of described verification is determined the region of search by following formula:
[search_min,search_max]=[pos_last-L max,pos_last+L max]
Wherein, pos_last is last sync bit, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal:
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
7. described device according to claim 5 is characterized in that, the corresponding subelement of described check errors is determined the region of search by following formula:
search _ min = pos _ last - ( n + 1 ) L max , pos _ last - ( n + 1 ) L max &GreaterEqual; 0 0 , pos _ last - ( n + 1 ) L max < 0
search _ max = pos _ last + ( n + 1 ) L max , pos _ last + ( n + 1 ) L max &le; L - 1 L - 1 , pos _ last + ( n + 1 ) L max > L - 1
Wherein, pos_last is last sync bit, and n is the continuously number of times of mistake of CRC check, and L is the length of multiple correlation value cor, L MaxThe corresponding number of chips of ultimate range increment for launch terminal and receiving terminal: L max = V &CenterDot; T interval C &CenterDot; T c ;
Wherein, V is that the relative velocity of launch terminal and receiving terminal is, C is the light velocity, T cBe the time of a chip, T IntervalIt is the largest interval for the adjacent frame emission of same terminal.
8. according to claim 6 or 7 described devices, it is characterized in that, described multiple correlation performance number computation subunit determines that according to the region of search [search_min, search_max] length of search sequence is:
L search=search_max-search_min
And according to L SearchSize determine the multiple correlation performance number of the described region of search.
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