CN101661431B - Block management method for flash memory, flash storage system and controller - Google Patents
Block management method for flash memory, flash storage system and controller Download PDFInfo
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Abstract
The invention discloses a block management method of a flash memory, a flash storage system and a controller. The block management method comprises the steps: dividing the flash memory into a cache area and a storage area and dividing the cache area into a plurality of cache subareas, wherein the storage area is provided with a plurality of physical blocks and each cache subarea is provided with at least one physical block. The block management method also comprises the step: configuring a plurality of logic blocks which correspond to the physical blocks in the storage area, wherein each logic block corresponds to one divided cache subarea and data are temporarily stored in the cache subareas which correspond to the logic blocks when the data are written into the logic blocks by a host computer. Therefore, the invention can enhance the data read-in efficiency, avoid abrading the physical blocks and prolong the service life of the storage system of the flash memory.
Description
Technical field
The present invention relates to a kind of block management method that is used for flash memory, particularly relate to a kind of some with flash memory as the block management method of getting (cache) soon and the stocking system and the controller that use the method.
Background technology
Digital camera, mobile phone camera and MP3 are very rapid in growth over the years, make the consumer also increase rapidly the demand of Storage Media.Because flash memory (Flash Memory) has that data are non-volatile, power saving, volume is little and the characteristic of no mechanical structure etc., suitable portable use, the most suitable being used on the battery-powered product of this class Portable.Solid state hard disc is exactly a kind of with the storage device of NAND flash memory as Storage Media.
In general, the flash memory of flash storage system can be divided into a plurality of physical blocks (physcalblock) and these physical blocks can be grouped into data field (data area) and spare area (spare area).Classify as and to store in the physical blocks of data field by writing the valid data that instruction writes, and the physical blocks in the spare area is the physical blocks in the replacement data district when writing instruction in execution.Specifically, when flash storage system receive main frame writing the instruction and desire is write fashionable to the physical blocks of data field, flash storage system can from the spare area, extract a physical blocks and the physical blocks that will in the data field, desire to write in effective legacy data write to the physical blocks of from the spare area, extracting with the new data of desiring to write and the physical blocks that will write new data is associated as the data field, and the spare area is wiped and be associated as to the physical blocks of data field originally.In order to allow main frame access successfully with the physical blocks of the mode storage data of rotating, flash storage system can provide logical blocks to main frame.That is to say, flash storage system can be set up logic-physical blocks mapping table, and the enantiomorphic relationship in this table between the physical blocks of record and renewal logical blocks and data field reflects rotating of physical blocks, so main frame only need write and flash storage system can read or write data to the physical blocks of institute's mapping according to logic-physical blocks mapping table at providing logical blocks.
Yet, make that in the technologic progress of flash memory the design capacity of each physical blocks can be increasing in, also cause the above-mentioned time of moving effective legacy data can relative increase and reduce the usefulness of system.Particularly, when being used as the Storage Media that computer operating system is installed when flash storage system, operating system (is for example understood regular access particular data, document configuration table (FileAllocation Table, FAT), the data of this type of little document of frequent access can make that to carry out the time move effective legacy data longer and quicken the wearing and tearing of physical blocks.Therefore, the efficient that promotes this type of data access is considerable with the wearing and tearing of the physical blocks that reduces flash memory.
Summary of the invention
In view of this, the invention provides a kind of block management method, it can promote the efficient that data write and the wearing and tearing of avoiding physical blocks to prolong the life-span of flash memory storage system.
In addition, the invention provides a kind of controller, it uses above-mentioned block management method to manage flash memory, and it can promote the efficient that data write and the wearing and tearing of avoiding physical blocks to prolong the life-span of flash memory storage system.
Moreover, the invention provides a kind of stocking system, it uses above-mentioned block management method to manage flash memory, and it can promote the efficient that data write and the wearing and tearing of avoiding physical blocks to prolong the life-span of flash memory storage system.
The present invention proposes a kind of block management method, it is suitable for managing the flash memory of flash storage system, this block management method comprise with flash memory be divided into get soon the district and the storage area, and will get zoning soon and be divided into a plurality of subareas of getting soon, wherein this storage area has a plurality of physical blocks and each respectively and gets the subarea soon and have at least one physical blocks.This block management method also comprises a plurality of logical blocks of configuration, and wherein logical blocks is the physical blocks of mapping storage area.The method also comprises sets logical blocks and the configuration relation of being divided of getting the subarea soon, wherein each logical blocks correspondence is got one of them of subarea soon, wherein can be earlier with temporary the getting in the subarea soon to the logical blocks correspondence of data when main frame writes data to logical blocks.
In one embodiment of this invention, above-mentioned block management method also comprises getting soon when one of them and will be temporarily stored in these data of getting soon in the subarea that have been filled with data when the subarea has been filled with data and write in the storage area.
In one embodiment of this invention, above-mentioned block management method also comprises when the subarea of getting soon of the logical blocks correspondence of desiring to write does not have and when the space can store these data data is temporary in other and gets in the subarea soon.
In one embodiment of this invention, the above-mentioned step that the logical blocks correspondence is got the subarea soon comprises according to what all present utilization rates of getting the subarea soon when main frame writes data to logical blocks were come assignment logic block correspondence and gets the subarea soon.
In one embodiment of this invention, above-mentioned block management method also is included in logic-physical blocks mapping watch record one, and to get mark soon be to be temporary in soon to get in the subarea with the data of representing which logical blocks, and set up a data address table stores the page address of this logical blocks with record the physical page address of data.
In one embodiment of this invention, the above-mentioned zoning of will getting soon is divided into the step of getting the subarea soon and comprises and be divided into N and get the subarea soon getting zoning soon, and above-mentioned configuration logic block comprises M logical blocks of configuration for the step of main frame access, wherein N and M are positive integer, and the above-mentioned step that the logical blocks correspondence is got the subarea soon comprises the corresponding P of K logical blocks is got the subarea soon that wherein K equals the remainder of K divided by N for positive integer and P less than (M+1).
The present invention also provides a kind of stocking system and controller thereof, and this stocking system comprises flash memory, connector and controller, and wherein flash memory has a plurality of physical blocks and these physical blocks are grouped into data field and spare area at least.This controller is to be electrically connected to above-mentioned flash memory and connector, and this controller the flash memory interface module, memory buffer, host interface module and the memory management module that comprise microprocessor unit and be coupled to microprocessor unit.Particularly, this memory management module has a plurality of machine instructions that can be carried out by microprocessor unit flash memory is finished above-mentioned block management step.
In one embodiment of this invention, above-mentioned flash memory is a multilayer storage unit (MultiLevel Cell, MLC) NAND flash memory, and the physical blocks of this flash memory has a plurality of page addresss and a plurality of time page addresss of writing speed faster than last page address gone up, and in one embodiment of this invention, above-mentionedly comprise data the temporary step of getting soon in the subarea of data only temporary to getting in the following page address in subarea soon to the logical blocks correspondence.
The present invention proposes a kind of block management method, it is suitable for managing the flash memory of flash storage system, this block management method comprise with flash memory be divided into get soon the district and the storage area, and will get zoning soon and be divided into a plurality of subareas of getting soon, wherein this storage area has a plurality of physical blocks and each respectively and gets the subarea soon and have at least one physical blocks.This block management method also comprises sets physical blocks and the configuration relation of being divided of getting the subarea soon, wherein each physical blocks correspondence is got one of them of subarea soon, wherein can be earlier with temporary the getting in the subarea soon to the physical blocks correspondence of data when main frame writes data to physical blocks.
The present invention marks off the structure of getting the district soon because of adopting with flash memory, therefore can promote the efficient that data write.In addition, the present invention can be divided into and a plurality ofly gets the subarea soon and with the corresponding specific subarea of getting soon of logical blocks getting zoning soon, the data of specific logical blocks can be temporary in pairing getting soon in the subarea thus, this can reduce the erasing times of physical blocks base when putting the data of getting soon in the subarea in order.
For above-mentioned feature and advantage of the present invention can be become apparent, preferred embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Description of drawings
Fig. 1 is the summary calcspar that illustrates flash storage system according to one embodiment of the invention.
Fig. 2 A and 2B are the synoptic diagram that illustrates the storage area of Fig. 1 according to the embodiment of the invention.
Fig. 2 C is the synoptic diagram of getting the district soon that illustrates Fig. 1 according to the embodiment of the invention.
Fig. 3 is the process flow diagram that illustrates the block management step according to the embodiment of the invention.
Fig. 4 is the example that illustrates logic-physical blocks mapping table according to the embodiment of the invention.
Fig. 5 is the example that illustrates the data address table according to the embodiment of the invention.
Fig. 6 is the process flow diagram that illustrates the block management step according to another embodiment of the present invention
The reference numeral explanation
100: flash storage system
110: controller
110a: microprocessor unit
110b: memory management module
110c: flash memory interface module
110d: memory buffer
110e: host interface module
120: connector
130: flash memory
130a: storage area
130b: get the district soon
200: host computer system
202: system region
204: the data field
206: the spare area
208: replace block
210-1～210-M: logical blocks
220-1～220-N: get the subarea soon
300: bus
S301, S303, S305, S307, S309, S311, S313, S315, S317, S319, S321: block management step
400: logic-physical blocks mapping table
402: the logical blocks field
404: the physical blocks field
406: get tag field soon
500: the data address table
502: the logical blocks field
504: the logical page address field
506: get the subarea soon
508: the physical blocks field
510: the physical page address field
S601, S603: block management step
Embodiment
In order to promote the access efficiency of flash storage system, method proposed by the invention is that the flash memory in the flash storage system is marked off a zone as getting district's (or claiming buffer zone) soon, and this is got zoning soon is divided into several and gets the subarea soon, the logical blocks that will offer the main frame access simultaneously disposes one of them respectively and gets the subarea soon, wherein when host computer system writes data to flash storage system, these data can be temporary in the corresponding specific host computer system of promptly responding after getting in the subarea soon with data according to the logical blocks that is write and finish this and write instruction, are that afterwards flash storage system just will get data-moving in the subarea soon to writing in the physical blocks of these data during non-busy (busy).Therefore, can promote the efficient that data write and reduce the wearing and tearing of physical blocks effectively.For clearer understanding spirit of the present invention, below will elaborate with exemplary embodiment.
Fig. 1 is the summary calcspar that illustrates flash storage system according to one embodiment of the invention.Please refer to Fig. 1, flash storage system 100 comprises controller (also claiming controller system) 110, connector 120 and flash memory 130.
Usually flash storage system 100 can use with main frame 200, so that main frame 200 can write to data flash storage system 100 or reading of data from flash storage system 100.In the present embodiment, flash storage system 120 be solid state hard disc (Solid State Drive, SSD).But it must be appreciated that flash storage system 100 can also be storage card or coil with oneself in another embodiment of the present invention.
In the present embodiment, memory management module 110b is implemented in the controller 110 with a firmware pattern, for example write the instruction of program associated mechanical and (for example be stored in program storage with program language, ROM (read-only memory) (Read Only Memory, ROM)) is implemented memory management module 110b.When flash memory storage system 100 runnings, a plurality of machine instructions of memory management module 110b can be loaded on indirectly among the memory buffer 110d and by microprocessor unit 110a and carry out or directly carried out to finish above-mentioned average abrasion function, bad block management function, service logic-physical blocks mapping table function etc. by microprocessor unit 110a.Particularly, controller 110 is finished block management step according to the embodiment of the invention by a plurality of mechanical orders of execute store administration module 110b.
In another embodiment of the present invention, the mechanical order of memory management module 110b can also the firmware pattern be stored in the specific region (for example, being exclusively used in the system region of storage system data in the flash memory) of flash memory 130.Same, when flash memory storage system 100 runnings, a plurality of machine instructions of memory management module 110b can be loaded among the memory buffer 110d and by microprocessor unit 110a to be carried out.In addition, memory management module 110b can also a hardware pattern be implemented in the controller 110 in another embodiment of the present invention.
Flash memory interface module 110c is coupled to microprocessor unit 110a and in order to access flash storer 130.Just, the data of desiring to write to flash memory 130 can be converted to 130 receptible forms of flash memory via flash memory interface module 110c.
The instruction that host interface module 110e is coupled to microprocessor unit 110a and is transmitted in order to reception and identification host computer system 200.Just, the instruction and the data that are transmitted of host computer system 200 can be sent to microprocessor unit 110a by host interface module 110e.In the present embodiment, host interface module 110e is the SATA interface.Yet, it must be appreciated to the invention is not restricted to this that host interface module 110e can also be USB interface, IEEE1394 interface, PCI Express interface, MS interface, MMC interface, SD interface, CF interface, ide interface or other data transmission interfaces that is fit to.Particularly, host interface module 110e can be corresponding with connector 120.Just, host interface module 110e must arrange in pairs or groups mutually with connector 120.
In addition, though be not illustrated in present embodiment, controller 110 can comprise that also error correction module and power management module etc. are used to control the general utility functions module of flash memory.
Flash memory 130 is electrically connected to controller 110 and in order to storage data.Flash memory 130 is multilayer storage unit (Multi Level Cell, MLC) a NAND flash memory in this enforcement.Yet, it must be appreciated, the invention is not restricted to this.In another embodiment of the present invention, (Single Level Cell, SLC) the NAND flash memory also can be applicable to the present invention to the individual layer storage unit.Flash memory 130 is divided into a plurality of physical blocks (physical block) usually in fact.Generally speaking, physical blocks is the least unit of wiping in flash memory.That is each physical blocks contains the storage unit that is wiped free of in the lump of minimal amount.Each physical blocks can be divided into several page addresses (page) usually.The page address is generally the minimum unit of programming (program).But what specify is in some different flash memory design, and minimum unit of program also can be a sector (sector).That is to say a plurality of sectors are arranged in the page address and to be the minimum unit of programming with a sector.In other words, the page address is the minimum unit that writes data or reading of data.Each page address generally includes user data field D and redundant area R.The user data field is in order to storage user's data, and redundant area is in order to data (for example, the error-correcting code (error correcting code, ECC)) of stocking system.
Be sector (sector) size corresponding to disc driver, generally speaking, user data field D is generally 512 bytes, and redundant area R is generally 16 bytes.Just, one page is a sector.Yet, can also form one page in a plurality of sectors, for example one page comprises 4 sectors.
Generally speaking, physical blocks can be made up of the page address of arbitrary number, for example 64 page addresses, 128 page addresses, 256 page addresses etc.Physical blocks also can be grouped into several zones (zone) usually, and coming diode-capacitor storage with the zone is to operate independently of one another with the parallel degree of increase operation execution and the complexity of streamlining management in a way.
Fig. 2 A and 2B are the synoptic diagram that illustrates the storage area 130a of Fig. 1 according to the embodiment of the invention.
It must be appreciated that coming the physical blocks of operating flash storer 130 with speech such as " extraction ", " moving ", " exchange ", " replacement ", " rotating ", " cutting apart ", " divisions " when this describes the running of flash memory is in logic notions.That is to say that the physical location of the physical blocks of flash memory is not changed, but in logic the physical blocks of flash memory is operated.What deserves to be mentioned is that the running of following physical blocks is finished by the mechanical order of controller 110 execute store administration module 110b.
Please refer to Fig. 2 A, in embodiments of the present invention, in order to programme (promptly efficiently, write and wipe) flash memory 130, controller 110 can logically be grouped into a system region 202 (promptly with the physical blocks of storage area 130a, physical blocks 1～physical blocks S), a data field 204 (that is physical blocks (S+1)～physical blocks (S+M)) and a spare area 206 (that is physical blocks (S+M+1)～physical blocks (S+M+C)).As previously mentioned, the physical blocks of flash memory 130 can provide main frame to come storage data in the mode of rotating, therefore controller 110 can provide logical blocks 210-1～210-M to main frame carrying out data access, and write down the physical blocks of logical blocks institute mapping by service logic-physics mapping table.In the present embodiment, above-mentioned S, M and C are positive integer, the physical blocks quantity of each district's configuration of its representative, and it can be set according to the capacity of employed flash memory by the manufacturer of flash storage system.
Physical blocks in the system region 202 is in order to the register system data, and system data for example is about the logic-physics mapping table (logical-physical mapping table) of page address number, record logical blocks and the physical blocks enantiomorphic relationship of the number of regions of flash memory 130, physical blocks number that each is regional, each physical blocks etc.
In general physical blocks in the data field 204 is exactly the block of the logical blocks institute mapping of 200 accesses of main frame in order to store user's data.
Therefore physical blocks in the spare area 206 is in order to the physical blocks in the replacement data district 204, and the physical blocks in spare area 206 be sky or spendable block, i.e. no record data or be labeled as invalid data useless.
Particularly, data field 204 can store the data that 200 pairs of flash storage systems 100 of host computer system write in the mode of rotating with the physical blocks of spare area 206.Specifically, because only can programme once in each address in flash memory, therefore if will be when writing Data Position and write data once more, the action that execution is earlier wiped.Yet the flash memory unit of writing is the page as previously mentioned, and it is less than being the erase unit of unit with the physical blocks.Therefore, if will carry out the erasing move of physical blocks the time, must be first the data of desiring to wipe the effective page address in the physical blocks be copied to the erasing move that just can carry out physical blocks after other physical blocks.
For example, when main frame desired to write data to logical blocks 210-1 (that is, logical blocks 1), controller 110 can learn that logical blocks 1 is the physical blocks (S+1) in the mapping data field 204 at present by logic-physics mapping table.Therefore, flash storage system 100 will upgrade the data in the physical blocks (S+1), during, controller 110 meetings extracts physical block (S+M+1) from spare area 206 replaces the physical blocks (S+1) of data field 204.Yet, when new data being gone into, can at once all valid data in the physical blocks (S+1) not moved to physical blocks (S+M+1) and wipe physical blocks (S+1) to physical blocks (S+M+1).Specifically, controller 110 can be copied to physical blocks (S+M+1) (as (a) of Fig. 2 B) with desiring to write page address valid data (i.e. page or leaf P0 and P1) before in the physical blocks (S+1), and new data (being the page or leaf P2 and the P3 of physical blocks (S+M+1)) is write to physical blocks (S+M+1) (as (b) of Fig. 2 B).At this moment, the physical blocks (S+M+1) that will contain effective legacy data and the new data that writes of part temporarily is associated as replacement physical blocks 208.This is because the valid data in the physical blocks (S+1) might be in next operation (for example, write instruction) in become invalidly, therefore at once all valid data in the physical blocks (S+1) are moved to replacing physical blocks (S+M+1) and may be caused meaningless moving.In this case, the content integration of physical blocks (S+1) and replacement physical blocks (S+M+1) gets up to be only the complete content of institute's mapping logical blocks 1.These mother and child blocks (that is, physical blocks (S+1) and replacement physical blocks (S+M+1) can decide according to the size of memory buffer 110d in the controller 110, for example generally can use five groups and implement by) transient state relation.The action of temporarily keeping this transient state relation generally can be described as unlatching (open) mother and child blocks.
Afterwards, in the time physical blocks (S+1) really need being merged with the content of replacing physical blocks (S+M+1), controller 110 just can be put in order physical blocks (S+1) and replacement physical blocks (S+M+1) and be a block, promote the service efficiency of block thus, the action of this merging can be described as again closes (close) mother and child blocks.For example, shown in Fig. 2 B (c), when closing mother and child blocks, controller 110 can be with remaining valid data in the physical blocks (S+1) (promptly, page or leaf P4～PN) is copied to and replaces physical blocks (S+M+1), then spare area 206 is wiped and be associated as to physical blocks (S+1), simultaneously, to replace physical blocks (S+M+1) and be associated as data field 204, and the mapping with logical blocks 1 in logic-physics mapping table changes to physical blocks (S+M+1), finishes the action of closing mother and child blocks thus.
Along with the capacity of flash memory becomes greatly gradually, make that opening above-mentioned mother and child blocks can increase with the time of moving effective legacy data thereupon, therefore can make controller 110 finish to write the instruction required time longer.Therefore, controller 110 can be divided the part physical blocks in the flash memory 130 as getting district 130b soon in the present embodiment.
The physical blocks of getting soon among the district 130b is the data that write in order to temporary host computer system 200.That is to say, assign writing when instruction when 200 pairs of flash storage systems 100 of host computer system, controller 110 can be temporary in the data of desiring to write and get soon among the district 130b, and replys host computer system 200 and finished this and write instruction.Afterwards, controller 110 can during non-busy (non-busy) of flash storage system 100, will get district 130b soon data-moving to the data field 204.Just, controller 110 can will be temporary in the running (shown in Fig. 2 B) that the non-busy period of flash storage system 100 is carried out above-mentioned unlatching mother and child blocks consuming time and get the data of distinguishing among the 130b soon and write in its physical blocks that should write.
Fig. 2 C is the synoptic diagram of getting district 130b soon that illustrates Fig. 1 according to the embodiment of the invention.
Please refer to Fig. 2 C, controller 110 meetings in the present embodiment will be got district 130b soon and are divided into a plurality of subarea 220-1～220-N that get soon, and dispose one of them (at this, N and M are positive integer) of getting subarea 220-1～220-N soon respectively for logical blocks 210-1～210-M.That is to say that each logical blocks can corresponding specific subarea of getting soon.In general, the number of getting the subarea soon can be less than the logical blocks number, and the subarea is got in shared one of therefore a plurality of logical blocks meetings soon.
Afterwards, the data that host computer system 200 write when controller 110 are temporary in when getting district 130b soon, and controller 110 can be got temporary disposed specific of data in the subarea soon according to the logical blocks of desiring to write.For example, controller 110 can be got subarea 220-P to be used for logical blocks 210-K soon with configuration in the present embodiment, and wherein K and P are that integer and P are the remainder of K divided by N, as shown in the formula (1):
P＝K(mod?N)1≦K≦M (1)
Just, for example suppose in the present embodiment that N is at 4 o'clock, the data of then desiring to write to logical blocks 210-1,210-5,210-9... can be temporary in gets among the 220-1 of subarea soon, the data of desiring to write to logical blocks 210-2,210-6,210-10... can be temporary in gets among the 220-2 of subarea soon, and the data of desiring to write to logical blocks 210-3,210-7,210-11... can be temporary in the data of getting among the 220-3 of subarea soon and desiring to write to logical blocks 210-4,210-8,210-12... and can be temporary in and get soon among the 220-4 of subarea.
Be logical blocks to be corresponded in discontinuous mode get the subarea soon in the present embodiment.Yet, in another embodiment of the present invention, can also continuous logical blocks come correspondence to get the subarea soon.For example, logical blocks 210-1,210-2,210-3...210-S can correspondence get subarea 220-1 soon in above-mentioned example, logical blocks 210-(S+1), 210-(S+2), 210-(S+3) ... the corresponding 220-2 of 210-2S meeting, logical blocks 210-(2S+1), 210-(2S+2), 210-(2S+3) ... the 210-3S corresponding 220-3 of meeting and logical blocks 210-(3S+1), 210-(3S+2), 210-(3S+3) ... can corresponding 220-4.
In addition, be to set logical blocks and the configuration relation of getting the subarea soon in advance in the present embodiment with static mode.Yet, in another embodiment of the present invention also can in controller 110 temporal datas when getting the subarea soon with dynamical fashion set disposed get the subarea soon.For example, when controller 110 is desired temporal data when getting the subarea soon, it can judge whether the logical blocks under these data has disposed the specific subarea of getting soon, if the logical blocks under these data also do not dispose specific when getting the subarea soon controller 110 can select to get soon at present that minimum logical blocks is used among the subarea gets the subarea soon and get the subarea soon as its correspondence.
As mentioned above, controller 110 is to dispose with logical blocks to get the subarea soon in the present embodiment, and just the logical blocks of desiring to write according to data writes to different getting in the subarea soon.Yet, in another embodiment of the present invention, controller 110 can also storage area 130a the physical blocks subarea of dividing into groups to get soon, just the physical blocks of desiring to write to storage area 130a according to data writes to different getting soon in the subarea, wherein its packet mode also as mentioned above the mode of formula (1) set physical blocks and the configuration relation of getting the subarea soon.
What deserves to be mentioned is, be to get the subarea soon as one in the present embodiment, but the invention is not restricted to this, in another embodiment of the present invention, can also a plurality of physical blocks get the subarea soon as one with the size of a physical blocks.
Describe the method for above-mentioned flash storage system 100 management blocks in detail below with reference to accompanying drawing.
Fig. 3 is the process flow diagram that illustrates the block management step according to the embodiment of the invention, and wherein these steps are that the mechanical order of the microprocessor unit 110a execute store administration module 110b of controller 110 is finished.It must be appreciated that block management step proposed by the invention is not limited to execution sequence shown in Figure 3, those skilled in the art can change the order of block management step according to spirit of the present invention arbitrarily.
Please refer to Fig. 3, flash memory 130 can be divided into storage area 130a and get district 130b soon at step S301 middle controller 110.Then, in step S303, controller 110 can will be got district 130b soon and be divided into a plurality of subarea 220-1～220-N that get soon.Divide the method for getting district 130b soon and described in detail as above, no longer be repeated in this description at this.
Understand configuration logic block 210-1～210-M for host computer system 200 accesses at step S305 middle controller 110, and in step S307, can set logical blocks 210-1～210-M and the configuration relation of being divided of getting subarea 220-1～220-N soon.
Afterwards, can await orders and receive writing of host computer system 200 in step S309 instructs and data.It must be appreciated, in this process flow diagram, only describe flash storage system 100, therefore in step S309, only just produce follow-up running when instructing in receiving to write at writing the performed specific step of instruction.Yet, also can carry out other instructions (for example, reading command) at flash storage system 100.
In that step S311 middle controller 110 can logical blocks under the data confirms that it disposes gets the subarea soon according to desiring to write.Then, data can be temporary in getting in the subarea soon of being disposed at step S313 middle controller 110.
Then, can judge getting soon whether have any one to get the subarea soon and be filled with data among the district 130b at step S315 middle controller 110.If judging in step S315 has one of them to get the subarea soon when being filled with data, then step S317 middle controller 110 can arrangement this be filled with data get the subarea soon.That is to say that controller 110 can write to the storage area with these data of getting soon in the subarea, and will get the subarea to this soon and carry out the block erase action.Getting soon when the subarea just can continue to provide 110 execution of subsequent control device to write instruction after this is wiped free of used.
Then, step S319 middle controller 110 can be in logic-physical blocks mapping watch record or upgrade get mark soon and whether be temporary in soon with the expression data and get in the subarea.Specifically, controller 110 can be in logic-physical blocks mapping watch 400 data of a newly-increased bit (bit) represent whether data are temporary in soon and get in the subarea.For example, logic-physical blocks mapping watch 400 comprises logical blocks field 402, physical blocks field 404 and gets tag field 406 soon, wherein logical blocks field 402 and physical blocks field 404 are in order to the logical blocks and the physical blocks of record mapping, if and this value of getting soon in the tag field 406 represents that the partial data of this logical blocks is to exist to get soon among the district 130b when " 1 ", if this then represents that the data of this logical blocks there is no existence and get soon among the district 130b when getting value in the tag field 406 for " 0 " soon.For example, shown in the example among Fig. 4, logical blocks 1 is that the partial data in mapping physical blocks (S+1) and the logical blocks 1 is in getting district 130b soon.
Simultaneously, can set up and safeguard a data address table 500 in the logical blocks that get district 130b soon for data are arranged at step S321 middle controller 110, wherein this data address watch 500 be that data in order to each page address of writing down each logical blocks are actually at present and which is stored in gets in the subarea soon.For example, in an embodiment of the present invention, data address watch 500 comprises logical blocks field 502, logical page address field 504, gets subarea 506, physical blocks field 508 and physical page address field 510 soon as shown in Figure 5.For example, the data of learning the page address 0 of logical blocks 1 during from then on controller 110 can write down are to be recorded in the page address 2 of the physical blocks 1 of getting subarea 220-1 soon (example as shown in Figure 5).Can be when afterwards, controller 110 is carried out reading command according to the information that is write down at step S319 and S321 reading of data correctly.What deserves to be mentioned is, the recorded address table of step S319 and S321 can make controller 110 read apace desire to read data on the address.Yet, in another embodiment of the present invention, controller 100 also directly the information from the redundant area R of page address seek out the correct address of record data and do not need the recorded data addresses table.
After step S321, the block management step can be back to waits among the step S309 that the next one writes instruction.Though be not illustrated among Fig. 3, the block management step that those skilled in the art can understand Fig. 3 easily can receive shutdown or power interruption instruction back end.
What deserves to be mentioned is, in another embodiment of the present invention, controller 110 can be before flash storage system 100 shutdown (for example be stored in the flash memory 130 with above-mentioned division of getting the district soon and with the configuration relation of logical blocks, system region 202), therefore when flash storage system 100 starts once more, controller 110 can directly read stored data and not need once more the step of execution in step S301, S303 and S305.
In addition, in another embodiment of the present invention, also can omit in the step of above-mentioned steps S315 and S317.Specifically, controller 110 not can correspondence get the action of putting in order at once when the subarea is filled with data soon, get the subarea soon but earlier data are temporary in other, and the action of just putting in order at the non-busy period of flash storage system 100 afterwards.As shown in Figure 6, can judge at step S601 middle controller 110 and corresponding get the subarea soon and whether be filled with data.If when judging that in step S601 get the subarea soon also is not filled with data, execution in step S313 then if when judging that in step S601 getting the subarea soon has been filled with data, then can be temporary in these data at another at step S603 middle controller 110 and get in the subarea soon.
What deserves to be mentioned is that the flash memory 130 of the embodiment of the invention is a MLC NAND flash memory, and the programming of the physical blocks of MLC NAND flash memory can be divided into the multistage.For example, be example with 4 layers of storage unit, the programming of physical blocks can be divided into for 2 stages.Phase one is the part that writes of following page address (lower page), its physical characteristics is similar to individual layer storage unit SLC NAND flash memory, page address (upper page) on just can programming after finishing the phase one wherein descends the writing speed of page address can be faster than last page address.Therefore, the page (that is last page address) and the quick page (that is following page address) at a slow speed can be divided in the page address of each physical blocks.Similarly, in the case of 8 layers of storage unit or 16 layers of storage unit, storage unit can comprise more a plurality of page addresses and can be so that more the multistage writes.At this, the page address that writing speed is the fastest is called page address down, and the slower page address of other writing speeds is referred to as page address.For example, last page address comprises a plurality of pages with different writing speeds.In addition, in other embodiments, last page address also can be the slowest page of writing speed, perhaps writing speed the slowest with writing speed partly faster than the writing speed page of the slow page.For example, in 4 layers of storage unit, following page address is the fastest and writing speed time fast page of writing speed, and last page or leaf then is the slowest and writing speed time slow page of writing speed.Therefore, in another embodiment of the present invention, controller 110 can utilize down the page address writing speed, and characteristic is only temporary to the following page address of the physical blocks of getting the subarea soon with data in execution in step S311 faster, to quicken to get soon the writing speed of district 130b.
In sum, the present invention will get zoning soon and be divided into a plurality of subareas of getting soon, and with logical blocks grouping corresponding specific get the subarea soon, according to different logical blocks data are temporary in specific getting in the subarea soon in getting Qu Shike soon at temporal data thus.Base this, need put in order when flash storage system and to get the district soon the time can to get the subarea soon be that unit is put in order, to reduce the required time of moving data.Moreover, because same data of getting soon are to belong to the certain logic block in the subarea in, therefore can avoid causing the wearing and tearing that need whole also too much logical blocks and cause physical blocks because data too are scattered in different logical blocks.
Though the present invention discloses as above with preferred embodiment; right its is not in order to limit the present invention; those skilled in the art can do some changes and retouching under the premise without departing from the spirit and scope of the present invention, so protection scope of the present invention is as the criterion with claim of the present invention.
Claims (15)
1. block management method is suitable for managing a flash memory of a flash storage system, and this block management method comprises:
This flash memory is divided into one gets a district and a storage area soon, wherein this storage area has a plurality of physical blocks respectively;
This is got zoning soon be divided into a plurality of subareas of getting soon, wherein each is got the subarea soon and has at least one physical blocks;
Dispose a plurality of logical blocks, wherein said logical blocks is the physical blocks of this storage area of mapping; And
Set a described logical blocks and a described configuration relation of getting the subarea soon, wherein each described logical blocks can corresponding describedly be got one of them of subarea soon,
Wherein when this main frame writes data to described logical blocks, temporary extremely the described of described logical blocks correspondence of these data got in the subarea soon.
2. block management method as claimed in claim 1 also comprises when one of them is described and gets soon and will be temporarily stored in these one of them data of getting soon in the subarea when subarea has been filled with data and write in this storage area.
3. block management method as claimed in claim 1 comprises that also getting the subarea soon when described logical blocks correspondence described is temporary in these data when not having the space and can store these data other and describedly gets in the subarea soon.
4. block management method as claimed in claim 1 wherein comprises the corresponding described step of getting the subarea soon of described logical blocks according to what write these data when this main frame extremely described present utilization rate of getting the subarea is soon distributed described logical blocks correspondence during described logical blocks and gets the subarea soon.
5. block management method as claimed in claim 1 also comprises:
To get mark soon be to be temporary in describedly to get in the subarea soon with the data of representing described logical blocks to record one in one logic-physical blocks mapping watch; And
Set up a data address table with the physical page address of record in order to the data of each page address of storing each logical blocks.
6. block management method as claimed in claim 1,
Wherein this is got soon zoning and be divided into described step of getting the subarea soon and comprise that this is got zoning soon is divided into N and gets the subarea soon, and dispose described logical blocks and comprise M logical blocks of configuration for this main frame access step, wherein N and M are positive integer, and
Wherein the corresponding described step of getting the subarea soon of described logical blocks is comprised the corresponding P of K logical blocks is got the subarea soon, wherein K equals the remainder of K divided by N for positive integer and P less than (M+1).
7. block management method as claimed in claim 1, wherein this flash memory is that a multilayer storage unit NAND flash memory and described physical blocks of getting the subarea soon have a plurality of page addresss and writing speeds gone up faster than described a plurality of page addresss that descend of going up page address, and
Wherein the temporary described step of getting soon in the subarea to described logical blocks correspondence of these data is comprised these data only temporary to the described described page address down of getting the subarea soon.
8. a block management device is applicable to a flash memory of managing a flash storage system, and this block management device comprises:
Be used for that this flash memory is divided into one and get the parts of distinguishing with a storage area soon, wherein this storage area has a plurality of physical blocks respectively;
Be used for that this is got zoning soon and be divided into a plurality of parts of getting the subarea soon, wherein each is got the subarea soon and has at least one physical blocks;
Be used to dispose the parts of a plurality of logical blocks, wherein said logical blocks is the physical blocks of this storage area of mapping;
Be used to set described logical blocks and the described parts of getting a configuration relation in subarea soon, wherein each described logical blocks can corresponding describedly be got one of them of subarea soon; And
Be used for when this main frame writes data to described logical blocks the temporary described parts of getting the subarea soon of these data to described logical blocks correspondence.
9. block management device as claimed in claim 8, wherein also comprise be used for when one of them is described get soon will be temporarily stored in when the subarea has been filled with data this one of them get the subarea soon data write to parts in this storage area.
10. block management device as claimed in claim 8 comprises also that wherein being used for getting the subarea soon when described logical blocks correspondence described is not temporary in other described parts of getting the subarea soon with these data when having the space and can store these data.
11. block management device as claimed in claim 8 comprises also that wherein being used for foundation described present utilization rate of getting the subarea soon when this main frame writes these data to described logical blocks distributes the parts of getting the subarea soon of described logical blocks correspondence.
12. block management device as claimed in claim 8 wherein also comprises:
Being used for getting mark soon at one logic-physical blocks mapping watch record one is to be temporary in the described parts of getting soon in the subarea with the data of representing described logical blocks; And
Be used to set up a data address table with the parts of record in order to the physical page address of the data of each page address of storing each logical blocks.
13. block management device as claimed in claim 8,
Comprise also that wherein being used for that this is got zoning soon is divided into N and gets the subarea soon, and dispose described logical blocks and comprise the parts that dispose M logical blocks that wherein N and M are positive integer for this main frame access step, and
Comprise also wherein being used for the corresponding P of K logical blocks is got the parts in subarea soon that wherein K equals the remainder of K divided by N for positive integer and P less than (M+1).
14. block management device as claimed in claim 8, wherein this flash memory is a multilayer storage unit NAND flash memory, and the physical blocks of this flash memory has a plurality of page addresss and writing speeds gone up faster than described a plurality of page addresss that descend of going up page address, and
Wherein this controller also comprise be used for these data only temporary to the described described parts of page address down of getting the subarea soon.
15. a block management method is suitable for managing a flash memory of a flash storage system, this block management method comprises:
This flash memory is divided into one gets a district and a storage area soon, wherein this storage area has a plurality of physical blocks;
This is got zoning soon be divided into a plurality of subareas of getting soon, wherein each is got the subarea soon and has at least one physical blocks; And
Set the described physical blocks and a described configuration relation of getting the subarea soon of this storage area, wherein the described physical blocks of each of this storage area can corresponding describedly be got one of them of subarea soon,
Wherein when writing data to the described physical blocks of this storage area, gets in the subarea soon to the described of described physical blocks correspondence of this storage area these data are temporary by this main frame.
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| CN102043721B (en) * | 2010-05-12 | 2016-10-26 | 中颖电子股份有限公司 | Flash memory storage management method |
| CN105389268B (en) * | 2014-09-04 | 2018-08-28 | 光宝科技股份有限公司 | Data storage system and its operation method |
| CN105988950B (en) * | 2015-02-03 | 2019-05-21 | 群联电子股份有限公司 | Storage management method, memorizer control circuit unit and memory storage apparatus |
| TWI645289B (en) * | 2017-10-31 | 2018-12-21 | 慧榮科技股份有限公司 | Data storage device and control method for non-volatile memory |
| CN110851372B (en) * | 2018-08-20 | 2023-10-31 | 慧荣科技股份有限公司 | Storage device and cache area addressing method |
| US20200151119A1 (en) * | 2018-11-08 | 2020-05-14 | Silicon Motion, Inc. | Method and apparatus for performing access control between host device and memory device |
| TWI746261B (en) * | 2020-11-12 | 2021-11-11 | 財團法人工業技術研究院 | Cache managing method and system based on session type |
| CN112612425B (en) * | 2020-12-30 | 2021-08-13 | 北京北方华创微电子装备有限公司 | Data read-write method and control device of semiconductor processing equipment |
| CN116236000A (en) * | 2021-12-08 | 2023-06-09 | 比亚迪精密制造有限公司 | Data storage control method of electronic cigarette, electronic cigarette and computer readable storage medium |
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