CN101551690A - Low-noise gap benchmark voltage circuit controlled by numerical switch - Google Patents

Abstract

The invention discloses a low-noise gap benchmark voltage circuit controlled by a numerical switch. The circuit provides a group of numerical switches to control the PNP transistor array; the numerical signal controls the PNP pipe to change the outputting reference voltage value; two ends of the PNP array are respectively connected to R1 of the POLY resistance and the ground. The switch controls the PNP transistor array; the quantity of the pipe is encoded by one coder; the inputting end of the coder is controlled by the numerical signal; the quantity of the PNP pipes of the PNP transistor array is more than 100. The advantages of the invention are the precise controllable outputting voltage by using the PNP transistor array controlled by the numerical signal without the Trimming, achieving the low noise. The circuit structure is suitable for the precise outputting voltage and the tough radio frequency and simulative system.

Description

A kind of low-noise gap reference voltage circuit that adopts digital switch control

Technical field

The present invention relates to a kind of bandgap voltage reference circuit, relate in particular to a kind of low-noise gap reference voltage circuit that adopts digital switch control, belong to the Analogous Integrated Electronic Circuits technical field.

Background technology

The purpose of bandgap voltage reference, it is irrelevant to obtain one and power supply and technology, has the DC voltage of definite temperature characterisitic.Along with the development of wireless communication technique and integrated circuit technology, the generation of accurate bias voltage and low noise biasing is paid close attention to widely.For overwhelming majority's simulation and radio system, band-gap reference circuit all is an indispensable part.Accurate bias voltage is the target that people pursue always, and traditional method normally adopts Trimming that the bandgap voltage reference circuit is proofreaied and correct, thereby obtains accurate output reference voltage, but compares complexity like this; And low noise biasing generates, and seems particularly important in wireless communication system, and some radio circuits are very harsh to the requirement of noise, make traditional bandgap voltage reference circuit to be competent at.

Accompanying drawing 1 is the synoptic diagram of traditional bandgap voltage reference circuit.The input end of error operational amplifier 101 is connected to the drain electrode of transistor M1 and M2 respectively, utilizes the error operational amplifier to realize negative feedback, thereby makes the voltage of 2 of amplifier input ends equate; A pair of resistance 102, wherein the two ends of resistance R 1 are connected to the drain electrode of transistor M2 and the collector of PNP transistor Q2 respectively, and the two ends of another resistance R 2 are connected to the emitter of PNP transistor Q3 and the output terminal Vref of reference circuit respectively; Current mirror offset 103 obtains three tunnel electric currents that equate by the current mirror biasing; One group of PNP transistor 104, the ratio of its transistor number is Q 1: Q3: Q2=1: 1: M.

The output voltage of this circuit of deriving can get: $V_{\mathrm{ref}}=V_{\mathrm{be}3}+{\mathrm{<figure-callout\; id="2"\; label="IR"\; filenames="A20091005062800121.png"\; state="\{\{state\}\}">IR</figure-callout>}}_2=V_{\mathrm{be}3}+\frac{R_2}{R_1}{V}_T\ln \left(M\right)---\left(1\right)$ This circuit passes through V _Be3Negative temperature coefficient and V _TPositive temperature coefficient (PTC) offset, thereby obtain the irrelevant output reference voltage of and temperature.Yet the shortcoming of sort circuit structure mainly is:

1, owing to the deviation of technology, the result of emulation has any different when the result of actual flow built-in testing and design, makes actual output reference voltage and emulation compare and has produced deviation.

2, the not special noiseproof feature of considering circuit of this circuit makes it be difficult to be applied in the radio frequency and simulation system to the noise requirements harshness.

Summary of the invention

In order to solve two above problems, the present invention proposes a kind of low-noise gap reference voltage circuit that adopts digital switch control; This circuit comprises the error operational amplifier, be total to grid common source current biasing circuit, start-up circuit and a pair of POLY resistance, it is characterized in that, set of number switch control PNP transistor array is set, by Digital Signals PNP pipe gating, to change the output reference voltage value, PNP pipe array two ends are connected to respectively between the R1 and ground in the POLY resistance.

Described switch control PNP transistor array, its gating number is encoded by a code translator, and the input end of code translator is by Digital Signals.

R2 one end in the described POLY resistance is connected with another PNP pipe Q 1 emitter, and the other end is connected to reference output voltage end V _Ref

PNP number of tubes in the described PNP transistor array is greater than 100.

Transistor M2, M5 in the described grid common source biasing circuit altogether and the bias current of M3, M6 flow through PNP transistor Q1 jointly.

The invention has the advantages that, owing to adopt the transistorized gating of Digital Signals PNP, thus obtain adjustable output reference voltage scope, consider certain process deviation, make deviation drop in the adjustable voltage range.Aspect noise, consider all noise sources during design, and reduce it respectively, realize low noise.This circuit structure is applicable to the output voltage requirement accurate simultaneously, in the radio frequency and simulation system to the noise requirements harshness.

Description of drawings

Fig. 1 is a bandgap voltage reference circuit commonly used.

Fig. 2 adopts the low-noise gap reference voltage circuit schematic diagram of digital switch control for the present invention.

Fig. 3 is switch control PNP transistor array figure.

Fig. 4 is the noise analysis schematic diagram of bandgap voltage reference circuit.

Embodiment

Further specifically describe the present invention below in conjunction with accompanying drawing.

Fig. 2 is circuit theory diagrams of the present invention, is made of following several parts:

Error operational amplifier 201, transistor AM1 and AM2 be amplifier input to the pipe, transistor AM3 and AM4 form the active load of amplifier, the input two ends of amplifier are connected to the drain electrode of transistor M4 and M5 respectively, and output terminal is connected to the grid of transistor M1, M2, M3, M7 and M9, utilize the error operational amplifier to realize negative feedback, thereby make the voltage of Vinp and Vinn equate at 2.

Poly resistance 202, wherein an end of resistance R 1 is connected to the drain electrode of transistor M4, and the other end is connected to the input end of PNP array, and the two ends of resistance R 2 are connected to the emitter of PNP transistor Q1 and the output terminal Vref of reference circuit respectively.

Cascode structure is adopted in current mirror biasing 203, and the bias current of accurate coupling is provided for circuit.

Start-up circuit 204, transistor SM1 wherein are down than pipe to have less power consumption after the unlatching of assurance start-up circuit and the unlatching.Because the use of common-source common-gate current mirror, cause existing in the circuit two degeneracy points, therefore, the drain electrode of SM3, SM4 is connected in the current mirror biasing 203 transistorized two grids respectively and starts fully guaranteeing.

Building-out capacitor 205, the two ends of building-out capacitor are connected to the grid of transistor M1, M2, M3, M7 and M9 and the output terminal Vref of reference circuit respectively, for loop provides Miller building-out capacitor.

One group of switch control PNP transistor array 207 (consults and provided detail circuits figure in the accompanying drawing 3), PNP transistor array by a fixing PNP transistor and the control of some groups of MOS switches is formed, the two ends of PNP array be connected to respectively with an end of resistance R 1.

A code translator 208 is encoded to the gating number of PNP transistor array, and the input end of code translator is by Digital Signals.

Further specifically describe the present invention below in conjunction with accompanying drawing 2:

Design M ₁, M ₂, M ₃Breadth length ratio be consistent, can flow through M ₁, M ₂, M ₃The bias current unanimity.The gating number of supposing the PNP transistor array of switch control is M, and the voltage difference of base stage and emitter is V _Be2, and the voltage at amplifier input two ends is in full accord, as can be known:

IR ₁+V _be2＝V _be1 (2)

$\&DoubleRightArrow;{\mathrm{<figure-callout\; id="1"\; label="IR"\; filenames="A20091005062800091.png,A20091005062800121.png"\; state="\{\{state\}\}">IR</figure-callout>}}_1=V_{\mathrm{be}1}-V_{\mathrm{be}2}=V_T\ln \left(\frac{2I}{I_s}\right)-V_T\ln \left(\frac{I}{{\mathrm{MI}}_s}\right)=V_T\ln \left(2M\right)---\left(3\right)$

$\&DoubleRightArrow;I=\frac{V_T\ln \left(2M\right)}{R_1}---\left(4\right)$

$\&DoubleRightArrow;V_{\mathrm{ref}}=V_{\mathrm{be}1}+{\mathrm{<figure-callout\; id="2"\; label="IR"\; filenames="A20091005062800121.png"\; state="\{\{state\}\}">IR</figure-callout>}}_2=V_{\mathrm{be}1}+\frac{R_2}{R_1}{V}_T\ln \left(2M\right)---\left(5\right)$

Consider process deviation, if do not control, the output reference voltage V that actual test obtains _RefMay swing about tens millivolts at simulation value,, consider formula (5),, promptly can realize the adjustment of output reference voltage if can control the number of PNP transistor M in order to obtain accurate voltage output.For this reason, specialized designs switch control PNP transistor array, as shown in Figure 3, make output reference voltage to change along with the variation of digital signal.The estimation of deviation that we can output reference voltage take place with the technology maximum possible designs the PNP transistor array then interior, makes the maximum deviation that the variation range of output reference voltage can covering process.Like this, we just can access comparatively accurate output reference voltage.The control accuracy of output voltage will be determined by the minimum step of PNP transistor array.

Fig. 3 is a switch control PNP transistor array synoptic diagram, is made up of the PNP array of a fixing PNP transistor and some groups of MOS switch controls, controls by a code translator then.For example, when digital signal chose S1 to be high level, the base potential of Q3 was pulled to supply voltage, not conducting of Q3; When digital signal chose S1 to be low level, the base potential of Q3 was pulled to ground, and Q3 is selected.

Below the noise of bandgap voltage reference circuit is analyzed, as shown in Figure 4, output noise comprises three parts: first is the equivalent input noise V of amplifier _n ², multiply by noise gain (R2/R1) ²After, equivalence is the output noise of Bandgap; Second portion is a power supply noise, converts the input end of amplifier earlier, multiply by (R2/R1) then ²Equivalence is an output noise; Third part is a resistance noise, and wherein, the noise of resistance R 2 is directly delivered to output, resistance R ₁Noise multiply by (R2/R1) ²After convert output.Therefore can obtain following total equivalent output noise expression formula:

$\stackrel{\&OverBar;}{{V_{n,\mathrm{<figure-callout\; id="2"\; label="ref"\; filenames="A20091005062800121.png"\; state="\{\{state\}\}">ref</figure-callout>}}}^2}={\left(\frac{R_2}{R_1}\right)}^2\stackrel{\&OverBar;}{{V_{\mathrm{<figure-callout\; id="2"\; label="n"\; filenames="A20091005062800121.png"\; state="\{\{state\}\}">n</figure-callout>}}}^2}+{\left(\frac{R_2}{R_1}\right)}^2{\left|\frac{1}{A_u}\right|}^2\stackrel{\&OverBar;}{{V_{n,\mathrm{<figure-callout\; id="2"\; label="vdd"\; filenames="A20091005062800121.png"\; state="\{\{state\}\}">vdd</figure-callout>}}}^2}+\stackrel{\&OverBar;}{{V_{n,R1}}^2}+{\left(\frac{R_2}{R_1}\right)}^2\stackrel{\&OverBar;}{{V_{n,R2}}^2}---\left(6\right)$

(V wherein _{N, R1} ², V _{N, R2} ²Be respectively resistance R 1, the voltage noise of R2, V _{M, vdd} ²Be power supply noise, V _n ²Be the equivalent input noise of amplifier among the Bandgap, A _uBe input to the differential gain of power supply for amplifier.)

Visible noise gain (R2/R1) is the output noise most important parts that influence Bangdap, below our analysis reduce the strategy of (R2/R1).

(5) formula differentiate is had: $\frac{{\&PartialD;V}_{\mathrm{ref}}}{\&PartialD;T}=\frac{{\&PartialD;V}_{\mathrm{be}2}}{\&PartialD;T}+\frac{R_2}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20091005062800091.png,A20091005062800121.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}\frac{{\&PartialD;V}_T}{\&PartialD;T}\ln \left(2M\right)=0---\left(7\right)$

The expression formula that (7) formula is organized into R2/R1 is as follows:

$\frac{R_2}{{\mathrm{<figure-callout\; id="1"\; label="R"\; filenames="A20091005062800091.png,A20091005062800121.png"\; state="\{\{state\}\}">R</figure-callout>}}_1}=\frac{{\&PartialD;V}_{\mathrm{be}2}/\&PartialD;T}{{\&PartialD;V}_T/\&PartialD;\mathrm{<figure-callout\; id="1"\; label="T"\; filenames="A20091005062800091.png,A20091005062800121.png"\; state="\{\{state\}\}">T</figure-callout>}}\frac{1}{\mathrm{Ln}\left(2M\right)}=\frac{{\&PartialD;V}_{\mathrm{be}2}/\&PartialD;T}{K/\mathrm{<figure-callout\; id="1"\; label="q"\; filenames="A20091005062800091.png,A20091005062800121.png"\; state="\{\{state\}\}">q</figure-callout>}}\frac{1}{\mathrm{Ln}\left(2M\right)}---\left(8\right)$

Can get by following formula, increase the number M of PNP pipe, can reduce the value of (R2/R1), and two-way bias current shared among Fig. 2 makes (R2/R1) further reduce.

It should be noted that at last, above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not breaking away from the spirit and scope of technical solution of the present invention, it all should be encompassed in the middle of the claim scope of the present invention.

Claims (5)

1, a kind of low-noise gap reference voltage circuit that adopts digital switch control, comprise the error operational amplifier, be total to grid common source current biasing circuit, start-up circuit and a pair of POLY resistance is characterized in that, set of number switch control PNP transistor array is set, by Digital Signals PNP pipe gating, to change the output reference voltage value, PNP pipe array two ends are connected to respectively between the R1 and ground in the POLY resistance.

2, by the described a kind of low-noise gap reference voltage circuit that adopts digital switch control of claim 1, it is characterized in that described switch control PNP transistor array, its gating number, encoded by a code translator, the input end of code translator is by Digital Signals.

By the described a kind of low-noise gap reference voltage circuit that adopts digital switch control of claim 1, it is characterized in that 3, R2 one end in the described POLY resistance is connected with another PNP pipe Q1 emitter, the other end is connected to reference output voltage end V _Ref

4, by the described a kind of low-noise gap reference voltage circuit that adopts digital switch control of claim 1, it is characterized in that the PNP number of tubes in the described PNP transistor array is greater than 100.

5, by claim 1 or 3 described a kind of low-noise gap reference voltage circuits that adopt digital switch control, it is characterized in that transistor M2, M5 in the described grid common source biasing circuit altogether and the bias current of M3, M6 flow through PNP transistor Q1 jointly.

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