CN101446635B - Ultra-low power consumption, low cost GPS chip architecture for mobile devices - Google Patents
Ultra-low power consumption, low cost GPS chip architecture for mobile devices Download PDFInfo
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Abstract
The invention relates to the field of receivers based on global positioning systems (such as GPS systems), in particular to the field of GPS receiver baseband processing chips optimized for mobile devices. The invention provides a GPS receiver baseband processing chip framework optimized for mobile/handheld devices. The GPS baseband chip, the external main control module and the communication module work together under the framework. The baseband processing chip uses a simple control module to replace a complex and huge embedded microprocessor to complete the work of receiving, capturing, tracking, synchronizing, demodulating and the like of GPS signals. The information such as the user position and the like is obtained by the main control microprocessor through various interfaces to obtain the intermediate resolving information provided by the baseband processing chip for resolving. In addition, the master control microprocessor is also responsible for starting the baseband processing chip and controlling special conditions. The main control microprocessor and the baseband processing chip are synchronized and interacted by a double-port RAM. Meanwhile, the main control microprocessor can also improve the system sensitivity and reduce the first positioning time by utilizing the AGPS auxiliary information obtained by the communication module. The framework makes full use of the existing hardware resources of the mobile/handheld device, greatly reduces the area and power consumption of the GPS chip, can effectively simplify the system design, and reduces the system power consumption and cost. Meanwhile, the interaction between the baseband chip and the master control microprocessor is improved, and the method has the advantages of flexible and various control, strong expansibility, convenience in use, wide application range and the like.
Description
Technical field
The present invention relates to receiver field, especially be applied to super low-power consumption, the low-cost receiver baseband chip field of handheld device based on GPS (for example gps system).
Background technology
Global positioning satellite and navigational system, for example GPS (GPS) comprises one group of satellite constellation (the Navstar satellite is otherwise known as) that sends gps signal, this gps signal can be received the position that machine is used for confirming this receiver.Satellite orbit is arranged in a plurality of planes, so that any on earth position can both receive this kind signal from least four satellites.More typical situation is that most on earth places can both receive this kind signal from six above satellites.
The gps signal that each gps satellite transmitted all is a direct sequence expansion signal frequently.The signal of commercial use is relevant with standard setting service (SPS), and is referred to as the direct sequence two-phase spread signal of thick sign indicating number (C/A sign indicating number), under the carrier wave of 1575.42MHz, has the speed of per second 1.023 million chips.Pseudo noise (PN) sequence length is 1023 chips, corresponding to 1 millisecond time cycle.The PN sign indicating number that each satellites transmits is different (Gold sign indicating number) makes signal to send simultaneously from several satellites, and received simultaneously by a receiver, and is almost noiseless each other.Term " satellite asterisk " is relevant with this PN sign indicating number, can be in order to indicate different gps satellites.
The modulation signal of GPS is the combinational code of navigation message (the D sign indicating number is otherwise known as) and PN sign indicating number.The speed of navigation message is per second 50 bits.The base unit of D sign indicating number is the prime frame of one 1500 bit, and prime frame is divided into the subframe of 5 300 bits again.Wherein subframe one has comprised identification code, star kind data length of time, satellite clock corrected parameter information.Subframe two has comprised real-time gps satellite ephemeris (ephemeris) with subframe three, and ephemeris is the main content of current navigator fix information.Subframe four and subframe five have comprised the health status of 1-32 satellite, the almanac (alamanc) of UTC calibration information and ionospheric corrections parameter and 1-32 satellite.Almanac is the simplified subset of satellite ephemeris parameter.Broadcasted once in its per 12.5 minutes, the life-span is a week, can extend to 2 months.
One of main target of GPS receiver is to confirm the launch time of PN sign indicating number.Term " PN sign indicating number launch time " refers to that gps satellite PN sign indicating number is to the time from the gps satellite emission.This is through (each receives signal) local PN reference signal that produces being compared with the signal of reception and " slips " local reference is accomplished until aliging in time with the reception signal.Through being referred to as multiplying each other and integral process of " being correlated with ", these two signals are compared each other.When two signals were alignment in time, the result of output was maximum.Can make by this method receiver time and gps time synchronously on.
Be included in the navigation message, time-of-week (TOW) data that join with absolute time signal correction make the GPS receiver can be accurately and confirm local gps time reliably.The TOW data are transmitted by the time interval in 6 seconds by all satellites.The GPS receiver can use the absolute time signal to confirm the position exactly.In case known the place, position, can be through utilizing between receiver and the satellite, the clear and definite time that computable propagation delay comes compensated receiver from satellite navigation message, to obtain obtains.
The details of the data that gps signal comprised can find in ICD (InterfaceControl Document) ICD-GPS-200C; This document was formulated in 1993; Upgraded in 2003, publish by Rockwell Internation Corporation.
The GPS baseband processing chip is the core of GPS receiver, and its core index is: sensitivity, power consumption, primary positioning time TTFF, cost etc.For hand-held and mobile device, power consumption and cost are two the most key indexs.The traditional GPS baseband processing chip has mainly comprised: catch passage, tracing channel, embedded microprocessor and be Flash, real-time clock and output interface etc. in ROM, ram in slice, the sheet in the internal bus of its service, the sheet.Wherein ROM/Flash has occupied suitable chip area in embedded microprocessor and the sheet, and owing to embed the relative complexity that declines and handle, makes chip power-consumption also high.Yet traditional GPS baseband processing chip is not to design to moving with handheld applications, so the requirement of this two aspect neither be very urgent.The GPS baseband processing chip of a new generation has taken up to improve the performance of these two aspects; For example introduce power managed commonly used; The adaptive transformation frequency of operation is particularly searched for the frequency of passage, the way of search of pulsed, and the tracking of burst type is kept or the like; Obtained good effect, some product can be realized the average power below the 70mW.But this type chip is often just from being confined to baseband processing chip itself, even trapping module just often, and considers from the angle of entire system that not it is obvious that power consumption reduces the step.And along with design complexity increases greatly, producer often can only utilize the mode that improves technology to realize reducing of chip area, makes chip cost high.
Handheld mobile device often has a powerful relatively master microprocessor; Its computing and storage resources are abundant relatively; Even the crystal oscillator precision in the communication module is all higher relatively; How to make full use of these existing resources, reducing whole cost and power consumption is a research direction of a GPS baseband chip framework.
Hand-held/mobile device (particularly cell phone apparatus) often has a communication module, utilizes the extra supplementary that provides, and promptly can improve locating speed and the sensitivity of GPS like AGPS information.Utilize which kind of structure to make the GPS structure can more effectively receive and utilize supplementary to improve the research direction that the GPS performance also is GPS baseband chip framework and even hand-held/mobile device framework.Some producer has made trial; Advantages such as the product that for example has is integrated into the GPS Base-Band Processing in the communication base band as a sub-module, has cost low, and system applies is simple; Simultaneously also there is the GPS correlated performance not high, shortcomings such as the third-party process chip of can not arranging in pairs or groups.
Summary of the invention
The present invention proposes a kind of GPS receiver baseband processing chip framework to the mobile/handheld equipment optimization.
The baseband chip of this framework and external piloting control module and communication module are worked together.Baseband processing chip uses a simple control module to replace complicated and huge embedded microprocessor, accomplish gps signal reception, catch, follow the tracks of, synchronously and work such as demodulation.The centre that information such as customer location are obtained baseband processing chip and provided through various interface by main control microprocessor is resolved information and is resolved acquisition.Main control microprocessor also is responsible for the startup of baseband processing chip and the control of some special circumstances in addition.Main control microprocessor and baseband processing chip are realized synchronously with mutual by a dual port RAM.Main control microprocessor can also utilize the AGPS supplementary raising system sensitivity and reduction primary positioning time that communication module obtains simultaneously.
This system comprises:
A GPS processing module, be responsible for signal reception, catch, follow the tracks of, synchronously and the navigation message demodulation;
A communication module is responsible for the relevant voice of communication, image, the encoding and decoding of data stream such as data, modulation and transmission;
A main control module comprises a main control microprocessor, is responsible for the control and the upper layer application of total system, and the GPS baseband processing chip is controlled and the resolving of user coordinates.
Further, said GPS processing module has comprised a high-precision real-time clock.
Further, said real-time clock can be received the UTC time calibration that computes goes out, and the machine that can be received reads at any time, and this receiver can guarantee can work on after the receiver power down through the external cell power supply simultaneously.
Further, said GPS processing module has comprised a dual port RAM.
Further, information three partial contents are resolved in overall control variable, each passage control variable and the centre of storage GPS processing module in the said dual port RAM.
Further, main control module is realized realizing the control to the GPS baseband processing chip with each passage control variable through the overall control variable of revising in the said dual port RAM.
Further, information is resolved in the centre that main control module reads in the said dual port RAM, and then portion realizes resolving of information such as customer location within it.
Further, the overall control variable in the said dual port RAM comprises: timer cycle, initialization detection threshold, loop filter coefficients, searching carrier frequency, PN sign indicating number sign indicating number initial phase, each passage ephemeris address, calculation constant and reset controller.
Further, each the passage control variable in the said dual port RAM comprises: search engine related register, this passage detection threshold, search volume index, tracking engine related register, sign indicating number ring related register, bit synchronization register, frame synchronization register, carrier phase amount, recapture control and passage enable control.
Further, the intermediate variable that resolves in the dual port RAM comprises: each passage satellite asterisk intensity, time register heap, each passage ephemeris and almanac.
Further, under the common positioning requirements, main control microprocessor is regularly visited dual port RAM according to the mode of inquiry.
Further, require when high, promptly send interrupt request singal and realize location fast to main control microprocessor in case middle resolved data is ready in real-time.
Further, said main control microprocessor resolves information in the middle of reading through dma mode.
Further, said GPS processing module communicates through SPI interface and main control microprocessor.
Further, said GPS processing module communicates through UART interface and main control microprocessor.
Further, said GPS processing module is passed through I
2C interface and main control microprocessor communicate.
Further, said GPS processing module communicates through EBI and main control microprocessor.
Further, said GPS processing module communicates through HPI interface and main control microprocessor.
Further, said GPS processing module is through SPI, UART, I
2Combination and the main control microprocessor of C, bus and HPI communicate.
Further, said communication module also is responsible for obtaining the supplementary of AGPS.
Further, said main control microprocessor comprises start-up control and special circumstances processing two parts to the control of GPS baseband processing chip, and main control microprocessor is got involved the control to the GPS baseband processing chip when the GPS baseband processing chip starts and special circumstances occur.
Further, said start-up control may further comprise the steps:
Obtain prior imformation;
Visible satellite asterisk when prediction starts;
The Doppler frequency deviation of prediction visible satellite;
The PN sign indicating number code phase of prediction visible satellite;
The generated frequency search volume;
Generated code phase search space;
Utilize above-mentioned information initializing search passage, start the acquisition procedure of GPS baseband processing chip.
Further, said prior imformation is to calculate the prior imformation that obtains and store by the GPS baseband processing chip.
Further, said prior imformation is the supplementary that communication module obtains.
Further, said prior imformation is the combination that the GPS baseband processing chip calculates the prior imformation and the supplementary that communication module obtains of acquisition and storage.
Further, said GPS processing module result of calculation is stored in the Flash storer of main control module.
Further, said special circumstances comprise: lose satellite, location frequency variation, mode switch, power managed, crystal oscillator calibration.
Further, the general external crystal-controlled oscillation of said GPS processing module and communication module.
Further, said GPS baseband processing chip is inner exists a frequency maker to adapt to the different crystal oscillators that the different communication module is used.
This framework has made full use of the existing hardware resource of mobile/handheld equipment, has reduced GPS area of chip and power consumption greatly, and effectively simplified system design reduces system power dissipation and cost.Improved the mutual of baseband chip and main control microprocessor simultaneously, advantage such as it is versatile and flexible to have control, and extendability is strong, and is easy to use, widely applicable.
Description of drawings
Fig. 1 is the general flow of GPS receiver positioning calculation;
Fig. 2 is a canonical system composition frame chart to the GPS receiver of mobile/handheld equipment application;
Fig. 3 is a typical GPS processing module detailed structure block diagram;
Fig. 4 is that another is directed against the existing designed system structured flowchart of mobile/handheld equipment applying GPS receiver;
Fig. 5 is the system architecture diagram of a preferred embodiment of the present invention;
Fig. 6 is the detailed structure block diagram of a preferred embodiment GPS processing module of the present invention;
Fig. 7 is the dual port RAM division figure of a preferred embodiment of the present invention;
Fig. 8 is the workflow block diagram of a preferred embodiment main control microprocessor of the present invention.
Embodiment
For making the object of the invention, technical scheme and advantage clearer, below in conjunction with specific embodiment, and with reference to accompanying drawing, to further explain of the present invention.
Fig. 1 has described the GPS receiver and has realized the flow process of location.This process finishes until calculating receiver location 106 from 101 beginnings of receiver power-up initializing, has accomplished one-time positioning and has resolved, and begins new round computation process immediately.This process is the Tick signal triggering that generated by the Tick maker.The Tick maker is driven by crystal oscillator, and the interval of twice tick signal is strict precisely only relevant with the frequency accuracy of crystal oscillator.Usually get into trapped state 102 after receiver powers on, search is to confirm satellite, the carrier frequency of visible satellite and the code phase of PN sign indicating number in the sight line.Search to carrier frequency under this state is coarse, usually hundreds of hertz magnitude.Get into frequency pulling state 103 afterwards, to differing several hertz magnitude, carry out bit synchronous simultaneously to local frequency pulling with the satellite carrier frequency.After accomplishing frequency pulling, receiver gets into tracking mode 104, accomplishes frame synchronization, promptly can get into demodulation text state 105, and the text demodulation of modulating on the carrier wave is come out to be used for 106 times calculating of the state that the resolves receiver location subsequently.
The system that Fig. 2 has described the GPS receiver of using to mobile/handheld equipment forms.Most of on the market at present GPS receiver of using to mobile/handheld equipment all is to use similar structures; Other is to the GPS receiver of other application; As do not have the vehicle GPS Position Fixing Navigation System of communication function, and also taked similar system architecture, just do not lacked communication module.Whole GPS application system is by GPS processing module 210, and Communications Processor Module 216 is formed with main control module 224.GPS processing module 210 is main be responsible for gps signals reception, catch, follow the tracks of, synchronously, demodulation, resolve and export, function promptly shown in Figure 1.The Communications Processor Module 216 main processing of being responsible for communications portion, for example 2G, 3G conversation, the processing of data stream.Main control module mainly is responsible for the application of control, GPS and the communication function of total system, and some other application, for example multimedia application.Below piecemeal is detailed.
GPS processing module 210 is by gps antenna 201, radio-frequency front-end 202, and GPS baseband processing chip 225 and external crystal-controlled oscillation 211 are formed.The GPS radio frequency rf signal receives the laggard radio frequency front end of going into by gps antenna, transforms to get into the GPS Base-Band Processing behind the digital intermediate frequency and handle, and calculates to export to main control microprocessor behind the elements of a fix and do further application.The GPS Base-Band Processing comprises GPS interrelated logic 203, embedded microprocessor 204, real-time clock 205, inner ROM 206, inner Flash207, internal RAM 208 and output interface 209.External crystal-controlled oscillation is that radio-frequency front-end and Base-Band Processing provide frequency reference, the shared crystal oscillator of radio-frequency front-end and GPS Base-Band Processing in the product that has, and the product radio-frequency front-end that also has uses different crystal oscillators with the GPS Base-Band Processing.The GPS interrelated logic has comprised and has been used to catch, the hardware logic of tracking, despreading, demodulation function, and its details will detail in Fig. 3.Embedded microprocessor is responsible for controlling whole baseband module, and resolves user coordinates.Inner ROM 206 is used to store the program that embedded microprocessor uses.Also some product also is stored among the inner Flash 207 these programs so that inner ROM has been saved in upgrading in the future simultaneously.Inner Flash also is used to store the information that some need needs keep after power down, be the prior imformation that startup is fast served like gps satellite almanac etc.Internal RAM 208 supplies the flush bonding processor working procedure to use.Real-time clock 205 is in order to provide time reference.Usually this clock can be independently-powered by the outer battery of sheet, still can operate as normal under the situation of assurance system power down.Flash links to each other with flush bonding processor through internal bus 218 with real-time clock in ram in slice, the sheet.The other product places part or all of RAM, Flash and real-time clock outside chip, utilizes extra chip to realize.Output interface 209 will calculate the acquisition user coordinates and other information form is according to the rules exported to main control processor.NMEA0183 is a kind of widely accepted outputting standard.Some GPS baseband processing chip manufacturers have also formulated own proprietary output format, like the SiRF bin form of SiRF company.
Communications Processor Module mainly contains communication antenna 212, and radio-frequency front-end 214 is formed with baseband processing chip 215 and external crystal-controlled oscillation 213, accomplishes the relevant voice of communication, image, the encoding and decoding of data stream such as data, modulation and transmission.The present invention does not relate to this partial content, and the skilled person all knows in the industry, therefore repeats no more.
Main control module 224 is responsible for the control and the various application of total system.A typical example is for receiving and analyze the information of being imported into by the GPS baseband processing chip; In conjunction with the electronic chart program; Electronic chart around the customer location is presented on the LCD 222, and then utilizes user's current position coordinates and customer objective ground coordinate navigation Service to be provided for the user.Main control module is by main control microprocessor 217, ROM219, and Flash220, RAM 221, and LCD 222, and other peripheral hardwares 223 are formed with bus 218.Main control microprocessor passes through bus access ROM, RAM, LCD and other peripheral hardwares.
This scheme does not make full use of main control module powerful calculating resource and abundant relatively storage resources, and whole cost and power consumption are higher, for some restrictions of application existence of hand-held/mobile device.
Fig. 3 describes the details of typical GPS processing module in detail.The GPS radio frequency rf signal receives the laggard radio frequency front end 302 of going into by gps antenna 301, at first amplifies through pre-low-noise amplifier, is down-converted to analog intermediate frequency IF by low-converter then.And then, convert digital intermediate frequency into through analog to digital converter ADC and transfer to Base-Band Processing and partly make Base-Band Processing.
Digital intermediate frequency gets into and at first to get into AD buffer behind the baseband processing module and carry out buffer memory, and then gets into and catch passage 306 with the gps satellite in the search visual field, confirms each visible satellite, and carrier doppler that transmits and PN sign indicating number code phase.After completion was caught, 307 of tracing channel were followed the tracks of the satellite that captures, and synchronous with it, so that calculate the launch time of PN sign indicating number, demodulated navigation message simultaneously in order to the location.Said bit synchronous and the frame synchronization of comprising synchronously.Catch passage and all be made up of the parallel autonomous channel of different numbers usually with tracing channel, its number of catching passage and tracing channel can require to change flexibly according to performance, cost, power consumption etc., and is also relevant with search strategy.Used 12 to catch passage and 12 tracing channel like SiRF II & SiRF III chipset; The G5 chipset of μ-box company has used 32 to catch passage and 18 tracing channel.The structure of catching passage and tracing channel of each big GPS receiving chip company is not quite similar, but function class seemingly.Embedded microprocessor 308 is used to control each catches and tracing channel, the time of arrival of accomplish the demodulation text simultaneously, calculating the PN sign indicating number, and compute pseudo-ranges, and then resolve work such as receiver location, speed and time.Embedded microprocessor is also through the output through automatic gain control AGC 305 control radio-frequency front-ends 302, with the gain of stable simulation intermediate frequency in addition.
Embedded microprocessor is through internal bus 309 access internal ROM 310, internal RAM 311, inner Flash 312 and real-time clock 313.Inner ROM 310 is used to store the program that embedded microprocessor uses.Also some product also is stored in these programs among the inside Flash 312 that can write so that ROM in the sheet has been omitted in upgrading in the future simultaneously.Inner Flash also is used to store the information that some need needs keep after power down, be the prior imformation that startup is fast served like gps satellite almanac etc.Internal RAM 311 supplies the flush bonding processor working procedure to use.Real-time clock 313 is in order to provide the precise time benchmark.Usually this clock can be independently-powered by the outer battery of sheet, still can operate as normal under the situation of assurance system power down.The other product places part or all of ROM, RAM, Flash and real-time clock outside chip, utilizes extra chip to realize.Usually part or all of ROM, RAM, Flash and real-time clock being positioned over chip internal can increase chip area and cost, can increase system cost and be positioned over outside the chip.
The Base-Band Processing part also has control (Reset) 314 that reset to be used to control the replacement under different situations of entire chip usually.And power managed 315 is in order to reduce the power consumption of entire chip.
Radio-frequency front-end 302 all is to utilize external crystal-controlled oscillation 304 as frequency reference with baseband processing chip, also has some product designs to become radio-frequency front-end to use different crystal oscillators with Base-Band Processing.
Usually, radio-frequency front-end shown in the figure and Base-Band Processing are packaged into an independently chip separately.But also there is plurality of applications that two parts are packaged together and becomes the SIP system.And more product of the future unites two into one two parts and forms single S OC chip.
Fig. 4 has described another and has formed to the existing designed system of mobile/handheld equipment optimizing application GPS receiver.Its maximum characteristics incorporate the GPS processing module in the communication module exactly.Total system is by communication antenna 401, and gps antenna 402 is communicated by letter and GPS baseband processing chip 412, and main control module 420 is formed with external crystal-controlled oscillation 421.
Communication and GPS baseband processing chip be by minute multiplexer 403, transmitter module 404, and receiver module 405 is formed with baseband processing module 407.Transmitter module and receiver module pass through to divide multiplexer 403 common user communication antennas 401 when handling the communication data demand.Except comprising all functions of common communication radio-frequency module, also have a GPS radio-frequency module 406 in the receiver module, in order to accomplish all functions of the radio-frequency front-end 202 shown in Fig. 2.Gps signal is handled through the GPS baseband processing chip that gps antenna 402 directly imports in the receiver module.Baseband processing module 407 has comprised microprocessor 408, communication baseband processing module 409, multimedia application module 410 and GPS baseband processing chip 411.Communication Base-Band Processing mould is responsible for the Data Base tape handling of communicating by letter relevant; The multimedia application module is used for the logic to the increase of multimedia special applications, like the encoding and decoding of MP3/MP4; The GPS baseband processing chip is used for the Base-Band Processing of gps signal, accomplishes baseband processing chip identical functions among Fig. 2.The baseband processing module 409 of wherein communicating by letter, multimedia application module 410 and GPS baseband processing chip 411 shared microprocessors.
This scheme has system cost advantage preferably in theory; Simultaneously can realize assistant GPS (Assisted-GPS more easily; Be called for short AGPS); But owing on the hardware GPS Base-Band Processing is united two into one with the Base-Band Processing of communicating by letter, therefore can not be used, make and use underaction with the baseband processing chip of other producers.
Fig. 5 has described a system to the preferred embodiment of mobile/handheld equipment optimizing application of the present invention and has formed.With system class shown in Figure 2 seemingly, whole GPS application system is by GPS processing module 511, Communications Processor Module 517 is formed with main control module 525.Different is, GPS processing module 511 is main be responsible for gps signals reception, catch, follow the tracks of, synchronously and demodulation, not responsible resolving.Main control module is except the upper layer application of control, GPS and the communication function of being responsible for total system, and some other use outside, also be responsible for control GPS baseband processing chip, obtain and resolve intermediate information and resolve customer location etc.In other words, will partly control any and resolve task and transfer to main control module, thereby save the microprocessor in the baseband processing chip and be a series of modules of its service from baseband processing chip.Communications Processor Module 517 removes the processing of being responsible for communications portion, and for example 2G, 3G conversation outside the processing of data stream, also is responsible for obtaining of GPS supplementary.Below piecemeal is detailed.
GPS processing module 511 is by gps antenna 501, and radio-frequency front-end 502 and GPS baseband processing chip are formed, and its details will detail in Fig. 6.The GPS radio frequency rf signal receives the laggard radio frequency front end of going into by gps antenna, transforms to get into the GPS Base-Band Processing behind the digital intermediate frequency and handle, and calculates to resolve intermediate information and export to main control microprocessor and do further and resolve, rather than exports last positioning result.The GPS Base-Band Processing comprises several and catches passage 503, several tracing channel 504, steering logic 505, dual port RAM 506, real-time clock 507, Reset control 508, power consumption control 509 and IO interface 510.Catch passage 503 with the gps satellite in the search visual field, confirm each visible satellite, and carrier doppler that transmits and PN sign indicating number code phase.After completion was caught, 504 of tracing channel were followed the tracks of the satellite that captures, and synchronous with it, so that calculate the launch time of PN sign indicating number, demodulated navigation message simultaneously in order to the location.Said bit synchronous and the frame synchronization of comprising synchronously.Steering logic 505 is responsible for the controls to entire chip, and all control variable all are stored in the dual port RAM 506, is write through IO interface 510 when the initialization by main control microprocessor.All intermediate computations variablees also are stored in dual port RAM and are upgraded by steering logic.In other words, dual port RAM is the bridge that main control microprocessor is communicated by letter with baseband processing chip.IO interface 510 is exported to main control processor with the intermediate information of resolving of baseband processing chip, and the while also passes to baseband processing chip with the control information of main control microprocessor.Resolve intermediate information and comprise launch time of all usable satellites, navigation message, signal intensity etc.Dma controller 512 is used for that dual port RAM is resolved intermediate information passes on to master control RAM fast, makes things convenient for next step calculating, reduces power consumption simultaneously.IO interface provides multiple external interface to communicate by letter with main control microprocessor, and these interfaces comprise the SPI interface, UART interface, I2C interface, EBI, HPI interface etc.Microprocessor can select wherein one or several to communicate with the GPS baseband processing chip.Real-time clock 507 is in order to provide time reference.This clock can be independently-powered by the outer battery of sheet, still can operate as normal under the situation of assurance system power down.Reset control 508 is used to control the replacement under different situations of entire chip.And power managed 509 is in order to the power consumption of management and reduction entire chip.The GPS processing section comprises that the shared crystal oscillator of GPS radio-frequency front-end and Base-Band Processing and Communications Processor Module is to reduce system cost.
Communications Processor Module mainly contains communication antenna 513, and radio-frequency front-end 515 is formed with baseband processing chip 516 and external crystal-controlled oscillation 514, accomplishes the relevant voice of communication, image, the encoding and decoding of data stream such as data, modulation and transmission.Communications Processor Module also is responsible for receiving the supplementary that is used for AGPS simultaneously.
The present invention is directed to the Position Fixing Navigation System of other application scenarios, like the vehicle GPS Position Fixing Navigation System of no communication function, same being suitable for.In most cases only need deduct communication module.
Fig. 6 describes the details of a preferred embodiment GPS processing module of the present invention in detail.With similarly shown in Figure 3, the GPS radio frequency rf signal receives the laggard radio frequency front end 602 of going into by gps antenna 601, at first amplifies through pre-low-noise amplifier, is down-converted to analog intermediate frequency IF by low-converter then.And then, convert digital intermediate frequency into through analog to digital converter ADC and transfer to Base-Band Processing and partly make Base-Band Processing.
Digital intermediate frequency gets into and at first to get into AD buffer 603 behind the baseband processing module and carry out buffer memory, and then gets into and catch passage 607 with the gps satellite in the search visual field, confirms each visible satellite, and carrier doppler that transmits and PN sign indicating number code phase.After completion was caught, 608 of tracing channel were followed the tracks of the satellite that captures, and synchronous with it, so that calculate the launch time of PN sign indicating number, demodulated navigation message simultaneously in order to the location.Said bit synchronous and the frame synchronization of comprising synchronously.Catch passage and all be made up of the parallel autonomous channel of different numbers usually with tracing channel, its number of catching passage and tracing channel can require to change flexibly according to performance, cost, power consumption etc., and is also relevant with search strategy, is not determinate.This embodiment has used 12 to catch passage and 12 tracing channel.Another preferred embodiment of the present invention has used 32 to catch passage and 12 tracing channel.Steering logic 609 is used for being responsible for the control to entire chip, and particularly each catches the control with tracing channel, accomplishes work such as demodulation text and verification simultaneously.Steering logic is also through the output through automatic gain control AGC 605 control radio-frequency front-ends 602, with the gain of stable simulation intermediate frequency in addition.
Dual port RAM is the bridge that main control microprocessor is communicated by letter with baseband processing chip.All control variable all are stored in the dual port RAM 610, are write through IO interface 620 when the initialization by main control microprocessor.All intermediate computations variablees also are stored in dual port RAM, are upgraded by steering logic 609, thereby can be visited by main control microprocessor.IO interface 620 is exported to main control processor with the intermediate information of resolving of baseband processing chip, and the while also passes to baseband processing chip with the control information of main control microprocessor.When resolving intermediate information and comprising the emission of all usable satellites, navigation message, signal intensity etc.IO interface provides multiple external interface to communicate by letter with main control microprocessor, and these interfaces comprise SPI interface 612, UART interface 613, and I2C interface 614, EBI 615, SPI interface 616 etc., these interfaces are by interface control 611 unified controls.Microprocessor can select wherein one or several to communicate.
The Base-Band Processing part also has real-time clock 617 usually in order to the precise time benchmark to be provided.Usually this clock can be independently-powered by the outer battery of sheet, still can operate as normal under the situation of assurance system power down.Reset control 616 is used to control the replacement under different situations of entire chip.And power management 618 is in order to reduce the power consumption of entire chip.
Main control microprocessor uses " inquiry mode " regularly dual port RAM to be conducted interviews generally speaking, obtains to resolve intermediate information and resolve.The mode of obtaining can be the mode of common processor access RAM, also can be the mode of using the quick piece based on DMA to read through interface control 611.Aforesaid way has the main control microprocessor occupancy little, and real-time requires advantages such as low, and dma mode also has advantages such as fast convenient, low in energy consumption in addition; But the shortcoming that this method also has positioning result to postpone.For addressing this problem, baseband processing chip also provides interrupt mode, reduces output delay to greatest extent.In case it is ready to resolve intermediate information, an interrupt request singal is just sent in logic control 609, exports to main control microprocessor through interrupt management 619, makes it preferentially resolve location work.
Radio-frequency front-end 602 all is to utilize external crystal-controlled oscillation 604 as frequency reference with baseband processing chip, this crystal oscillator be with communication module in crystal oscillator 514 shared, to reduce system cost.Through configurable frequency maker 606, the GPS processing section can adapt to different crystal oscillator frequencies.
Usually, radio-frequency front-end shown in the figure and Base-Band Processing are packaged into an independently chip separately.Become the SIP system but also can two parts be packaged together, even two parts are united two into one form single S OC chip according to different application requirements.
Fig. 7 has described the division of the dual port RAM of a preferred embodiment of the present invention.Whole dual port RAM is divided into three zones: overall control variable district 701, each passage control variable district 702 with resolve intermediate variable data field 703.Wherein, overall control variable is control variable or the control variable all identical to each passage to the overall situation.Overall situation control variable comprises: timer cycle 704 is used to control overflowing the cycle of timer internal; Initialization detection threshold 705 is for catching the thresholding initial value of passage; Loop filter coefficients 706 is the filter coefficient of tracking loop; Searching carrier frequency 707 is each some frequency in searching carrier space; PN sign indicating number sign indicating number initial phase 708 is the corresponding PN sign indicating number code phase of satellite asterisk; Each passage ephemeris address 709 is the start address of each passage ephemeris storage space; The constant that calculation constant 710 is used when calculating some intermediate quantity for steering logic; Reset controller 711 is in order to control restarting of whole baseband chip.
Each passage control variable zone has comprised independently control variable of each passage, and these variablees comprise: search engine related register 712, this passage detection threshold 713; Search volume index 714-, tracking engine related register 715, sign indicating number ring related register 716; Bit synchronization register 718; Frame synchronization register 719, carrier phase amount 720, the control 721 of recapturing enables to control 722 with passage and forms.
Resolving the intermediate variable district is the net result that baseband processing chip calculates among the present invention, and opening up the zone specially is the needs that main control microprocessor reads in batches or DMA reads for ease.This zone comprises: each passage satellite asterisk intensity 723; Time register heap 724, each passage ephemeris 725 and almanac 726.
The discharging of each register order is not determinate in the dual port RAM, but the composition of its register is determinate.
Fig. 8 has described the workflow of a preferred embodiment main control microprocessor of the present invention.Behind the main control microprocessor power-up initializing 801, at first read from communication module 517 obtain AGPS supplementary 802.Certainly, only under the prerequisite that has communication module and AGPS supplementary, this process just can be carried out.And then read the quick log-on message 803 that is stored among the Flash.In conjunction with two-part supplementary, promptly can calculate asterisk, carrier doppler frequency deviation and the code phase 804 of current visible satellite, and then generated frequency search volume and code phase search space 805.Further, utilize these information initializing baseband processing chips 806, GPS processing module 511 is started working.So far, the startup work of GPS baseband processing chip is accomplished.
Subsequently, main control microprocessor gets into inquiry phase, detects the inquiry counter and whether overflows 807, if not, then continues to wait for, if overflow, then reads and resolves intermediate information 808.This step can be replaced by other step that is equal to query function, like the service of operating system backstage, software interruption or the like.Read to resolve and whether detect usable satellite after the intermediate information, if not, then get into inquiry phase again more than or equal to positioning requirements 809, if, then resolve information 810 such as customer location, realize the location.
Further, detect special circumstances 811 whether occur, these special circumstances comprise: lose a certain satellite; Signal is shielded, and the usable satellite number is less than positioning requirements; Lose all satellites; Crystal oscillator need be calibrated etc.These the time main control microprocessor need carry out special circumstances and handle 812, revise the related register in the baseband processing chip, to carry out corresponding countermeasure, make the user obtain maximum experience.
Although method and apparatus of the present invention is described with reference to gps satellite, should be appreciated that these principles are equally applicable to adopt the positioning system of the combination of pseudo-satelite (pseudolites) or satellite and pseudo-satelite.Pseudo-satelite is a kind of transmitter based on ground, and it is propagated and is modulated at L frequency range PN sign indicating number (similar with gps signal) on the ripple signal, and normally synchronous with gps time.Each transmitter can be endowed the PN sign indicating number of a uniqueness, thereby allows to be discerned by remote receiver.Pseudo-satelite is used under such situation, that is, and and from the gps signal of orbiter disappearance, like tunnel, mine, buildings or other closed area and obviously block.Here employed term " satellite " comprises the equivalence of pseudo-satelite or pseudo-satelite, and employed here term gps signal comprises the signal from the similar GPS of pseudo-satelite or pseudo-satelite equivalence.
In the discussion in front, the present invention describes with reference to american global positioning system (GPS).Yet, should be appreciated that these methods are equally applicable to similar global position system, like Muscovite GLONASS (Glonass) system, the Big Dipper 1 and the Big Dipper 2 systems of Galileo (Galileo) system in Europe and China.Employed term " GPS " also comprises some global position systems like this, like Muscovite GLONASS (Glonass) system, and the Big Dipper 1 and the Big Dipper 2 systems of Galileo (Galileo) system in Europe and China.Term " gps signal " comprises the signal from other global position systems.
In the preceding text, the details to the GPS receiver baseband processing chip framework of mobile/handheld equipment optimization has been described.Although the present invention describes with reference to specific embodiment, clearly, the one skilled in the art under the situation of invention scope that non-migration claims are limited and spirit, can also do various modifications and change to these embodiment.Therefore, instructions and accompanying drawing are descriptive, rather than determinate.
Claims (26)
1. one kind to the super low-power consumption of mobile device, GPS chip frame cheaply, it is characterized in that this system comprises:
A GPS processing module; Be responsible for signal reception, catch, follow the tracks of, synchronously and the navigation message demodulation; Said GPS processing module has comprised a dual port RAM, and information three partial contents are resolved in overall control variable, each passage control variable and the centre of storage GPS processing module in the said dual port RAM;
A communication module is responsible for encoding and decoding, modulation and the transmission of relevant voice, image and data of communication;
A main control module; Comprise a main control microprocessor; Be responsible for the control and the upper layer application of total system, the GPS baseband processing chip is controlled and the resolving of user coordinates, said main control microprocessor is regularly visited this dual port RAM according to the mode of inquiry under the common positioning requirements.
2. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module has comprised a high-precision real-time clock.
3. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 2; It is characterized in that; Said real-time clock is received the UTC time calibration that computes goes out; And the machine that is received reads at any time, and this receiver guarantees the work of receiver power down continued through the external cell power supply simultaneously.
4. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1; It is characterized in that main control module is realized realizing the control to the GPS baseband processing chip with each passage control variable through the overall control variable of revising in the said dual port RAM.
5. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 it is characterized in that information is resolved in the centre that main control module reads in the said dual port RAM, and then portion realized resolving of customer position information within it.
6. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1; It is characterized in that the overall control variable in the said dual port RAM comprises: timer cycle, initialization detection threshold, loop filter coefficients, searching carrier frequency, PN sign indicating number sign indicating number initial phase, each passage ephemeris address, calculation constant and reset controller.
7. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1; It is characterized in that each the passage control variable in the said dual port RAM comprises: search engine related register, this passage detection threshold, search volume index, tracking engine related register, sign indicating number ring related register, bit synchronization register, frame synchronization register, carrier phase amount, recapture control and passage enable control.
8. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1; It is characterized in that the intermediate variable that resolves in the said dual port RAM comprises: each passage satellite asterisk intensity, time register heap, each passage ephemeris and almanac.
9. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1; It is characterized in that; Require when high in real-time, promptly send interrupt request singal and realize location fast to said main control microprocessor in case middle resolved data is ready.
10. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said main control microprocessor resolves information in the middle of reading through dma mode.
11. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module communicates through SPI interface and said main control microprocessor.
12. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module communicates through UART interface and said main control microprocessor.
13. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module communicates through I2C interface and said main control microprocessor.
14. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module communicates through EBI and said main control microprocessor.
15. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module communicates through HPI interface and said main control microprocessor.
16. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module communicates through combination and the said main control microprocessor of SPI, UART, I2C, bus and HPI.
17. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said communication module also is responsible for obtaining the supplementary of AGPS.
18. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1; It is characterized in that; Said main control microprocessor comprises start-up control and special circumstances processing two parts to the control of GPS baseband processing chip, and main control microprocessor is got involved the control to the GPS baseband processing chip when the GPS baseband processing chip starts and special circumstances occur.
19. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 18 is characterized in that said start-up control may further comprise the steps:
Obtain prior imformation;
Visible satellite asterisk when prediction starts;
The Doppler frequency deviation of prediction visible satellite;
The PN sign indicating number code phase of prediction visible satellite;
The generated frequency search volume;
Generated code phase search space;
Utilize above-mentioned information initializing search passage, start the acquisition procedure of GPS baseband processing chip.
20. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 19 is characterized in that, said prior imformation is to be calculated by the GPS baseband processing chip to obtain and the prior imformation of storage.
21. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 19 is characterized in that said prior imformation is the supplementary that communication module obtains.
22. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 19; It is characterized in that said prior imformation is the combination that the GPS baseband processing chip calculates the prior imformation and the supplementary that communication module obtains of acquisition and storage.
23. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS processing module result of calculation is stored in the Flash storer of main control module.
24. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 18 is characterized in that said special circumstances comprise: lose satellite, location frequency variation, mode switch, power managed, crystal oscillator calibration.
25. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that the general external crystal-controlled oscillation of said GPS processing module and communication module.
26. super low-power consumption, the GPS chip frame cheaply to mobile device according to claim 1 is characterized in that said GPS baseband processing chip is inner to exist a frequency maker to adapt to the different crystal oscillators that the different communication module is used.
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| CN103311928A (en) * | 2012-03-16 | 2013-09-18 | 上海利思电气有限公司 | Low-voltage dynamic active power filter |
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