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CN101378052A - 具有无源元件的集成电路封装 - Google Patents

具有无源元件的集成电路封装 Download PDF

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Publication number
CN101378052A
CN101378052A CNA2008102140148A CN200810214014A CN101378052A CN 101378052 A CN101378052 A CN 101378052A CN A2008102140148 A CNA2008102140148 A CN A2008102140148A CN 200810214014 A CN200810214014 A CN 200810214014A CN 101378052 A CN101378052 A CN 101378052A
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Prior art keywords
integrated circuit
semiconductor integrated
substrate
capacitor
die package
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CNA2008102140148A
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文森特·胡尔
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Altera Corp
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Altera Corp
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Publication of CN101378052A publication Critical patent/CN101378052A/zh
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Abstract

本发明包括衬底、安装在衬底上的集成电路、无源元件(如安装于集成电路上的电容器)以及封装壳，该封装壳遮蔽集成电路和无源元件。所述集成电路能够以倒装芯片配置的方式进行安装，其有源侧对着衬底且无源元件安装于其背侧；或者其有源侧朝上且其背侧在衬底上，而无源元件安装于集成电路的有源侧上。

Description

具有无源元件的集成电路封装
技术领域
本发明涉及集成电路封装中的电容器或其它无源元件的实施。
背景技术
用于半导体集成电路的输入/输出(I/O)电路的开关要求大量的电流。传统上，形成该电流的电荷存储于以下装置上：印刷电路板上的去耦电容器(在该印刷电路板上安装有集成电路封装)、封装电容器或形成于集成电路自身的电容器。图1示意性地示出了该设置，其中，电容器10连接在向集成电路20供电的电源线(Vcc)和地线(Vss)之间。图1中电路的物理实施的示例可在如图2所示的封装电容器中。该实施包括封装衬底210、以倒装芯片配置的方式安装于封装衬底210上的集成电路220、安装于封装衬底210上的电容器240、以及盖260，盖260固定到封装衬底210上并遮蔽集成电路220和封装电容器240。关于传统的去耦电容器的其它细节可在R.Tummala著的Fundamentals of Microsystems Packaging(微型系统的封装基础)中第122页到133页(McGraw-Hill 2001)中找到，该文献通过引用并入本文。
现有技术的电荷存储装置都不理想。尽管形成于集成电路中的电容器具有尽可能靠近集成电路的优点，但是这种靠近的代价是电容器占用了集成电路上的空间。这种空间经常是世界上最昂贵的空间之一。因此，芯片电容器很少被选为开关电流源。
电容器置于其它的较远位置，将导致对于I/O电路的较大的信号延迟和较慢的切换速度。尽管在集成电路旁边安装的电容器相对接近集成电路，但是也有不利效果，即，需要扩大集成电路封装的尺寸以容纳该电容器。尽管将电容器安装于印刷电路板上的某一方便的位置避免了空间问题，但也存在与集成电路距离相当远的不利效果。
发明内容
通过将电容器安装于集成电路封装中的集成电路的顶部，本发明避免了现有技术的问题。因此，该封装包括：衬底、安装于该衬底的集成电路、安装于该集成电路上的电容器、以及盖，该盖固定至所述衬底并遮蔽所述集成电路和电容器。
集成电路能够以倒装芯片配置的方式进行安装：集成电路的有源侧面对衬底，电容器安装于集成电路的背侧；或集成电路的有源侧朝上，其背侧在衬底上，而电容器安装于集成电路的有源侧。
在本发明可选的实施方案中，作为电容器的替代或除电容器外，其它无源元件也可安装于集成电路封装中的集成电路的顶部。
附图说明
通过下面的详细描述，本发明的上述和其它目的及优点对本领域技术人员来说将是显而易见的，其中：
图1是现有技术的用于向集成电路供电的电路的示意图；
图2是现有技术的半导体集成电路封装的视图；
图3是本发明的第一实施方案的视图；
图4是本发明的第二实施方案的视图；以及
图5和图6示出了图3中多个部分的可选细节。
具体实施方式
图3示出了本发明的集成电路封装300的示例性实施方案。集成电路封装300包括封装衬底310、安装于封装衬底310上的集成电路320、安装于集成电路320上的电容器340、固定至封装衬底310的外周的加强件350、以及盖360，盖360固定至加强件350并遮蔽集成电路320和电容器340。
封装衬底310是由绝缘材料和导体组成的多层平面结构。通常，绝缘材料为双马来酰亚胺三嗪(BT)或FR5环氧/玻璃层压板，导体为铜。电互连器315的图案被限定在封装衬底310的内表面上并延伸穿过封装衬底310，以向该衬底的外部提供电源、地和I/O信号连接。电互连器315可以是传统的引线框或者由电传导的水平层和垂直通道组成的阵列，其在球栅阵列(BGA)球/插针325和BGA球/插针370间延伸，这在本领域是公知的，并且如在本人的美国专利6,864,565中公开，该文献通过引用并入本文。在图3所示的实施方案中，到封装300的电连接是通过安装于衬底310外部的铜垫(未示出)上的BGA球/插针370实现的。
集成电路320是半导体材料(通常为硅)的平面结构，其中多个有源元件连同一层或多层互连器一起被限定在该结构的一侧。平面结构的该侧称为有源侧321，其相对侧称为背侧322。集成电路可正面朝上、背侧对着衬底地安装于衬底上；或倒置、有源侧对着衬底地安装于衬底上。正面朝上的安装通常称为线键合(wire bond)安装；倒置安装通常为倒装芯片配置。在图3所示的实施方案中，集成电路320倒置，以倒装芯片配置方式进行安装。在该配置中，集成电路320和衬底上的连接图案之间的电连接，通过衬底上的电互连器315与集成电路上的凸点下金属层(UBM)之间的焊球(或焊盘)325实现。通过焊球(或焊盘)和传统的底部填充粘合剂327，集成电路320机械地连接至衬底。
电连接器326从有源侧321到背侧322延伸穿过集成电路320。优选地，电连接器326为铜、铝或掺杂多晶硅制成的穿过硅孔洞(TSV)。
电容器340是平面结构，通常由多个相互间通过绝缘元件隔开的电传导层形成。通常，每隔一个的传导层连接于至少一个电极，且其余的传导层连接于至少第二电极。优选地，电容器为标准的陶瓷电容器，其长度和宽度与集成电路320的长度和宽度近似共同延伸(coextensive)。通过至少两个电连接器326，电容器340电连接于集成电路的电源和地互连器，电连接器326穿过集成电路并通过焊点341连接于电容器的电极。通过焊点以及传统的粘合剂，电容器340机械地连接至集成电路。
图5和图6为电容器340及其与连接器326的连接的可选形式的放大视图。在图5中，电容器540具有在其外表面上分开的两个电极542和545。电极542示例性地通过位于一个穿过硅孔洞(TSV)电连接器326顶部的焊点543连接于电源VCC。电极545示例性地通过位于第二TSV电连接器326顶部的第二焊点546连接于地VSS。电连接器的其它细节如图6所示。
图6的结构是类似的，但其示出了具有几个电极642(每个电极642都连接于电源VCC)和几个电极645(每个电极645都连接于地VSS)的电容器640，并示出了集成电路320的其它细节。具体地，电容器640具有在其外表面上分开的两套电极642和645。通过位于一个TSV电连接器326顶部的焊点643，每个电极642均示例性地连接于电源VCC。通过位于另一个TSV电连接器326顶部的不同焊点646，每个电极645均示例性地连接于地VSS。
图6示出了典型的电连接器的更多细节。每个TSV电连接器326都延伸穿过集成电路320，到达集成电路的有源侧621，在此处通常连接于一层或多层传导层624，传导层624位于在或接近集成电路的表面。每个电连接器326都终止于有源侧321上的垫628和背侧322上的垫629。焊凸垫649(solder bump pad)形成于垫629上。为实现TSV连接器326与电容器640的电极642/645之间的电连接，在所述焊盘垫上沉积焊盘641，然后加热焊球以形成焊点，该焊点将每个TSV连接器都连接至电容器的一个电极。
加强件350是传统的元件，其绕衬底的外周延伸并提供更大的强度以防止弯曲(warppage)。加强件350通过传统的粘合剂结合于衬底。盖360为平面元件，其固定至加强件350，并遮蔽集成电路320和电容器340。可选地，盖360也可用作热沉槽。对于封装的进一步加强，盖360也可通过如图3所示的传统粘合剂347来固定至电容器340。
图4示出了本发明的集成电路封装400的第二实施方案。集成电路封装400包括封装衬底410、安装于封装衬底410上的集成电路420以及安装于集成电路420上的电容器440。衬底410、集成电路420和电容器440分别与图3中的衬底310、集成电路320和电容器340类似。但是，集成电路420正面朝上安装在封装衬底410上。当正面朝上安装时，集成电路和衬底上的连接图案之间的电连接器通常通过线键合425实现，线键合425在连接图案与位于集成电路的上表面的焊盘之间延伸。集成电路420通过管芯连接粘合剂427来固定至封装衬底410。
电容器440为平面结构，传统上由多个以绝缘部件隔开的电传导部件形成。电容器440至少具有两个电极，分别电连接于集成电路的电源和地引线。此外，电容器440上的一个电极或一套电极连接于电源VCC，且另一个电极或一套电极连接于地VSS。此外，虽然连接器通过焊点实现，但是在这种情况下。焊点形成于位于集成电路420的有源侧上的焊凸垫上。电容器440通过电连接器和可能的底部填充粘合剂来固定至集成电路420。
在图4的实施方案中，集成电路420和电容器440封装于外模(overmold)460中。
对于本领域的技术人员显而易见的是，在本发明的精神和范围内可做出许多变化。如上文所注意的那样，作为电容器的替代或除电容器外，其它的无源元件也可以安装于集成电路上。

Claims (21)

1.一种半导体芯片封装，包括：
衬底；
半导体集成电路，其安装于所述衬底上；
无源元件，其安装于所述半导体集成电路上并与所述半导体集成电路电连接；以及
封装壳，其安装于所述衬底上并遮蔽所述半导体集成电路和所述无源元件。
2.根据权利要求1所述的半导体芯片封装，其中，所述无源元件基本上是平面的。
3.根据权利要求1所述的半导体芯片封装，其中，所述无源元件基本上与在其上安装所述无源元件的所述半导体集成电路共同延伸。
4.根据权利要求1所述的半导体芯片封装，其中，所述半导体集成电路具有有源侧和背侧，所述半导体集成电路按以下方式安装，即，使得所述有源侧面对着所述衬底且所述无源元件安装于所述半导体集成电路的所述背侧。
5.根据权利要求4所述的半导体芯片封装，其中，所述半导体集成电路包括多个穿过硅孔洞，所述穿过硅孔洞连接至所述无源元件上的电极。
6.根据权利要求1所述的半导体芯片封装，其中，所述半导体集成电路具有有源侧和背侧，所述半导体集成电路按以下方式安装，即，使得所述背侧面对着所述衬底且所述无源元件安装于所述半导体集成电路的所述有源侧上。
7.根据权利要求1所述的半导体芯片封装，其中，所述无源元件是电容器。
8.根据权利要求1所述的半导体芯片封装，其中，所述封装壳包括外模。
9.根据权利要求1所述的半导体芯片封装，其中，所述封装壳包括安装于所述衬底上的加强件以及安装在所述加强件上的盖。
10.根据权利要求9所述的半导体芯片封装，其中，所述加强件绕所述衬底的外周延伸。
11.一种半导体芯片封装包括：
衬底；
半导体集成电路，其以倒装的方式安装于所述衬底上，所述半导体集成电路具有在其中穿过的多个电传导穿过硅孔洞；
电容器，其安装于所述半导体集成电路上并通过所述多个电传导穿过硅孔洞电连接至所述半导体集成电路；以及
封装壳，其安装于所述衬底上，并遮蔽所述半导体集成电路和所述电容器。
12.根据权利要求11所述的半导体芯片封装，其中，所述电容器基本上是平面的。
13.根据权利要求11所述的半导体芯片封装，其中，所述电容器基本上与在其上安装所述电容器的所述半导体集成电路共同延伸。
14.根据权利要求11所述的半导体芯片封装，其中，所述封装壳包括外模。
15.根据权利要求11所述的半导体芯片封装，其中，所述封装壳包括安装于所述衬底上的加强件以及安装于所述加强件上的盖。
16.一种半导体封装芯片，包括：
衬底；
半导体集成电路，其以线键合的方式安装于所述衬底上；
电容器，安装于所述半导体集成电路上并与所述半导体集成电路电连接；以及
封装壳，安装于所述衬底上并遮蔽所述半导体集成电路和所述电容器。
17.根据权利要求16所述的半导体芯片封装，其中，所述电容器基本上是平面的。
18.根据权利要求16所述的半导体芯片封装，其中，所述电容器基本上与在其上安装所述电容器的所述半导体集成电路共同延伸。
19.根据权利要求16所述的半导体芯片封装，其中，所述封装壳包括外模。
20.根据权利要求16所述的半导体芯片封装，其中，所述封装壳包括安装于所述衬底上的加强件和安装于所述加强件上的盖。
21.一种形成半导体封装的方法，包括：
将半导体集成电路安装在衬底上；
在所述半导体集成电路上安装无源元件，并将所述无源元件电连接至所述半导体集成电路；以及
在所述衬底上安装封装壳，所述封装壳遮蔽所述半导体集成电路和所述无源元件。
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