CN101364581A - Loading board construction embedded with chip and preparation thereof - Google Patents
Loading board construction embedded with chip and preparation thereof Download PDFInfo
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- CN101364581A CN101364581A CNA2007101408323A CN200710140832A CN101364581A CN 101364581 A CN101364581 A CN 101364581A CN A2007101408323 A CNA2007101408323 A CN A2007101408323A CN 200710140832 A CN200710140832 A CN 200710140832A CN 101364581 A CN101364581 A CN 101364581A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L24/19—Manufacturing methods of high density interconnect preforms
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/12105—Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/18—High density interconnect [HDI] connectors; Manufacturing methods related thereto
- H01L2224/19—Manufacturing methods of high density interconnect preforms
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18162—Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
Abstract
The invention relates to a support plate structure in which a chip is embedded. The support plate structure comprises an aluminum support plate with a plurality of through-holes and an opening; the through-holes run through the upper surface and the lower surface of the aluminum support plate,and an alumina layer is formed on the upper and the lower surface of the aluminum support plate and the inner surfaces of the through-holes ; a chip is embedded in the opening, and a plurality of electrode cushions are disposed on the active surface of the chip; a metal layer is arranged on the inner surface of the through-holes; and at least a circuit layer-addition structure is disposed on the surface of the aluminum support plate, the active surface of the chip and the surface of the electrode cushions, wherein, the circuit layer-addition structure is provided with at least one conductive structure corresponding to the electrode cushions, and at least one conductive structure is electrically connected with the electrode cushions.
Description
Technical field
The present invention relates to a kind of carrying plate structure that is embedded with chip and preparation method thereof, refer to a kind of reducing cost especially, and be applicable to integrate electronic component be embedded with carrying plate structure of chip and preparation method thereof.
Background technology
Flourish along with electronic industry, electronic product also progresses into multi-functional, high performance R﹠D direction.For satisfying the encapsulation requirement of the high integration of semiconductor package part (Integration) and microminiaturized (Miniaturization), the circuit board that provides a plurality of main passive devices and circuit to connect, also develop into multi-layer sheet by lamina gradually, so that under limited space, cooperate integrated circuit (Integrated circuit) demand of high electron density by available wiring area on interlayer interconnection technique (Interlayer connection) the expansion circuit board.
But the processing procedure of general semiconductor device at first designs the production wafer by the wafer manufacturer according to the client, and produces the chip support plate that is applicable to this semiconductor device by the chip support plate manufacturer, as base plate for packaging.Those chip support plates being transferred to the semiconductor packages dealer afterwards puts crystalline substance, pressing mold and plants processing procedures such as ball again.At last, can finish the semiconductor device of the required electric function of client.Therefore relate to different manufacturers therebetween, not only complex steps and integration of interface are difficult in actual manufacture process.Moreover when desiring to change the function design as if client, it is complicated especially with concordant bedding that it involves change, also do not meet requirement change elasticity and economic benefit.
In addition, the conventional semiconductor packages structure be semiconductor chip is pasted on that substrate top surface carries out that routing engages (wire bonding) again or with semiconductor chip with chip bonding (Flip chip) mode and substrate electric connection, plant with the tin ball to electrically connect in the back side of substrate again.So, though can reach the purpose of high pin number.But when high frequency more uses or during high speed operation, its usefulness that will produce electrical characteristic because of the lead access path is long can't promote, and limits to some extent.In addition, because of conventional package needs connecting interface repeatedly, relatively increase the complexity of processing procedure.
For this reason, many researchs are adopted in the chip buried base plate for packaging, and this chip that is embedded in base plate for packaging can be directly and the exterior electrical components conducting, in order to shortening electrical conducting path, and can reduce the ability of signal loss, signal distortion and lifting high speed operation.
As shown in Figure 1, the carrying plate structure 100 that is embedded with chip comprises: a support plate 101, one chips 102, a plurality of electronic padses 103, and a circuit layer reinforced structure 106.Wherein this support plate 101 is formed with an opening, and this chip 102 is placed in this opening.This electronic pads 103 is formed at the surface of this chip 102.This circuit layer reinforced structure 106 is formed at this loading plate 101 and this chip 102 surfaces, and has the electronic pads 103 that at least one conductive structure 104 electrically connects this support plate 101 and chip 102.
And, the support plate more than 101 that is embedded with the carrying plate structure (as shown in Figure 1) of chip is material (a for example aluminium oxide (poplar formula modulus is 380Gpa)) with the pottery, because ceramic material possesses good thermal characteristics and mechanical property, can avoid support plate to produce the plate prying, but also have easy, the dimensional stability advantages of higher of granular wiring.Yet the dull and stereotyped manufacture method of large-size ceramic often is that its manufacturing cost of high-temperature sintering process is very expensive.Therefore, if the ceramic material that forms with existing high-temperature sintering process has the support plate of the loading plate of chip then can significantly improve manufacturing cost as embedding.
Therefore,, how to reduce the manufacturing cost of the carrying plate structure that is embedded with chip, and simplify its manufacture method, real problem for needing to be resolved hurrily along with the development of structure packing technique.
Summary of the invention
In view of above-mentioned existing shortcoming, the objective of the invention is to overcome the deficiencies in the prior art and defective, a kind of reducing cost proposed, and be applicable to integrate electronic component be embedded with carrying plate structure of chip and preparation method thereof.
For reaching above-mentioned purpose, the invention provides a kind of carrying plate structure that is embedded with chip, comprise: one have a upper surface, a lower surface, a plurality of through hole, with the aluminium support plate of an opening, wherein, described through hole connects this aluminium upper surface of said carrier plate and lower surface, and this aluminium upper surface of said carrier plate and lower surface, is formed with an alumina layer with the inner surface of this through hole; One chip, this chip embedding bury and have an active surface in this opening, a plurality of electronic padses are disposed at the active surface of this chip; One metal level, this metal level is positioned at the inner surface of described through hole, also has a plurality of electric connection pads and is disposed at this aluminium upper surface of said carrier plate and lower surface, and electrically connect with this metal level; And at least one circuit layer reinforced structure, this circuit layer reinforced structure be disposed at this aluminium support plate surface, this chip active surface, with the surface of this electronic pads, wherein, this circuit layer reinforced structure has a plurality of conductive structures and is electrically connected at this electronic pads and electric connection pad.
Because the present invention is embedded with in the carrying plate structure of chip, the aluminium support plate that the surface is formed with alumina layer is the metal/ceramic composite support plate, have ceramic rigidity and metal toughness concurrently, can improve because of the asymmetric layer plate prying situation that is produced that increase as the core base of embedded chip encapsulation.
In addition, in the carrying plate structure that is embedded with chip of the present invention, the metal level of through-hole inner surface is one to be communicated with the continuous metal layer of aluminium support plate upper surface and lower surface, with as the conductive channel that is communicated in this aluminium upper surface of said carrier plate and lower surface.Thus, when carrying plate structure of the present invention when combining with electronic component, electronic component does not need additionally to make circuit makes its conducting, can be electrically connected to another surperficial lead of aluminium support plate or circuit layer reinforced structure by metal level, and make the electronic component conducting.
In the carrying plate structure that is embedded with chip of the present invention, the alumina layer thickness of this aluminium support plate does not have special restriction, decide on needed rigidity of loading plate or toughness, and the control method of this alumina layer thickness also do not have special restriction, can reach by different method for oxidation or condition.
The carrying plate structure that is embedded with chip of the present invention, wherein, the material of this aluminium support plate can be aluminium oxide or aluminium oxide alloy, is preferably aluminium oxide alloy.And the formation method of the alumina layer on this aluminium support plate surface can be any method for oxidation, preferably utilizes anode oxidation method to form.
In addition, in the manufacture method of the loading plate that is embedded with chip of the present invention, the width of this through hole does not have special restriction, decides on the electrical demand or the support plate thickness of carrying plate structure.The control method of the width of this through hole does not also have special restriction, can reach by diverse ways or condition.
In the carrying plate structure that is embedded with chip of the present invention, metal level in the through hole can be the continuous metal layer of a connection aluminium support plate upper surface and lower surface, there is no particular restriction for its thickness, is that hollow, this metal level are formed at the inner surface of through hole and fill up this through hole with resin fills up in the through hole or this metal level is formed at through hole inner surface and this metal level for this metal level is formed at the inner surface of through hole and through hole preferably.
The carrying plate structure that is embedded with chip of the present invention wherein, also includes a plurality of electric connection pads and is disposed at this aluminium upper surface of said carrier plate and lower surface, and electrically connects with this metal level.
The carrying plate structure that is embedded with chip of the present invention wherein, also includes at least one electronic component arrangements is not formed with the circuit layer reinforced structure in this aluminium support plate the electric connection pad on surface, and this electronic component and this metal level electrically connect.
The carrying plate structure that is embedded with chip of the present invention, wherein, the material of this electronic pads is not limit and is used any metal, preferably is an aluminum metal or copper metal.
The carrying plate structure that is embedded with chip of the present invention, wherein, also can include an immobilization material between this aluminium support plate and this chip, to fix this chip in this opening of this aluminium support plate, this immobilization material does not limit, and preferably is epoxy resin or dielectric layer material.
The carrying plate structure that is embedded with chip of the present invention, wherein, this circuit layer reinforced structure includes dielectric layer, is stacked and placed on line layer and at least one this conductive structure on this dielectric layer, and at least one this conductive structure passes this dielectric layer is electrically connected to this dielectric layer below for this line layer line layer, electronic pads or electric connection pad.
And, the dielectric layer material of this circuit layer reinforced structure does not limit, preferably at least one being selected from by ABF (Ajinomoto Build-up Film), two along butyryl diacid acid imide/triazine (BT, Bismaleimide triazine), phenylbenzene cyclobutadiene (benzocylobutene; BCB), liquid crystal polymer (Liquid Crystal Polymer), polyimides (Polyimide; PI), any group that forms in the materials such as polyvinylether (Poly (phenylene ether)), polytetrafluoroethylene (Poly (tetra-fluoroethylene)), aramid fiber (Aramide), epoxy resin and glass fibre.The material of this line layer and this conductive structure does not limit, and preferably is copper, tin, nickel, chromium, titanium, copper/evanohm or tin/lead alloy.
The carrying plate structure that is embedded with chip of the present invention; also be included in this circuit layer reinforced structure surface and be formed with welding resisting layer as insulating protective layer; welding resisting layer is formed with opening appearing the electric connection pad on circuit layer reinforced structure surface, and a plurality of solder projection is arranged in this welding resisting layer opening and with the circuit layer reinforced structure and is electrically conducted.
Also comprise a crystal seed layer between this line layer and this dielectric layer or between this conductive structure and this solder projection, this crystal seed layer is mainly as the required current conduction path of electroplating process, the group that any material is formed in optional free copper, tin, nickel, chromium, titanium, copper/evanohm and the tin/lead alloy, can also conducting polymer as crystal seed layer, the group that any material is formed in the optional free polyacetylene of this conducting polymer, polyaniline and the organic sulfur polymer.
In addition, for reaching above-mentioned purpose, the present invention also provides a kind of manufacture method that is embedded with the loading plate of chip, and its step comprises: (A) provide one have a upper surface, a lower surface, with the aluminium support plate of a plurality of through holes, wherein, described through hole connects this aluminium upper surface of said carrier plate and lower surface; (B) this aluminium support plate of oxidation makes this aluminium upper surface of said carrier plate and lower surface, is formed with an alumina layer with the inner surface of this through hole; (C) form a continuous metal level in the inner surface of described through hole, and this metal level is communicated with this aluminium upper surface of said carrier plate and lower surface, and forms an electric connection pad respectively in the two ends of this metal level; (D) form an opening in this aluminium support plate; (E) chip is embedded and be fixed in this opening of this aluminium support plate, wherein, the active surface of this chip has a plurality of electronic padses; And (F) in the active surface of this aluminium support plate, this chip, form at least one circuit layer reinforced structure with the surface of this electronic pads, wherein, this circuit layer reinforced structure has the conductive structure of at least one correspondence in this electronic pads, and these a plurality of conductive structures are electrically connected at this electronic pads and electric connection pad.
Because the aluminium support plate is after surface oxidation treatment, aluminium support plate surface can form alumina layer, become the metal/ceramic composite support plate, have ceramic rigidity and metal toughness concurrently, can improve because of the asymmetric layer plate prying situation that is produced that increase as the core base of embedded chip encapsulation.
In addition, the metal level of through-hole inner surface is one to be communicated with the continuous metal layer of aluminium support plate upper surface and lower surface, with as the conductive channel that is communicated in this aluminium upper surface of said carrier plate and lower surface.Thus, when the carrying plate structure of this method manufacturing combines with electronic component, electronic component does not need additionally to make circuit makes its conducting, can be electrically connected to another surperficial lead of aluminium support plate or circuit layer reinforced structure by metal level, and make the electronic component conducting.
In the manufacture method of the loading plate that is embedded with chip of the present invention, the alumina layer thickness of this aluminium support plate does not have special restriction, decide on needed rigidity of loading plate or toughness, and the control method of this alumina layer thickness also do not have special restriction, can reach by different method for oxidation or condition.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein in step (A), the material of this aluminium support plate can be aluminum or aluminum alloy, preferably is aluminium alloy.And in step (B), the method for oxidation of this aluminium support plate does not limit, and preferably is anode oxidation method.
In addition, in the manufacture method of the loading plate that is embedded with chip of the present invention, the width of this through hole does not have special restriction, decides on the electrical demand of carrying plate structure.The control method of the width of this through hole does not also have special restriction, can reach by diverse ways or condition.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein, in step (C), the formation method of this metal level does not have special restriction, preferable can plating mode form or inject metal form in this through hole.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein, in step (C), form a continuous metal level after the inner surface of described through hole, optionally fill up this through hole, form a plurality of electric connection pads that electrically connect with this metal level in this aluminium upper surface of said carrier plate and lower surface again with resin.
The manufacture method that is embedded with the loading plate of chip of the present invention wherein, comprises that also a step (G) forms an electronic component on the electric connection pad on the surface that is not formed with the circuit layer reinforced structure of this aluminium support plate, and this electronic component and the electric connection of this metal level.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein, the material of this electronic pads is not limit and is used any metal, preferably is an aluminum metal or copper metal.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein, behind the opening of chip embedding aluminium support plate, can be filled with an immobilization material between this aluminium support plate and this chip, to fix this chip in this opening of this aluminium support plate, preferably be filling epoxy resin or dielectric layer material.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein, in the step of making this circuit layer reinforced structure be: in the active surface of this aluminium support plate, this chip, form a dielectric layer with the surface of this electronic pads, and make this dielectric layer form a plurality of dielectric layer openings, these a plurality of dielectric layer openings are corresponding to this electronic pads of this chip and the electric connection pad on aluminium support plate surface; Form a crystal seed layer in this dielectric layer and this dielectric layer opening; Form a resistance layer again on the surface of this crystal seed layer, this resistance layer forms a plurality of resistance layer openings with exposure, visualization way, and at least one resistance layer opening corresponds to the position of the electronic pads of this chip; Electroplate one deck electroplated metal layer in these a plurality of resistance layer openings, the crystal seed layer that removes this resistance layer again and covered, wherein this electroplated metal layer includes a line layer and a conductive structure at least.
, in the step of making this circuit layer reinforced structure, before forming the patterning resistance layer, form a crystal seed layer earlier, and after the step that removes the patterning resistance layer, continue to remove the crystal seed layer that is not covered with electroplated metal layer again according to the present invention.If this crystal seed layer is selected from the group that is made up of any material in copper, tin, nickel, chromium, titanium, copper/evanohm and the tin/lead alloy, preferably for using copper product, then form, preferably form for sputter or electroless-plating mode with one of physical deposition and chemical deposition.If this crystal seed layer with conducting polymer as crystal seed layer, then form with rotary coating (spincoating), ink jet printing (ink-jet printing), wire mark (screen printing) or impression modes such as (imprinting), wherein this conducting polymer is selected from the group that is made up of any material in polyacetylene, polyaniline and the organic sulfur polymer.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein, in the step of making this circuit layer reinforced structure, the material of this dielectric layer does not limit, preferable at least one being selected from by ABF (Ajinomoto Build-up Film), two along butyryl diacid acid imide/triazine (BT, Bismaleimide triazine), phenylbenzene cyclobutadiene (benzocylobutene; BCB), liquid crystal polymer (Liquid Crystal Polymer), polyimides (Polyimide; PI), any group that forms in the materials such as polyvinylether (Poly (phenylene ether)), polytetrafluoroethylene (Poly (tetra-fluoroethylene)), aramid fiber (Aramide), epoxy resin and glass fibre.
The manufacture method that is embedded with the loading plate of chip of the present invention, wherein, in the step of making this circuit layer reinforced structure, the material of this electroplated metal layer there is no particular restriction, preferably be copper, tin, nickel, chromium, palladium, titanium, tin/lead or its alloy, more preferably, be copper.
Description of drawings
Fig. 1 is the existing generalized section that is embedded with the carrying plate structure of chip;
Fig. 2 (a) to (f) is the generalized section of the manufacture method of the loading plate that is embedded with chip of a preferred embodiment of the present invention;
Fig. 3 (a) to (c) is the generalized section of manufacture method of the circuit layer reinforced structure of a preferred embodiment of the present invention;
Fig. 4 is the generalized section of the manufacture method of another preferred embodiment of the present invention.
Symbol description among the figure
10 aluminium support plates, 11 upper surfaces, 12 lower surfaces
13 through holes, 14 alumina layers, 15 metal levels
16 resins 17,31a electric connection pad 18 aluminum metal
19,51 openings, 21,102 chips, 22 active surfaces
23,103 electronic padses, 24 non-active surface 25 epoxy resin
26 dielectric layer material, 31,106 circuit layer reinforced structures, 32 dielectric layers
33 dielectric layer openings, 34 patterning resistance layers, 35 resistance layer openings
36 electroplated metal layers, 37 line layers, 38 conductive structures
40 crystal seed layers, 41 solder projections, 42 electronic components
50 welding resisting layers, 101 support plates, 104 protective layers
105 metal levels
Embodiment
Embodiment one
See also Fig. 2 (a) to 2 (f), be the generalized section of the carrying plate structure method for making that is embedded with chip of present embodiment.
At first, provide an aluminium support plate 10 (poplar formula modulus 70Gpa), and form a plurality of through holes 13 with the method for machine drilling in aluminium support plate 10, this through hole 13 needs to connect the upper surface 11 and lower surface 12 of aluminium support plate 10, shown in Fig. 2 (a).
This aluminium support plate 10 is placed an electrolysis tank, carry out oxidation reaction, make the surface oxidation of aluminium support plate 10 form alumina layer 14, remainder keeps aluminum metal layer 18, and its structure is shown in Fig. 2 (b).In the present embodiment, it is the electrolysis tank of oxalic acid solution or sulfuric acid solution that aluminium support plate 10 places an electrolyte, carries out anodic oxidation reactions, and by adjusting anodizing time, come the thickness of controlled oxidation aluminium lamination 14, the rigidity of the aluminium support plate after the oxidation is measured, and its poplar formula modulus can reach 400Gpa.This shows, present embodiment can once be finished the support plate that includes aluminium (metal) layer and aluminium oxide (ceramic material) layer simultaneously, do not need other extra step, as pressing or sintering, and aluminum metal layer 18 engages closely with interface between the alumina layer 14, therefore, the aluminium support plate of present embodiment can have concurrently simultaneously metal toughness, with the pottery rigidity.
Then, shown in Fig. 2 (c), the inner surface of the upper surface 11 of aluminium support plate 10, lower surface 12 and through hole 13 all forms after the alumina layer 14 of insulation and tool pottery rigidity, in plating inner surface one metal level 15 of through hole 13.This metal level 15 is the upper surface 11 of a connection aluminium support plate 10 and the continuous metal layer of lower surface 12.In the present embodiment, this metal level is a copper.Then, be filled in through hole 13 inside with resin 16, the upper surface 11 that is communicated in this aluminium support plate 10 in metal level 15 respectively forms an electric connection pad 17 with the two ends of lower surface 12 again, and as the positions that metal level 15 outwards electrically connects, this electric connection pad 17 electrically connects with metal level 15.The formation method of this electric connection pad 17, respectively form a patterning resistance layer (not shown) in the upper and lower surface of aluminium support plate 10, electroplate or deposit a bronze medal layer after the part that is not covered, remove above-mentioned patterning resistance layer, promptly form electric connection pad 17 by above-mentioned patterning resistance layer.Because forming the method for electric connection pad 17 has been prior art, thus present embodiment not again with icon representation it.
Thereupon, shown in Fig. 2 (d), form an opening 19, again a chip 21 is embedded in the opening 19 of aluminium support plate 10 with milling cutter (router) cutting aluminium support plate 10.This chip 21 has a plurality of electronic padses 23 on its active surface 22, the material of this electronic pads 23 is a copper.Then, epoxy resin 25 is inserted space between aluminium support plate 10 and the chip 21, make chip 21 be fixed in the opening 19 of aluminium support plate 14 its structure such as Fig. 2 (e).In the present embodiment, the non-active surface 24 of chip 21 is exposed, helps chip 21 heat radiations.
After finishing above-mentioned steps, form a circuit layer reinforced structure 31 in the surface of aluminium support plate 14 surface and the active surface 22 of chip 21, its structure is shown in Fig. 2 f.The formation method of this circuit layer reinforced structure 31 as Fig. 3 (a) to shown in 3 (c).At first, form a dielectric layer 32 in the surface of the active surface 22 of aluminium support plate 10 surfaces, chip 21.The material of this dielectric layer 32 is at least one to be selected from by ABF (AjinomotoBuild-up Film), two along butyryl diacid acid imide/triazine (BT, Bismaleimide triazine), phenylbenzene cyclobutadiene (benzocylobutene; BCB), liquid crystal polymer (Liquid CrystalPolymer), polyimides (Polyimide; PI), any group that forms in the materials such as polyvinylether (Poly (phenylene ether)), polytetrafluoroethylene (Poly (tetra-fluoroethylene)), aramid fiber (Aramide), epoxy resin and glass fibre.In the present embodiment, the material of dielectric layer 32 is ABF (Ajinomoto Build-up Film).Then, with laser drill or exposure, be developed in this dielectric layer 32 and form a plurality of dielectric layer openings 33, wherein at least one dielectric layer opening is corresponding to electronic pads 23 positions of chip 21, and its structure is shown in Fig. 3 (a).When utilizing the technology of laser drill, also need carry out de-smear (De-smear) operation to remove because of glue slag in this dielectric layer opening that boring is residued in.Then, on dielectric layer 32 and dielectric layer opening 33, form a crystal seed layer 40, on the surface of this crystal seed layer 40, form resistance layer 34 again, this resistance layer 34 forms a plurality of resistance layer openings 35 with exposure, visualization way, and at least one resistance layer opening 35 corresponds to the position of the electronic pads 23 of this chip 21, and its structure is shown in Fig. 3 (b).At last, shown in Fig. 3 (c), electroplate one deck electroplated metal layer 36, the crystal seed layer 40 that removes this resistance layer 34 again and covered in these a plurality of resistance layer openings 35.Circuit layer reinforced structure 31 shown in Fig. 2 (f) uses and increases a layer technology, according to the stacked structure that gets on to make multilayer of the needed number of plies.This electroplated metal layer 36 conductive structure 38 of including line layer 37 and being connected wherein with the electronic pads 23 of chip 21.
At last; shown in 2 (f); be formed with welding resisting layer 50 as insulating protective layer in the surface of this layer reinforced structure 31; welding resisting layer 50 is formed with opening 51 to appear the electric connection pad 31a on circuit layer reinforced structure 31 surfaces; and a plurality of solder projections 41 are arranged in this welding resisting layer opening 51 and with circuit layer reinforced structure 31 and are electrically conducted; and configuration electronic component 42 is in the surface of this aluminium support plate 14; electronic component 42 and electric connection pad 17 and metal level 15 are electrically connected, promptly finish the loading plate that is embedded with chip of present embodiment.
Therefore, the aluminium support plate 14 of present embodiment can directly be used as metal level 15 circuit of conducting aluminium support plate 14 upper and lower sides when integrating electronic component 42, make electronic component 42 conductings.
Embodiment two
The manufacture method and the embodiment one of the loading plate that is embedded with chip of present embodiment are closely similar, except the fixing means of chip and aluminium support plate and embodiment 1 different, all the other steps are roughly identical with embodiment 1.
As shown in Figure 4, after chip 21 is embedded in the opening of aluminium oxide support plate 14, in aluminium oxide support plate 14 surface coated one dielectric layer materials 26, and dielectric material is filled between chip 21 and the aluminium oxide support plate 14 by pressing, with fixed chip 21 in the opening of aluminium oxide support plate 14.Wherein, the dielectric layer material 26 that is positioned at aluminium oxide support plate 14 lower surfaces can be considered one of dielectric layer of layer reinforced structure, and proceeds the formation step of layer reinforced structure.At last, on layer reinforced structure, form a plurality of solder projections again, and integrate electronic component and finish the loading plate that is embedded with chip of present embodiment.
Same, the aluminium oxide support plate 14 of present embodiment is when integrating electronic component, and aluminium passage 15 can be used as the circuit of conducting aluminium oxide support plate 14 upper and lower sides, makes the electronic component conducting.
The foregoing description is only given an example for convenience of description, and the interest field that the present invention advocated should be as the criterion so that claims are described certainly, but not only limits to the foregoing description.
Claims (15)
1. a carrying plate structure that is embedded with chip is characterized in that, comprising:
One have a upper surface, a lower surface, a plurality of through hole, with the aluminium support plate of an opening, wherein, described through hole connects this aluminium upper surface of said carrier plate and lower surface, and this aluminium upper surface of said carrier plate and lower surface, and the inner surface of this through hole be formed with an alumina layer;
One chip, this chip embedding bury and have an active surface in this opening, a plurality of electronic padses are disposed at this active surface of this chip;
One metal level, this metal level is positioned at the inner surface of described through hole, also has a plurality of electric connection pads and is disposed at this aluminium upper surface of said carrier plate and lower surface, and electrically connect with this metal level; And
At least one circuit layer reinforced structure, this circuit layer reinforced structure is disposed at the surface of the active surface of this aluminium support plate and this chip, and wherein, this circuit layer reinforced structure has a plurality of conductive structures and is electrically connected at this electronic pads and electric connection pad.
2. the carrying plate structure that is embedded with chip as claimed in claim 1, wherein, filling has resin in this through hole.
3. the carrying plate structure that is embedded with chip as claimed in claim 1 wherein, is filled with an epoxy resin between this aluminium support plate and this chip, to fix this chip in this opening of this aluminium support plate.
4. the carrying plate structure that is embedded with chip as claimed in claim 1 wherein, is filled with a dielectric layer material between this aluminium support plate and this chip, to fix this chip in this opening of this aluminium support plate.
5. the carrying plate structure that is embedded with chip as claimed in claim 1, wherein, this circuit layer reinforced structure includes a dielectric layer, and is stacked and placed on line layer and at least one this conductive structure on this dielectric layer, and at least one this conductive structure passes this dielectric layer is electrically connected to this dielectric layer below for this line layer line layer, electronic pads or electric connection pad.
6. the carrying plate structure that is embedded with chip as claimed in claim 1, wherein, the surface of this circuit layer reinforced structure is formed with a welding resisting layer, and this welding resisting layer is formed with a plurality of openings for solder projection being set and being electrically conducted with this circuit layer reinforced structure.
7. the carrying plate structure that is embedded with chip as claimed in claim 1 wherein, also includes at least one electronic component arrangements is not formed with the circuit layer reinforced structure in this aluminium support plate the electric connection pad on surface, and this electronic component and this metal level electrically connect.
8. a manufacture method that is embedded with the loading plate of chip is characterized in that, comprises step:
(A) provide one have a upper surface, a lower surface, with the aluminium support plate of a plurality of through holes, wherein, described through hole connects this aluminium upper surface of said carrier plate and lower surface;
(B) this aluminium support plate of oxidation makes this aluminium upper surface of said carrier plate and lower surface, is formed with an alumina layer with the inner surface of this through hole;
(C) form a continuous metal level in the inner surface of described through hole, and this metal level is communicated with this aluminium upper surface of said carrier plate and lower surface and forms an electric connection pad respectively in the two ends of this metal level;
(D) form an opening in this aluminium support plate;
(E) chip is embedded and be fixed in this opening of this aluminium support plate, wherein, the active surface of this chip has a plurality of electronic padses; And
(F) in the active surface of this aluminium support plate, this chip, form at least one circuit layer reinforced structure with the surface of this electronic pads, wherein, this circuit layer reinforced structure has a plurality of conductive structures corresponding to this electronic pads, and these a plurality of conductive structures are electrically connected at this electronic pads and electric connection pad.
9. the manufacture method that is embedded with the loading plate of chip as claimed in claim 8, wherein, in step (B), this alumina layer utilizes anode oxidation method to form.
10. the manufacture method that is embedded with the loading plate of chip as claimed in claim 8, wherein, in step (C), form a continuous metal level after, fill up this through hole with resin, form electric connection pad again.
11. the manufacture method that is embedded with the loading plate of chip as claimed in claim 8 wherein, in step (E), is filled with an epoxy resin layer between this aluminium support plate and this chip, to fix this chip in this opening of this aluminium support plate.
12. the manufacture method that is embedded with the loading plate of chip as claimed in claim 8 wherein, in step (F), is filled with a dielectric layer material between this aluminium support plate and this chip, to fix this chip in this opening of this aluminium support plate.
13. the manufacture method that is embedded with the loading plate of chip as claimed in claim 8 wherein, in this step (F), forms this at least one circuit layer reinforced structure and comprises the following steps:
In the active surface of this aluminium support plate, this chip, form a dielectric layer with the surface of this electronic pads, and make this dielectric layer form a plurality of dielectric layer openings, these a plurality of dielectric layer openings are corresponding to this electronic pads of this chip and the electric connection pad on aluminium support plate surface;
Form a crystal seed layer in this dielectric layer and this dielectric layer opening, this crystal seed layer surface forms resistance layer and forms a plurality of resistance layer openings, and wherein, at least one resistance layer opening corresponds to the position of this electronic pads of this chip;
Electroplate one deck electroplated metal layer in these a plurality of resistance layer openings; And
Remove the crystal seed layer that this resistance layer and resistance layer covers, wherein this electroplated metal layer includes a line layer and a conductive structure at least.
14. the manufacture method that is embedded with the loading plate of chip as claimed in claim 8, wherein, this electroplated metal layer is copper, tin, nickel, chromium, palladium, titanium, tin/lead or its alloy.
15. the manufacture method that is embedded with the loading plate of chip as claimed in claim 8, wherein, comprise that also a step (G) is to form an electronic component on the electric connection pad on the surface that is not formed with the circuit layer reinforced structure of this aluminium support plate, and this electronic component and the electric connection of this metal level.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101408323A CN101364581A (en) | 2007-08-10 | 2007-08-10 | Loading board construction embedded with chip and preparation thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNA2007101408323A CN101364581A (en) | 2007-08-10 | 2007-08-10 | Loading board construction embedded with chip and preparation thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN101364581A true CN101364581A (en) | 2009-02-11 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNA2007101408323A Pending CN101364581A (en) | 2007-08-10 | 2007-08-10 | Loading board construction embedded with chip and preparation thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101364581A (en) |
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