CN1010291B - Circuit arrangement for producing eroding pulses on spark erosion installation - Google Patents

Abstract

A direct current electrical spark erosion device is provided with a circuit which is connected with a ballast resistor and has a function of generating erosion pulses. The circuit is at least provided with two parallel controllable circuits which are parallel with a spark gap, and output currents of the controllable circuits are superimposed onto total current which passes through the spark gap. The control input of the circuit is connected with a control circuit, the control input of the circuit generates time-associated control signals, and the time-associated performance is adjustable and (or) controllable. Under the condition that a control circuit cooperates with a control element in each circuit, current pulses are allowed to pass the spark gap only when switches which are controlled by control elements are switched off at the same time.

Description

Circuit arrangement for producing eroding pulses on spark erosion installation

The invention relates to one need not insert an important steady resistance and can produce the circuit arrangement that corrosion pulse is used on the spark eroding device with dc source.

In spark eroding processing, the validity of spark discharge in the working clearance, thereby the design of spark generator play conclusive effect for the operation economy of spark eroding process.So the spark pulse generator of Shi Yonging prevents that by steady resistance power supply from producing overload current when the igniting discharging gap in the past.Steady resistance also is in order to protect semiconductor switch.But steady resistance is unfavorable for the growth of generator desired power, and this is putative.

So, DE-OS2,908,696 have proposed a kind of spark eroding generator that does not have steady resistance, and it supplies with spark gap to the high frequency half-wave of generator circuit discontinuously with timing.But this method is because instantaneous power cut-off has caused the discharge pulse of disagreeable height fluctuation.Perhaps, the weak point of the time of this outage is enough to make all pulses to be discharged in same discharge channel.The possibility that this state makes device realize that thereby control flexibly allows that different machined parameters changes in maximum magnitude is more difficult.

Problem to be solved by this invention is the control range of improving about the foregoing circuit device.From the content of invention, this problem is solved by following feature according to the present invention, that is: have at least two controlable electric currents in parallel mutually and and the spark gap parallel connection; The output circuit of circuit is superposed to the device of the total current that flows through spark gap; The control circuit that the control signal of the free contact of adjustable for producing (or controlled) designs; Above-mentioned control output is connected to the control input of circuit.

This just might realize the control of high flexible, i.e. the function of preliminary election machined parameters on a large scale, thus play conclusive effect for the efficient that improves generator.In addition, the expense of manufacturing sort circuit needs is also not very big.The amplitude of electric current and the timing of time can freely be controlled and not influenced by the fluctuation of power supply network.Rely on a kind of help of the remnants fluctuation that can freely set on discharge current, the roughness of surface to be machined can change by favourable mode.At last, can make between power supply network and the spark gap by circuit arrangement of the present invention and insulate.

The circuit diagram brief introduction

Hereinafter be to introduce in more detail and invent relevant nonrestrictive concrete device and accompanying drawing, comprising:

Fig. 1, a kind of preferred embodiment that two controlable electric currents are arranged.

Fig. 2, the timing diagram of electric current stack in the generator of presentation graphs 1.

Fig. 3 except that the truth table of some component, also illustrates the embodiment of the control circuit of two circuit that are used for control chart 1.

The timing diagram of Fig. 4 a to 4d description operation step.

Generator circuit figure shown in Figure 1 has a power supply 1, from its nothing consume circuit by two parallel connections or branch circuit 2A and 2B to spark gap 3 power supplies, so are branch electric current I by the electric current I of spark gap 3 _AAnd I _BSummation.This representational basic circuit principle can repeatedly repeat by the same manner.In order to give the switch 21A of transition branch 2A and 2B, 22A, 21B, 22B produces switching signal, is provided with a control circuit 4, and it comprises a logic circuit, presses transition branch 2A, the requirement of 2B and produce control signal A, a, B, b.This control circuit is come regularly by a clock signal S by clock pulse generator 5, so the switching signal that the generator pulse is used can be given selectively by the operating staff.

The element of transition branch 2A all has alphabetical A and indicates, the element of the 2B of branch then indicates with B.In representational device, transition branch 2A, the structure of 2B is identical.So not needing to quote above-mentioned letter when introducing transition branch has hereinafter indicated.

Each transition branch 2 has two gauge taps 21,22, and these switches are when conducting state, and the elementary winding by a pulse transformer 23 discharges an electric current.Current density is determined in current measurement device 24, and will be adjusted to a value of having set up therein in first controlled stage 25.For this purpose, it is measured to be stored in the desired value of the storage the controlled stage 25 from the actual value signal of current measurement device 24.When the actual value signal reached the desired value signal, controlled stage 25 just was transformed to nonconducting state to switch 21.Pulse transformer 23 is work below it saturated, so the branch current I that the whole current impulses by primary side produce in primary side _A, I _B, its current density is equivalent to the transfer ratio of primary side.These branch currents make it to remain one-way by diode 27.

To switch 21,22(be with transistorized form) control be at the logic of distributing to switch 21 and 22 by first controlled stage 25 or second controlled stage 26 (or control) signal A, a, B takes place at control circuit 4 under the help of b.It is to be noted if above-mentioned control signal A, a, B, b are at logical one, then the switch in the transition branch 2 the 21, the 22nd is obstructed; If above-mentioned signal is at logical zero then switch the 21, the 22nd, conducting.Only the pulse electric current just can be delivered to spark gap 3 when two switches 21,22 disconnect simultaneously.If but have only a switch 21 or 22 to connect, so because the effect of diode 28 or 29, the circuit state that the primary side of pulse transformer 23 always is in a kind of " unidirectional transmission ".

For this purpose, the primary side of pulse transformer 23 is connected between the switch 21,22.Diode 29 is that the transition branch of forming with switch 21 and primary side is connected in parallel herein; And diode 28 to be transition branch of forming with primary side and switch 22 be connected in parallel.

The reliable ignition of spark gap 3 discharges is that the high induction voltage that produces by pulse conduction obtains.Circuit diagram shows that spark gap 3 and generator circuit disconnect fully, so can be with any polarity work.

Fig. 2 shows corresponding because control circuit 4 drives under the situation of two transition branch 2A, 2B two branch current I _AAnd I _BSuperimposed and form total current I.In the time is t _SThe time, the timing generator 5 of operating personnel control is connected timing signal S, so that switch 21A, 22A are switched in first transition branch 2A during beginning, so emit a current impulse in transformer 23A.As hereinafter for control circuit 4(Fig. 4) will describe in detail, this pulse current is to be set at certain duration (t ₂-t ₀), make it can deal with employed electric elements technically with on the thermal characteristics.With t _ST time lag that compares ₀Be because the response time-delay of typical power switch circuit causes.So transition branch 2A just disconnects.But parallel mutually is the second but advanced ignition of transition branch 2B therewith, so branch current I _BAt t ₁In time, begin to flow through here.Because its thermal characteristics and technical bearing capacity, make it also can be at certain hour (t ₄-t ₁) interior maintenance connection.At time t ₃And t ₃Before, the first transition branch 2A connects once more, and so on.Point out that electric current I is when timing signal S is in " connection " state for the 3rd, form, and produce by over-over mode by transition branch 2A, the 2B of parallel connection by branch current I and I addition.By the injection advance time to succeeding impulse, and the control of identical pause and pulse width, might make a unlimited lasting current impulse igniting that is actually additional shaping at random.The shortest time that electric current continues is that single translated channel 2 is used for the time that an electric current can reach from the rising edge to the trailing edge.Adopt the commodity element on the market, this time just can reach μ s(microsecond) the order of magnitude.Among Fig. 2 at time t ₁With t ₂; t ₃With t ₄; t ₅With t ₆Between the trace of electric current I interrupt, illustrated that by making discharge current pulse become pre-designed waveform be possible to the pulse stack.

Fig. 3 represents to produce the control signal A that connects each other, a, B, control circuit 4 circuit diagrams of b with a conversion logic.The process velocity of needed discharge pulse is provided for the machine operation personnel by the timing signal S of control circuit 4, except to the timing generator 5 as oscillator provides, control circuit 4 also has an oscillator 41, and it produces the high-frequency pulse signal P of a better square-wave pulse.After phase inverter 48 paraphase became P, this pulse signal P was sent to the timing input CK of a J-K flip flop 42, and the input J and the K of trigger are set on the logical one.Signal A " and B " obtains from the output Q of above-mentioned master flip-flop 42 and Q, and is converted to signal A ' and B ' by first AND gate unit 413 or 412, changes signal A and B into through second AND gate unit 415,414 again.If delivering to signal M there simultaneously is at logical one, then first AND gate unit group only allows signal A " and B " to pass through.Signal M is that the output by a monostable circuit 47 provides, and then provides pulse signal P to those input controls.Monostable circuit 47 pulse signal P just along the time change unstable state into from stable state.Like this, monostable circuit 47 just is converted to " not working " (off) inhomogeneities at interval at interval for " work " spoken of about the time lead of lighting succeeding impulse among Fig. 2.

Second group of 414,415 of AND gate unit allows signal A ' and B ' to pass through, as long as the output signal of the output Q of d type flip flop 44 is at logical one.Timing signal S is sent to the timing input CK of trigger 44, and signal u is sent to zero clearing input CL.Signal u is the output signal of a phase inverter 49, and this phase inverter input is connected with the output of AND gate unit 411, and pulse signal P and signal M deliver to the input of its (unit).Its output is delivered to phase inverter 49 to signal U.The D-input of this trigger 44 remains on logical one forever.

Here interested be that the several of the d type flip flop 44 that caused by truth table may states, as shown in Figure 3, wherein to use the connotation of following code names:

CL: zero clearing input

D:D-output

CK: regularly input

Q:Q-output Q:Q-output L: logical zero

H: logical one Qo, Qo: the level that can preset arbitrarily

X: any level ↑: rising edge

The trailing edge of signal M is to be used for controlling the above-mentioned time lead of lighting succeeding impulse.

Signal a and b derive from signal A and B.For this purpose, the output signal B image signal A " and B " of the output signal A of AND gate unit 415 or AND gate unit 414 is sent to an input of the first OR-gate unit 417 or 416 like that.Like this, signal A " and B " just has been equal to signal A and B.Timing signal S changes S into by phase inverter 410, is sent to two OR-gate unit 416,417 as alternating signal.The output of OR-gate unit 416,417 provides signal A ' and B ', as long as timing signal S is at logical zero, then signal A ' and B ' just remain logical one.But if timing signal S also is a logical one, then signal A ' and B ' are consistent with signal A " and B ", thereby also consistent with A and B.

Because the control of master flip-flop 42, signal A and B can only be the trailing edge that signal A occurs in the mode that replaces with the rising edge of signal B between time cycle of (or opposite) equal the time of signal M at logical zero.Must remember also that about signal A and B aspect then they can only be at logical zero if signal S is at logical one.Must be pointed out to have and all the other signals, particularly signal M and U, the effect of forced synchronism in the positive side of timing signal S.

For this reason, the non-same polarity in OR-gate unit 416 connects an OR-gate unit 418 again, and its input is influenced by signal B '.Similarly can connect an OR-gate unit 419 again, its an input acknowledge(ment) signal A ' at the non-same polarity of OR-gate unit 417.To another input of OR-gate unit 418, send into a Q signal by the D-trigger 46 that is connected on end of the same name, another input of OR-gate unit 419 is then sent into a Q signal by D-trigger 45.OR-gate unit 418,419 provides signal a and b.End of the same name at two D-triggers 45,46 also has a D-trigger 43.The zero clearing input CL of D-trigger 43 remains on logical one forever.Trigger 43,45 and 46 also can satisfy the given truth table of Fig. 3.The output signal U of AND gate unit 411 is fed to the timing input CK of trigger 43, and the output signal B of master flip-flop 42 " gives D-input.Q by trigger 43 is provided by the D-input that the signal R that provides is fed to trigger 45.Q-by trigger 43 is provided by the D-input that the signal R that provides is fed to trigger 46.Timing signal S is added to the timing input CK of trigger 45,46, and the output signal U of phase inverter 49 is supplied with removing import CL.Output signal B with master flip-flop 42 " drive the D-input of trigger 43; and with the output signal U driving timing input CK of AND gate unit 411; (when timing signal S when logical zero changes to logical one, also can accomplish this point) just can make the alternation procedure between signal A and B and signal a and the b remain desirable forced synchronism.In addition, the electric current I of signal A and B and a and b and generation thereof _AAnd I _BConversion sequence as unlike signal role in the circuit 4, in Fig. 4 a to 4d, represent more clearly.

The situation of Fig. 4 a is that supposition spark eroding lathe is in wait state, does not promptly carry out corrosion processing.Like this, the timing signal S of timing generator 5 is at logical zero, thus in phase inverter 410 result of paraphase, the output signal A ' of OR-gate unit 416,417 and B ', from but the output signal a of OR-gate unit 418,419, b is logical one enduringly.Like this, the pulse transformer 23a in transition branch 2A, 2B, 23b does not flow through electric current I _A, I _B, promptly electric spark clearance 3 keeps not having current impulse.

Derive signal M and U from pulse signal P, also just obtain signal M, obtain signal U by AND gate unit 411 by one-shot multivibrator 47.

As the situation of Fig. 4 a hypothesis, signal A " with signal B " is a mirror-symmetrical, and signal A ' then " overlaps consistent with signal A and A.This relation also is applicable to signal B, B ' and B ".In addition, signal a and a ' and b and b ' are consistent with each other.

In Fig. 4 b, suppose that this spark eroding lathe is in working order, promptly timing signal S is set in logical one.The situation that Fig. 4 b is supposed takes place in a data window, and at this moment signal U is also at logical one.From viewpoint regularly, signal U is consistent with the pulse signal P of oscillator 41 to a great extent, but use the leading time that can set that signal U is reduced in order to make superimposed pulses, this leading time is same as output signal M in the one-shot multivibrator 47 in time that logical zero stopped.Fig. 4 b represents that the output signal a of OR-gate unit 419 directly changes into logical zero from logical one when timing signal S being set to U=1 being logical one.Its result (as example), electric current begins to flow into transition branch 2A, brings out a corresponding branch current I simultaneously in electric spark clearance 3 _A, have once more the power switch circuit that adopted given hysteresis.As long as timing signal S is arranged, then further the switching signal order is just identical with top rhythm when introducing Fig. 4 a.Like this, the relation among Fig. 4 a between said each switching signal stands good, and different is that the synchronized relation of a and A and the synchronized relation of b and B have changed.

Compare with Fig. 4 b, Fig. 4 c considered as signal U during at logical zero, and signal S is set up possibility in this selection of logical one.In this case, by the effect of control circuit 4 and trigger 44, the output signal B of AND gate unit 414 directly is set in logical zero.The output signal of trigger 46 also directly is set in logical zero, so the output signal b of OR-gate unit 418 also just is set in logical zero.The result is branch current I _BFlow through transformer 23B and discharge a corresponding pulse to spark gap 3.In the signal excitation OR-gate unit 419 with the Q-of trigger 45 output, signal a remains on 1 and relevant switch among the blocking circuit 2A thereupon.After this each signal is pressed the rhythm work shown in Fig. 4 b once more.

Fig. 4 d has also represented under the effect of pulse signal P and signal M and U, signal B ", the relation between R and the R.It should be noted that signal R(also has signal R) on time-base with respect to signal B " displacement regular time amount, and this amount equates in the duration of logical zero with signal M.

The control circuit of introducing above 4 relevant with Fig. 4 a～4d with Fig. 3 also can be reused with related and be connected, so might produce any impulse waveform with amplitude arbitrarily.This is the stack of the pulse that provides by each control circuit of suitable selection and suitably selects realize the break time between each pulse.The Synchronization Control that timing generator 5 is responsible for all several Control circuit of participating in into 4.The parallel branch of control circuit 4 also couples together to addition merely electric current is strengthened, so that produce the pulse of extra-heavy.

Claims (5)

1, a kind of spark generator that is used for spark eroding equipment that need not to insert steady resistance, this generator comprised a) at least two circuit in parallel mutually (2A, 2B) and spark gap (3), wherein,

B) each circuit (2A 2B) has the following column circuits of series connection:

B1) (21A 21B) is connected to an end of direct voltage source (1) for one first switch;

B2) transformer (23A, elementary winding 23B); And

B3) (22A 22B), is directly coupled to the other end of direct voltage source (1) to a second switch;

B4) spark gap (3) respectively and transformer (23A, 23B) be in series with diode (27A, secondary windings parallel connection 27B); And

C) control system (4) is installed power supply source usefulness, and for control signal (A, a, B, b) set and/or the controlled time is divided adapted, the control output of control system be coupled to first and second switches (22A 22B), is characterized in that for 21A, 21B,

D) (21A 21B) also is directly connected to elementary winding to this first switch.

2, according to the spark generator of claim 1, it is characterized in that each circuit is to connect like this, promptly (22A just allows current impulse pass through spark gap when 22B) disconnecting simultaneously for 21A, 21B at first and second switches.

3, according to the spark generator of claim 1 or 2, it is characterized in that, each circuit (2A, 2B) in, the secondary windings of each elementary winding and each circuit itself interrelates.

According to the spark generator of claim 2, it is characterized in that 4, a diode is arranged, and (27A 27B) is installed in the non-same polarity of secondary windings.

5, according to the spark generator of arbitrary claim in the aforesaid right requirement, it is characterized in that control system (4) has: a control input is connected to the clock pulses output of an external clock pulse generator (5); And an oscillator (41), in order to produce one and the irrespectively additional high frequency clock signal (P) of clock pulse generator (5).

Images