CN100583653C - A kind of encoding method, decoding method and decoder of LDPC concatenated code - Google Patents

Abstract

The invention discloses a design scheme of LDPC cascaded code, which is an LDPC-SPC product code which takes LDPC code as horizontal code and SPC code as vertical code, and each bit of an SPC code word is acquired by the even parity check of the bits in corresponding positions of n LDPC code words. The scheme can solve the flat bed of error codes of the LDPC code and has higher flexibility and greater encoding gain than the cascaded methods of BCH code. The invention simultaneously provides an encoding method of the LDPC-SPC product code and two decoding methods (a hard decision method and a soft decision iteration method), and provides corresponding decoders. The LDPC-SPC product code provided by the invention can acquire greater encoding gain with very small redundancy cost and is a signal channel encoding scheme which is applicable to delay-insensitive businesses.

Description

A kind of encoding method, decoding method and decoder of LDPC concatenated code

technical field

The invention relates to a channel coding technology, in particular to a construction and decoding method of an LDPC concatenated code, and belongs to the field of information technology.

Background technique

Channel coding technology, as the basic technology to ensure the reliable transmission of communication system, has been developed rapidly in the past ten years. A large number of channel codings represented by Turbo code and LDPC code (low density parity check code) can approach the theoretical limit one after another. LDPC codes have been discovered and studied in depth, and LDPC codes have received special attention in recent years. Because of their error correction performance approaching the Shannon limit and simple decoding algorithms suitable for parallel computing, LDPC codes have been adopted by many communication standards, such as DVB-S2, WiMAX, etc. This indicates that LDPC codes will become a mainstream channel coding in communication systems for quite a long time in the future.

Through the study of near-Shannon limit codes such as Turbo codes and LDPC codes, it is found that, unlike all previous channel codings, the bit error rate curves of near-Shannon limit codes can be divided into waterfall and flat areas. area. In the waterfall region, the BER of near-Shannon-limit codes drops rapidly as the normalized SNR increases, and the BER curve looks almost vertical to the x-axis. In the flat layer area, the rate of decrease of the bit error rate of the near-Shannon limit code with the increase of the normalized signal-to-noise ratio is obviously slower than that in the waterfall area, and may even stop decreasing. The bit error rate curve looks like A platform parallel to the x-axis, hence the name Error Floor.

Different from the error level of the Turbo code, which is mainly caused by its small weight codeword, under the channel of Additive White Gaussian Noise (AWGN), the error level of the LDPC code is mainly caused by its trapping set. )Decide. When the error level of the LDPC code appears, the probability that the iterative decoding algorithm converges to a "near code word" (near code word) close to the correct code word also increases. This "approximate codeword" can satisfy most of the check equation constraints. Therefore, the error level phenomenon of LDPC codes has the following two characteristics. First, when the code length of LDPC codes is long, for example, when the length reaches several thousand bits, the error level level is mainly determined by "approximate code words", because They do not satisfy all the verification relations, so the error codeword can be detected by the decoder; secondly, because the "approximate codeword" is very similar to the correct codeword, the number of error bits in each error codeword will not be many .

For example: the LDPC code with a length of 8064 bits and a code rate of 1/2 has a bit error curve as shown in FIG. 1 . The LDPC code begins to have a bit error floor when the normalized signal-to-noise ratio is equal to 1.5dB. In order to analyze its error floor, 200 wrong LDPC codewords.

The statistical results show that under the two normalized signal-to-noise ratios, the 200 error codewords counted respectively cannot satisfy the verification relationship of the H matrix, so they can all be detected by the LDPC decoder, which meets the above-mentioned Features one. Secondly, as can be seen from Figure 2, under the two SNRs, among the 200 error codewords counted respectively, although the number of codewords with error bits exceeding 10 bits at 1.5dB is slightly more than that at 1.6dB As a result, under the two signal-to-noise ratios, the error rate of more than 10 bits in a code word does not exceed 10%, and the maximum number of error bits is only 25 bits. The number of error bits is much smaller than the code length of 8064 bits. This statistical result is in good agreement with the second characteristic of the LDPC code error level mentioned above. Interestingly, it can also be found from Figure 2 that when the decoder reaches the maximum number of iterations and the decoding fails, there is a considerable proportion of erroneous LDPC codewords that are only 1 bit wrong. This phenomenon occurs because the check equation that the erroneous bits participate in usually contains two or more bits whose confidence soft information is around 0. During each iteration of the sum-product algorithm, the confidence soft information of these bits with very low confidence will continuously flip around 0, so that the LDPC decoder can never converge to the correct codeword.

When the LDPC code has an error level, in order to analyze whether the error bits of multiple error code words occur in the same position, the position of the error bit is respectively analyzed when the normalized signal-to-noise ratio is 1.5dB and 1.6dB. Statistics, as can be seen from Figure 3, under two normalized signal-to-noise ratios, most of the bit positions with errors only have one error, and the bit positions with two or more errors only account for all 20% of wrong bit positions. If the statistics are performed for every n LDPC codewords, the proportion of bit positions where two or more errors occur in the n LDPC codewords is even smaller. For example make n=100, if in every 100 LDPC code code words, wrong two or more code words, so in these error code words, the bit position that has occurred twice or more than twice is less than 1% of all erroneous bit positions. That is to say, within 100 LDPC codewords, there are very few errors in the same bit position twice or more.

The phenomenon of bit error flatness has brought troubles to the realization of many communication systems that require high bit error performance. Therefore, the research on the error floor of LDPC codes has been an important research direction in the field of channel coding in recent years. At present, there are mainly three methods to overcome the error floor of LDPC codes. One is the algebraic method, which mainly achieves the purpose of reducing the error floor by constructing an LDPC code with a large minimum code distance. The disadvantage of this method is that LDPC codes with a large minimum code distance often have unsatisfactory performance, and the parameters that can be constructed are not continuous; the second method is to use the ACE criterion in the construction process of LDPC codes. Although this method can construct The decoding threshold, but its effect of reducing the error threshold is relatively limited; the third method is to cascade the LDPC code and the BCH code, which is also the most commonly used method. In this method, BCH is used as the outer code and LDPC is used as the inner code. The information code word to be encoded first enters the BCH encoder to generate a BCH encoded code word, and then enters the LDPC encoder to generate the final encoded output code word. Decoding is the reverse process of encoding. The received codeword first enters the LDPC decoder, decodes the BCH codeword, sends it to the BCH decoder for decoding, and outputs the final decoding result.

A large number of simulation results show that the LDPC-BCH concatenated code can effectively reduce the error floor of the LDPC code to below 10 ^-11 , which can meet the needs of most systems. However, this method has two main disadvantages. One is the high redundancy cost, because the BCH code does not have a simple soft-decision decoding algorithm, and usually only hard-decision algorithms can be used, and the coding gain is greatly lost; the other is the actual communication. The system often has many different code rates, which requires BCH codes to provide different code lengths and different error correction capabilities for LDPC codes with different code rates, which increases the difficulty of concatenated code scheme design and the complexity of the encoding and decoding system.

Contents of the invention

Aiming at the above-mentioned status quo of LDPC codes, in order to better reduce the error floor of LDPC codes and improve the error performance of LDPC codes, the present invention proposes a new and better LDPC concatenated code scheme, and provides its Codec scheme. The specific coding scheme is as follows:

1. Initialization: information bit stream framing;

2. Do a modulo 2 sum of the bits at the corresponding positions of each n information frames, wherein n is a positive integer, which can be selected according to actual needs. That is, the n+1th redundant frame is $c_{\mathrm{no}+1}^j=\underset{k=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{c}_{\mathrm{<figure-callout\; id="2"\; label="k\; j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">k</figure-callout>}}^j\mathrm{mod}2,j=\mathrm{1,2},\&Center\; Dot;\&CenterDot;\&CenterDot;,N,$ Where N is the length of the information frame, which is a positive integer;

则有：3. these n+1 information frames are passed through the LDPC code encoder successively to obtain n+1 LDPC code words, wherein the n+1 LDPC code words are redundant code words, and this is used in the present invention The redundant code word is named single parity check (single parity check, SPC) code. Since the LDPC code is a linear block code, each bit of the SPC code word is equivalent to passing n LDPC code words at the corresponding position. The bit even check of the SPC codeword is obtained, if the jth bit of the SPC codeword is c _SPC ^j , the jth bit of the i-th codeword in the n LDPC codewords is

Then there are:

${\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; SPC</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; LDP</span>}{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{{\mathrm{<span\; class="notranslate">\; LDPC</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; LDP</span>}{\mathrm{<span\; class="notranslate">\; C</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&Center\; Dot;</span><span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{{\mathrm{<span\; class="notranslate">\; LDPC</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}}^{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">j</figure-callout></span><figure-callout\; id="2"\; label="j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">\; </figure-callout>}}\mathrm{<span\; class="notranslate">\; </span>}\mathrm{<span\; class="notranslate">mod</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}$

The code word pattern after encoding is as shown in Figure 4, can find out from the figure that the LDPC concatenated code scheme that the present invention proposes is to be horizontal code with LDPC code, and SPC code is the LDPC-SPC product code scheme of vertical code. It can be seen from the encoding process that the SPC code word is also an LDPC code word conforming to the same H matrix constraint. If the code rate of the LDPC code is R, then the code rate of the obtained LDPC-SPC product code is n·R/(n+1), where n is a positive integer.

Theoretically n can take any positive integer from 1 to positive infinity. However, since the coding of the LDPC-SPC product code is based on the LDPC code and an SPC redundant codeword is added, the normalized SNR loss caused by it is When the value of n is small, the resulting coding redundancy is large and the SNR loss is large, which is not conducive to improving the bit error performance of LDPC; but when the value of n is large, although the coding redundancy brought about can be ignored, but The number of possible error codewords in the n LDPC codewords also increases correspondingly, which increases the complexity of the decoding method. The present invention obtains through a large number of simulation results that a value between 50 and 400 for n will be a reasonable choice, and the coding redundancy at this time can also be ignored, and the complexity of the decoding method is not large. Of course, the value of n can also be increased or decreased according to actual needs.

It can be known from the analysis in the background that when the error level of the LDPC code appears, almost all error codewords can be detected. Utilizing this error detection characteristic of LDPC codes, the present invention provides two decoding methods of LDPC-SPC product codes: a hard decision method and a soft decision iteration method.

The hard decision decoding method of LDPC-SPC product code comprises the following steps:

进入LDPC码译码器进行译码，其中i从1到n+1循环， $C_{{\mathrm{LDPC}}_{n+1}}=C_{\mathrm{SPC}},$ 得到n+1个LDPC码译码的硬判决结果；1. Initialization: every n LDPC codewords and 1 SPC codeword are sequentially decoded by the LDPC decoder, that is, the i-th LDPC codeword

Enter the LDPC code decoder for decoding, where i cycles from 1 to n+1, $C_{{\mathrm{LDPC}}_{\mathrm{no}+1}}=C_{\mathrm{SPC}},$ Obtain the hard decision results of n+1 LDPC code decoding;

2. According to the characteristics that the LDPC code decoder can detect errors, various error patterns in n+1 LDPC codes can be counted, and the specific processing is as follows:

a) If there is no codeword decoding failure in the n+1 LDPC codewords, the decoding ends;

b) If more than one codeword in the n+1 LDPC codewords fails to be decoded, the decoding ends;

c) If there is only one codeword decoding failure in the n+1 LDPC codewords, it can be divided into two situations:

i. If the erroneous code word is an SPC code, since the SPC code is a redundancy check code word, it can be deleted directly, and the first n correct LDPC codes are output, and the decoding ends;

ii. If the wrong codeword is one of the first n LDPC codes, then go to step 3.

3. According to the even test relationship of the SPC codeword, the correct codeword is recovered, and the specific processing steps are as follows:

3-1 delete the wrong LDPC codeword;

3-2 Perform modulo 2 summing of the remaining n correct LDPC codewords bit by bit in the column direction, and the obtained result is the restored correct codeword;

3-3 Output the correct codeword after recovery.

Among them, the proof of step 3-2 is as follows:

because $c_{\mathrm{SPC}}^j+c_{\mathrm{LDP}{C}_1}^j+c_{{\mathrm{LDPC}}_2}^j+c_{\mathrm{LDP}{C}_3}^j+\&Center\; Dot;\&Center\; Dot;\&Center\; Dot;+c_{\mathrm{LDP}{C}_{\mathrm{no}}}^{\mathrm{<figure-callout\; id="2"\; label="j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">j</figure-callout>}}\mathrm{mod}2=0,$ Then the jth bit of the wrong codeword $c_{\mathrm{error}}^j=c_{\mathrm{SPC}}^j+c_{\mathrm{LDP}{C}_1}^j+c_{\mathrm{LDP}{C}_2}^j+c_{\mathrm{LDP}{C}_3}^j+\&CenterDot;\&Center\; Dot;\&CenterDot;+c_{\mathrm{error}-1}^j+c_{\mathrm{error}+1}^j+\&Center\; Dot;\&Center\; Dot;\&Center\; Dot;+c_{\mathrm{LDP}{C}_{\mathrm{no}}}^{\mathrm{<figure-callout\; id="2"\; label="j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">j</figure-callout>}}\mathrm{mod}2,$ Right now $c_{\mathrm{error}}^j=\underset{\begin{array}{c}k=1\\ k\&NotEqual;\mathrm{error}\end{array}}{\overset{\mathrm{no}=1}{\mathrm{\&Sigma;}}}{c}_{\mathrm{LDP}{C}_{\mathrm{<figure-callout\; id="2"\; label="k\; j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">k</figure-callout>}}}^j\mathrm{mod}2.$ Proven.

Through the above steps, it is not difficult to find that the LDPC-SPC product code hard-decision decoding method can only correct the situation that only one error code word appears in every n+1 LDPC code words, so its decoding performance is comparable to the error rate of LDPC codes Correlation can be estimated by calculation. Assuming that the error probability of each LDPC codeword before concatenation is P, after concatenation, only when n LDPC codewords are wrong and only one codeword is wrong, and the SPC codeword is correct, the hard decision method can correct the error , the probability that this condition occurs is P ₁ =nP(1-P) ⁿ , so the word error rate of the LDPC code after concatenation P'=PP ₁ /n=PP(1-P) ⁿ if (1- P) ⁿ expansion, we can get $P^{\&prime;}=P-P(1-\mathrm{nP}+C_{\mathrm{no}}^2{\mathrm{<figure-callout\; id="2"\; label="P"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">P</figure-callout>}}^2+\&CenterDot;\&Center\; Dot;\&Center\; Dot;).$ When n is much smaller than 1/P, the word error rate of the LDPC code after decoding the concatenated code is P′≈nP ² . Since the bit error rate and bit error rate of the LDPC code change with the normalized signal-to-noise ratio when the error level layer occurs, the range of the change of the normalized signal-to-noise ratio is very small, so when n is fixed, the word error rate P' Compared with the bit error rate P before concatenation, it can be considered that it is reduced in proportion to nP. Because the performance of the hard-decision method is not affected by the number of error bits of each error codeword, it can be approximately considered that the bit error rate of product coding is also the bit error rate p of LDPC coding that is reduced in proportion to nP. Using the above estimation method can estimate the simulation result more accurately, thus saving a lot of simulation time.

The hard decision method is a decoding method with extremely low complexity, which can help reduce the error floor of LDPC codes with error floors. However, when two or more error codewords appear in n LDPC codewords and 1 SPC codeword, the hard decision method cannot correct them, which limits its impact on the performance of LDPC codes. For further improvement, the soft-decision iterative decoding method given below can correct the above-mentioned bit error pattern, thereby improving the bit error performance of the LDPC code to a greater extent.

According to the analysis results of the error level in the background technology, it can be known that when the LDPC error level occurs, when there are 2 or more error code words in n LDPC code words and 1 SPC code word, Most of the error bits do not occur at the same position, so the error pattern shown in Figure 5 will occur with a high probability, that is, in each vertical verification relationship of the concatenated code, most of the verification The equation contains only one bit of error. Although in theory, the error bit can be recovered by the rest of the correct bits, but since the LDPC code decoder cannot judge the position of the correct bit in the error codeword, the present invention provides a soft decision iterative decoding method. Using this method, each bit in the longitudinal check equation provides its own confidence soft information as external information to bits in other LDPC code words, and provides the obtained external information to its own LDPC code decoder, To help the decoder converge to the correct codeword smoothly.

The concrete steps of the soft decision iterative decoding method of LDPC-SPC product code are as follows:

1. Initialization: Decode every n LDPC codewords and 1 SPC codeword sequentially through the LDPC code decoder to obtain the hard decision results of n+1 LDPC code decoding and the confidence of each bit Information L _i ^j , where L _i ^j represents the confidence level information of the jth bit of the i-th codeword, i ranges from 1 to n+1, j ranges from 1 to N, and N is the code length of the LDPC code, $L_{\mathrm{LDP}{C}_{\mathrm{no}+1}}^j=L_{\mathrm{SPC}}^j,$ And set the maximum number of iterations of soft decision decoding as T;

2. According to the characteristics that the LDPC code decoder can detect errors, various error patterns in n+1 LDPC codes can be counted, and the specific processing is as follows:

a) If there is no codeword decoding failure in the n+1 LDPC codewords, the decoding ends;

b) If only one codeword fails to be decoded in the n+1 LDPC codewords, it can be divided into two situations:

i. If the erroneous code word is an SPC code, since the SPC code is a redundancy check code word, it can be deleted directly, and the first n correct LDPC codes are output, and the decoding ends;

ii. If the wrong code word is one of the first n LDPC codes, then perform a method similar to hard decision decoding:

First, delete the wrong LDPC codeword;

Second, the remaining n correct LDPC codewords are subjected to a modulo 2 sum bit by bit in the column direction, and the obtained result is the recovered correct codeword;

Third, output the correct codeword after recovery, and the decoding ends;

c) If errors occur in 2 or more codewords in the n+1 LDPC codewords, then perform vertical decoding;

i. If the maximum number of iterations T of soft-decision decoding has been reached, the decoding ends.

ii. If the maximum number of iterations T of soft-decision decoding has not been reached, go to step 3.

3. According to the vertical even parity relationship, calculate the external information of each bit of the error codeword respectively: $e_{i_k}^j=2\mathrm{ar\; c}\tanh \left(\underset{t=1,t\&NotEqual;i_k}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right),$ i _k represents the kth erroneous codeword in n+1 codewords, k is a positive integer, and j represents the jth bit in the kth erroneous codeword;

4. Update the confidence of each bit of the wrong codeword $L_{i_k}^j=L_{i_k}^j+e_{i_k}^j,$ Wherein i _k represents the kth erroneous codeword in the n+1 codewords, k is a positive integer, and j represents the jth bit in the kth erroneous codeword;

5. Send the erroneous codewords whose confidence levels have been updated to the LDPC code decoder in turn for decoding, and then return to step 2.

The flowchart of the soft decision iterative decoding method of LDPC-SPC product code is shown in Fig. 6 .

Step 3 is the core step of the soft decision iterative decoding method of LDPC-SPC product codes. Among them, through the vertical verification relationship, the calculation formula of the external information of each bit of the error codeword $e_i^j=2\mathrm{ar\; c}\tanh \left(\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right)$ The proof is as follows:

Assuming that n+1 LDPC codewords including the SPC codeword pass through the LDPC code decoder, the confidence degree of the jth bit in the i-th LDPC codeword is L _i ^j , so that the participants in the jth The confidence soft information of the n+1 bits of the vertical verification relationship is K ₁ ^j , L ₂ ^j , ..., L _n+1 ^j , where $L_i^j=\log \frac{p(c_i^j=0)}{p(c_i^j=1)},$ $p(c_i^j=0)$ Indicates the probability that the jth bit of the i-th LDPC codeword is equal to 0, $p(c_i^j=1)$ Indicates the probability that the bit is equal to 1, 1≤i≤n+1.

because $c_{\mathrm{SPC}}^j+c_{\mathrm{LDP}{C}_1}^j+c_{{\mathrm{LDPC}}_2}^j+c_{\mathrm{LDP}{C}_3}^j+\&Center\; Dot;\&CenterDot;\&Center\; Dot;+c_{\mathrm{LDP}{C}_{\mathrm{no}}}^{\mathrm{<figure-callout\; id="2"\; label="j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">j</figure-callout>}}\mathrm{mod}2=0,$ Let S=0 represent the even parity relation, then the soft information of the i-th bit in the j-th parity relation output by decoding is:

${\mathrm{<span\; class="notranslate">\; ls</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; log</span>}\frac{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span>}$

in,

$\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span>$

$\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; |</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; S</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

therefore ${\mathrm{ls}}_i^j=\log \frac{p(S=0|c_i^j=0)\&CenterDot;p(c_i^j=0)}{p(S=0|c_i^j=1)\&CenterDot;p(c_i^j=1)}=\log \frac{p(S=0|c_i^j=0)}{p(S=0|c_i^j=1)}+L_i^j;$

again $p(S=0|c_i^j=0)=p(S^{\&prime;}=0),$ $p(S=0|c_i^j=1)=p(S^{\&prime;}=1)$ Where S' represents the checksum of n bits except the i-th bit, which can be obtained through the above simplification:

${\mathrm{<span\; class="notranslate">\; ls</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; log</span>}\frac{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; S</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; S</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; i</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}$

Will $c_i^j=0$ mapped to $u_i^j=1,$ $c_i^j=1$ mapped to $u_i^j=-1,$ but

$\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; S</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\underset{\begin{array}{c}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&NotEqual;</span>\mathrm{<span\; class="notranslate">\; i</span>}\end{array}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; ,</span>$ $\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; S</span>}}^{<span\; class="notranslate">\; \&prime;</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\underset{\begin{array}{c}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&NotEqual;</span>\mathrm{<span\; class="notranslate">\; i</span>}\end{array}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

Since all bits come from different LDPC codes, each bit is relatively independent, so there are:

$\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\underset{\begin{array}{c}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&NotEqual;</span>\mathrm{<span\; class="notranslate">\; i</span>}\end{array}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; +</span>\underset{\begin{array}{c}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&NotEqual;</span>\mathrm{<span\; class="notranslate">\; i</span>}\end{array}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; )</span>$

$\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>\underset{\begin{array}{c}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&NotEqual;</span>\mathrm{<span\; class="notranslate">\; i</span>}\end{array}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}}{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; -</span>\underset{\begin{array}{c}\mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}\\ \mathrm{<span\; class="notranslate">\; k</span>}<span\; class="notranslate">\; \&NotEqual;</span>\mathrm{<span\; class="notranslate">\; i</span>}\end{array}}{\overset{\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Pi;</span>}}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; p</span>}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; u</span>}}_{\mathrm{<span\; class="notranslate">\; k</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span><span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; )</span>$

but ${\mathrm{ls}}_i^j=\log \frac{p(S^{\&prime;}=0)}{p(S^{\&prime;}=1)}+L_i^j=\mathrm{<figure-callout\; id="1"\; label="log"\; filenames="C2008100560490024H1.png,C2008100560490025H1.png"\; state="\{\{state\}\}">log</figure-callout>}\frac{1+\underset{\begin{array}{c}k=1\\ k\&NotEqual;i\end{array}}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}(p(u_k^j=1)-p(u_k^j=-1))}{1-\underset{\begin{array}{c}k=1\\ k\&NotEqual;i\end{array}}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}(p(u_k^j=1)-p(u_k^j=-1))}+L_i^j$

F ${\mathrm{ls}}_i^j=2\mathrm{ar\; c}\tanh \left(\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right)+L_i^j,$ That is, for each bit, the external information given by the vertical check relationship of the SPC code is $2\mathrm{ar\; c}\tanh \left(\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right),$ The formula is proven.

The invention also provides an improved method of the soft decision iterative decoding method. The main purpose of the iterative decoding method is to make each bit continuously obtain confidence soft information that can help it make a decision through iteration. In the soft-decision iterative method given above, the bits of each LDPC codeword pass through the vertical SPC verification relationship to obtain new extrinsic information from the remaining LDPC codewords, thereby helping the LDPC decoder to converge to the correct codeword. Because among the n+1 LDPC codewords, not all codewords fail to be decoded. Through the error detection capability of the LDPC code, it can be determined which codewords in the n+1 codewords have successfully converged to the correct codeword. Using this well-known information, the soft-decision iterative decoding method can be improved.

The main idea of improving the decoding method is to use the error detection ability of the LDPC code decoder to increase the confidence of each bit of the LDPC code word that is successfully decoded to the maximum, so as to improve the accuracy of each bit of the error code word. The confidence that can be obtained can speed up the convergence of iterative decoding. That is, if the i-th codeword conforms to the constraint of the check equation, let the confidence level L _i ^j of the j-th bit in the i-th LDPC codeword be $\left|L_i^j\right|=\&infin;,$ Symbol is $\mathrm{sgn}\left(L_i^j\right)=\mathrm{sgn}\left(L_i^j\right),$ Wherein j=1, 2, ..., N, N is the code length of LDPC code;

It is not difficult to find that the soft-decision iterative method of LDPC-SPC codes is equivalent to performing sum-product algorithm decoding alternately in the horizontal and vertical directions. Therefore, similar to the sum-product algorithm, the calculation formula for the external information of the verification relationship in the vertical direction $2\mathrm{arctanh}\left(\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right)$ Similar simplifications to the sum-product algorithm can be made. The present invention has adopted the better offset-min-sum algorithm (Chen Jinghu; RMTanner; C.Jones, "Improved min-sum decoding algorithms for irregular LDPC codes,"InProc.ISIT'05.Massachusetts: MIT Press, pp. 449-453, 2005) as a simplified method of the longitudinal method, where the offset value is selected as 0.2 based on a large number of simulation results and experience, then the external information of the longitudinal verification relationship is of size $\left|e_{i_k}^j\right|=\max (\underset{\begin{array}{c}t=1\\ t\&NotEqual;i\end{array}}{\overset{\mathrm{no}+1}{\min }}\left(\right|L_t^j\left|\right)-\mathrm{0.2,0}),$ Symbol is $\mathrm{sgn}=\left(e_{i_k}^j\right)=\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\mathrm{sgn}\left(L_t^j\right),$ Where j=1, 2,..., N, N is the code length of the LDPC code, i _k represents the kth error codeword in the n+1 codewords, L _i ^j is the ith LDPC codeword in Confidence of j bits;

Since the absolute value of the bit confidence of each correct codeword is set to infinity, when calculating the longitudinal soft information, it is only necessary to compare the absolute value of the bit confidence of the corresponding position in the wrong codeword, and the correct codeword is It only participates in the sign operation of the confidence soft information of the corresponding position bits. Compared with the aforementioned soft-decision iterative method, the complexity of the improved soft-decision iterative decoding method is greatly reduced. The improved soft-decision iterative decoding method is different from the aforementioned soft-decision iterative method only in the processing method of the third step, and the other steps are the same. The specific processing method of step 3 in the method is as follows:

1). If the i-th code word conforms to the constraints of the LDPC code verification equation, then the confidence level L _i ^j of the j-th bit in the i-th LDPC code word is $L_i^j=\&infin;,$ Symbol is $\mathrm{sgn}\left(L_i^j\right)=\mathrm{sgn}\left(L_i^j\right),$ Wherein j=1, 2, ..., N, N is the code length of LDPC code;

其大小为 $\left|e_{i_k}^j\right|=\max (\underset{\begin{array}{c}t=1\\ t\&NotEqual;i\end{array}}{\overset{n+1}{\min }}\left(\right|L_t^j\left|\right)-\mathrm{0.2,0}),$ 符号为 $\mathrm{sgn}\left(e_{i_k}^j\right)=\underset{t=1,t\&NotEqual;i}{\overset{n+1}{\mathrm{\&Pi;}}}\mathrm{sgn}\left(L_t^j\right),$ 其中j＝1，2，…，N，N是LDPC码的码长，i_k表示n+1个码字中的第k个错误码字，L_i ^j为第i个LDPC码字中的第j个比特的置信度。2). According to the longitudinal verification relationship, calculate the external information of each bit of the error codeword respectively

its size is $\left|e_{i_k}^j\right|=\max (\underset{\begin{array}{c}t=1\\ t\&NotEqual;i\end{array}}{\overset{\mathrm{no}+1}{\min }}\left(\right|L_t^j\left|\right)-\mathrm{0.2,0}),$ Symbol is $\mathrm{sgn}\left(e_{i_k}^j\right)=\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\mathrm{sgn}\left(L_t^j\right),$ Where j=1, 2,..., N, N is the code length of the LDPC code, i _k represents the kth error codeword in the n+1 codewords, L _i ^j is the ith LDPC codeword in Confidence of j bits.

Another object of the present invention is to provide a decoder for LDPC-SPC product codes that is compatible with the above method. According to the encoding structure of the LDPC-SPC product code and in combination with the above method, the present invention provides a hard-decision decoder and a soft-decision iterative decoder, which are respectively applicable to the hard-decision decoding method and soft-decision iteration of the LDPC-SPC product code The decoding methods are introduced as follows:

The structure schematic diagram of the hard decision decoder is shown in Fig.7. The hard decision decoder includes four parts: an LDPC code decoding module, a first storage module, an error code word statistics module and a hard decision restoration module. Among them, the LDPC code decoding module is used to realize the decoding of LDPC code words, and output the hard decision information of LDPC code information bits, that is, to decode every n+1 LDPC code words in turn, wherein the n+1th The LDPC code word is an SPC code word, and outputs the hard decision information of n+1 LDPC code information bits; the first storage module is used to store the hard decision information of the LDPC code information bits, and generally uses a dual-port RAM, and the size can be determined according to the actual situation. It needs to be determined; the error code word statistics module counts the error code words in n+1 LDPC codes according to the hard decision information, usually consists of a counter, the initial value is 0, and it determines the flow direction of the LDPC code word information bits, The specific flow direction is shown in Figure 7, if only one codeword decoding fails in the n+1 LDPC codewords and the codeword is not an SPC code, then enter the hard decision recovery module, otherwise the information bit is output, and the decoding ends; The decision recovery module deletes the wrong LDPC codeword, and then modulo-2 sums the remaining n correct LDPC codewords bit by bit in the column direction to recover the correct codeword, and outputs the restored correct information bits, and the decoding ends.

The structure of the hard decision recovery module can be shown in Figure 8, which is mainly divided into two parts: a modulo 2 adder module and a second storage module. Among them, the modulo 2 adder realizes the modulo 2 sum of two unsigned binary numbers, which is used to calculate the modulo 2 sum of the information bits of the n LDPC codewords except the error codeword, and simultaneously outputs These n correct information bits; the second storage module is a dual-port RAM, the size of which is the size of the LDPC code word information bits, and is used to store the temporary result of the modulo 2 adder, that is, the addition of the modulo 2 sum with the next frame number, and output the final accumulation result, that is, the recovered correct information bits.

The structure diagram of the soft decision iterative decoder is shown in Fig. 9 . The soft decision iterative decoder includes five parts: LDPC code decoding module, first storage module, error code word statistics module, SPC code soft decoding module and hard decision recovery module. Among them, the LDPC code decoding module is used to realize the decoding of LDPC code words, and the soft information and hard decision information of the output LDPC code information bits, that is, each n+1 LDPC code words are decoded sequentially, and the first n+1 LDPC codewords are SPC codewords, output soft information and hard decision information of n+1 LDPC code information bits, the soft information is the confidence level L _i ^j of each bit, where i starts from 1 to n+1, j is from 1 to N, and N is the code length of the LDPC code. The first storage module is used to store soft information and hard decision information of LDPC code information bits, and generally uses a dual-port RAM, and its size can be determined according to actual needs. The error code word statistics module counts the error code words in n+1 LDPC codes, usually consists of a counter, the initial value is 0, and it determines the flow direction of the LDPC code word information bits, the specific flow direction is as shown in Figure 9, If there is only one code word decoding failure in n+1 LDPC code code words and this code word is not SPC code, then enter hard decision recovery module; If more than one code word decoding failure in n+1 LDPC code code words, Then enter the SPC code soft decoding module; if there is no code word error or only the SPC code decoding fails, then output the correct information bit. The SPC code soft decoding module is used to calculate the external information of the erroneous code word, and uses the above-mentioned soft decision iterative decoding method or its improved method to decode, and retains its soft decision for the wrong code word in n+1 LDPC codes. information, while the correct codeword only retains its hard decision information, that is, the sign bit, and then calculates the extrinsic information of each bit of the wrong codeword $e_{i_k}^j=2\mathrm{arctanh}\left(\underset{t=1,t\&NotEqual;i_k}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right),$ Where i _k represents the kth erroneous codeword in the n+1 codewords, k is a positive integer, and j represents the jth bit in the kth erroneous codeword, and the obtained external information is used as the LDPC code decoding module The prior information is decoded again, that is, the confidence of each bit of the wrong codeword is updated $L_{i_k}^j=L_{i_k}^j+e_{i_k}^j,$ Then input the LDPC code decoding module to perform iterative decoding until the maximum number of iterations is reached or all codewords are detected correctly. Hard decision recovery module, when there is only one code word error in n LDPC codes, and the error code word is not an SPC code, use a method similar to hard decision decoding to recover this error code word, that is, delete the error code LDPC codeword, and then modulo 2 sum the remaining n correct LDPC codewords bit by bit in the column direction, the obtained result is the recovered correct codeword, and the recovered correct information bits are output. The specific workflow of the decoder is:

The receiving end first decodes the n+1 LDPC codes in sequence, and if no code word error is found, all bits are output sequentially; if only one code word error is found, the n+1 LDPC codes are stored , restore the wrong codeword through hard judgment; if two or more codewords are found to be wrong, then the wrong codeword in the n+1 LDPC codes retains the soft information output by the LDPC code decoding module, and the correct codeword Only the hard-decision information, that is, the sign bit, is retained and decoded by the SPC code soft decoding module, and the obtained external information is used as the prior information of the LDPC code decoding module to decode again until the maximum number of iterations is reached or all codewords are detected correct.

Same as the hard-decision decoder, the hard-decision recovery module in the soft-decision iterative decoder is mainly composed of a modulo 2 adder module and a second storage module, wherein the modulo 2 adder module is used to calculate The information bits of the outer n LDPC codewords are bit-wise modulo 2 and output the n correct information bits at the same time; the second storage module is used to store the temporary result of the modulo 2 adder, that is, do modulo with the next frame 2 and the addend, and output the final accumulation result, that is, the recovered correct information bit.

Technical effect of the present invention lies in the following aspects:

First, the LDPC-SPC product code design scheme is proposed, which can overcome the error floor of the LDPC code, and has higher flexibility and greater coding gain than the BCH code concatenation method, which is mainly due to the BCH The code needs to provide different code lengths and different error correction capabilities for LDPC codes with different code rates, which increases the difficulty of concatenated code scheme design and the complexity of the encoding and decoding system, while LDPC-SPC product codes do not need to consider this problem; at the same time BCH codes need to pay a lot of coding redundancy, while the coding redundancy of LDPC-SPC product codes is equivalent to only $101g\left(\frac{\mathrm{no}}{\mathrm{no}+1}\right)\mathrm{dB},$ When n takes a large value, the coding redundancy can be neglected.

Second, a hard-decision decoding method for LDPC-SPC concatenated codes is given, which is a very low-complexity decoding method that can help reduce the error floor of LDPC codes with error floors.

Third, the hard decision method of the LDPC-SPC concatenated code is analyzed, and the bit error rate estimation method of the hard decision method is given. The comparison between the estimation result and the simulation result is shown in Figure 10. From the figure, it can be seen that This estimate can be obtained to accurately match the simulation results, thus saving a lot of simulation time.

Fourth, a soft-decision iterative decoding method for LDPC-SPC concatenated codes is given and simplified. The simulation results are shown in Figure 13. From Figure 13, it can be seen that in this soft-decision decoding Under the method, compared with the hard decision, the LDPC-SPC concatenated code can obtain more obvious coding gain and reduce the error floor of the LDPC code more effectively.

Therefore, the LDPC-SPC product code proposed by the present invention can obtain a relatively large coding gain with a very small redundancy cost, and is a channel coding scheme suitable for services that are not sensitive to delay.

Description of drawings

Fig. 1 is the bit error performance curve of (8064,4032) LDPC code;

Fig. 2 is (8064,4032) the erroneous bit number distribution figure of 200 erroneous codewords counted under normalized signal-to-noise ratio respectively under 1.5dB (I) and 1.6dB (II) of LDPC code error flat layer;

Fig. 3 is (8064,4032) LDPC code is respectively 1.5dB and 1.6dB under the erroneous bit position statistic figure of normalized signal-to-noise ratio;

Fig. 4 is the codeword pattern of LDPC-SPC product code of the present invention;

Fig. 5 is the schematic diagram of the error bit position relation of LDPC-SPC product code of the present invention;

Fig. 6 is the flow chart of the soft decision iterative decoding method of LDPC-SPC product code of the present invention;

Fig. 7 is a schematic structural diagram of a hard-decision decoder of the present invention;

Fig. 8 is a structural block diagram of a hard decision recovery module in a hard decision decoder according to Embodiment 2 of the present invention;

Fig. 9 is a schematic structural diagram of a soft-decision iterative decoder of the present invention;

Fig. 10 is the comparison figure of LDPC-SPC code hard decision decoding method bit error rate and estimated result when n=100;

Fig. 11 is the LDPC-SPC product code coding flow chart in the embodiment 1 of the present invention;

Fig. 12 is the bit error performance simulation result figure of LDPC-SPC code hard decision decoding method when n=200 in embodiment 1 of the present invention;

Fig. 13 is a comparison simulation result of the bit error performance between the soft decision iterative decoding method of the LDPC-SPC code and the bit error performance of the LDPC-BCH code when n=200 in Embodiment 1 of the present invention.

Detailed ways

Below through embodiment, further illustrate the present invention in conjunction with accompanying drawing, but do not limit the scope of the present invention in any way. Embodiment 1: construct LDPC-SPC product code, and decode it

The following concrete description utilizes the method described in the present invention to construct the LDPC-SPC product code with a length of 8064 bits and an LDPC code with a code rate of 1/2, and decode it. The decoding method includes hard decision decoding coding method and soft-decision iterative decoding method:

In this embodiment, n=200, that is, one redundant SPC code word is inserted into every 200 LDPC codes.

The coding flow chart is shown in Figure 11, and the specific steps are as follows:

1. Initialization: the information bit stream is framed, and the frame length is 4032 bits;

2. Pass 200 information frames sequentially through the SPC code encoder, and the SPC code encoder will place each information frame at the corresponding position

Do the modulo 2 sum of the bits, and output the result after n=200 information frames, that is, the information bits in the SPC code, $c_{\mathrm{SPC}}^j=\underset{k=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{c}_{\mathrm{LD}{\mathrm{PC}}_{\mathrm{<figure-callout\; id="2"\; label="k\; j\; mod"\; filenames="C2008100560490023H2.png,C2008100560490024H1.png"\; state="\{\{state\}\}">k</figure-callout>}}}^j\mathrm{mod}2,$ where j is from 1 to 4032;

3. 200 information frames and 1 SPC information frame are sequentially passed through the LDPC code encoder to obtain n+1=201 LDPC code words, wherein the n+1th LDPC code word is a redundant SPC code word ;

4. Output the encoded codewords in sequence.

Decoding is performed at the receiving end. If the receiving end adopts hard decision decoding, the steps of the method are as follows:

进入LDPC码译码模块进行译码，其中i从1到201， $C_{{\mathrm{LDPC}}_{201}}=C_{\mathrm{SPC}},$ 得到201个LDPC码译码的硬判决结果；1. Initialization: 200 LDPC codewords and 1 SPC codeword are sequentially decoded by the LDPC code decoding module, that is, the i-th LDPC codeword

Enter the LDPC code decoding module for decoding, where i is from 1 to 201, $C_{{\mathrm{LDPC}}_{201}}=C_{\mathrm{SPC}},$ Obtain 201 hard decision results of LDPC code decoding;

2. According to the characteristics of the error detection of the LDPC code decoding module, various error patterns in 201 LDPC codes can be counted. The specific processing steps are as follows:

a) If there is no codeword decoding failure in the 201 LDPC codewords, the decoding ends;

b) If more than one codeword in the 201 LDPC codewords fails to be decoded, the decoding ends;

c) If only one codeword decoding fails in 201 LDPC codewords, it can be divided into two situations:

i. If the erroneous code word is an SPC code, since the SPC code is a redundancy check code word, it can be deleted directly, and the first n correct LDPC codes are output, and the decoding ends;

ii. If the wrong codeword is an LDPC code, go to step 3.

3. According to the even test relationship of the SPC codeword, the correct codeword is recovered, and the specific processing steps are as follows:

3-1 delete the wrong LDPC codeword;

3-2 Perform modulo 2 summing of the remaining 200 correct LDPC codewords bit by bit in the column direction, and the obtained result is the recovered correct codeword;

3-3 Output the correct codeword after recovery.

If the receiving end adopts soft-decision iterative decoding, its flow chart is shown in Figure 8. In this embodiment, the improved soft-decision iterative decoding method described in the summary of the invention is adopted, and the maximum number of iterative decoding of soft-decision is T= 5. The specific steps are as follows:

1. Initialization: 200 LDPC codewords and 1 SPC codeword are sequentially decoded by the LDPC code decoding module, and the confidence information L _i ^j of the jth bit of the i-th codeword is obtained, where i from 1 to 201,

${\mathrm{<span\; class="notranslate">\; L</span>}}_{{\mathrm{<span\; class="notranslate">\; LDPC</span>}}_{\mathrm{<span\; class="notranslate">\; 201</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; L</span>}}_{\mathrm{<span\; class="notranslate">\; SPC</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; ;</span>$

2. According to the error-detecting characteristics of the LDPC code decoding module, count the error code words:

a) If there is no codeword decoding failure in the 201 LDPC codewords, the decoding ends and the correct LDPC code is output;

b) If there is only one codeword decoding failure in the 201 LDPC codewords, it can be divided into two situations:

i. If the wrong code word is an SPC code, since the SPC code is a redundant check code word, it can be deleted directly, and the first 200 correct LDPC codes are output, and the decoding is completed;

ii. If the wrong code word is an LDPC code, then perform a method similar to hard decision decoding:

First, delete the wrong LDPC codeword;

Second, the remaining 200 correct LDPC codewords are subjected to a modulo 2 sum bit by bit in the column direction, and the obtained result is the recovered correct codeword;

Third, output the correct codeword after recovery, and the decoding ends;

c) if there are 2 or more codewords in the 201 LDPC codewords to be wrong, then perform vertical decoding;

i. If the maximum number of iterations of soft-decision decoding has been reached, that is, t>T=5, the decoding ends;

ii. If the maximum number of iterations of soft-decision decoding is not reached, that is, t≤T=5, then go to step 3;

3. Vertical decoding: If the i-th codeword conforms to the constraints of the check equation, let the confidence level L _i ^j of each bit of the i-th LDPC codeword be $\left|L_i^j\right|=\&infin;,$ Symbol is $\mathrm{sgn}\left(L_i^j\right)=\mathrm{sgn}\left(L_i^j\right),$ where j=1, 2, . . . , 4032.

其大小为 $\left|e_{i_k}^j\right|=\max (\underset{\begin{array}{c}t=1\\ t\&NotEqual;i\end{array}}{\overset{n+1}{\min }}\left(\right|L_t^j\left|\right)-\mathrm{0.2,0}),$ 符号为 $\mathrm{sgn}=\left(e_{i_k}^j\right)=\underset{t=1,t\&NotEqual;i}{\overset{n+1}{\mathrm{\&Pi;}}}\mathrm{sgn}\left(L_t^j\right),$ 其中j＝1，2，…，4032，i_k表示201个码字中的第k个错误码字，L_i ^j为第i个LDPC码字中的第j个比特的置信度；4. According to the vertical verification relationship, calculate the external information of each bit of the error codeword respectively

its size is $\left|e_{i_k}^j\right|=\max (\underset{\begin{array}{c}t=1\\ t\&NotEqual;i\end{array}}{\overset{\mathrm{no}+1}{\min }}\left(\right|L_t^j\left|\right)-\mathrm{0.2,0}),$ Symbol is $\mathrm{sgn}=\left(e_{i_k}^j\right)=\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\mathrm{sgn}\left(L_t^j\right),$ Wherein j=1, 2, ..., 4032, i _k represents the k erroneous code word in 201 code words, L _i ^j is the confidence degree of the j bit in the i LDPC code word;

5. Update the bit confidence of the wrong codeword $L_{i_k}^j=L_{i_k}^j+e_{i_k}^j,$ Wherein j=1, 2, ..., 4032, i _k represents 201 codewords

In the kth error codeword, k is a positive integer;

6. Send the erroneous codewords after the confidence level has been updated to the LDPC code decoder in turn for decoding, and then return to step 2.

In this embodiment, the bit error performance simulation of the LDPC-SPC concatenated code is performed on the LDPC-SPC product code constructed above under the BIAWGN channel. In order to speed up the simulation, the decoding method of the LDPC code adopts an offset suitable for hardware implementation. -min-sum algorithm (Chen Jinghu; R.M. Tanner; C. Jones, "Improved min-sum decoding algorithms for irregular LDPC codes," In Proc.ISIT'05.Massachusetts: MIT Press, pp.449-453, 2005), where The offset value is selected as 0.2, and the maximum number of iterations is selected as 37 times to adapt to the actual parameters of the LDPC code decoder. When the number of wrong LDPC codewords exceeds 50, the simulation stops.

In this embodiment, a BCH code on GF(2 ¹² ) with an error correction capability of t=10 is selected for comparative simulation of bit error performance. The minimum polynomial on GF(2 ¹² ) is shown below. If the error correction capability of the BCH code is t, then the generator polynomial of the BCH code is equal to the product of the first t smallest polynomials. For example, when t=2, the generator polynomial of the BCH code is g(x)=g1(x)g2(x). Wherein, the selection of the error correction capability t=10 is based on the analysis of the characteristics of the LDPC code error level in front, and when the error level occurs, most of the error bit numbers in the LDPC error code word are within 10 Below 10 bits, generally no more than 10% of cases exceeding 10 bits.

minimal polynomial

g ₁ (x)＝1+x+x ⁴ +x ⁶ +x ¹²

g ₂ (x)＝1+x+x ³ +x ⁴ +x ⁶ +x ¹⁰ +x ¹²

g ₃ (x)＝1+x ² +x ³ +x ⁶ +x ¹²

g ₄ (x)＝1+x+x ³ +x ⁵ +x ⁶ +x ¹⁰ +x ¹²

g ₅ (x)＝1+x ² +x ⁴ +x ⁵ +x ⁶ +x ⁷ +x ⁸ +x ⁹ +x ¹²

g ₆ (x)＝1+x+x ² +x ⁵ +x ⁷ +x ⁸ +x ⁹ +x ¹¹ +x ¹²

g ₇ (x)＝1+x+x ³ +x ⁶ +x ⁸ +x ¹⁰ +x ¹²

g ₈ (x)＝1+x+x ² +x ³ +x ⁴ +x ⁵ +x ⁹ +x ¹⁰ +x ¹²

g ₉ (x)＝1+x+x ³ +x ⁴ +x ⁶ +x ⁸ +x ¹⁰ +x ¹¹ +x ¹²

g ₁₀ (x)＝1+x+x ² +x ⁵ +x ¹⁰ +x ¹¹ +x ¹²

The simulation results obtained by using the hard-decision decoding method are shown in Figure 12, from which it can be seen that the hard-decision decoding method of the LDPC-SPC product code constructed in this embodiment can reduce the error floor of the LDPC code.

The simulation results obtained by using the soft-decision iterative decoding method are shown in Figure 13. From the curves in Figure 13, it can be seen that the LDPC-SPC product code constructed in this embodiment adopts the soft-decision iterative method and can overcome the error level of the LDPC code. In addition to layers, a very significant coding gain can also be achieved. When the bit error rate is 10-7, the product code has a performance advantage of about 0.3dB compared with the LDPC code, and is more than 0.4dB better than the LDPC-BCH concatenated code.

Embodiment 2: Decoder

This embodiment only provides the implementation scheme of the hard-decision decoder of the LDPC-SPC product code constructed in the first embodiment. The implementation block diagram of the hard-decision decoder is shown in Figure 7, which can be divided into four parts: LDPC decoding module, first storage module, error codeword statistics module and hard-decision recovery module.

Among them, the LDPC code decoding module is used to realize the decoding of the LDPC code word, which is not described in detail in this embodiment, but is only used to obtain the soft information and hard decision information of the LDPC code information bits. In this embodiment, the hard decision decoding The code method only needs the hard decision information of the LDPC code information bits; the first storage module needs 201 dual-port RAMs with a size of 4032 bits for storing the hard decision information of the LDPC code information bits; the wrong code word statistics module is composed of a counter, The initial value is 0, the maximum value is 201, and it determines the flow direction of the LDPC codeword information bits:

1. If there is no code word decoding failure among the 201 LDPC code words, the decoding ends and the correct information bits are output;

2. If there are 2 or more codewords that fail to decode in the 201 LDPC codewords, the decoding ends;

3. If only one codeword fails to be decoded in the 201 LDPC codewords, it can be divided into two situations:

i. If the erroneous code word is an SPC code, since the SPC code is a redundancy check code word, it can be deleted directly, and the first n correct LDPC codes are output, and the decoding ends;

ii. If the erroneous code word is an LDPC code, enter the hard decision recovery module.

The structural block diagram of the hard decision recovery module is shown in Figure 8, which is mainly divided into two parts: the modulo 2 adder module and the second storage module. Among them, the modulo 2 adder needs a bitwise modulo 2 sum adder with a size of 4032 bits, which is used to calculate the modulo 2 sum of the 200 information bits except the error code word, and output the 200 correct information bits at the same time ; The second storage module needs a dual-port RAM with a size of 4032 bits, which is used to store the temporary result of the modulo 2 adder, that is, the addend of the modulo 2 sum with the next frame, and outputs the final accumulation result after n=200, That is, the recovered correct information bits.

Although specific embodiments and drawings of the present invention are disclosed for the purpose of illustration, the purpose is to help understand the content of the present invention and implement it accordingly, but those skilled in the art can understand that: without departing from the present invention and the appended claims Various substitutions, changes and modifications are possible within the spirit and scope of . Therefore, the present invention should not be limited to what is disclosed in the preferred embodiments and drawings.

Claims (10)

1. a coding method of LDPC concatenated codes, comprising the following steps: 1) Framing the information bit stream; 2) Do the modulo 2 sum of the bits at the corresponding positions of each n information frame, where n is a positive integer, to obtain the n+1th redundant frame, which is $c_{\mathrm{no}+1}^j=\underset{k=1}{\overset{\mathrm{no}}{\mathrm{\&Sigma;}}}{c}_k^j\mathrm{mod}2,j=\mathrm{1,2},\&Center\; Dot;\&Center\; Dot;\&Center\; Dot;,N,$ Where N is the length of the information frame, which is a positive integer; 3) The n+1 information frames are sequentially encoded by the LDPC code to obtain n+1 LDPC code words, wherein the n+1 LDPC code word is a redundant code word, and the redundant code word is named SPC code, the resulting LDPC concatenated code is an LDPC-SPC product code, which has: ${\mathrm{<span\; class="notranslate">\; c</span>}}_{\mathrm{<span\; class="notranslate">\; SPC</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{{\mathrm{<span\; class="notranslate">\; LDPC</span>}}_{\mathrm{<span\; class="notranslate">\; 1</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{{\mathrm{<span\; class="notranslate">\; LDPC</span>}}_{\mathrm{<span\; class="notranslate">\; 2</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{{\mathrm{<span\; class="notranslate">\; LDPC</span>}}_{\mathrm{<span\; class="notranslate">\; 3</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}<span\; class="notranslate">\; +</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; \&CenterDot;</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; c</span>}}_{{\mathrm{<span\; class="notranslate">\; LDPC</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}}^{\mathrm{<span\; class="notranslate">\; j</span>}}\mathrm{<span\; class="notranslate">\; mod</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}$ where c _SPC ^j is the jth bit of the SPC codeword,

are the jth bit of the first n LDPC codewords respectively. 2. The encoding method according to claim 1, characterized in that: the value of n is 50 to 400. 3. the decoding method of LDPC-SPC product code described in claim 1, comprises the steps: 1) Carry out LDPC code decoding successively for every n+1 LDPC code words, wherein the n+1 LDPC code words are SPC code words, obtain the hard decision result of n+1 LDPC code decoding; 2) Count the error patterns in n+1 LDPC codes, and process them according to the following a)～c): a) If there is no codeword decoding failure in the n+1 LDPC codewords, the decoding ends; b) If more than one codeword in the n+1 LDPC codewords fails to be decoded, the decoding ends; c) If there is only one codeword decoding failure in the n+1 LDPC codewords, then there are two situations: i. If the wrong code word is an SPC code, delete the code word directly, output the first n correct LDPC codes, and the decoding ends; ii. if the wrong code word is one of the previous n LDPC codes, then enter step 3); 3) Delete the erroneous LDPC codeword, carry out the modulo 2 sum of the remaining n correct LDPC codewords bit by bit in the column direction, and the obtained result is the restored correct codeword, output the restored correct codeword, and decode Finish. 4. the decoding method of LDPC-SPC product code described in claim 1, comprises the steps: 1) Perform LDPC code decoding on every n+1 LDPC code words sequentially, wherein the n+1th LDPC code word is an SPC code word, and obtain the hard decision results of n+1 LDPC code decoding and Confidence information L _i ^j for each bit, Where i is from 1 to n+1, j is from 1 to N, and N is the code length of the LDPC code, $L_{{\mathrm{LDPC}}_{\mathrm{no}+1}}^j=L_{\mathrm{SPC}}^j;$ And set the maximum number of iterations T of decoding; 2) Count the error patterns in n+1 LDPC codes, and process them according to the following a)～c): a) If there is no codeword decoding failure in the n+1 LDPC codewords, the decoding ends; b) If there is only one codeword decoding failure in the n+1 LDPC codewords, then there are two situations: i. If the wrong code word is an SPC code, delete the code word directly, output the first n correct LDPC codes, and the decoding ends; ii. If the wrong codeword is one of the first n LDPC codes, delete the wrong codeword, and then carry out the modulo 2 sum of the remaining n correct LDPC codewords bit by bit in the column direction, and the obtained result is recovery output the correct codeword, output the recovered correct codeword, and the decoding ends; c) if there are errors in 2 or more than 2 codewords in the n+1 LDPC codewords, then proceed to step 3) to perform iterative vertical decoding, and when the number of iterations reaches T, the decoding ends; 3) Calculate the external information of each bit of the error codeword separately $e_{i_k}^j=2\mathrm{arctanh}\left(\underset{t=1,t\&NotEqual;i_k}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right),$ Wherein i _k represents the kth erroneous codeword in the n+1 codewords, k is a positive integer, and j represents the jth bit in the kth erroneous codeword; 4) Update the confidence of each bit of the error codeword $L_{i_k}^j=L_{i_k}^j+e_{i_k}^j;$ 5) Decoding the erroneous codewords whose confidence levels have been updated sequentially with LDPC codes, and then return to step 2). 5. decoding method according to claim 4 is characterized in that: in described step 3), the size of the degree of confidence L _i ^j of the code word that makes decoding success is $\left|L_i^j\right|=\&infin;,$ Symbol is $\mathrm{sgn}\left(L_i^j\right)=\mathrm{sgn}\left(L_i^j\right),$ Where j=1, 2,..., N, the external information of each bit of the error codeword

is of size $\left|e_{i_k}^j\right|=\max (\underset{t\&NotEqual;i}{\overset{\mathrm{no}+1}{\underset{t=1}{\min }}}\left(\right|L_t^j\left|\right)-\mathrm{0.2,0}),$ Symbol is $\mathrm{sgn}\left(e_{i_k}^j\right)=\underset{t=1,t\&NotEqual;i}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\mathrm{sgn}\left(L_t^j\right),$ where j=1, 2, . . . , N. 6. a decoder, for decoding the LDPC-SPC product code described in claim 1, comprising an LDPC code decoding module, a first storage module, an error codeword statistics module and a hard decision recovery module. sections, of which: The LDPC code decoding module decodes every n+1 LDPC code words sequentially, wherein the n+1 LDPC code word is an SPC code word, and outputs the hard decision information of n+1 LDPC code information bits ; The first storage module is used to store hard decision information; The error code word statistical module counts the error code words in n+1 LDPC codes according to the hard decision information, and determines the flow direction of the LDPC code word information bits: if only one code word in the n+1 LDPC code words fails to decode and If the code word is not an SPC code, enter the hard decision recovery module, otherwise output information bits; The hard decision recovery module deletes the wrong LDPC codeword, and then modulo-2 sums the remaining n correct LDPC codewords bit by bit in the column direction, the result is the recovered correct codeword, and outputs the recovered correct information bits . 7. The decoder according to claim 6, characterized in that: the first storage module is a dual-port RAM; the error codeword statistics module is a counter with an initial value of 0. 8. The decoder according to claim 6, wherein the hard decision recovery module is mainly composed of a modulo 2 adder module and a second storage module, wherein the modulo 2 adder module is used to calculate and remove errors The information bits of the n LDPC codewords outside the codeword are bit-wise modulo 2 and output these n correct information bits at the same time; The frame is added to the modulo 2 sum, and the final accumulation result is output, that is, the recovered correct information bits. 9. A decoder is used to decode the LDPC-SPC product code described in claim 1, comprising an LDPC code decoding module, a first storage module, an error code word statistical module, and an SPC code soft decoding Module and hard decision recovery module has five parts, among which: The LDPC code decoding module decodes every n+1 LDPC code words sequentially, wherein the n+1th LDPC code word is an SPC code word, and outputs the soft information and information bits of n+1 LDPC code information bits Hard decision information, the soft information is the confidence level L _i ^j of each bit, where i is from 1 to n+1, j is from 1 to N, and N is the code length of the LDPC code; The first storage module is used to store soft information and hard decision information of LDPC code information bits; The error codeword statistics module counts the error codewords in n+1 LDPC codes, and determines the flow direction of the LDPC codeword information bits: if only one codeword in the n+1 LDPC codewords fails to decode and the codeword is not SPC code, then enter hard decision recovery module; If exceed a code word decoding failure in n+1 LDPC code code word, then enter SPC code soft decoding module; If there is no code word error or only SPC code decoding fails, Then output the correct information bit; The hard decision recovery module deletes the wrong LDPC codeword, and then modulo-2 sums the remaining n correct LDPC codewords bit by bit in the column direction, the result is the recovered correct codeword, and outputs the correct information bits after recovery ; The SPC code soft decoding module retains its soft information for the wrong code words in n+1 LDPC codes, while the correct code word only retains its hard decision information, that is, the sign bit; and then calculates the outer bits of each bit of the wrong code word information $e_{i_k}^j=2\mathrm{ar\; c}\tanh \left(\underset{t=1,t\&NotEqual;i_k}{\overset{\mathrm{no}+1}{\mathrm{\&Pi;}}}\tanh \left(\frac{L_t^j}{2}\right)\right),$ Among them, i _k represents the kth error codeword in n+1 codewords, k is a positive integer, and j represents the jth bit in the kth error codeword; the obtained external information is used as the LDPC code decoding module The prior information is decoded again, that is, the confidence of each bit of the wrong codeword is updated $L_{i_k}^j=L_{i_k}^j+e_{i_k}^j,$ Then input the LDPC code decoding module to perform iterative decoding until the maximum number of iterations is reached or all codewords are detected correctly. 10. The decoder according to claim 9, wherein the hard decision recovery module is mainly composed of a modulo 2 adder module and a second storage module, wherein the modulo 2 adder module is used to calculate and remove errors The information bits of the n LDPC codewords outside the codeword are bit-wise modulo 2 and output these n correct information bits simultaneously; the second storage module is used to store the temporary result of the modulo 2 adder, that is, sum the The frame is added to the modulo 2 sum, and the final accumulation result is output, that is, the recovered correct information bits.

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