CN100530071C - Storage apparatus comprising read-write cache and cache implementation method - Google Patents

Abstract

The invention discloses a storage device including a read-write cache and a method for realizing the read-write cache in the storage device. The present invention separates the read cache and the write cache, that is, the access control of the read cache and the write cache is performed by different processors, that is, the read cache is directly connected to the main processor, so that the processing of the read cache by the main processor can be improved Efficiency, and because the main processor can support a larger memory space, thereby ensuring that the read cache can have a larger capacity, and because the read cache has a larger capacity, the processing efficiency of the main processor for the read cache can be further improved; write cache Mounted under the I/O processor, the I/O processor's supporting battery power supply circuit realizes continuous power supply to the write cache, and the write cache does not need to share the limited memory space that the I/O processor can support with the read cache , thus the processing efficiency of the main processor on the write cache can be improved due to the increase of the write cache capacity.

Description

A storage device including a read-write cache and a cache implementation method

technical field

The invention relates to cache technology, in particular to a storage device including a read-write cache and a method for realizing the read-write cache in the storage device.

Background technique

In storage devices, cache is an indispensable storage medium (usually one or more blocks of memory), which can accelerate the access speed of the main processor in the storage device to the disk group, thus greatly improving the overall performance of the storage device. s help.

It should be noted that the physical location and media type of the cache in the storage device mentioned here are different from the internal cache of the CPU of the computer system.

According to the type of access, cache can be divided into read cache and write cache. Wherein, for the storage device, the data in the write cache cannot be lost to avoid the loss of user data; while the data in the read cache is lost, the user data will not be lost. Therefore, in the storage device, it must be considered to provide continuous power supply to the memory where the write cache data is located in the case of a sudden power failure of the system.

FIG. 1 is a schematic diagram of an existing write cache power supply solution. As shown in FIG. 1 , a storage device includes a main processor, a read cache and a write cache, and a disk group.

Wherein, the read cache is used for caching the data read by the main processor from the disk group; the write cache is used for caching the data to be written by the main processor to the disk group.

The main processor hosts application programs and drivers, a read cache program for implementing read access control to the read cache, a write cache program for implementing write access control for the write cache, and a read and write program for the disk group Read and write processing program for access control; the read cache and write cache are both attached to the main processor and managed by the main processor, that is, the main processor controls access to the read cache and write cache, and the disk group is also attached to the Under the main processor, data storage is realized.

The storage device shown in FIG. 1 is externally connected to a UPS, and the external UPS supplies power to the entire system. This solution is simple to implement, but while the write cache is continuously powered, the read cache and other parts of the system are also continuously powered, and the read cache and other parts of the system do not need continuous power supply, resulting in waste of resources. Moreover, the cost of the UPS itself is very high, so that the implementation of this solution requires high hardware costs.

FIG. 2 is a schematic diagram of another existing write cache power supply solution. As shown in FIG. 2 , the storage device includes: a main processor, an input/output (I/O) processor, a read cache, a write cache, and a disk group.

Wherein, the read cache is used for caching the data read by the main processor from the disk group; the write cache is used for caching the data to be written by the main processor to the disk group.

The I/O processor is mounted under the main processor; the main processor carries applications and drivers;

The I/O processor carries the read cache program for implementing read access control on the read cache, the write cache program for implementing write access control over the write cache, and the program for implementing read and write access control on the disk group Read and write processing program; both the read cache and write cache are attached to the I/O processor and managed by the I/O processor, that is, the I/O processor controls the read cache and write cache under the control of the main processor. For access control, the disk group is also mounted under the I/O processor to realize data storage.

In the storage device shown in FIG. 2 , the battery matched with the I/O processor supplies power for the read cache and the write cache while supplying power to the I/O processor.

Compared with the first solution shown in Figure 1, in the solution shown in Figure 2, the battery is used to supply power to the write cache, which reduces the implementation cost of the storage device, but there are the following problems:

1) Both the read cache and the write cache are mounted under the main processor through the I/O processor, that is, they are far away from the main processor, and the processing efficiency after the read and write hits is lower than that of the first solution shown in Figure 1;

2) Usually, the memory space that the I/O processor can support (that is, the memory space that is continuously powered by the battery) is relatively limited in size, which is far smaller than the memory space that the main processor can support. The capacity of the read cache and write cache under the /O processor; the read and write efficiency of the read cache and write cache is directly related to its capacity.

3) In this solution, the read cache and the write cache are continuously powered at the same time, but the read cache does not need continuous power supply, thus causing a waste of resources.

It can be seen that although the cost is reduced in the solution shown in Figure 2 above, since the read cache occupies part of the memory space continuously powered by the battery, the memory space continuously powered by the battery as the write cache is smaller, thus making the memory space continuously powered by the battery smaller. The read and write processing efficiency of the read and write cache is low.

Contents of the invention

In view of this, the present invention provides a storage device including a read-write cache, and a method for implementing a read-write cache in the storage device, which can improve read-write performance on the premise of realizing continuous power supply for the write cache at a lower cost. The read and write processing efficiency of the write cache.

A storage device including a read-write cache provided by the present invention includes: a main processor, an input/output I/O processor, a battery, a read cache, a write cache, and a disk group,

The read cache and the I/O processor are connected under the main processor, and the write cache and the disk group are connected under the I/O processor;

The main processor is configured to perform access control on the read cache;

The I/O processor is configured to perform access control on the write cache under the control of the main processor;

The battery supplies power to the write cache.

A cache implementation method in a cache storage device provided by the present invention, the read cache and the input/output I/O processor are mounted under the main processor, and the write cache and the disk group are mounted under the I/O processing Under the device, the write cache is powered by a battery, and the method includes:

The main processor performs access control on the read cache, and the I/O processor performs access control on the write cache under the control of the main processor.

The main processor performs access control on the read cache for read requests, and the I/O processor performs access control on the write cache for read requests under the control of the main processor, and includes the following steps :

The read cache program in the main processor reads the data corresponding to the read request issued by the application program from the read cache, and judges whether all reads hit the read cache. If so, the read cache program returns all hits to the application program. data, and end the process;

Otherwise, the read cache program returns part of the read hit data to the application program, and reconstructs a read request representing the miss part of the read cache and sends it to the I/O processor.

The main processor includes a buffer buffer, and the read request issued by the application program includes a buffer pointer;

The read cache program returning the read hit data to the application program includes: the read cache program directly returns the read hit data to the buffer by using the buffer pointer.

After reconstructing the read request representing the miss part of the read cache and sending it to the I/O processor, the access control of the read request further includes:

The write cache program in the I/O processor receives the read request from the read cache program to the read cache miss part and reads the write cache and reads the write cache, and judges whether all read hits are made to the write cache, and if so, then Return the read hit data to the application;

Otherwise, send the read request representing the read miss part of the write cache to the read-write handler, and the read-write handler reads the received data corresponding to the read request for the miss part of the write cache from the disk, and The data of the read hit is returned to the application program, and then the process ends.

The main processor includes a buffer buffer;

The read request reconstructed and issued by the read cache program includes a buffer pointer, and the write cache program returns data to the application program including: the write cache program uses the buffer pointer to directly return the read hit data to the buffer;

And/or, the read request reconstructed and issued by the write cache program includes a buffer pointer, and the read and write processing program returns data to the application program including: the read and write processing program directly returns the hit data by using the buffer pointer to the buffer.

The main processor performs access control on the read cache for write requests, and the I/O processor performs access control on the write cache for write requests under the control of the main processor, and includes the following steps :

The read cache program in the main processor receives the write request issued by the application program, and reads the read cache according to the write request;

After all misses in the read cache, the read cache program of the main processor sends the write request sent by the application program to the I/O processor; after the read cache is completely hit or partially hit, the main processor's The read cache program applies for memory space, copies the write request data corresponding to the hit part to the applied memory space, sets a mark on the hit part of the read cache, suspends subsequent access to the hit part, and sends the write request sent by the application sending the request to the I/O processor;

The I/O processor writes the corresponding write request data into the write cache or the disk group;

After the I/O processor write operation is successful, the read cache program replaces the data in the corresponding position in the read cache with the write request data in the applied memory space, and cancels the suspension; after the I/O processor write operation fails, Discard the write request data in the applied memory space and cancel the suspension.

After the data in the applied memory space is replaced with the write request data in the corresponding position in the read cache, or the write request data in the applied memory space is discarded, the method further includes: releasing the applied memory space.

The applying for memory space includes: applying for a temporary buffer in the main processor.

It can be seen from the above technical solution that the present invention separates the read cache and the write cache, that is, different processors respectively perform access control on the read cache and the write cache, that is, the read cache is directly attached to the main processor, thereby improving the performance of the main processing. The processing efficiency of the processor to the read cache, and because the main processor can support a larger memory space, thereby ensuring that the read cache can have a larger capacity, and because the read cache has a larger capacity, the main processor can further improve the performance of the read cache. The processing efficiency is high; the write cache is connected to the I/O processor, and the supporting battery power supply circuit of the I/O processor realizes the continuous power supply for the write cache, and the write cache does not need to share the power of the I/O processor with the read cache. The limited memory space that can be supported, thus the processing efficiency of the main processor for the write cache can be improved due to the increase of the write cache capacity.

Moreover, the write cache is continuously powered by the battery, thereby ensuring a low cost of realizing continuous power supply to the write cache, and the battery does not supply power to the read cache and other parts of the system that do not need continuous power supply, thus saving power supply resources.

Description of drawings

FIG. 1 is a schematic diagram of an existing write cache power supply solution.

FIG. 2 is a schematic diagram of another existing write cache power supply solution.

FIG. 3 is a schematic structural diagram of a storage device in an embodiment of the present invention.

FIG. 4 is a schematic diagram of a processing flow of a read request by a read-write cache implementation method in the present invention.

FIG. 5 is a schematic diagram of a processing flow of a write request by a method for implementing a read-write cache in the present invention.

Detailed ways

In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

FIG. 3 is a schematic structural diagram of a storage device in an embodiment of the present invention. As shown in FIG. 3 , the storage device including the read cache and the write cache provided by this embodiment includes: a main processor, an I/O processor, a battery, a read cache, a write cache, and a disk group.

The difference from the existing solution shown in FIG. 2 is that the read cache and the I/O processor are mounted under the main processor, and the write cache and the disk group are mounted under the I/O processor. The cache and write cache are attached to different processors respectively.

In this way, the main processor is used to control access to the read cache.

The I/O processor is used to control access to the write cache under the control of the main processor.

The battery provides continuous power for the write cache (for example, through a battery-powered circuit). That is to say, when the external power supply of the storage device is disconnected, the battery supporting the I/O processor can continuously supply power to the write cache through the power supply circuit, so as to ensure that the write cache will not be lost for a period of time when the external power supply of the storage device is disconnected. After the external power supply of the storage device is restored to restart the storage device, the data in the write cache is still valid.

It can be seen that in the above storage devices, the read cache and write cache are separated, that is, different processors control the access to the read cache and write cache respectively, and the read cache is close to the main processor, that is, the read cache is directly attached to the main processor. , so that the processing efficiency of the main processor on the read cache can be improved, and since the main processor can support a larger memory space, the read cache can be guaranteed to have a larger capacity, and the read cache can be further improved due to the larger capacity The processing efficiency of the main processor for the read cache; the write cache is mounted under the I/O processor, and the supporting battery power supply circuit of the I/O processor realizes the continuous power supply for the write cache, and the write cache does not need to be shared with the read cache The limited content space supported by the I/O processor can improve the processing efficiency of the main processor for the write cache due to the increase in the write cache capacity.

Moreover, the battery provides continuous power supply for the write cache, thereby ensuring a low cost of realizing continuous power supply for the write cache, and the battery does not supply power for the read cache and other parts of the system that do not need continuous power supply, thus saving power resources and being able to Maximize the performance advantages of the cache with the lowest hardware cost.

In the embodiment of the present invention, considering the association between read and write caches, in addition to separating the read cache from the write cache, it further provides a processing method for how to deal with the association between the read cache and the write cache during the process of the read request and the write request.

For the processing of read requests, the above association is mainly reflected in: if the data corresponding to the read request has been cached in the write cache, it can be read directly from the write cache without reading from the disk group, thereby improving the read efficiency.

Specifically, the main processor of the storage device in this embodiment includes: an application program, a driver program, and a read cache program. Read cache program.

The application program is used to issue a read request to the driver.

The driver program is configured to drive the read cache program to read data corresponding to the read request from the read cache according to the received read request.

The read cache program is used to read the data corresponding to the read request from the read cache, and judge whether all read hits are made to the read cache. If yes, all the data corresponding to the read request sent by the application has been cached in the read cache , then all the data hit by the read and the successful response of the read request will be returned to the application program without any association with the write cache; otherwise, in the case of a partial hit, that is, part of the data corresponding to the read request issued by the Cache in the read cache, rebuild one or more read requests representing the miss part of the read cache (if the memory space of the miss part data is continuous, you can only construct one read request, otherwise, it is better to construct multiple read requests request), and send it to the I/O processor. In the case of all misses or the read cache prohibits access, that is, all the data corresponding to the read request sent by the application is not cached in the read cache, and directly rebuild a or Multiple read requests representing read cache misses are sent to the I/O processor.

The I/O processor includes: a read-write processing program and a write cache program, that is, the I/O processor carries a write cache program for realizing write access control to the write cache, and a write cache program for reading and writing to the disk group. Read and write handlers for access control. Wherein, the read/write processing program is a general term for some other related programs connected with the write cache program included in the existing I/O processor, and will not be described in detail here.

The write cache program is used to read the write cache according to the received read request to the read cache miss part (the read request received from the read cache program of the main processor), and judge whether all read hits are made to the write cache, and if so, that is All the data corresponding to the sent read request has been cached in the write cache, then return the read hit data and the response of the read request success to the application program, otherwise, return part of the read hit data to the application program, and retry Construct one or more read requests representing the miss part of the write cache, and send them to the read and write handlers.

The read and write processing program is used to read the miss part of the write cache from the disk group according to the received read request for the miss part of the write cache (received from the read request of the write cache program in the I/O processor) The data corresponding to the read request, and return the hit data to the application program, and also return the response of the successful read request.

In practical application, the main processor may also include a buffer (buffer), which is used to store the data returned to the application program and provide it to the application program. In this way, the read request issued by the application program can include a buffer pointer (that is, the address information of the buffer in the memory), and the read cache program, write cache program, and read-write processing program can all be transferred and used by the application in the main processor. The buffer pointer carried by the read request issued by the program returns the data returned to the application program directly into the buffer.

In this case, the read cache program, and/or write cache program, and/or read/write processing program can directly return the returned data to the buffer, so as to realize the fast return of data and avoid duplication of data between programs transfer. Furthermore, in order to improve the efficiency of data return, the data return can also be realized by means of DMA or the like.

For the processing of write requests, the association is mainly reflected in: if the data to be written is also cached in the read cache, the same data in the disk group and the read cache must be updated synchronously. Before the write operation is completed, in order to prevent the data read from the read cache (updated without write operation) from inconsistent with the data to be written, it is necessary to suspend the access to the corresponding data in the read cache. Access to that portion of the data is allowed after the write request is complete.

Specifically, the main processor may still include: an application program, a driver program, and a read cache program.

The application program is used to issue a write request to the driver.

The driver is used to send the write request sent by the application to the read cache program.

The read cache program is used to read the read cache according to the write request, and determine whether all the read caches are missed. If so, that is, the data to be written is not cached in the read cache, then the received The write request issued by the program is sent to the I/O processor; otherwise, all or part of the data to be written happens to be cached in the read cache, then apply for memory space, such as applying for a temporary buffer, and will hit part of the corresponding write request data Copy to the requested temporary buffer, but do not replace the original data in the corresponding position in the read cache (after the subsequent write operation is successful, replace the original data with the write request data in the newly written temporary buffer), and hang Access to the hit part in the read cache, and then send the write request issued by the application to the I/O processor; after receiving the response information from the I/O processor indicating that the write operation is successful, the temporary buffer The write request data in replaces the data in the corresponding position in the read cache, and releases the requested temporary buffer.

The I/O processor may still include: a read/write processing program and a write cache program.

The write cache program writes the corresponding write request data into the write cache according to the received write request, and returns a successful write request response to the read cache program after the write operation is successful, that is, writes the data into the write cache.

In practical applications, data may not be written into the write cache first but directly written into the disk group. In this case, the write cache program writes the corresponding write request data to the disk group through the read and write processing program, and returns a response message indicating that the write operation is successful to the read cache program after the write operation is successful; the read cache in the main processor The program replaces the original data at the corresponding location with the write request data in the temporary buffer it applied for, and returns a response to the application program to complete the write request.

After the write operation fails, the write cache program or the read/write handler returns a response message indicating the write operation failure to the read cache program. In this way, because the write operation corresponding to the write request fails, the read cache program in the main processor does not replace the original data at the corresponding position with the write request data in the temporary buffer it applied for, but After the response information of operation failure, discard the write request data in the applied temporary buffer and release the temporary buffer, and return the response of the write request completion to the application program.

It can be seen that in the above storage device, the cooperative processing of the main processor and the I/O processor can further improve the read efficiency and ensure that the corresponding data in the read cache can be updated in time during the write operation.

The above is a detailed description of the storage device in the embodiment of the present invention. Next, the implementation method of the read-write cache in the embodiment of the present invention will be described.

In the implementation method of the read-write cache in the embodiment of the present invention, the read cache and the input/output I/O processor are first attached to the main processor, and the write cache and the disk group are attached to the I/O processor. , and the write cache is powered by the battery of the I/O processor, the method includes:

The main processor performs access control on the read cache, and the I/O processor performs access control on the write cache under the control of the main processor.

Wherein, access control includes access control for read requests and access control for write requests, and embodiments of the present invention provide corresponding processing methods for read requests and write requests, so as to ensure the association between read cache and write cache.

FIG. 4 is a schematic diagram of a processing flow of a read request by a read-write cache implementation method in the present invention. As shown in FIG. 4, the processing flow of the read request by the read-write cache implementation method in this embodiment includes:

In step 401, the read cache program in the main processor reads data corresponding to the read request from the read cache according to the read request issued by the application program.

In step 402 , the read cache program in the main processor judges whether all reads in the read cache are hit, if yes, execute step 403 , otherwise, execute step 404 .

Step 403 , all the reads in the read cache are hit, so the read cache program in the main processor directly returns all hit data to the application program without any association with the write cache, and step 409 is executed.

Step 404, the read cache is not all hit or access is prohibited, the read cache program in the main processor returns part of the data that is read to the application program, and reconstructs one or more read requests that represent the part that is not hit by the read cache to the I/O processor, and proceed to step 405.

The read request reconstructed in this step may include a buffer pointer.

Step 405, the write cache program in the I/O processor reads the corresponding data in the write cache according to the received read request for the read cache miss part, and judges whether all the read caches are hit, if yes, then Go to step 406, otherwise go to step 407.

Step 406 , the data corresponding to the read request is just cached in the write cache, that is, all reads in the write cache are hit, and the write cache program in the I/O processor directly returns the hit data to the application program, and executes step 409 .

Step 407, the write cache is not all read hits (all misses or partial misses), and the write cache program in the I/O processor rebuilds one or more read requests representing the miss part of the write cache and sends them out , and then execute step 408.

Similar to the previous description, the read request reconstructed in this step may also include a buffer pointer.

Step 408 , the read/write processing program in the I/O processor reads the corresponding data from the disk group and returns to the application program according to the read request received from the write cache program for the read cache miss portion, and executes step 409 .

In step 409, the read cache program in the main processor returns a read request completion response to the application program.

So far, this process ends.

It can be seen from the above process that if the data corresponding to the read request has been cached in the write cache, it can be read directly from the write cache without sending a read request again to read from the disk group, thereby improving the read efficiency.

In order to further improve the reading efficiency, the above process can be implemented in the following ways:

In step 401, a buffer pointer may be included in the read request received by the read cache program of the main processor;

If all read hits are made to the read cache, then in step 403, the read cache can directly return all hit data to the buffer of the main processor;

If there are not all read hits to the read cache, then at step 404, the read request reconstructed by the read cache program of the main processor may also include the buffer pointer.

In this way, in step 405, the read request received by the write cache program also includes the buffer pointer.

If the write cache program hits all the reads in the write cache, then in step 406, the write cache can directly return the data of all read hits to the buffer of the main processor;

If there are not all read hits to the write cache, first return part of the hit data to the buffer of the main processor; wait for the subsequent steps to read part of the data that is currently not hit, and then return the newly read data to the main processor in buffer.

In step 407, the read request reconstructed by the write cache program of the I/O processor may also include a buffer pointer.

In this way, in step 408, the read request received by the read and write processing program of the I/O processor includes the buffer pointer. In step 408, after the read-write processing program reads the corresponding data from the disk group, the data is directly returned to the buffer of the main processor by DMA and other fast methods, so as to improve the efficiency of data return;

FIG. 5 is a schematic diagram of a processing flow of a write request by a method for implementing a read-write cache in the present invention. As shown in FIG. 5, the processing flow of the write request by the read-write cache implementation method in this embodiment includes:

Step 501, the read cache program in the main processor receives the write request sent by the application program, and reads the read cache according to the write request.

Step 502 , the read cache program in the main processor judges whether all the read caches are misses, if yes, execute step 504 , otherwise, execute step 503 .

Step 503, when the read cache hits completely or partially, the read cache program of the main processor applies for a memory space, and copies the write request data corresponding to the hit part to the applied memory space, and does not temporarily replace the original data in the corresponding position in the write cache. There is data, and at the same time, the read cache program sets a flag indicating suspension for the memory space where the read cache hit part is located, and then suspends subsequent access to the hit part, and waits for the write request of this process to be completed and updated before canceling the suspension, and Execute step 504 .

Step 504 , the read cache program of the main processor sends the write request issued by the application program to the write cache program of the I/O processor, and executes step 505 .

Step 505, the write cache program or read/write processing program in the I/O processor writes the write request data into the write cache according to the existing method, or directly writes the disk group, and returns the indication to the read cache program in the main processor The response information of whether the write operation is successful.

Step 506, the read cache program in the main processor judges whether the write operation is successful according to the received response information, if successful, execute step 507, otherwise execute step 508.

Step 507, the read cache program in the main processor replaces the data in the corresponding position in the read cache with the write request data in the applied memory space (that is, the part of the data hit by the read cache in step 503), and releases the applied memory space, Then execute step 509 .

In step 508, the read cache program in the main processor discards the write request data in the applied memory space and releases the memory space, and then executes step 509.

In step 509, the read cache program returns a response of completing the write request to the application program in the main processor, and step 510 is executed.

Step 510, the read cache program cancels the mark set on the memory space where the hit part of the data is located, and handles the suspended access due to the access to the part of the data before this step.

So far, this process ends.

It can be seen from the above process that if the data to be written is also cached in the read cache, in order to update the same data in the disk and the read cache at the same time, to prevent the data read from the read cache (update without write operation) from If the data to be written does not match, it is necessary to suspend the access to the corresponding data in the read cache, and allow access to the part of the data after the write request is completed, so as to ensure that the read cache can be updated in time during the write operation corresponding data in .

In the above process, the memory space requested in step 503 may be a temporary buffer.

The above descriptions are only preferred embodiments of the present invention, and are not intended to limit the protection scope of the present invention. Any modifications, equivalent replacements and improvements made within the spirit and principles of the present invention shall be included within the protection scope of the present invention.

Claims (9)

1. A storage device including a read-write cache, comprising: a main processor, an input/output I/O processor, a battery, a read cache, a write cache, and a disk group, It is characterized in that, The read cache and the I/O processor are connected under the main processor, and the write cache and the disk group are connected under the I/O processor; The main processor is configured to perform access control on the read cache; The I/O processor is configured to perform access control on the write cache under the control of the main processor; The battery supplies power to the write cache. 2. A read-write cache implementation method in a storage device, characterized in that the read cache and the input/output I/O processor are mounted under the main processor, and the write cache and the disk group are mounted under the I/O processor. Under the /O processor, the write cache is powered by a battery, and the method includes: The main processor performs access control on the read cache, and the I/O processor performs access control on the write cache under the control of the main processor. 3. The method according to claim 2, wherein the main processor performs access control on the read cache for read requests, and the I/O processor controls the access of the read cache under the control of the main processor The read request performs access control on the write cache, and includes the following steps: The read cache program in the main processor reads the data corresponding to the read request issued by the application program from the read cache, and judges whether all reads hit the read cache. If so, the read cache program returns all hits to the application program. data, and end the process; Otherwise, the read cache program returns part of the read hit data to the application program, and reconstructs a read request representing the miss part of the read cache and sends it to the I/O processor. 4. The method according to claim 3, wherein the main processor includes a buffer buffer, and the read request issued by the application program includes a buffer pointer; The read cache program returning the read hit data to the application program includes: the read cache program directly returns the read hit data to the buffer by using the buffer pointer. 5. The method according to claim 3, wherein, after reconstructing the read request representing the read cache miss part and sending it to the I/O processor, said performing access control on the read request further comprises: The write cache program in the I/O processor receives the read request from the read cache program to the read cache miss part and reads the write cache, and judges whether all the read caches are hit, and if so, returns the read request to the application program. hit data; Otherwise, send the read request representing the read miss part of the write cache to the read-write handler, and the read-write handler reads the received data corresponding to the read request for the miss part of the write cache from the disk, and The data of the read hit is returned to the application program, and then the process ends. 6. The method according to claim 5, wherein a buffer buffer is included in the main processor; The read request reconstructed and issued by the read cache program includes a buffer pointer, and the write cache program returns data to the application program including: the write cache program uses the buffer pointer to directly return the read hit data to the buffer; And/or, the read request reconstructed and issued by the write cache program includes a buffer pointer, and the read and write processing program returns data to the application program including: the read and write processing program directly returns the hit data by using the buffer pointer to the buffer. 7. The method according to claim 2, wherein the main processor performs access control on the read cache for write requests, and the I/O processor controls the access of the read cache under the control of the main processor The write request performs access control on the write cache, and includes the following steps: The read cache program in the main processor receives the write request issued by the application program, and reads the read cache according to the write request; After all misses in the read cache, the read cache program of the main processor sends the write request sent by the application program to the I/O processor; after the read cache is completely hit or partially hit, the main processor's The read cache program applies for memory space, copies the write request data corresponding to the hit part to the applied memory space, sets a mark on the hit part of the read cache, suspends subsequent access to the hit part, and sends the write request sent by the application sending the request to the I/O processor; The I/O processor writes the corresponding write request data into the write cache or the disk group; After the I/O processor write operation is successful, the read cache program replaces the data in the corresponding position in the read cache with the write request data in the applied memory space, and cancels the suspension; after the I/O processor write operation fails, Discard the write request data in the applied memory space and cancel the suspension. 8. The method according to claim 7, wherein the data in the applied memory space is replaced with the write request data in the corresponding position in the read cache, or the write request data in the applied memory space is discarded Afterwards, the method further includes: releasing the memory space of the application. 9. The method according to claim 7 or 8, wherein the applying for memory space comprises: applying for a temporary buffer in the main processor.

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