CN100433178C - Memory circuit element application apparatus - Google Patents
Memory circuit element application apparatus Download PDFInfo
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- CN100433178C CN100433178C CNB2005100634915A CN200510063491A CN100433178C CN 100433178 C CN100433178 C CN 100433178C CN B2005100634915 A CNB2005100634915 A CN B2005100634915A CN 200510063491 A CN200510063491 A CN 200510063491A CN 100433178 C CN100433178 C CN 100433178C
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Abstract
The present invention relates to an application device for a memory body circuit element. The device is provided with a rectifying device of a unidirectional conducting element, a programmable memory body and a switch element in the memory body element of an integrated circuit. By using the rectifying device of a unidirectional conducting element, an external power supply of the element is in a straight polarity or in a reverse polarity, and the supply of an internal power supply is not influenced. Then, pin position signals of the external power supply of the element are used as judging signals. When the external power supply is in the straight polarity, judging logic is 1, and the external pin position of the element is connected to the memory body so as to test the memory body. When the external power supply is in the reverse polarity, judging logic is 0, and the external pin position of the element is connected to the programmable memory body. The present invention uses the external pin position of the element to carry out programmable treatment to the programmable memory body for mending the memory body. The present invention can also be used for changing the address of the memory body and the length of data winding displacement.
Description
Technical field
The present invention relates to a kind of device that is applied to integrated circuit, particularly relate to a kind of memory circuitry element application device.
Background technology
Known storer, as dynamic RAM (DRAM), static RAM (SRAM) or comprise SoC of storer etc., be with the manufacture of semiconductor manufacturing, but along with the progress of the small and complicated of electronic component and processing procedure, memory span also enlarge synchronously.
Yet, memory circuitry is in manufacturing process, when design, just must determine the addressing length and the data length of memory array earlier, after if the process processing procedure rolls off the production line, want to change addressing length and data length, then can't accomplish to change addressing length and data length with the laser preparing mode later.
In addition, dynamic RAM, expected with less area, has bigger memory capacity, when memory span is increasing, because of trickleer processing, the accompaniment signal microminiaturization, inevitably, the probability that produces wrong storer bit (memory bit or be called storer born of the same parents chamber memory cell) on semiconductor is made is also more and more higher, makes yield reduce, therefore, the memory area that storer is embarked on journey except normal required one-tenth row leaves stand-by circuit (redundancycircuit or be called standby born of the same parents chamber redundancy cell) simultaneously, utilizes the laser preparing technology to change circuit paths, but, if after encapsulation is finished, still have the damage section, then this storer can't use.
Summary of the invention
The objective of the invention is to, a kind of memory circuitry element application device of new structure is provided, technical matters to be solved is to make it can make memory circuitry change its addressing length (AddressLength) and data length (Data Length), thereby is suitable for practicality more.
Another object of the present invention is to, a kind of memory circuitry element application device is provided, technical matters to be solved is to make it damage section by patch memory circuit, thereby is suitable for practicality more.
The object of the invention to solve the technical problems realizes by the following technical solutions.In order to reach the foregoing invention purpose, according to memory circuitry element application device of the present invention, it comprises memory circuitry component pins hyte, switchgear, memory circuitry, programmable memory circuitry and one-way breakover element fairing.Memory circuitry comprises that again addressing bus and data bus length reconfigure circuit and memory logic circuit.And memory circuitry component pins hyte comprises memory circuitry element power supply pin, memory circuitry element grounding leg position and many several feets position.And one-way breakover element fairing, couple memory circuitry element power supply pin and memory circuitry element grounding leg position accepting an external power source, and fixedly provide a positive potential and an earthing potential to supply the power supply of all elements of inside respectively from fixing two ends.And switchgear comprises first bus, second bus, the 3rd bus and first control line, first bus couples memory circuitry component pins hyte, first control line couples memory circuitry element power supply pin and the two one of memory circuitry element grounding leg position, utilizes this first bus of first control line signal decision decision to couple this second bus or the 3rd bus.And reconfiguring circuit, the addressing bus of memory circuitry inside and data bus length comprises the 4th bus, the 5th bus and the 6th bus, the 4th bus is coupled to the 3rd bus, the 6th bus is coupled to this memory logic circuit, according to the input signal of the 5th bus, with decision addressing bus and the configuration of data bus length.The memory logic circuit of memory circuitry inside reconfigures addressing bus and the data bus length storage data that circuit disposes according to addressing bus and data bus length.The programmable memory circuitry comprises the 7th bus, second control line and the 8th bus, the 7th bus couples second bus, second control line be coupled to memory circuitry element power supply pin and memory circuitry element grounding leg position in the two another, the 8th bus is coupled to the 5th bus, utilize second control line signal, with decision write state or output state, when write state, utilize integrated circuit component pin position that its work is stylized, when output state, result's output after will stylizing, via output bus, addressing bus and the data bus length of delivering to this memory circuitry reconfigure circuit, in order to determine the addressing length and the data length of this memory circuitry.
The object of the invention to solve the technical problems also adopts following technical scheme to realize.Again, in order to reach the foregoing invention purpose, according to memory circuitry element application device of the present invention, it comprises memory circuitry component pins hyte, memory circuitry, switchgear, programmable memory circuitry and one-way breakover element fairing.Wherein, memory circuitry component pins hyte comprises memory circuitry element power supply pin, memory circuitry element grounding leg position and many several feets position.Memory circuitry comprises internal power cord, internal interface ground wire and signal line group.Switchgear comprises first bus, second bus, the 3rd bus, control line, internal power cord and an internal interface ground wire, first bus couples memory circuitry component pins hyte, control line couples memory circuitry element power supply pin and the two one of memory circuitry element grounding leg position, and the signal line group of memory circuitry to small part couples second bus.The programmable memory circuitry comprises the 4th bus, the 5th bus, internal power cord and internal interface ground wire, and the 4th bus is coupled to the 3rd bus, and the signal line group of memory circuitry to small part couples the 5th bus.One-way breakover element fairing, comprise a power input, the external ground end, internal electric source end and inner earth terminal, power input couples memory circuitry element power supply pin, the external ground end couples memory circuitry element grounding leg position, the internal electric source end couples the internal power cord of memory circuitry, the internal power cord of programmable memory circuitry and the internal power cord of switchgear, inner earth terminal couples the internal interface ground wire of memory circuitry, the internal interface ground wire of programmable memory circuitry and the internal interface ground wire of switchgear are in order to supply the power supply of inner all elements.And switchgear utilizes control line signal, couples second bus or the 3rd bus to determine first bus.And utilize the programmable memory circuitry, in order to the defective of patch memory circuit.
Moreover in order to achieve the above object, according to memory circuitry element application device of the present invention, it comprises memory circuitry component pins hyte, switchgear, memory circuitry and programmable memory circuitry.Memory circuitry component pins hyte comprises many several feets position.Switchgear comprises first bus, second bus, the 3rd bus and first control line, first bus is coupled to memory circuitry component pins hyte, first control line couple memory circuitry component pins hyte one of them, utilize first control line signal to determine first bus to couple second bus or the 3rd bus.Memory circuitry comprises that memory logic circuit and addressing bus and data bus length reconfigure circuit.The memory logic circuit is in order to storage/reading of data.Addressing bus and data bus length reconfigure circuit and comprise the 4th bus, the 5th bus and the 6th bus, the 4th bus is coupled to the 3rd bus, the 6th bus is coupled to the memory logic circuit, input signal according to the 5th bus, with decision addressing bus and the configuration of data bus length, and the signal that the 4th bus is sent into, according to the setting of the 5th bus input, judge and the access of memory logic circuit.The programmable memory circuitry comprises the 7th bus, second control line and the 8th bus, the 7th bus couples second bus, second control line be coupled to memory circuitry component pins hyte one of them, the 8th bus couples the 5th bus, utilize second control line signal, with decision write state or output state, when write state, the action that the signal work that utilizes the 7th bus to import stylizes, when output state, the result's output after will stylizing is via the 8th bus, deliver to the addressing bus and data bus length reconfigures circuit, in order to the addressing length and the data length of decision memory circuitry.
In addition, in order to achieve the above object, according to memory circuitry element application device of the present invention, it comprises memory circuitry component pins hyte, memory circuitry, switchgear and programmable memory circuitry.Wherein, memory circuitry component pins hyte comprises memory circuit element pin position, memory circuit element grounding leg position and many several feets position.Memory circuitry comprises signal line group.Switchgear comprises first bus, second bus, the 3rd bus, first control line, first bus couples memory circuitry component pins hyte, first control line couple memory circuitry component pins hyte one of them, the signal line group of memory circuitry to small part couples second bus, utilize control line signal, couple second bus or the 3rd bus to determine first bus.The programmable memory circuitry comprises the 4th bus, the 5th bus, second control line, second control line couple memory circuitry component pins hyte one of them, the 4th bus is coupled to the 3rd bus, the signal line group of memory circuitry to small part couples the 5th bus, according to second control line signal, whether write with decision, according to the defective of the data that write with the patch memory circuit.
The present invention adopts one-way breakover element fairing structure because of power input, therefore the external power source end is held reversal connection with ground, power supply for IC interior is unaffected with the ground end, and can utilize external power source pin position to be used as control signal, control patch memory or decision storer addressing length and data length.
The present invention compared with prior art has tangible advantage and beneficial effect.Via as can be known above-mentioned, the invention relates to a kind of memory circuitry element application device, this device is to add one-way breakover element fairing and programmable storer and on-off element in the integrated circuit memory element internal, utilize one-way breakover element fairing, the element-external power supply is just being connect or reversal connection, and internal electric source is supplied neither influenced.Utilize element-external power supply pin signal to make to judge signal again.When just connecing, decision logic is 1, and this moment, element-external pin position was connected to storer, can test storer; During reversal connection, decision logic is 0, and this moment, element-external pin position was connected to the programmable storer, utilizes element-external pin position that the programmable storer is done to stylize to can be used as patch memory, also or change storer address and data winding displacement length.
Above-mentioned explanation only is the general introduction of technical solution of the present invention, for can clearer understanding technological means of the present invention, and can be implemented according to the content of instructions, and for above-mentioned and other purposes, feature and advantage of the present invention can be become apparent, below especially exemplified by preferred embodiment, and conjunction with figs., be described in detail as follows.
Description of drawings
Fig. 1 is a first embodiment of the invention memory circuitry element application device circuit calcspar.
Fig. 2 is another embodiment circuit block diagram of first embodiment of the invention memory circuitry element application device.
Fig. 3 is a second embodiment of the invention memory circuitry element application device circuit calcspar.
Fig. 4 is a third embodiment of the invention memory circuitry element application device circuit calcspar.
Fig. 5 is a fourth embodiment of the invention memory circuitry element application device circuit calcspar.
PWR: memory circuitry element power supply pin
GND: memory circuitry element grounding leg position
100,200,300: one-way breakover element fairing
102,202,302: switchgear 104,204: memory circuitry
106,206,304: the programmable memory circuitry
108,208,308,400,500: memory circuitry component pins hyte
110,112,114,130,134: bus
148,150,152,210,212: bus
214,230,234,248,250: bus
252,310,312,314,322,324: bus
116,132,216,232,316: control line
118,126,136,218,226,236,318,328,332: internal power cord
120,128,138,220,228,238,320,330,334: the internal interface ground wire
122,222: addressing bus and data bus length reconfigure circuit
124,224: memory logic circuit 140,240,338: power input
142,242,340: external ground end 144,244,342: internal electric source end
146,246,344: inner earth terminal 254: latch
306: memory circuitry 336: signal line group
401,501: the pin position
Embodiment
Reach technological means and the effect that predetermined goal of the invention is taked for further setting forth the present invention, below in conjunction with accompanying drawing and preferred embodiment, to its embodiment of memory circuitry element application device, structure, feature and the effect thereof that foundation the present invention proposes, describe in detail as after.
Fig. 1 is the memory circuitry element application device circuit calcspar of one embodiment of the invention, please refer to shown in Figure 1, it comprises memory circuitry element power supply pin PWR, memory circuitry element grounding leg position GND, one-way breakover element fairing 100, switchgear 102, memory circuitry 104, (the programmable memory circuitry can comprise the storer One TimeProgramming that once stylizes to programmable memory circuitry 106, OTP Memory or flash memory Flash Memory... or the like, below all be referred to as the programmable memory circuitry, do not give an example in addition) and memory circuitry component pins hyte 108.Wherein, switchgear 102 comprises bus 110, bus 112, bus 114, control line 116, internal power cord 118 and an internal interface ground wire 120.And memory circuitry 104 comprises that addressing bus and data bus length reconfigure circuit 122 (Address Bus and Data Bus Length ReconfigurationCircuit), memory logic circuit 124, internal power cord 126 and internal interface ground wire 128.And programmable memory circuitry 106 comprises bus 130, control line 132, bus 134, internal power cord 136 and internal interface ground wire 138.And one-way breakover element fairing 100 comprises power input 140, external ground end 142, internal electric source end 144 and inner earth terminal 146.Wherein, addressing bus and data bus length reconfigure circuit 122 and comprise bus 148, bus 150 and bus 152 again.
The power input 140 of one-way breakover element fairing 100 couples memory circuitry element power supply pin PWR, its external ground end 142 couples memory circuitry element grounding leg position GND, internal electric source end 144 couples the internal power cord 118 of switchgear 102, the internal power cord 126 of memory circuitry 104 and the internal power cord 136 of programmable memory circuitry 106, and its inner earth terminal couples the internal interface ground wire 120 of switchgear 102, the internal interface ground wire 128 of memory circuitry 104 and the internal interface ground wire 138 of programmable memory circuitry 106.The bus 110 of switchgear 102 is coupled to memory circuitry component pins hyte 108, control line 116 couples memory circuitry element power supply pin PWR (this embodiment memory circuitry element power supply pin PWR, also can use memory circuitry element grounding leg position GND), bus 112 couples the bus 130 of programmable memory circuitry 106, and bus 114 couples the bus 148 that memory circuitry 104 inner addressing buses and data bus length reconfigure circuit 122.And the bus 130 of programmable memory circuitry 106 couples the bus 112 of switchgear 102, and its control line 132 couples memory circuitry element grounding leg position (this embodiment memory circuitry element grounding leg position GND, also can use memory circuitry element power supply pin PWR), its bus 134 couples the addressing bus of memory circuitry 104 inside and the bus 150 that data bus length reconfigures circuit 122.The bus 148 that memory circuitry 104 inner addressing buses and data bus length reconfigure circuit 122 couples the bus 114 of this switchgear 102, and bus 152 couples memory logic circuit 124.
One-way breakover element fairing 100 its functions are for no matter power supply (positive potential) meets memory circuitry element power supply pin PWR, earth potential (current potential is 0) meets memory circuitry element grounding leg position GND or power supply (positive potential) meets memory circuitry element grounding leg position GND, earth potential (current potential is 0) meets memory circuitry element power supply pin PWR, neither influenced (one-way breakover element fairing is known in memory circuitry element internal power supply, bridge rectifier for example, any person that knows the electronic applications, all there are many different modes to implement, so do not give unnecessary details) at this.And switchgear 102 utilizes control line 116 signal deciding buses, 110 connecting bus 112 or bus 114.Programmable memory circuitry 106 utilizes control line 132 signal deciding write state or output states, when write state, utilize the signal of its bus 130 to do the action stylize, when output state, result after will stylizing exports bus 134 to, addressing bus and the data bus length of delivering to memory circuitry 104 inside reconfigure circuit 122, in order to addressing length (Address Length) and the data length (DataLength) that determines this memory circuitry.Addressing bus and data bus length reconfigure the input signal of circuit 122 according to bus 150, decision total line length of addressing and the configuration of data bus length.124 in memory logic circuit reconfigures the signal that circuit 122 is sent into according to addressing bus and data bus length, makes storage data or reading of data.
According to last example, see also shown in Figure 1, when memory circuitry element application device of the present invention is just connecing, power supply (positive potential) meets memory circuitry element power supply pin PWR, when earth potential (current potential is 0) meets memory circuitry element grounding leg position GND, the control line 116 of switchgear 102 receives signal (this embodiment memory circuitry element power supply pin PWR of logical one at this moment, have the knack of this skill person, should know, also can use memory circuitry element grounding leg position GND to make control line signal), then switchgear 102 cuts switch to bus 112.And the control line 132 of programmable memory circuitry 106 receives signal (this embodiment memory circuitry element grounding leg position GND of logical zero, have the knack of this skill person, should know, also can use memory circuitry element power supply pin PWR to make control line signal), at this moment, programmable memory circuitry 106 promptly enters write state.Because be equivalent to memory circuitry component pins hyte 108 and be electrically coupled to programmable memory circuitry 106 this moment, the action that promptly available memory circuitry component pins hyte 108 input signals stylize to programmable memory circuitry 106 works.
When memory circuitry element application device reversal connection of the present invention, power supply (positive potential) meets memory circuitry element grounding leg position GND, when earth potential (current potential is 0) meets memory circuitry element power supply pin PWR, at this moment, switchgear 102 receives the signal of logical zero, and switch is switched to bus 114.And programmable memory circuitry 106 also receives the state of logical one, owing to before the programmable storer was done to stylize, at this moment, programmable storer 106 exports output bus 134 to according to the result who had before stylized.And the addressing bus of memory circuitry 104 inside and data bus length reconfigure the output signal that the bus 150 of circuit 122 receives programmable storer 106, just determine the configuration (as 1M * 16 or 2M * 8 or 4M * 4... or the like) of total line length of the addressing of memory circuitry and data bus length.Because this moment, the switch of switchgear 102 switches to bus 114, and bus 114 couples the addressing bus of memory circuitry 104 inside and the bus 148 that data bus length reconfigures circuit 122, be equivalent to addressing bus and data bus length that memory circuitry component pins hyte 108 is electrically coupled to memory circuitry 104 inside and reconfigure circuit 122, so just definable memory circuitry component pins hyte 108 is corresponding sets (1M * 16 or 2M * 8 or 4M * 4) do access to storer action.
Above-mentioned memory circuitry element application device, more can between programmable storer and memory circuitry, add latch 254, as shown in Figure 2, can programmable storer output data and storer clock pulse is synchronous, all the other operator schemes are just as described above, so will not give unnecessary details.
Fig. 3 is the memory circuitry element application device circuit calcspar of another embodiment of the present invention, see also shown in Figure 3, it comprises memory circuitry element power supply pin PWR, memory circuitry element grounding leg position GND, one-way breakover element fairing 300, switchgear 302, programmable memory circuitry 304 is (same, the programmable memory circuitry here can comprise once stylize storer OTPMemory or flash memory Flash Memory... or the like, below all be referred to as the programmable memory circuitry, do not give an example in addition), memory circuitry 306 and memory circuitry component pins hyte 308.Wherein, switchgear comprises bus 310, bus 312, bus 314, control line 316, internal power cord 318 and internal interface ground wire 320.Programmable memory circuitry 304 comprises bus 322, bus 324, control line 326, internal power cord 328 and internal interface ground wire 330.Memory circuitry 306 comprises internal power cord 332, internal interface ground wire 334 and signal line group 336.One-way breakover element fairing 300 comprises power input 338, external ground end 340, internal electric source end 342 and inner earth terminal 344.
The power input 338 of one-way breakover element fairing 300 couples memory circuitry element power supply pin PWR, its external ground end 340 couples memory circuitry element grounding leg position GND, internal electric source end 342 couples the internal power cord 332 of memory circuitry 306, the internal power cord 328 of programmable memory circuitry 304 and the internal power cord 318 of switchgear 302, and inner earth terminal 344 couples the internal interface ground wire 334 of memory circuitry 306, the internal interface ground wire 330 of programmable memory circuitry 304 and the internal interface ground wire 320 of switchgear 302.And the bus 310 of switchgear 302 couples memory circuitry component pins hyte 308, its control line 316 couples memory circuitry element power supply pin PWR (this embodiment memory circuitry element power supply pin PWR, also can use memory circuitry element grounding leg position GND) signal line group 336 to the small part of memory circuitry 306 couples bus 312, and bus 314 couples programmable storer 304.The bus 322 of programmable memory circuitry 304 couples the bus 314 of switchgear, its control line 326 couples memory circuitry element grounding leg position GND (this embodiment also can use memory circuitry element power supply pin PWR with memory circuitry element grounding leg position GND) memory circuitry 306 to small part and couples its bus 324.
The function of one-way breakover element fairing 300 is identical with the one-way breakover element fairing 100 of Fig. 1, so do not repeat them here.And switchgear 302 utilizes control line 316 signal deciding buses, 310 connecting bus 312 or bus 314.Programmable memory circuitry 304 can be in order to the defective of patch memory circuit 306.
According to last example, see also shown in Figure 3, when memory circuitry element application device of the present invention is just connecing, power supply (positive potential) meets memory circuitry element power supply pin PWR, when earth potential (current potential is 0) meets memory circuitry element grounding leg position GND, the control line 316 of switchgear 302 receives signal (this embodiment memory circuitry element power supply pin PWR of a logical one at this moment, have the knack of this skill person, should know, also can use memory circuitry element grounding leg position GND to make control line signal), then switchgear 302 cuts switch to bus 312.At this moment, be equivalent to memory circuitry component pins hyte 308 and couple memory circuitry 306, the defective that so just can use the signal wire corresponding relation of memory circuitry component pins hyte 308 and memory circuitry 306 to come testing memory circuit 306 inside.
When memory circuitry element application device reversal connection of the present invention, power supply (positive potential) meets memory circuitry element grounding leg position GND, when earth potential (current potential is 0) meets memory circuitry element power supply pin PWR, at this moment, switchgear 302 receives the signal of logical zero, and switch is switched to bus 314.At this moment, be equivalent to the bus 322 that memory circuitry component pins hyte 308 couples programmable storer 304, the control line 326 of programmable storer 304 receives the signal of logical one, and at this moment, but programmable storer 304 changes write state into.And, just can use memory circuitry component pins hyte 308 that programmable storer 304 is done to stylize before via the defective that tests out memory circuitry 306, with the defective of patch memory circuit 306.
The memory circuitry element application device of above-mentioned Fig. 1 and Fig. 2 can be used another kind of embodiment, sees also shown in Figure 4.Wherein, the difference of Fig. 4 and Fig. 2 is one-way breakover element fairing 300 is removed, the control line of the control line of on-off element and programmable storer is coupled on the same pin position 401 on the memory circuitry component pins hyte pin position 400 and (anyly has the knack of this skill person in addition, should understand, control line still can be connected on the different pin position, decide according to application, so will not give unnecessary details), its operation is similar in appearance to Fig. 1 and Fig. 2, and control difference be in, do not need the positive reversal connection of memory circuitry element, only pin position 401 need be added control signal is programmed programmable storer, reaches to change the inner addressing bus and the effect of data bus length.
As a same reason, Fig. 3 also has another kind of embodiment such as Fig. 5, please refer to shown in Figure 5.Wherein, Fig. 5 is different with Fig. 3 to be in one-way breakover element fairing 300 is removed, in addition, the control line of on-off element/programmable storer is coupled on the same pin position 501 on the memory circuitry component pins hyte pin position 500 (anyly has the knack of this skill person, should understand, control line still can be connected on the different pin position, decide according to application, so will not give unnecessary details), it operate similar in appearance to Fig. 3, and the difference of controlling be in, do not need the positive reversal connection of memory circuitry element, change into pin position 501 adding control signals, with the programmable storer that stylizes, and in order to the patch memory circuit defect.
The above, it only is preferred embodiment of the present invention, be not that the present invention is done any pro forma restriction, though the present invention discloses as above with preferred embodiment, yet be not in order to limit the present invention, any those skilled in the art, in not breaking away from the technical solution of the present invention scope, when the technology contents that can utilize above-mentioned announcement is made a little change or is modified to the equivalent embodiment of equivalent variations, in every case be the content that does not break away from technical solution of the present invention, according to technical spirit of the present invention to any simple modification that above embodiment did, equivalent variations and modification all still belong in the scope of technical solution of the present invention.
Claims (21)
1, a kind of memory circuitry element application device is characterized in that it comprises:
One memory circuitry component pins hyte comprises a memory circuitry element power supply pin, memory circuitry element grounding leg position and many several feets position;
One switchgear, comprise one first bus, one second bus, one the 3rd bus and one first control line, this first bus is coupled to this memory circuitry component pins hyte, this first control line couples this memory circuitry element power supply pin and this two one of memory circuitry element grounding leg position, utilizes this first control line signal to determine this first bus to couple this second bus or the 3rd bus;
One memory circuitry comprises:
One memory logic circuit is in order to storage/reading of data; And
One addressing bus and data bus length reconfigure circuit, comprise one the 4th bus, one the 5th bus and one the 6th bus, the 4th bus is coupled to the 3rd bus, the 6th bus is coupled to this memory logic circuit, according to the input signal of the 5th bus, dispose with decision addressing bus and data bus length, and the signal that the 4th bus is sent into, according to the setting of the 5th bus input, judge and the access of memory logic circuit;
One programmable memory circuitry, comprise one the 7th bus, one second control line and one the 8th bus, the 7th bus couples this second bus, this second control line be coupled to this memory circuitry element power supply pin and this memory circuitry element grounding leg position in the two another, the 8th bus couples the 5th bus, utilize this second control line signal, with decision write state or output state, when write state, the action that the signal work that utilizes the 7th bus to import stylizes, when output state, result's output after will stylizing, via the 8th bus, deliver to this addressing bus and data bus length and reconfigure circuit, in order to determine the addressing length and the data length of this memory circuitry; And
One one-way breakover element fairing, couple this memory circuitry element power supply pin and this memory circuitry element grounding leg position accepting an external power source, and fixedly provide a positive potential and an earthing potential to supply the power supply of all elements of inside respectively from fixing two ends.
2, memory circuitry element application device according to claim 1 is characterized in that this memory circuitry component pins hyte that wherein couples this switchgear is the pin position except memory circuitry element grounding leg position and memory circuitry element power supply pin.
3, memory circuitry element application device according to claim 1 is characterized in that wherein said programmable storer is to be the storer that once stylizes.
4, memory circuitry element application device according to claim 1 is characterized in that wherein said programmable storer is to be flash memory.
5, memory circuitry element application device according to claim 1, it is characterized in that wherein more comprising a latch, comprise one the 9th bus and 1 the tenth bus, the 9th bus couples the 8th bus, the tenth bus is coupled to the 5th bus, in order to do the synchronous of this programmable storer and this memory circuitry signal.
6, a kind of memory circuitry element application device is characterized in that it comprises:
One memory circuitry component pins hyte comprises a memory circuitry element power supply pin, memory circuitry element grounding leg position and many several feets position;
One memory circuitry comprises internal power cord, internal interface ground wire and signal line group;
One switchgear, comprise one first bus, one second bus, one the 3rd bus, one first control line, an internal power cord and an internal interface ground wire, this first bus couples this memory circuitry component pins hyte, this first control line couples this memory circuitry element power supply pin and this two one of memory circuitry element grounding leg position, the signal line group of this memory circuitry to small part couples this second bus, utilize control line signal, couple this second bus or the 3rd bus to determine this first bus;
One programmable memory circuitry, comprise one the 4th bus, one the 5th bus, one second control line, an internal power cord and an internal interface ground wire, the 4th bus is coupled to the 3rd bus, this second control line couple this memory circuitry element power supply pin and this memory circuitry element grounding leg position in the two another, the signal line group of this memory circuitry to small part couples the 5th bus, according to this second control line signal, write or read with decision, in order to repair the defective of this memory circuitry; And
One one-way breakover element fairing, comprise a power input, one external ground end, an one internal electric source end and an inner earth terminal, this power input couples this memory circuitry element power supply pin, this external ground end couples this memory circuitry element grounding leg position, this internal electric source end couples the internal power cord of this memory circuitry, the internal power cord of this programmable memory circuitry and the internal power cord of this switchgear, this inside earth terminal couples the internal interface ground wire of this memory circuitry, the internal interface ground wire of this programmable memory circuitry and the internal interface ground wire of this switchgear are in order to supply the power supply of inner all elements.
7, memory circuitry element application device according to claim 6 is characterized in that the memory circuitry component pins position that wherein couples switchgear is the pin position except this memory circuitry element grounding leg position and this memory circuitry element power supply pin.
8, memory circuitry element application device according to claim 6, when it is characterized in that wherein said memory circuitry component pins hyte is coupled to this memory circuitry through this switchgear, with the defective of this this memory circuitry of integrated circuit component pin bit test.
9, memory circuitry element application device according to claim 6, when it is characterized in that wherein said memory circuitry component pins position is coupled to this programmable storer through this switchgear, this programmable storer is stylized to repair the defective of this memory circuitry in available this memory circuitry component pins position.
10, memory circuitry element application device according to claim 6 is characterized in that wherein said programmable storer is to be the storer that once stylizes.
11, memory circuitry element application device according to claim 6 is characterized in that wherein said programmable storer is to be flash memory.
12, a kind of memory circuitry element application device is characterized in that it comprises:
One memory circuitry component pins hyte comprises many several feets position;
One switchgear, comprise one first bus, one second bus, one the 3rd bus and one first control line, this first bus is coupled to this memory circuitry component pins hyte, this first control line couple this memory circuitry component pins hyte one of them, utilize this first control line signal to determine this first bus to couple this second bus or the 3rd bus;
One memory circuitry comprises:
One memory logic circuit is in order to storage/reading of data; And
One addressing bus and data bus length reconfigure circuit, comprise one the 4th bus, one the 5th bus and one the 6th bus, the 4th bus is coupled to the 3rd bus, the 6th bus is coupled to this memory logic circuit, according to the input signal of the 5th bus, dispose with decision addressing bus and data bus length, and the signal that the 4th bus is sent into, according to the setting of the 5th bus input, judge and the access of memory logic circuit; And
One programmable memory circuitry, comprise one the 7th bus, one second control line and one the 8th bus, the 7th bus couples this second bus, this second control line be coupled to this memory circuitry component pins hyte one of them, the 8th bus couples the 5th bus, utilize this second control line signal, with decision write state or output state, when write state, the action that the signal work that utilizes the 7th bus to import stylizes is when output state, result's output after will stylizing, via the 8th bus, deliver to this addressing bus and data bus length and reconfigure circuit, in order to determine the addressing length and the data length of this memory circuitry.
13, memory circuitry element application device according to claim 12 is characterized in that wherein said programmable storer is to be the storer that once stylizes.
14, memory circuitry element application device according to claim 12 is characterized in that wherein said programmable storer is to be flash memory.
15, memory circuitry element application device according to claim 12, it is characterized in that wherein more comprising a latch, comprise one the 9th bus and 1 the tenth bus, the 9th bus couples the 8th bus, the tenth bus is coupled to the 5th bus, in order to do the synchronous of this programmable storer and this memory circuitry signal.
16, a kind of memory circuitry element application device is characterized in that it comprises:
One memory circuitry component pins hyte comprises a memory circuitry element power supply pin, memory circuitry element grounding leg position and many several feets position;
One memory circuitry comprises signal line group;
One switchgear, comprise one first bus, one second bus, one the 3rd bus, one first control line, this first bus couples this memory circuitry component pins hyte, this first control line couple this memory circuitry component pins hyte one of them, the signal line group of this memory circuitry to small part couples this second bus, utilize control line signal, couple this second bus or the 3rd bus to determine this first bus; And
One programmable memory circuitry, comprise one the 4th bus, one the 5th bus, one second control line, this second control line couple this memory circuitry component pins hyte one of them, the 4th bus is coupled to the 3rd bus, the signal line group of this memory circuitry to small part couples the 5th bus, according to this second control line signal, whether write with decision, according to the defective of the data that write with the patch memory circuit.
17, memory circuitry element application device according to claim 16 is characterized in that the memory circuitry component pins position that wherein couples switchgear is the pin position except this memory circuitry element grounding leg position and this memory circuitry element power supply pin.
18, memory circuitry element application device according to claim 16, when it is characterized in that wherein said memory circuitry component pins hyte is coupled to this memory circuitry through this switchgear, the defective of available this this memory circuitry of integrated circuit component pin bit test.
19, memory circuitry element application device according to claim 16, when it is characterized in that wherein said memory circuitry component pins position is coupled to this programmable storer through this switchgear, this programmable storer is stylized to repair the defective of this memory circuitry in available this memory circuitry component pins position.
20, memory circuitry element application device according to claim 16 is characterized in that wherein said programmable storer is to be the storer that once stylizes.
21, memory circuitry element application device according to claim 16 is characterized in that wherein said programmable storer is to be flash memory.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100634915A CN100433178C (en) | 2005-04-11 | 2005-04-11 | Memory circuit element application apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2005100634915A CN100433178C (en) | 2005-04-11 | 2005-04-11 | Memory circuit element application apparatus |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1848289A CN1848289A (en) | 2006-10-18 |
| CN100433178C true CN100433178C (en) | 2008-11-12 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2005100634915A Expired - Fee Related CN100433178C (en) | 2005-04-11 | 2005-04-11 | Memory circuit element application apparatus |
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| Country | Link |
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| CN (1) | CN100433178C (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5016223A (en) * | 1990-04-17 | 1991-05-14 | Mitsubishi Denki Kabushiki Kaisha | Memory card circuit |
| CN1344028A (en) * | 1996-03-08 | 2002-04-10 | 株式会社日立制作所 | Semiconductor integrated circuit device |
| US20030048670A1 (en) * | 2001-06-01 | 2003-03-13 | Stmicroelectronics S.R.L. | Output buffer for a nonvolatile memory with output signal switching noise reduction, and nonvolatile memory comprising the same |
-
2005
- 2005-04-11 CN CNB2005100634915A patent/CN100433178C/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5016223A (en) * | 1990-04-17 | 1991-05-14 | Mitsubishi Denki Kabushiki Kaisha | Memory card circuit |
| CN1344028A (en) * | 1996-03-08 | 2002-04-10 | 株式会社日立制作所 | Semiconductor integrated circuit device |
| US20030048670A1 (en) * | 2001-06-01 | 2003-03-13 | Stmicroelectronics S.R.L. | Output buffer for a nonvolatile memory with output signal switching noise reduction, and nonvolatile memory comprising the same |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1848289A (en) | 2006-10-18 |
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