[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

CN100439420C - 包含锗的硅氧烷基树脂和使用该树脂的半导体器件用间层绝缘膜 - Google Patents

包含锗的硅氧烷基树脂和使用该树脂的半导体器件用间层绝缘膜 Download PDF

Info

Publication number
CN100439420C
CN100439420C CNB200410069858XA CN200410069858A CN100439420C CN 100439420 C CN100439420 C CN 100439420C CN B200410069858X A CNB200410069858X A CN B200410069858XA CN 200410069858 A CN200410069858 A CN 200410069858A CN 100439420 C CN100439420 C CN 100439420C
Authority
CN
China
Prior art keywords
siloxane
based resin
insulating film
monomer
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CNB200410069858XA
Other languages
English (en)
Other versions
CN1576299A (zh
Inventor
李相均
宣钟白
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of CN1576299A publication Critical patent/CN1576299A/zh
Application granted granted Critical
Publication of CN100439420C publication Critical patent/CN100439420C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329—Insulating materials
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
    • C08G77/48—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule in which at least two but not all the silicon atoms are connected by linkages other than oxygen atoms
    • C08G77/50—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule in which at least two but not all the silicon atoms are connected by linkages other than oxygen atoms by carbon linkages
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08G—MACROMOLECULAR COMPOUNDS OBTAINED OTHERWISE THAN BY REACTIONS ONLY INVOLVING UNSATURATED CARBON-TO-CARBON BONDS
    • C08G77/00—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule
    • C08G77/48—Macromolecular compounds obtained by reactions forming a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon in the main chain of the macromolecule in which at least two but not all the silicon atoms are connected by linkages other than oxygen atoms
    • C08G77/58—Metal-containing linkages
    • C—CHEMISTRY; METALLURGY
    • C08—ORGANIC MACROMOLECULAR COMPOUNDS; THEIR PREPARATION OR CHEMICAL WORKING-UP; COMPOSITIONS BASED THEREON
    • C08L—COMPOSITIONS OF MACROMOLECULAR COMPOUNDS
    • C08L83/00—Compositions of macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon only; Compositions of derivatives of such polymers
    • C08L83/14—Compositions of macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon with or without sulfur, nitrogen, oxygen or carbon only; Compositions of derivatives of such polymers in which at least two but not all the silicon atoms are connected by linkages other than oxygen atoms
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D183/00—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers
    • C09D183/14—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers in which at least two but not all the silicon atoms are connected by linkages other than oxygen atoms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3121—Layers comprising organo-silicon compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3121—Layers comprising organo-silicon compounds
    • H01L21/3122—Layers comprising organo-silicon compounds layers comprising polysiloxane compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/314—Inorganic layers
    • H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
    • H01L21/31695—Deposition of porous oxides or porous glassy oxides or oxide based porous glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/31504—Composite [nonstructural laminate]
    • Y10T428/31652—Of asbestos
    • Y10T428/31663—As siloxane, silicone or silane

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Manufacturing & Machinery (AREA)
  • Health & Medical Sciences (AREA)
  • Polymers & Plastics (AREA)
  • Medicinal Chemistry (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Materials Engineering (AREA)
  • Wood Science & Technology (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Silicon Polymers (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

本文披露含有锗的硅氧烷基树脂和使用该树脂形成的半导体器件用间层绝缘膜。除优异的机械性能以外，硅氧烷基树脂具有低介电常数使得它们是半导体器件的互连层之间绝缘膜的有用材料。

Description

包含锗的硅氧烷基树脂和使用该树脂的半导体器件用间层绝缘膜
发明背景
本非临时申请在35U.S.C.§119(a)下要求2003年7月14日提交的韩国专利申请2003-47731的优先权，在此引入作为参考。
发明领域
本发明涉及硅氧烷基树脂(siloxane-based resin)和使用该树脂形成的半导体器件用间层绝缘膜(interlayer insulating film)。更具体地，本发明涉及包含锗的硅氧烷基树脂和在半导体器件的互连层之间用作绝缘膜的树脂膜。
现有技术
当多级集成电路器件的电路密度增加时，不断地要求降低半导体器件的特征尺寸。半导体器件特征尺寸降低的主要障碍是由于互连层之间串扰的R(电阻)×C(电容)延迟。此问题的解决方案是减少间层绝缘膜的介电常数以尽可能多地降低R×C延迟。故存在各种尝试以提供具有低介电常数的绝缘膜。
通常，在半导体器件的领域中，由CVD(化学气相沉积)方法使用介电常数为4.0的SiO2形成间层绝缘膜。然而，US专利3615272、4399266、4756977和4999397公开了由SOD(旋上沉积(spin on deposition))方法使用介电常数为2.5-3.1的、以及具有良好的平坦化(planarization)性能的聚硅倍半氧烷形成绝缘膜。
氢硅倍半氧烷及其制备方法是本领域公知的。例如，US专利3615272公开了完全缩合，可溶的氢硅倍半氧烷树脂的制备方法，该方法包括如下步骤：在硫酸介质中缩合三氯硅烷和采用水或含水硫酸洗涤获得的树脂。同样，US专利5010159公开了合成可溶的缩合氢硅倍半氧烷树脂的方法，该方法包括如下步骤：在含芳族硫酸水合物的水解介质中水解氢硅烷和使获得的树脂与中和剂接触。US专利6232424描述了具有优异溶液稳定性的高度可溶的硅树脂组合物，在水和催化剂存在下通过水解和缩聚四烷氧基硅烷、有机硅烷和有机三烷氧基硅烷单体制备该组合物。US专利6000339描述了二氧化硅基化合物可用于改进对氧等离子体的耐性和物理性能以及涂布膜的厚度，在水和催化剂存在下通过反应选自烷氧基硅烷、含氟烷氧基硅烷和烷基烷氧基硅烷的单体与钛或锆醇盐化合物，获得该二氧化硅基化合物。US专利5853808描述了可以通过含有β-取代烷基的有机硅烷的水解和缩聚，获得用于形成富含SiO2的陶瓷涂层的硅氧烷和硅倍半氧烷聚合物。同时，EP0997497A1公开了烷氧基硅烷的某些结合物的水解和缩聚可提供用于绝缘膜的树脂材料，该烷氧基硅烷包括单、二、三、四烷氧基硅烷和三烷氧基硅烷二聚体。
发明概述
本发明的特征为生产具有优异机械性能以及非常低介电常数的硅氧烷基树脂，以及使用硅氧烷基树脂形成低介电绝缘膜。
也就是说，本发明提供具有优异机械性能的硅氧烷基树脂，其特征在于将能够进行溶胶-凝胶聚合的含锗单体引入以增加机械性能，而不降低硅氧烷基树脂的介电常数。与硅氧烷基单体相比，锗单体密度为硅氧烷基单体密度的两倍，因此可提供机械性能的改进。
本发明的一个方面涉及一种硅氧烷基树脂，所述的硅氧烷基树脂是在酸或碱性催化剂和水存在下，在有机溶剂中通过水解和缩聚通式1的第一单体和通式2的第二单体而制备：
通式1
Figure C20041006985800051
其中，
R1是氢原子、C1-3烷基或C6-15芳基；
X1、X2和X3独立地是C1-3烷基、C1-10烷氧基或卤素原子，条件是它们中的至少一个可水解；
m是0-10的整数；和
p是3-8的整数，和
通式2
(R2)4-aGe(X4)a
其中，
R2是氢原子、C1-3烷基或C6-15芳基；
X4是C1-10烷氧基或卤素原子；和
a是1-4的整数。
本发明的另一方面涉及一种在半导体器件的互连层之间形成绝缘膜的方法，方法包括如下步骤：通过在有机溶剂中溶解本发明的硅氧烷基树脂提供树脂溶液；采用树脂溶液涂敷硅晶片；和热固化生成的涂布膜。
本发明的另一方面涉及使用本发明硅氧烷基树脂制备的间层绝缘膜。
从以下描述中，本发明将成功地达到本发明的所有上述特征和其他特征。
发明详述
本发明提供介电常数为3.0或更小的硅氧烷基树脂，其通过通式1的环状硅氧烷单体和通式2的含锗化合物的缩聚而制备：
通式1
其中，
R1是氢原子、C1-3烷基或C6-15芳基；
X1，X2和X3各自独立地是C1-3烷基、C1-10烷氧基或卤素原子，条件是它们中的至少一个可水解；
m是0-10的整数；和
p是3-8的整数，和
通式2
(R2)4-aGe(X4)a
其中，
R2是氢原子、C1-3烷基或C6-15芳基；
X4是C1-10烷氧基或卤素原子；和
a是1-4的整数。
在本发明硅氧烷基树脂的制备中，以1∶99-99∶1的摩尔比混合通式1的单体和通式2的单体。
用于制备本发明硅氧烷基树脂的优选酸或碱催化剂可以例示为，但不限于，盐酸、硝酸、苯磺酸、草酸、甲酸、氢氧化钾、氢氧化钠、三乙胺、碳酸氢钠和吡啶。使用这样的催化剂使得催化剂与单体的比例为0.00001∶1-10∶1。
在本发明硅氧烷基树脂的制备中，每1mol单体使用1-1000mol的水，使得水与单体的摩尔比为1∶1-100∶1。
用于本发明硅氧烷基树脂的有机溶剂的非限制性例子包括脂族烃溶剂如己烷；芳族烃溶别如茴香醚、均三甲苯(mesitylene)和二甲苯；酮基溶剂如甲基异丁基酮、1-甲基-2-吡咯烷酮和丙酮；醚基溶剂如环己酮、四氢呋喃和异丙醚；乙酸酯基溶剂如乙酸乙酯、乙酸丁酯和丙二醇甲基醚乙酸酯；醇基溶剂如异丙醇和丁醇；酰胺基溶剂如二甲基乙酰胺和二甲基甲酰胺；硅基溶剂；及其混合物。
根据本发明，水解和缩聚反应在0-200℃的温度下进行0.1-100小时，优选为5-48小时。
这样制备的硅氧烷基树脂的Mw为3,000-300,000。
本发明也提供使用本发明硅氧烷基树脂形成半导体器件用间层绝缘膜的方法。绝缘膜具有小于3.0的低介电常数并显示优异的机械性能和耐热性能。根据本发明，可以由如下方式获得这样的绝缘膜：采用在有机溶剂中包含本发明硅氧烷基树脂的溶液涂敷硅晶片和热固化获得的涂布膜。即，将溶于有机溶剂的本发明硅氧烷基树脂涂敷到基材上。然后，可以通过简单的空气干燥或在如下热固化步骤开始，通过使基材经历真空条件或在200℃或更低的温度下经历适度加热而蒸发有机溶剂，使得树脂涂布膜可以沉积在基材表面上。其后，通过在150-600℃，优选200-450℃的温度下加热基材1-150分钟固化树脂涂布膜，以提供不溶的、无裂缝膜。在此使用的“无裂缝膜”表示在1000X放大倍数下，用光学显微镜没有观察到任何裂缝的膜。在此使用的“不溶性膜”表示基本不溶于任何溶剂的膜，所述任何溶剂描述为用于溶解本发明的硅氧烷基树脂。
根据本发明，成孔剂(porogen)与本发明硅氧烷基树脂的结合使用可进一步降低最终绝缘膜的介电常数到2.50或更小。在此使用的“成孔剂”表示任何产生孔的化合物。在使用成孔剂的情况下，要求另外步骤来将树脂膜加热到成孔剂的分解温度上，使得成孔剂分解。
用于本发明的成孔剂可以是本领域公知的任何产生孔的化合物，它们可以例示为，但不限于，环糊精、聚己内酯及其衍生物。将成孔剂与本发明的硅氧烷基树脂混合，使得成孔剂与树脂的重量比为1∶99-70∶30，其中成孔剂和树脂两者为固体粉末的形式。
用于溶解硅氧烷基树脂或成孔剂以提供液体涂层组合物的优选有机溶剂可以例示为，但不限于，脂族烃溶剂如己烷；芳族烃溶剂如茴香醚、均三甲苯和二甲苯；酮基溶剂如甲基异丁基酮、1-甲基-2-吡咯烷酮和丙酮；醚基溶剂如环己酮、四氢呋喃和异丙醚；乙酸酯基溶剂如乙酸乙酯、乙酸丁酯和丙二醇甲基醚乙酸酯；醇基溶剂如异丙醇和丁醇；酰胺基溶剂如二甲基乙酰胺和二甲基甲酰胺；硅基溶剂；及其混合物。
在液体涂层组合物的制备中，包含硅氧烷基树脂和成孔剂的固体组分重量比优选为5-70wt％，基于总组合物。应当以足以均匀地将包含硅氧烷基树脂和成孔剂的固体组分均匀地涂敷到晶片表面上的数量使用有机溶剂。因此，有机溶剂应当等于液体涂层组合物的20-99.9wt％，优选70-95wt％。如果液体涂层组合物的有机溶剂含量小于20wt％，部分硅氧烷基树脂未溶解。另一方面，如果有机溶剂含量大于99.9wt％，最终的树脂膜薄至1000埃或更小。
在本发明中，可以根据本领域中公知的各种涂敷方法，将这样制备的液体涂层组合物涂敷到硅晶片上。用于本发明的涂敷方法的非限制性例子包括旋涂、浸涂、喷涂、流动涂敷和丝网印刷(screen-printing)，而旋涂是最优选的。
以下，参考如下实施例更详细描述本发明。然而，给出这些实施例用于说明的目的，而不解释为限制本发明的范围。
实施例1：合成单体
实施例1-1：合成环状硅氧烷基单体(A)
单体(A)
Figure C20041006985800091
向烧瓶中引入10.0g(29.014mmol)2，4，6，8-四甲基-2，4，6，8-四乙烯基环四硅氧烷和0.164g铂(0)-1，3-二乙烯基-1，1，3，3-四甲基二硅氧烷配合物(二甲苯中的溶液)，然后采用300ml乙醚稀释。其后，将烧瓶冷却到-78℃，向其中缓慢加入17.29g(127.66mmol)三氯硅烷，将它缓慢升温到室温。反应在室温下持续40小时，在约0.1托的减压下从反应混合物除去挥发性材料。向反应混合物中加入100ml己烷并搅拌1hr，随后通过次乙酰塑料(celite)过滤以提供无色，透明溶液。然后在减压下从溶液除去己烷以提供由如下通式表示的液体化合物：
采用500ml四氢呋喃稀释10.0g(11.28mmol)该液体化合物，向其中加入13.83g(136.71mmol)三乙胺。其后，将混合物冷却到-78℃，向其中缓慢加入4.38g(136.71mmol)甲醇，将它缓慢升温到室温。反应在室温下持续15小时和通过次乙酰塑料过滤，然后在约0.1托的减压下从获得的滤液除去挥发性材料。随后，将100ml戊烷加入到剩余的滤液中并搅拌1hr，随后通过次乙酰塑料过滤。向滤液中加入5g活性炭并搅拌10小时。将从搅拌溶液过滤获得的滤液经历减压以从中除去己烷和提供为无色液体的单体(A)。溶于CDCl3的此单体的NMR分析的结果如下：
1H NMR(300MHz)数据；
δ0.09(s，12H，4×-CH3)，
0.52-0.64(m，16H，4×-CH2CH2-)，
3.58(s，36H，4×-[OCH3]3)
实施例1-2：合成锗基单体(B)
单体(B)
CH3Ge(OCH3)3
向烧瓶中引入19.3g(0.1mol)三氯甲基锗，然后采用500ml四氢呋喃稀释。其后，将烧瓶冷却到0℃，向其中加入35.35g(0.35mol)三乙胺，随后缓慢加入11.2g(0.35mol)甲醇。然后将反应温度缓慢升高到室温。反应在室温下持续15小时。在反应完成时，将反应混合物通过次乙酰塑料过滤，在约0.1托的减压下从滤液除去挥发性材料。向剩余的滤液中加入100ml己烷并搅拌1hr，随后通过次乙酰塑料过滤。然后在减压下从滤液除去己烷以提供无色液体。简单蒸馏该液体，获得无色液体单体(B)。溶于CDCl3的此单体的NMR分析的结果如下：
1H NMR(300MHz)数据；δ3.6(s，3H)
实施例1-3：合成锗基单体(C)
单体(C)
CH3Ge(OCH2CH3)3
根据与以上实施例1-2中相同的方式进行实施例1-3，区别在于采用乙醇代替甲醇。
将这样制备的单体溶于CDCl3中，在CDCl3中单体(C)的NMR分析的结果如下：
1H NMR(300MHz)数据；δ1.2(t，6H，3×-CH3)，δ3.8(q，9H，3×-CH2)
实施例1-4：合成锗基单体(D)
单体(D)
Ge(OCH2CH3)4
向烧瓶中引入21.4g(0.1mol)四氯锗，然后采用500ml四氢呋喃稀释。其后，将烧瓶冷却到0℃，向其中加入45.45g(0.45mol)三乙胺，随后缓慢加入14.4g(0.45mol)甲醇。然后将反应温度缓慢升高到室温。反应在室温下持续15小时。在反应完成时，将反应混合物通过次乙酰塑料过滤，在约0.1托的减压下从滤液除去挥发性材料。向剩余的滤液中加入100ml己烷并搅拌1hr，随后通过次乙酰塑料过滤。然后在减压下从滤液除去己烷以提供无色液体。简单蒸馏该液体，获得无色液体单体(D)。溶于CDCl3的此单体的NMR分析的结果如下：
1H NMR(300MHz)数据；δ1.2(t，8H，4×-CH3)，δ3.8(q，12H，4×-CH2)
实施例2：合成基体树脂
将从以上实施例1获得的环状硅氧烷单体(A)和线性硅氧烷单体(B)-(D)的一种分别根据下表1定量化并引入烧瓶中，随后采用15倍四氢呋喃稀释。随后，在冷却烧瓶到-78℃之后，向其中缓慢加入确定数量的去离子水和HCl。然后，将烧瓶升温到70℃，在该温度下将烧瓶放置20小时使得反应可以继续。在反应完成时，将反应混合物转移到分液漏斗中，随后加入乙醚和四氢呋喃(与先前稀释单体用的四氢呋喃一样多)。然后，进行3次洗涤，每次约采用和分液漏斗中总溶液十分之一的水。在洗涤之后，从剩余的溶液蒸发挥发性材料以提供白色粉状聚合物。将粉末完全溶于少量丙酮以获得透明溶液，通过0.2μm注射器过滤器过滤以除去杂质以提供透明滤液，然后向滤液中缓慢加入去离子水。结果是，形成白色粉状材料，然后将该材料从液相(丙酮和水的混合溶液)分离并在0-20℃的温度下在约0.1托的减压下干燥10小时，以提供分级的硅氧烷基树脂。
表1
Figure C20041006985800111
实施例3：测量薄膜厚度和折光率
将从以上实施例2获得的硅氧烷基树脂和它们与七(2，3，6-三-O-甲氧基)-β-环糊精的混合物分别溶于丙二醇甲基醚乙酸酯(PGMEA)中，使得在获得的液体涂层组合物中固体物质的最终浓度为25wt％。然后保持3000rpm的旋转速率，将每种涂料组合物旋涂到硅晶片上30秒。在氮气气氛中，将涂敷的晶片在热板上进行随后的软焙烘(在100℃下1min和在250℃下另一分钟)，以足够地蒸发有机溶剂。其后，在真空条件下以3℃/min的速率将温度升高到420℃，在该温度下允许涂布膜固化1hr以提供试样。
分析这样制备的每个试样的膜厚度和折光率。分别通过使用廓线仪(profiler)和棱镜耦合器(prism coupler)在每个试样五个不同点测量膜厚度和折光率。平均厚度和折光率以及它们的均匀性见表3。
表2
Figure C20041006985800121
实施例4：测量薄膜介电常数
采用3000埃热氧化硅膜涂敷由硼掺杂的P型硅晶片，随后使用金属蒸发器随后沉积100埃钛层，2000埃铝层和100埃钛层。根据以上实施例3中相同的方式，以表3的组成在这些晶片每个的表面上形成树脂膜。随后，通过硬质掩膜在树脂膜上沉积1m直径的圆形电极(circular electrode)，该电极由100埃厚的钛层和5000埃厚的铝层组成，以提供具有MIM(金属-绝缘体-金属)结构的试样。在100kHz下使用具有微调节器6200探针站的PRECISION LCR METER(HP4284A)，将这样制备的试样进行电容测量。从如下公式计算每个测试膜的介电常数，其中通过使用椭率计获得“d”数值：
k＝C×d/ε0×A
其中，
k：介电常数
C：电容
ε0：真空中的介电常数
d：低介电薄膜的厚度
A：电极的接触面积
表3
Figure C20041006985800132
Figure C20041006985800141
实施例5：测量薄膜硬度和模量
使用Nanoindenter TI(MTS Co.)分析以上实施例4中制备的试样的硬度和弹性模量。对每个试样的树脂膜刻痕直到刻痕深度达到它总厚度的10％。在此时，为保证此测量的可靠性，每个试样刻痕6个点，取平均硬度和模量。结果见表5。
表4
Figure C20041006985800142
Figure C20041006985800151
比较例1：合成硅氧烷基树脂
将环状硅氧烷单体(A)和甲基三甲氧基硅烷单体(B’)或四乙氧基硅烷单体(D’)的一种引入烧瓶中，随后采用15倍四氢呋喃稀释。随后，在冷却烧瓶到-78℃之后，向其中缓慢加入确定数量的去离子水和HCl。然后，将烧瓶升温到70℃，在该温度下将烧瓶放置20小时使得反应可以继续。在反应完成时，将反应混合物转移到分液漏斗中，随后加入乙醚和四氢呋喃(与先前稀释单体用的四氢呋喃一样多)。然后，进行3次洗涤，每次约采用和分液漏斗中总溶液十分之一的水。在洗涤之后，从剩余的溶液蒸发挥发性材料以提供白色粉状聚合物。将粉末完全溶于少量丙酮以获得透明溶液，并通过0.2μm注射器过滤器过滤以除去杂质以提供透明滤液，然后向滤液中缓慢加入去离子水。结果是，形成白色粉状材料，然后将该材料从液相(丙酮和水的混合溶液)分离和在0-20℃的温度下在约0.1托的减压下干燥10小时，以提供硅氧烷基树脂。结果见下表5。
表5
Figure C20041006985800161
比较例2：测量介电常数
使用与以上实施例3相同的方式分析以上比较例1中制备的试样的厚度和折光率，然后使用与以上实施例4相同的方式分析介电常数。结果见表6。
表6
Figure C20041006985800162
Figure C20041006985800171
比较例3：测量硬度和模量
使用与以上实施例3相同的方式分析以上比较例1中制备的试样的厚度和折光率，然后使用与以上实施例5相同的方式分析硬度和模量。结果见表7。
表7
Figure C20041006985800172
Figure C20041006985800181
如从实施例和比较例显然的那样，含有锗的硅氧烷基树脂具有相对高的硬度和模量与低介电常数。
尽管为说明的目的已经披露了本发明的优选实施方案，但是在不违背如所附权利要求中披露的本发明范围和精神的情况下，本领域技术人员将理解各种改性、添加和替代是可能的。

Claims (14)

1.一种硅氧烷基树脂，所述硅氧烷基树脂是在酸或碱性催化剂和水存在下，在有机溶剂中通过水解和缩聚通式1的第一单体和通式2的第二单体制备的：
通式1
其中，
R1是氢原子、C1-3烷基或C6-15芳基；
X1，X2和X3各自独立地是C1-3烷基、C1-10烷氧基或卤素原子，条件是它们中的至少一个可水解；
m是0-10的整数；和
p是3-8的整数，和
通式2
(R2)4-aGe(X4)a
其中，
R2是氢原子、C1-3烷基或C6-15芳基；
X4是C1-10烷氧基或卤素原子；和
a是1-4的整数。
2.根据权利要求1的硅氧烷基树脂，其中所述通式1的第一单体与通式2的第二单体的摩尔比是1∶99-99∶1。
3.根据权利要求1的硅氧烷基树脂，其中所述树脂的Mw是3,000-300,000。
4.根据权利要求1的硅氧烷基树脂，具有3或更小的介电常数。
5.一种在半导体器件的互连层之间形成绝缘膜的方法，方法包括如下步骤：
通过在有机溶剂中溶解根据权利要求1的硅氧烷基树脂，提供液体涂层组合物；
采用液体涂层组合物涂敷硅晶片以形成涂布膜；和
热固化涂布膜。
6.根据权利要求5的方法，其中将成孔剂与硅氧烷基树脂混合使得成孔剂与树脂的重量比为1∶99-70∶30。
7.根据权利要求5的方法，其中将成孔剂与硅氧烷基树脂混合，包含硅氧烷基树脂和成孔剂的组合物的固体组分的重量比是5-70wt％，基于总组合物。
8.根据权利要求6或7的方法，其中成孔剂是环糊精、聚己内酯或其衍生物。
9.根据权利要求5的方法，其中在150-600℃下进行所述的热固化1-150分钟。
10.根据权利要求5的方法，其中绝缘膜的介电常数为3或更小。
11.一种用于半导体器件的间层绝缘膜，包括根据权利要求1的硅氧烷基树脂。
12.根据权利要求11的间层绝缘膜，其中通过使用成孔剂在整个膜中形成微孔。
13.权利要求11的间层绝缘膜，具有3或更小的介电常数。
14.一种包含间层绝缘膜的半导体器件，该间层绝缘膜包括权利要求1的硅氧烷基树脂。
CNB200410069858XA 2003-07-14 2004-07-14 包含锗的硅氧烷基树脂和使用该树脂的半导体器件用间层绝缘膜 Expired - Fee Related CN100439420C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR47731/2003 2003-07-14
KR10-2003-0047731A KR100504291B1 (ko) 2003-07-14 2003-07-14 게르마늄을 포함하는 실록산계 수지 및 이를 이용한반도체 층간 절연막 형성 방법
KR47731/03 2003-07-14

Publications (2)

Publication Number Publication Date
CN1576299A CN1576299A (zh) 2005-02-09
CN100439420C true CN100439420C (zh) 2008-12-03

Family

ID=36611978

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB200410069858XA Expired - Fee Related CN100439420C (zh) 2003-07-14 2004-07-14 包含锗的硅氧烷基树脂和使用该树脂的半导体器件用间层绝缘膜

Country Status (5)

Country Link
US (3) US7057002B2 (zh)
EP (1) EP1498443A1 (zh)
JP (1) JP2005036228A (zh)
KR (1) KR100504291B1 (zh)
CN (1) CN100439420C (zh)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100645682B1 (ko) * 2003-04-17 2006-11-13 주식회사 엘지화학 유기실록산 수지 및 이를 이용한 절연막
KR100589123B1 (ko) * 2004-02-18 2006-06-14 학교법인 서강대학교 기공형성용 템플레이트로 유용한 사이클로덱스트린유도체와 이를 이용하여 제조된 저유전체
US8901268B2 (en) * 2004-08-03 2014-12-02 Ahila Krishnamoorthy Compositions, layers and films for optoelectronic devices, methods of production and uses thereof
US7892648B2 (en) 2005-01-21 2011-02-22 International Business Machines Corporation SiCOH dielectric material with improved toughness and improved Si-C bonding
KR100775100B1 (ko) 2005-03-16 2007-11-08 주식회사 엘지화학 절연막 형성용 조성물, 이로부터 제조되는 절연막, 및 이를포함하는 전기 또는 전자 소자
KR100824037B1 (ko) 2005-03-16 2008-04-21 주식회사 엘지화학 절연막 형성용 기공형성제 조성물, 이를 포함하는 절연막형성용 조성물, 이를 이용한 절연막의 제조 방법, 및이로부터 제조되는 절연막
WO2008097877A2 (en) * 2007-02-08 2008-08-14 Dow Corning Corporation Heteroelement siloxane compounds and polymers
US8557877B2 (en) 2009-06-10 2013-10-15 Honeywell International Inc. Anti-reflective coatings for optically transparent substrates
KR100976461B1 (ko) * 2009-12-30 2010-08-17 제일모직주식회사 봉지재용 투광성 수지 및 이를 포함하는 전자 소자
JP2011241291A (ja) * 2010-05-18 2011-12-01 Tosoh Corp ポリ環状シロキサン、その製造方法、およびその用途
US8864898B2 (en) 2011-05-31 2014-10-21 Honeywell International Inc. Coating formulations for optical elements
EP3194502A4 (en) 2015-04-13 2018-05-16 Honeywell International Inc. Polysiloxane formulations and coatings for optoelectronic applications
CN109776840B (zh) * 2019-01-30 2021-08-24 武汉华星光电半导体显示技术有限公司 柔性盖板及其制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001009253A1 (de) * 1999-07-28 2001-02-08 Sunyx Surface Nanotechnologies Gmbh Verwendung selbstorganisierender beschichtungen auf basis fluorfreier polyfunktioneller organosilane zur herstellung ultrahydrophober beschichtungen
US20020098279A1 (en) * 2000-11-29 2002-07-25 Lyu Yi Yeol Method for forming insulating film between interconnect layers in microelectronic devices
EP1245642A1 (en) * 2001-03-27 2002-10-02 Samsung Electronics Co., Ltd. Siloxane-based resin and method for forming an insulating film between interconnecting layers in wafers

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3615272A (en) 1968-11-04 1971-10-26 Dow Corning Condensed soluble hydrogensilsesquioxane resin
DE3173441D1 (en) 1980-08-26 1986-02-20 Japan Synthetic Rubber Co Ltd Ladder-like lower alkylpolysilsesquioxanes and process for their preparation
US4756977A (en) 1986-12-03 1988-07-12 Dow Corning Corporation Multilayer ceramics from hydrogen silsesquioxane
US4999397A (en) 1989-07-28 1991-03-12 Dow Corning Corporation Metastable silane hydrolyzates and process for their preparation
US5010159A (en) 1989-09-01 1991-04-23 Dow Corning Corporation Process for the synthesis of soluble, condensed hydridosilicon resins containing low levels of silanol
WO1996000758A1 (fr) 1994-06-30 1996-01-11 Hitachi Chemical Company, Ltd. Matiere pour la formation d'une couche mince isolante revetue a base de silice, son procede de fabrication, couche isolante a base de silice, dispositif a semi-conducteurs, et procede de fabrication de ce dispositif
JPH11512474A (ja) 1995-09-12 1999-10-26 ゲレスト インコーポレーテツド ベータ−置換オルガノシルセスキオキサンおよびその使用法
ATE280806T1 (de) 1997-07-15 2004-11-15 Asahi Chemical Ind Zusammensetzungen aus alkoxysilan und organischem polymer zur herstellung von dünnen isolierenden schichten und deren verwendung
DE19814060A1 (de) * 1998-03-30 1999-10-07 Bayer Ag Borhaltige Mischungen, Hybridmaterialien und Beschichtungen
US6232424B1 (en) 1999-12-13 2001-05-15 Dow Corning Corporation Soluble silicone resin compositions having good solution stability
DE10196026B4 (de) * 2000-04-04 2011-02-10 Asahi Kasei Kabushiki Kaisha Überzugs-Zusammensetzung, dünner Film, zur Verwendung des dünnen Films und Verfahren zur Herstellung eines dünnen porösen Kieselsäure-Films
US6623711B2 (en) * 2001-03-27 2003-09-23 Samsung Electronics Co., Ltd. Siloxane-based resin and method for forming insulating film between interconnect layers in semiconductor devices by using the same
KR100488347B1 (ko) * 2002-10-31 2005-05-10 삼성전자주식회사 실록산계 수지 및 이를 이용한 반도체 층간 절연막의형성방법
KR100506695B1 (ko) * 2003-06-02 2005-08-08 삼성전자주식회사 실록산계 수지 및 이를 이용한 반도체 층간 절연막

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001009253A1 (de) * 1999-07-28 2001-02-08 Sunyx Surface Nanotechnologies Gmbh Verwendung selbstorganisierender beschichtungen auf basis fluorfreier polyfunktioneller organosilane zur herstellung ultrahydrophober beschichtungen
US20020098279A1 (en) * 2000-11-29 2002-07-25 Lyu Yi Yeol Method for forming insulating film between interconnect layers in microelectronic devices
EP1245642A1 (en) * 2001-03-27 2002-10-02 Samsung Electronics Co., Ltd. Siloxane-based resin and method for forming an insulating film between interconnecting layers in wafers

Also Published As

Publication number Publication date
US20050014009A1 (en) 2005-01-20
US7057002B2 (en) 2006-06-06
US7198823B2 (en) 2007-04-03
JP2005036228A (ja) 2005-02-10
CN1576299A (zh) 2005-02-09
EP1498443A1 (en) 2005-01-19
KR20050008048A (ko) 2005-01-21
US7374820B2 (en) 2008-05-20
KR100504291B1 (ko) 2005-07-27
US20070154725A1 (en) 2007-07-05
US20060141269A1 (en) 2006-06-29

Similar Documents

Publication Publication Date Title
US7294584B2 (en) Siloxane-based resin and a semiconductor interlayer insulating film using the same
US7374820B2 (en) Siloxane-based resin containing germanium and an interlayer insulating film for a semiconductor device using the same
US6743471B2 (en) Process for preparing insulating material having low dielectric constant
EP1245642B1 (en) Siloxane-based resin and method for forming an insulating film between interconnecting layers in wafers
US6623711B2 (en) Siloxane-based resin and method for forming insulating film between interconnect layers in semiconductor devices by using the same
EP1510537B1 (en) Siloxane-based resin and interlayer insulating film formed using the same
US7470634B2 (en) Method for forming interlayer dielectric film for semiconductor device by using polyhedral molecular silsesquioxane
CN100393730C (zh) 多官能环状硅酸盐（或酯）化合物，由该化合物制得的基于硅氧烷的聚合物和使用该聚合物制备绝缘膜的方法
EP1484354B1 (en) Siloxane-based resin and interlayer insulating film for semiconductor device made using the same
KR100554327B1 (ko) 실록산계 수지 및 이를 이용한 반도체 층간 절연막의 형성방법
US6908977B2 (en) Siloxane-based resin and method of forming an insulating film between interconnect layers of a semiconductor device using the same
US20060134441A1 (en) Siloxane-based polymer and method for forming dielectric film using the polymer
KR101023916B1 (ko) 분자 다면체형 실세스퀴옥산을 이용한 반도체 층간절연막의 형성방법
KR20050058893A (ko) 에테르알콕시기를 포함한 다반응성 규소 화합물, 상기화합물로부터 제조된 중합체 및 이들을 이용한 절연막제조방법

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20081203