CN100416866C - Method for making fotodiode - Google Patents
Method for making fotodiode Download PDFInfo
- Publication number
- CN100416866C CN100416866C CNB2004100869672A CN200410086967A CN100416866C CN 100416866 C CN100416866 C CN 100416866C CN B2004100869672 A CNB2004100869672 A CN B2004100869672A CN 200410086967 A CN200410086967 A CN 200410086967A CN 100416866 C CN100416866 C CN 100416866C
- Authority
- CN
- China
- Prior art keywords
- photodiode
- substrate
- conductivity type
- manufacture method
- doped layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims abstract description 81
- 238000004519 manufacturing process Methods 0.000 claims abstract description 53
- 230000008569 process Effects 0.000 claims abstract description 19
- 238000002955 isolation Methods 0.000 claims abstract description 17
- 239000000758 substrate Substances 0.000 claims description 62
- 238000000576 coating method Methods 0.000 claims description 35
- 239000011248 coating agent Substances 0.000 claims description 34
- 230000003287 optical effect Effects 0.000 claims description 24
- 229910052710 silicon Inorganic materials 0.000 claims description 20
- 239000010703 silicon Substances 0.000 claims description 20
- 238000000137 annealing Methods 0.000 claims description 15
- 238000005229 chemical vapour deposition Methods 0.000 claims description 15
- 230000015572 biosynthetic process Effects 0.000 claims description 12
- 239000002019 doping agent Substances 0.000 claims description 12
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 10
- 239000000463 material Substances 0.000 claims description 6
- 229920005591 polysilicon Polymers 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 16
- 238000005468 ion implantation Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 6
- 239000004065 semiconductor Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 230000006698 induction Effects 0.000 description 3
- 230000035945 sensitivity Effects 0.000 description 3
- 230000008901 benefit Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 230000035800 maturation Effects 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000005234 chemical deposition Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000005622 photoelectricity Effects 0.000 description 1
- 230000036632 reaction speed Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Images
Landscapes
- Light Receiving Elements (AREA)
Abstract
The present invention relates to a method for making a photodiode. In the method, the photodiode is formed on a first conductive base. The method comprises steps: firstly, forming an isolation structure in a base for defining a light sensing area in the base; secondly, forming a plurality of grooves in the base; thirdly, forming a second conductive doping layer on the base, and the doping layer at least covers the inner wall of each groove and partial top surface of the base. The method for making a photodiode can shorten the time of integrated process and achieve the goals of increasing production efficiency and reducing production cost.
Description
Technical field
The present invention relates to a kind of manufacture method of photodiode, particularly relate to and a kind ofly come the substitution ion injection technology, with the manufacture method of a kind of photodiode of forming the depletion region that P-N engages in the chemical vapour deposition (CVD) mode.
Background technology
In electronic industry flourish today, a new generation's digital product not only can integrate the technology in self information, consumption and communication three big fields, have multimedia function more simultaneously concurrently, wherein the multimedia image treatment technology also along with the maturation of various zero element technology reaches the application surface that increases day by day, becomes the development field that gazed at by the consumer gradually.Under the image processing demands of applications significantly promotes, the image sensing chip that comes out already the sixties, also be subjected to market once again and pay attention to, wherein attract most attention with CCD (charge coupled cell) image sensing chip and CMOS (CMOS (Complementary Metal Oxide Semiconductor)) image sensing chip especially.
With regard to the CCD image sensor, disturb resistivity and preferred image quality though it has higher outside noise, but still have for the reaction speed of external variation slower, and the shortcoming that can't effectively integrate with other system's supporting chip.With the CCD image sensor in comparison, the CMOS image sensor is because its design and employing cmos semiconductor technology, thereby possessed the advantage of power saving and integration, add the technology maturation, so production cost is lower, and be widely used in the various information and consumption electronic products Price Sensitive.
Typical C MOS image sensor is mainly by photodiode (photodiode) and (the metal-oxide semiconductor of metal-oxide-semiconductor (MOS), MOS) transistor constitutes, wherein the P-N by photodiode ties the depletion region (depletion region) that (P-N junction) produced, and can be subjected to light to produce the induced current of representation signal (signal) and background noise (noise) with not being subjected to the light time at photodiode respectively.So, just can learn the variation of extraneous luminous intensity by signal/noise ratio.
Please refer to Fig. 1, it illustrates the partial schematic diagram of existing a kind of photodiode.Be formed with a P type trap 104 on the silicon base 102, and divide an optical sensing area 106.Wherein, optical sensing area 106 all around around a fleet plough groove isolation structure (shallow trench isolation, STI) 108, and form a N type doped region 110 by an ion implantation technology on the P type trap 104 in the optical sensing area 106.Owing to can produce a depletion region 112 at the P-N of P type trap 104 and N type doped region 110 knot,, just can be used as the induction region of the extraneous light of sensing therefore by this depletion region 112.Yet above-mentioned photodiode 100 is narrower because of the width of depletion region 112, and the position of depletion region 112 is darker, and it is not good to have sensed signal/noise ratio, and problems such as light that can't the sensing short wavelength.
Please refer to Fig. 2, it illustrates the partial schematic diagram of a kind of photodiode that is exposed in No. the 6566722nd, United States Patent (USP).As shown in Figure 2, at first in a P type substrate 202, form a P type silicon epitaxial layers (epitaxial silicon layer) 204.Then, in regular turn via photoetching and ion implantation technology, and on P type silicon epitaxial layers 204, form a plurality of N type doped regions 206.At last, carry out photoetching and ion implantation technology more in regular turn, and on a P type silicon epitaxial layers 204 and a N type doped region 206, form one the 2nd N type doped region 208.Via aforementioned technology, can in P type silicon epitaxial layers 204, form a N type doped region 206 of a plurality of channel form, thereby increase the contact area of a N type doped region 206 and P type silicon epitaxial layers 204, and improve the area of the depletion region 210 of photodiode relatively, and then improve the signal sensing degree of photodiode.In addition, the 2nd N type doped region 208 by P type silicon epitaxial layers 204 surfaces also can effectively promote the sensitivity of photodiode for short wavelength light.Yet above-mentioned photodiode because of adopting ion injection method, so the density of depletion region 210 differs, and can influence problem such as sensing effect when making.
Please refer to Fig. 3, it illustrates the partial schematic diagram of the existing a kind of photodiode that is exposed in No. the 6611037th, United States Patent (USP).As shown in Figure 3, in a P type substrate 302, form groove 304a and 304b.Then, the mode of injecting with ion and in the P type substrate 302 between groove 304a and 304b, forms a N type doped region 306 in groove 304a and 304b.Afterwards, on N type doped region 306, form isolation layer 308 and conductive layer 310 more in regular turn.Wherein, because of P-N engages the depletion region 312 that produces a channel form, and can promote the sensing effect between N type doped region 306 and the P type substrate 302.Yet this photodiode owing to be subjected to the restriction of groove shape, therefore needs to carry out repeatedly ion implantation technology according to different implant angles, to form uniform N type doped region 306 when forming above-mentioned N type doped region 306.Thus, not only quite consuming time on making, also make the production cost of this photodiode significantly increase.
Summary of the invention
In view of this, purpose of the present invention is exactly that a kind of manufacture method of photodiode is being provided, with the technology of simplification photodiode, and the production cost of reduction photodiode.
Based on above-mentioned purpose, the present invention proposes a kind of manufacture method of photodiode, and wherein this photodiode for example is formed in the substrate.The manufacture method of photodiode of the present invention at first forms a well region of one first conductivity type in substrate, and forms an isolation structure in substrate, to define an optical sensing area in substrate.Then, form a plurality of grooves in the substrate in optical sensing area.Afterwards, in substrate, form a doped layer of one second conductivity type, and the substrate surface in the inwall of doped layer covering groove and the optical sensing area.
As the manufacture method of the described photodiode of the preferred embodiments of the present invention, wherein in substrate, form after the doped layer of second conductivity type, also can carry out an annealing process.Dopant in the doped layer of second conductivity type is become in the substrate, and make second conductivity type be arranged in substrate with engaging of first conductivity type.When first conductivity type was the P type, then second conductivity type was the N type then, and when first conductivity type was the N type, then second conductivity type was the P type.
Manufacture method as the described photodiode of the preferred embodiments of the present invention, wherein after forming groove and before the doped layer of formation second conductivity type, also comprise forming a resilient coating in substrate, and the substrate surface in the inwall of resilient coating covering groove and the optical sensing area.After forming the doped layer of second conductivity type, also can carry out an annealing process, wherein dopant in the doped layer of second conductivity type is become in the substrate, and second conductivity type is arranged in substrate with engaging of first conductivity type by this annealing process.In addition, also can be by this annealing process so that the dopant in the doped layer of second conductivity type becomes into resilient coating, and second conductivity type is arranged in resilient coating with engaging of first conductivity type.
Based on above-mentioned, the manufacture method of photodiode of the present invention is prior to forming a plurality of grooves in the substrate of first conductivity type, utilize the mode of for example chemical vapour deposition (CVD) to form the doped layer of second conductivity type in trench wall and part substrate surface again, wherein because substrate is different with the conductivity type between the doped layer, therefore just can be because of the joint of different conductivity types, and produce a depletion region in order to light sensing.The formed photodiode of the manufacture method of photodiode of the present invention can provide the larger area depletion region, thereby light has preferred reaction sensitivity to external world.In addition, with the existing manufacture method of using ion implantation technology in comparison, the present invention replaces existing repeatedly ion implantation technology with chemical deposition process, to form doped layer.Therefore, can obtain doped layer uniformly, and shorten the integrated artistic time of photodiode, increase production efficiency and the purpose that reduces production costs to reach by the manufacture method of photodiode of the present invention.
For above and other objects of the present invention, feature and advantage can be become apparent, following conjunction with figs. and preferred embodiment are to illustrate in greater detail the present invention.
Description of drawings
Fig. 1 illustrates the partial schematic diagram into existing a kind of photodiode.
Fig. 2 illustrates the partial schematic diagram into existing another kind of photodiode.
Fig. 3 illustrates the partial schematic diagram into existing another photodiode.
Fig. 4～9 illustrate the manufacturing process profile into the manufacture method of photodiode of the present invention in regular turn.
Figure 10 illustrates the partial cutaway schematic into the formed photodiode of manufacture method of photodiode of the present invention.
Figure 11 illustrates the partial cutaway schematic into the formed another kind of photoelectricity second tube sheet of the manufacture method of photodiode of the present invention.
The simple symbol explanation
102: silicon base
104:P type trap
106: photosensitive area
108: fleet plough groove isolation structure
110:N type doped region
112: depletion region
The substrate of 202:P type
204:P type silicon epitaxial layers
206: the one N type doped regions
208: the two N type doped regions
210: depletion region
The substrate of 302:P type
304a, 304b: groove
306:N type doped region
308: isolation layer
310: conductive layer
312: depletion region
400: substrate
402: well region
404: isolation structure
406: optical sensing area
408a, 408b, 408c: groove
410: resilient coating
412: doped layer
The 414:P-N knot
416: logic circuit area
418: reset transistor
502: substrate
508a, 508b, 508c: groove
510: resilient coating
512: doped layer
Embodiment
Please refer to Fig. 4～9, it illustrates the manufacturing process profile of the manufacture method of photodiode of the present invention in regular turn.
At first, as shown in Figure 4, provide a substrate 400, it for example can be a P type or N type silicon base, and forms a well region 402 of first conductivity type in substrate 400.Wherein, the step of formation well region 402 for example can be prior to forming mask layer (not illustrating) in the substrate 400, to define the position of well region 402.Then, carry out an ion implantation technology, to form well region 402 in substrate 400, the dopant that wherein injects well region 402 for example can be P type or N type ion, is N type well region or P type well region with decision well region 402.
Then, as shown in Figure 5, in substrate 400, form an isolation structure 404, to define an optical sensing area 406 by this isolation structure 404.Wherein, isolation structure 404 for example be a fleet plough groove isolation structure (shallow trench isolation, STI), or by the formed field oxide of regional oxidizing process (Local Oxidation).The effect of isolation structure 404 mainly diffuses to contiguous sensing element or electronic installation at the induced current of avoiding optical sensing area 406 to be produced, the phenomenon of the phase mutual interference that causes.
Then, as shown in Figure 6, form a plurality of grooves, as shown in Figure 6 groove 408a, 408b and 408c in the substrate 400 in optical sensing area 406.Wherein, the formation method of groove 408a, 408b and 408c, for example can form a patterned mask layer (not illustrating) earlier, to define the position of groove 408a, 408b and 408c, and then be etching mask with this patterned mask layer, the optical sensing area 406 that it exposed is carried out anisotropic etching (anisotropic etching), on optical sensing area 406, to form groove 408a, 408b and 408c.Afterwards, the mask layer on the removal optical sensing area 406.
Then, as shown in Figure 7, on optical sensing area 406, form a resilient coating 410, the wherein inwall of resilient coating 410 covering groove 408a, 408b and 408c and substrate 400 surfaces between groove 408a, 408b and the 408c.The material of resilient coating 410 for example is polysilicon (poly-silicon) or epitaxial silicon (epitaxial silicon), and its formation method for example is a chemical vapour deposition technique.It should be noted that this step is a step optionally, that is in the manufacture method of photodiode of the present invention, can omit this step, and directly in substrate 400, form following doped layer.
Then, as shown in Figure 8, on resilient coating 410, form a doped layer 412 of second conductivity type.The material of doped layer 412 comprises doped polycrystalline silicon (poly-silicon) or doped epitaxial silicon (epitaxialsilicon), and its formation method comprises chemical vapour deposition technique.For instance, this doped layer 412 can be a mode of injecting dopant with come personally (In-Situ), utilizes formed doped polycrystalline silicon of chemical vapour deposition technique (poly-silicon) or doped epitaxial silicon (epitaxial silicon).It should be noted that second conductivity type is opposite with first conductivity type of well region 402, that is when well region 402 was the N type, then doped layer 412 was the P type, in like manner, if well region 402 is the P type, then doped layer 412 is the N type.
Afterwards, as shown in Figure 9, carry out an annealing process, wherein whether the existence of resilient coating 410 will influence the result of this annealing process.For example, if be formed with resilient coating 410 between well region 402 and the doped layer 412, then after carrying out annealing process, dopant in the doped layer 412 of second conductivity type becomes in the resilient coating 410, and the engaging (hereinafter to be referred as the P-N knot) 414 and just may be arranged in resilient coating 410 as shown in Figure 9 of second conductivity type and first conductivity type.Certainly, if the dopant in the doped layer 412 of second conductivity type is become to well region 402, then will in well region 402, form P-N knot (not illustrating).In addition, when carrying out annealing process under the situation that does not have resilient coating 410, the dopant in the doped layer 412 of second conductivity type becomes in the well region 402, so the P-N knot can be arranged in well region 402.
Please refer to Figure 10, it illustrates the partial cutaway schematic of the formed photodiode of manufacture method of the photodiode of the invention described above, and wherein Figure 10 adopts the label identical with Fig. 4～9 to represent components identical.As shown in figure 10, the invention is characterized in etched mode in substrate 400, to form groove 408a, 408b and 408c, again with chemical vapour deposition (CVD) successively in groove 408a, 408b and 408c inwall and groove 408a, 408b and folded substrate 400 surface formation resilient coatings 410 and the doped layers 412 of 408c.It should be noted that, steps such as formation resilient coating 410 of the invention described above and annealing process are optionally implemented, and resilient coating 410 major functions are as the buffering of 402 of the well regions of doped layer 412 and substrate 400, so that P-N knot 414 can be arranged in resilient coating 410.Certainly, in not breaking away from spiritual scope of the present invention,, also can form the depletion region (not illustrating) that P-N engages, so that the function of the extraneous light of induction to be provided even doped layer 412 directly contacts with substrate 400.
Refer again to Figure 10, for example also comprise a logic circuit area 416 in the substrate 400 outside the optical sensing area 406 that isolation structure 404 is surrounded, for example dispose a reset transistor (resettransistor) 418 and other circuit or electronic component etc. in it.Wherein, the element in the logic circuit area 416 for example can be pre-formed in substrate 400 before etched trench 408a, 408b and 408c, or row making again after above-mentioned institute finishes in steps.Yet, be known public technology about the making flow process of reset transistor 418 related elements such as grade in the logic circuit area 416, therefore no longer repeat to give unnecessary details.
In addition, Figure 10 the person of illustrating on resilient coating 410, evenly form the situation of a doped layer 412 for the present invention.Yet in a reasonable range, the manufacture method of photodiode of the present invention also can directly make doped layer fill up all grooves when forming doped layer.Please refer to Figure 11, it illustrates the partial cutaway schematic of the formed another kind of photodiode of manufacture method of photodiode of the present invention.Wherein, the inwall of resilient coating 510 even covering groove 508a, 508b and 508c, and the surface of the folded substrate 500 of groove 508a, 508b and 508c, doped layer 512 then is covered on the resilient coating 510 as shown in FIG. comprehensively, and fills up groove 508a, 508b and 508c.
In sum, the manufacture method of photodiode of the present invention increases the induction region of photodiode by forming a plurality of grooves, to improve the reaction sensitivity of photodiode.In addition, because the manufacture method of photodiode of the present invention replaces existing ion implantation technology in the mode of chemical vapour deposition (CVD), therefore only need one technology just can form doped layer.With the existing manufacture method of using ion implantation technology in comparison, the present invention can form doped layer comparatively uniformly, and because of its processing step is comparatively simplified, thus can effectively shorten the integrated artistic time, and then reach the purpose that increases production efficiency and reduce production costs.
Though the present invention discloses as above with preferred embodiment; yet it is not in order to limit the present invention; those skilled in the art can do a little change and retouching without departing from the spirit and scope of the present invention, thus protection scope of the present invention should with accompanying Claim the person of being defined be as the criterion.
Claims (19)
1. the manufacture method of a photodiode comprises:
In a substrate, form a well region of one first conductivity type;
In this substrate, form an isolation structure, in this substrate, to define an optical sensing area;
Form a plurality of grooves in this substrate in this optical sensing area; And
Form a doped layer of one second conductivity type in this substrate, this doped layer covers the inwall of those grooves and this substrate surface in this optical sensing area,
Wherein the formation method of this doped layer comprises chemical vapour deposition technique.
2. the manufacture method of photodiode as claimed in claim 1, wherein be to form in this substrate the step of this doped layer of this second conductivity type after, also comprise and carry out an annealing process.
3. the manufacture method of photodiode as claimed in claim 2 wherein in this annealing process, becomes in this substrate dopant in this doped layer of this second conductivity type, and makes this second conductivity type be arranged in this substrate with engaging of this first conductivity type.
4. the manufacture method of photodiode as claimed in claim 1, wherein this first conductivity type is the P type, and this second conductivity type is the N type.
5. the manufacture method of photodiode as claimed in claim 1, wherein this first conductivity type is the N type, and this second conductivity type is the P type.
6. the manufacture method of photodiode as claimed in claim 1, wherein this doped layer material comprise doped polycrystalline silicon and doped epitaxial silicon one of them.
7. the manufacture method of photodiode as claimed in claim 1, wherein this doped layer also comprises and fills up those grooves.
8. the manufacture method of photodiode as claimed in claim 1, before wherein reaching the step of this doped layer that in this substrate, forms this second conductivity type after the step of those grooves of formation in this substrate in this optical sensing area, also comprise forming a resilient coating in this substrate, this resilient coating covers the inwall of those grooves and this substrate surface in this optical sensing area.
9. the manufacture method of photodiode as claimed in claim 8, wherein the formation method of this resilient coating comprises chemical vapour deposition technique.
10. the manufacture method of photodiode as claimed in claim 8, wherein the material of this resilient coating comprise polysilicon and epitaxial silicon one of them.
11. the manufacture method of photodiode as claimed in claim 8, wherein be in this substrate to form the step of this doped layer of this second conductivity type after, also comprise and carry out an annealing process.
12. the manufacture method of photodiode as claimed in claim 11, wherein in this annealing process, dopant in this doped layer of this second conductivity type is become into this resilient coating, and make this second conductivity type be arranged in this resilient coating with engaging of this first conductivity type.
13. the manufacture method of photodiode as claimed in claim 11 wherein in this annealing process, becomes in this substrate dopant in this doped layer of this second conductivity type, and makes this second conductivity type be arranged in this substrate with engaging of this first conductivity type.
14. the manufacture method of photodiode as claimed in claim 8, wherein this doped layer also comprises and fills up those grooves.
15. the manufacture method of a photodiode comprises:
In a substrate, form a well region of one first conductivity type;
In this substrate, form an isolation structure, in this substrate, to define an optical sensing area;
Form a plurality of grooves in this substrate in this optical sensing area;
Form a resilient coating in this substrate, and this resilient coating covers the inwall of those grooves and this substrate surface in this optical sensing area;
On this resilient coating, form a doped layer of one second conductivity type; And
Carry out an annealing process, so that the dopant in this doped layer of this second conductivity type becomes into this resilient coating, and this second conductivity type is arranged in this resilient coating with engaging of this first conductivity type.
16. the manufacture method of photodiode as claimed in claim 15, wherein the formation method of this doped layer comprises chemical vapour deposition technique.
17. the manufacture method of photodiode as claimed in claim 15, wherein the material of this doped layer comprise doped polycrystalline silicon and doped epitaxial silicon one of them.
18. the manufacture method of photodiode as claimed in claim 15, wherein the formation method of this resilient coating comprises chemical vapour deposition technique.
19. the manufacture method of photodiode as claimed in claim 15, wherein the material of this resilient coating comprise polysilicon and epitaxial silicon one of them.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100869672A CN100416866C (en) | 2004-10-20 | 2004-10-20 | Method for making fotodiode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100869672A CN100416866C (en) | 2004-10-20 | 2004-10-20 | Method for making fotodiode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN1763978A CN1763978A (en) | 2006-04-26 |
| CN100416866C true CN100416866C (en) | 2008-09-03 |
Family
ID=36748000
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CNB2004100869672A Expired - Fee Related CN100416866C (en) | 2004-10-20 | 2004-10-20 | Method for making fotodiode |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN100416866C (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6566722B1 (en) * | 2002-06-26 | 2003-05-20 | United Microelectronics Corp. | Photo sensor in a photo diode on a semiconductor wafer |
| US6611037B1 (en) * | 2000-08-28 | 2003-08-26 | Micron Technology, Inc. | Multi-trench region for accumulation of photo-generated charge in a CMOS imager |
-
2004
- 2004-10-20 CN CNB2004100869672A patent/CN100416866C/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6611037B1 (en) * | 2000-08-28 | 2003-08-26 | Micron Technology, Inc. | Multi-trench region for accumulation of photo-generated charge in a CMOS imager |
| US6566722B1 (en) * | 2002-06-26 | 2003-05-20 | United Microelectronics Corp. | Photo sensor in a photo diode on a semiconductor wafer |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1763978A (en) | 2006-04-26 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US6521924B2 (en) | Image sensor incorporating therein a capacitor structure and method for the manufacture thereof | |
| US20020171097A1 (en) | Integrated CMOS structure for gate-controlled buried photodiode | |
| JPH11233748A (en) | Method for forming semiconductor image sensor and its structure | |
| US6392263B1 (en) | Integrated structure for reduced leakage and improved fill-factor in CMOS pixel | |
| KR100760913B1 (en) | CMOS Image Sensor and Method for Manufacturing the same | |
| US6621064B2 (en) | CMOS photodiode having reduced dark current and improved light sensitivity and responsivity | |
| US20080017900A1 (en) | Cmos image sensor | |
| CN100416866C (en) | Method for making fotodiode | |
| US20070246757A1 (en) | CMOS image sensor and method for fabricating the same | |
| TWI237905B (en) | Manufacturing method of photodiode | |
| EP1691416A1 (en) | Salicide process for image sensor | |
| US20050158897A1 (en) | Image sensor device and method of fabricating the same | |
| TWI691098B (en) | Image sensor and manufacturing method thereof | |
| CN100428487C (en) | Photodiode of cmos image sensor and method for manufacturing the same | |
| CN104795414A (en) | Method of modifying polysilicon layer through nitrogen incorporation | |
| KR20030001116A (en) | Image sensor and fabricating method of the same | |
| KR100748323B1 (en) | A fabricating method of image sensor | |
| KR100720474B1 (en) | CMOS Image sensor and Method for fabricating of the same | |
| KR100535911B1 (en) | CMOS image sensor and its fabricating method | |
| TWI796083B (en) | Image sensor and manufacturing method thereof | |
| US20080124830A1 (en) | Method of manufacturing image sensor | |
| CN100479176C (en) | Video sensing element and method for making the same | |
| KR100788483B1 (en) | Pixel structure of image sensor and manufacturing method | |
| KR100730470B1 (en) | Method for manufacturing image sensor | |
| KR100760141B1 (en) | Fabricating method of image sensor using salicide |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080903 Termination date: 20091120 |