CN100405530C - Fabrication method of thin film device - Google Patents

Abstract

The present invention provides a method for manufacturing a thin film device, characterized in that: preparing a coating liquid discharge nozzle having a plurality of discharge ports; The coating solution is discharged only to the coating area on the substrate, and a patterned coating film is formed on the substrate. The thin film device manufactured according to the method of the present invention can greatly reduce the initial investment and the cost of the liquid crystal display device by utilizing the manufacturing device with low cost, high output and high efficiency of coating liquid to manufacture TFT.

Description

Fabrication method of thin film device

This application is a divisional application with the application number 97190551.7 and the title of the invention is "thin film device with coating film, liquid crystal screen, electronic device and manufacturing method of thin film device".

technical field

The present invention relates to a thin film device including thin film transistors (abbreviated as TFT hereinafter) and a manufacturing method thereof, in particular to a thin film device which can be manufactured at low cost with low initial equipment investment and a manufacturing method thereof. The present invention further relates to a liquid crystal panel and an electronic device using such a thin film device.

Background technique

In recent years, liquid crystal display devices using such thin film devices have been used in notebook personal computers, car navigation systems, video cameras, various portable information devices, etc., and their application fields and production volumes have rapidly expanded. This depends on the reduction of the price of the liquid crystal display device, as well as the improvement of the performance such as the expansion of the screen size, the improvement of the resolution, and the reduction of power consumption. However, in order to further expand the market and expand the application field, further cost reduction is required.

The mainstream of liquid crystal display devices is an active matrix liquid crystal display device using TFTs as switching elements for pixels. Such a liquid crystal display device is constituted by sealing liquid crystal between a TFT substrate forming TFTs and pixel electrodes connected to the TFTs in a matrix and a counter substrate forming a common electrode. FIG. 17 shows the main part of the TFT substrate 60 . In Fig. 17, a plurality of source (pole) lines or data signal lines S1, S2, ... Sn wired in the column direction and a plurality of gate (pole) lines or scanning signal lines G1 wired in the row direction , G2, . . . Gm are formed at pixel positions near each intersection point. The source of the TFT 61 is connected to the source line, and the drain is connected to the pixel electrode 62 . Based on the scanning timing signal supplied from the gate line, the data signal supplied from the drain line is applied to the pixel electrode 62 through the TFT 61 . By means of the electric field between the pixel electrode 62 and the common electrode (not shown), the state of the liquid crystal is changed, and it is driven for display.

The liquid crystal display device is constituted by means of panel assembly, such as encapsulation of liquid crystal between the TFT substrate 60 and the counter substrate, installation of a driving circuit for driving source lines and gate lines, etc., but its cost depends largely on the cost of the TFT substrate. 60 cost. Furthermore, the cost of the TFT substrate 60 depends on the method of manufacturing the TFT. A part of the drive circuit has active elements formed by TFTs, and some active elements are formed on the TFT substrate 60. Especially in this case, the cost of the TFT substrate accounts for an increased proportion of the cost of the liquid crystal display device.

Here, the TFT has a thin-film stack structure composed of a plurality of thin films having at least a silicon semiconductor layer including an insulating layer, a conductive layer, a source, a drain, and a channel region. The cost of a TFT largely depends on the manufacturing cost of the thin film laminated structure.

When forming the insulating layer in the thin film stack structure, because the uniformity of the film thickness is poor when NPCVD (normal pressure chemical vapor deposition) is used, LPCVD (low pressure chemical vapor deposition) and PECVD (plasma enhanced chemical vapor deposition) are generally used. chemical vapor deposition). By means of sputtering, a conductive layer represented by a metal is formed. A silicon film for forming a silicon semiconductor layer is also formed by PECVD and LPCVD. Furthermore, a method of introducing impurities into the silicon film by ion implantation and an ion dopant method is used. Alternatively, the high-concentration impurity regions to be the source/drain regions are formed by using a silicon film coated with impurities by means of a CVD apparatus.

Any of the above-mentioned CVD devices, sputtering devices, and other devices used in various film formations is a vacuum processing device that performs processing under vacuum, and requires large-scale vacuum exhaust equipment, which increases the cost of initial investment. Furthermore, in the vacuum processing apparatus, processes such as film formation are completed by means of vacuum evacuation, substrate heating, film formation, and substrate transport in a crankshaft order. Therefore, it is necessary to replace the atmosphere from the atmosphere to a vacuum, and there is a limit to the yield. In addition, the ion implantation device and the ion dopant device are basically also vacuum processing devices, and the same problems as above arise. Furthermore, in such an ion implantation device and an ion dopant device, extremely complex processes such as plasma generation, ion extraction, ion mass analysis (in the case of an ion implantation device), ion acceleration, ion focusing, and ion scanning are required. institutions, making the initial investment quite expensive.

Thus, the thin film formation technology and its processing technology for manufacturing the thin film laminated structure are basically the same as the LSI manufacturing technology. Therefore, the main means for reducing the cost of TFT substrates are to increase the size of substrates on which TFTs are formed, to improve the efficiency of thin film formation and processing steps, and to improve yields.

However, increasing the size of the substrate for the purpose of reducing costs and manufacturing large-scale liquid crystal display devices not only becomes an obstacle to the high-speed transportation of the substrate in the vacuum processing device, but also has problems such as cracks on the substrate due to thermal stress in the film forming process. It is extremely difficult to increase the throughput of a film forming apparatus. In addition, the increase in the size of the substrate also requires an increase in the size of the film forming apparatus. As a result, the initial investment is further increased due to the increase in the price of the film-forming apparatus due to the increase in the volume of the evacuation, and it is difficult to finally reduce the cost significantly.

Furthermore, improving the yield of TFTs is a powerful means to reduce costs, but the yield has already reached the limit, and the situation is that it is difficult to increase the yield significantly numerically.

In addition, various layers are subjected to a photolithography process for patterning. In such a photolithography process, a resist coating process, an exposure process, and a development process are required. Thereafter, an etching step, a resist film removal step, and a patterning step are further required, which are factors that increase the number of steps in the thin film forming method. This is also the reason for increasing the manufacturing cost of thin film devices.

Regarding the protective film coating process in this photolithography process, in the protective film liquid dripped on the substrate, the amount remaining as a protective film after spin coating is less than 1%, and there is also a low utilization efficiency of the protective film liquid. low problem.

In addition, a printing method or the like has been proposed as a low-cost method to replace a large-scale exposure apparatus used in the exposure process, but it has not been practical due to problems such as processing accuracy.

As mentioned above, the market demands a drastic reduction in the price of current liquid crystal display devices, however, the situation is that it is difficult to drastically reduce the cost of TFTs.

Contents of the invention

The object of the present invention is to provide such a thin film device and its manufacturing method: it is possible to form a part or all of the thin films of the thin film lamination structure used on the liquid crystal display substrate etc. Cost, at the same time, increase production, further significantly reduce manufacturing costs.

Another object of the present invention is to provide a thin film device capable of forming a thin film by means of a coating film, reducing cost, and making it close to the characteristics of a CVD film or a sputtered film, and a method of manufacturing the same.

Still another object of the present invention is to provide a thin film device and a manufacturing method thereof capable of reducing the consumption of a coating liquid when forming a thin film by means of a coating film, thereby achieving cost reduction.

Still another object of the present invention is to provide a thin film device capable of patterning a formed film without using a photolithography process and further reducing costs, and a method for manufacturing the same.

Still another object of the present invention is to provide a thin film device capable of flattening a surface to be bonded to a liquid crystal by forming a pixel electrode with a coating film, a liquid crystal display panel and an electronic device using the device.

Still another object of the present invention is to provide a thin film device, a liquid crystal panel, and an electronic device using the same, which can use the wiring layer as a light-shielding layer of a black matrix and have a large numerical aperture.

Still another object of the present invention is to provide a liquid crystal panel and an electronic device capable of achieving cost reduction by using a low-cost thin film device.

According to the method of manufacturing a thin film device of the present invention, it is characterized in that: a coating liquid discharge nozzle having a plurality of discharge ports is prepared; the positions of the substrate and the plurality of coating liquid discharge nozzles are relatively changed, and at the same time, the above coating liquid is It is discharged onto the coating area on the substrate, and a patterned coating film is formed on the substrate.

Such a method can be realized, for example, using an inkjet method. Therefore, in addition to saving by not applying useless coating liquid, the photolithography process is also unnecessary, which greatly contributes to reduction of equipment cost and improvement of yield. For example, in the formation of a protective film, using conventional coating techniques, only about 1% of the dropped amount is used as a coating film, but with the present invention, more than 10% of the dropped amount can be used as a protective coating film. This improvement in coating efficiency is effective not only for the protective film but also for other coating films of the present invention, and the cost of the liquid crystal display device can be reduced by reducing the coating material and shortening the time of the coating process.

It is preferable to independently control the discharge state and the non-discharge state of the above-mentioned coating liquid of the plurality of the above-mentioned discharge ports, control the coating timing on each of the above-mentioned discharge ports, and at the same time, change the relationship between the above-mentioned substrate and the above-mentioned plurality of coating liquids relatively. The location of the discharge nozzle. Therefore, more precise pattern application can be performed.

Such a coating method can be applied to the coating of various coating liquids for forming the above-mentioned coating film in addition to the protective coating for forming the protective pattern. For example, if the coating insulating film can be patterned, contact holes can also be formed simultaneously with the coating.

Thus, according to the present invention, part or all of the thin film can be formed by performing heat treatment after applying the liquid, and therefore, thin film devices can be manufactured using an inexpensive and high-yield manufacturing apparatus.

Description of drawings

Fig. 1 is a configuration diagram of a coating film forming apparatus used in a first embodiment of the present invention;

Fig. 2 is a structural diagram of another coating film forming apparatus used in the first embodiment of the present invention;

3 is a cross-sectional view of a coplanar TFT;

4 is a cross-sectional view of an inverted staggered TFT;

Fig. 5 is a configuration diagram of a tandem type coating film forming apparatus used in the first embodiment of the present invention;

Fig. 6 is a configuration diagram of another tandem coating film forming apparatus used in the first embodiment of the present invention;

Fig. 7 is a configuration diagram of a silicon-coated film forming apparatus used in the first embodiment of the present invention;

Fig. 8 is a structural diagram of another coated silicon film forming apparatus used in the first embodiment of the present invention;

Fig. 9 is the flowchart illustrating the metal electroplating method that is carried out to coating ITO film surface;

10 is a cross-sectional view of the manufacturing process of a coplanar TFT using an insulating layer containing impurities according to the present invention;

11 is a cross-sectional view of the manufacturing process of an inverted staggered TFT using an insulating layer containing impurities according to the present invention;

Fig. 12 is a structural diagram of a liquid application device used in the first embodiment of the present invention;

FIG. 13 is a schematic explanatory diagram showing a state after spin coating using the liquid coating device of FIG. 12;

Fig. 14 is a structural diagram of another liquid application device of the present invention;

Fig. 15 is a partial enlarged view of the liquid application device shown in Fig. 14;

Fig. 16 is a partial enlarged view of the liquid application device shown in Fig. 14;

FIG. 17 is a diagram showing a base of a TFT constituting a liquid crystal display device;

18 is an enlarged plan view showing a part of a pixel area formed by division on an active matrix base for a liquid crystal display device related to the second embodiment of the present invention;

Fig. 19 is a sectional view cut off at a position corresponding to line I-I' of Fig. 18;

20(A) to 20(D) are cross-sectional views showing the method of manufacturing the active matrix substrate shown in FIG. 19;

Fig. 21 (A) ~ Fig. 21 (C) are the cross-sectional views showing each process carried out after the process shown in Fig. 20;

22 is an enlarged plan view showing a part of a pixel area formed by division on an active matrix substrate for a liquid crystal display device related to a third embodiment of the present invention;

Fig. 23 is a sectional view at a position corresponding to line II-II' of Fig. 22;

Fig. 24 (A) ~ Fig. 24 (D) are the cross-sectional views showing each process carried out after the process shown in Fig. 20 when manufacturing the active matrix substrate shown in Fig. 22;

25(A) and 25(B) are enlarged longitudinal sectional views showing the vicinity of the contact hole of the comparative example and the embodiment of the present invention, respectively;

Fig. 26 is a longitudinal sectional view showing the structure of the fourth embodiment of the present invention cut at a position corresponding to line II-II' of Fig. 22;

27(A) to 27(E) are cross-sectional views showing the method of manufacturing the active matrix substrate shown in FIG. 26;

Fig. 28 (A) ~ Fig. 28 (E) are the cross-sectional views showing the process carried out after the process of Fig. 27;

29 is an enlarged plan view showing a part of a pixel area formed by division on an active matrix substrate for a liquid crystal display related to a fifth embodiment of the present invention;

Fig. 30 is a sectional view at a position corresponding to line III-III' of Fig. 29;

Fig. 31 (A) ~ Fig. 31 (F) are the cross-sectional views showing each process carried out after the process shown in Fig. 27 when manufacturing the active matrix substrate shown in Fig. 29;

32 is an enlarged plan view showing a part of the pixel area formed by division on the active matrix substrate for liquid crystal display related to the sixth embodiment of the present invention;

Fig. 33 is a sectional view at a position corresponding to line IV-IV' of Fig. 32;

Fig. 34 (A) ~ Fig. 34 (D) are the sectional views that show when manufacturing the active matrix substrate shown in Fig. 32, after the step shown in Fig. 27 carry out each process;

35 is an enlarged plan view showing a part of a pixel area formed by division on an active matrix substrate for liquid crystal display related to a seventh embodiment of the present invention;

Fig. 36 is a sectional view at a position corresponding to the V-V' line of Fig. 35;

Fig. 37 (A) ~ Fig. 37 (C) are the cross-sectional views showing each process carried out after the process shown in Fig. 27 when manufacturing the active matrix substrate shown in Fig. 35;

Fig. 38 (A), (B) is the explanatory drawing of the liquid crystal display active matrix substrate relevant with another kind of embodiment;

39(A), (B) are longitudinal sectional views showing the vicinity of the contact hole of the comparative example and the embodiment of the present invention enlarged respectively;

40 is a block diagram showing a liquid crystal display device included in an electronic device related to an eighth embodiment of the present invention;

41 is a schematic cross-sectional view of a projector, which is an example of an electronic device using the liquid crystal display device of FIG. 40;

FIG. 42 is a schematic explanatory diagram of a personal computer, which is another example of an electronic device;

Fig. 43 is another example of the electronic device, that is, an assembled exploded oblique perspective view of a pager;

FIG. 44 is a schematic explanatory diagram showing a liquid crystal display device having a TCP.

Detailed ways

Hereinafter, the present invention will be described in detail based on the drawings.

first embodiment

Description of Thin Film Device Structure

3 and 4 respectively show two basic structural examples of thin-film devices including TFTs.

FIG. 3 is a cross-sectional view of a TFT using coplanar polysilicon. An underlying insulating film 12 is formed on the glass base 10, and a polysilicon TFT is formed thereon. In FIG. 3, the polysilicon layer 14 is composed of a source region 14S and a drain region 14D doped with impurities at a high concentration, and a channel region 14C between them.

A gate insulating film 16 is formed on the polysilicon layer 14, and a gate electrode 18 and a gate line (not shown) are formed thereon. The pixel electrode 22 made of a transparent conductive film is connected to the drain region 14D through the opening formed on the interlayer insulating film 20 and the gate insulating film 16 below, and the source line 24 is connected to the source region 14S. , the uppermost protective film 26 is omitted. Furthermore, the underlying insulating film 12 is intended to prevent contamination from the glass substrate 10 and to adjust the surface state on which the polysilicon film 14 is formed, but it may be omitted.

FIG. 4 is a cross-sectional view of an inverted staggered amorphous silicon TFT. An underlying insulating film 32 is formed on a glass substrate 30, and amorphous silicon TFTs are formed thereon. Furthermore, the underlying insulating film 32 is often omitted. In FIG. 4, one or more layers of gate insulating films 36 are formed under the gate electrodes 34 and the gate lines connected thereto. An amorphous silicon channel region 38C is formed on the gate electrode 34, and source/drain regions 38S and 38D are formed by diffusing impurities into the amorphous silicon. Further, the pixel electrode 40 is electrically connected to the drain region 38D through the metal wiring layer 42, and the source line 44 is electrically connected to the source region 38S. Furthermore, the metal wiring layer 42 is formed simultaneously with the source line 44 .

In addition, the channel protective film 46 formed on the channel region 38C is a film for protecting the channel region 38C when the source/drain region films 38S and 38D are etched, and may be omitted.

Figures 3 and 4 show the basic TFT structure, and this variation involves a wide range. For example, in the coplanar TFT of FIG. 3 , in order to increase the numerical aperture, a second interlayer insulating film is provided between the pixel electrode 22 and the source line 24, so that the distance between the pixel electrode 22 and the source line 24 can be narrowed. Structure. Alternatively, for the purpose of reducing wiring resistance and wiring redundancy of gate lines and source lines 24 (not shown) connected to the gate 18 , the gate lines and source lines can be multilayered. Furthermore, it is also possible to form a light-shielding layer on or under the TFT element. Also in the inverted staggered TFT shown in FIG. 4 , multilayering of wiring and insulating films for the purpose of increasing the numerical aperture, reducing wiring resistance, and reducing defects can be performed.

In almost any of these improved structures, the number of stacked thin films constituting the TFT is increased to the basic structure shown in FIG. 3 or FIG. 4 .

In the following examples, the case where various thin films constituting the thin film laminated structure shown in Fig. 3 and Fig. 4 are formed using a coating film which does not require a vacuum processing apparatus will be described.

(Formation method of coating insulating film)

Fig. 1 shows a coating type insulating film forming apparatus which forms a thin film such as an insulating film by applying a liquid followed by heat treatment. Polysilazane (a general term for polymers having Si—N bonds) can be mentioned as the liquid that is used as an insulating film by heat treatment after coating. One of the polysilazanes is [SiH ₂ NH] _n (n is a positive integer), which is the so-called polyhydrogensilazane. This product is produced by Tonen Co., Ltd., and is commercially available under the trade name "Tonen Polysilazan". Furthermore, if the H in [SiH ₂ NH] _n is replaced with an alkyl group (for example, a methyl group, an ethyl group, etc.), it becomes an organopolysilazane, which is different from an inorganic polysilazane. In this embodiment, inorganic polysilazanes are preferably used.

After mixing this polysilazane with a liquid such as xylene, it is spin-coated onto a substrate, for example. This coated film is converted into SiO ₂ by means of heat treatment in an atmosphere containing water vapor or oxygen.

时也容易产生裂纹的问题，故几乎不以单层用于层间绝缘膜等，而是作为CVD绝缘膜的上层平坦化层使用。As a comparative example, an SOG (Spin On Glass) film which becomes an insulating film by heat treatment after coating can be mentioned. This SOG film is a polymer with siloxane bonds as the basic structure. There are organic SOG with an alkyl group and inorganic SOG without an alkyl group, and an alkyl group is used as a solvent. For the purpose of flatness, SOG film is used for LSI interlayer insulating film. There is an organic SOG film that is easily corroded by oxygen plasma treatment, and the thickness of the inorganic SOG film is several thousand

It is also prone to cracks, so it is hardly used as a single layer for interlayer insulating films, but as an upper planarization layer of CVD insulating films.

In this regard, polysilazane has high fracture resistance and oxygen plasma resistance, and can also be used as an insulating layer with a certain film thickness as a single layer. Therefore, here, the case of using polysilazane will be described.

Furthermore, the present invention utilizes a coating film other than the SOG film with siloxane bonds as the basic structure to form at least one layer of the thin film laminated structure, preferably multiple layers, so as to satisfy this condition, it may also be additionally Use SOG film.

。其次，把玻璃基板输送到热处理部103，在水蒸汽气氛中，在温度100～350℃下，进行10-60分钟热处理，变成为SiO₂。该热处理由温度控制部107进行控制。为了提高涂敷型绝缘膜形成装置的处理能力，热处理部103设定热处理部103的长度及该炉内收存的基板块数，以便把上述旋转涂敷器102的生产节拍时间与热处理时间匹配起来。与聚硅氨烷混合的液体例如使用了二甲苯，还有，在转换时会产生氢及氨等，因此，至少在旋转涂敷器102及热处理器103中，需要排气设备108。利用卸料器104，把热处理后形成了绝缘膜的玻璃基板装于箱内。In FIG. 1 , a loader 101 takes out a plurality of glass substrates contained in a tank one by one, and transports them to a spin coater 102 . In the spin coater 102, as shown in FIG. 12, the substrate 132 is vacuum-adsorbed onto the stage 130, and the polysilazane 138 is dropped onto the substrate 132 from the nozzle 136 of the dispenser 134. As shown in FIG. 12 , the dropped polysilazane 138 spreads from the center of the substrate. The mixed solution of polysilazane and xylene enters a container called a canister and is stored in the storage unit 105 shown in FIGS. 1 and 12 . The mixed solution of polysilazane and xylene was supplied from the liquid storage unit 105 to the dispenser 134 through the supply tube 140, and applied on the substrate. Furthermore, as shown in FIG. 13 , polysilazane 138 is gradually coated on the entire surface of glass substrate 132 by rotation of stage 130 . At this point, most of the xylene evaporates. The rotating speed and the rotation time of platform 130 are controlled by control part 106 shown in Figure 1, and in a few seconds, its rotating speed rises to 1000rpm, keeps about 20 seconds on 1000rpm, advances, stops after a few seconds. Under these coating conditions, the film thickness of the polysilazane coating film is about

. Next, the glass substrate is transported to the heat treatment unit 103, and heat-treated at a temperature of 100-350° C. for 10-60 minutes in a water vapor atmosphere to become SiO ₂ . This heat treatment is controlled by the temperature control unit 107 . In order to improve the processing capacity of the coating-type insulating film forming apparatus, the heat treatment section 103 sets the length of the heat treatment section 103 and the number of substrates stored in the furnace so that the production takt time of the above-mentioned spin coater 102 can be matched with the heat treatment time. stand up. Xylene is used as the liquid mixed with polysilazane, for example, and hydrogen and ammonia are generated during conversion. Therefore, at least the spin coater 102 and the heat processor 103 require an exhaust device 108 . Using the unloader 104, the glass substrate on which the insulating film was formed after the heat treatment is placed in the box.

Compared with the conventional CVD apparatus, the coating type insulating film forming apparatus of the present invention shown in FIG. 1 has a remarkably simple apparatus configuration, and therefore, the apparatus is very cheap. Furthermore, compared with the CVD apparatus, it has features such as high throughput, easy maintenance, and high operating efficiency of the apparatus. With these features, the cost of the liquid crystal display device can be greatly reduced.

The coating type insulating film forming apparatus shown in FIG. 1 can form all the insulating films shown in FIG. In addition, when an insulating film is additionally formed between the pixel electrode 22 and the source wiring 24, by using the apparatus shown in FIG. is particularly effective. In addition, the underlying insulating film 12 and the protective film 26 are sometimes omitted.

Here, the gate insulating film 16 is an important insulating film that controls the electrical characteristics of the TFT. In order to control the film thickness and film quality, it is also necessary to control the interface characteristics with the silicon film.

For this purpose, in addition to cleaning the surface state of the silicon film 14 before forming the gate insulating film 16 by coating, it is preferable to use the coating type insulating film forming apparatus shown in FIG. 2 . In the apparatus shown in FIG. 2 , a second heat treatment unit 103B is provided between a first heat treatment unit 103A having the same function as the heat treatment unit 103 of the apparatus shown in FIG. 1 , and an unloader 104 . It is desirable that in the second heat treatment section 103B, after the above-mentioned heat treatment is performed in the first heat treatment section 103A, heat treatment is performed for 30-60 minutes at a temperature 400° to 500° C. higher than that in the first heat treatment section 103A, or , Carry out high-temperature short-time heat treatment such as lamp annealing and laser annealing.

In this manner, insulating films such as the gate insulating film 16 are more densified, and the film quality and interface characteristics are improved compared to the case of heat treatment only in the heat treatment portion 103 in FIG. 1 .

Furthermore, as far as the interface characteristics are concerned, the CVD film formed in a vacuum atmosphere is easy to control compared with the application of an insulating film. Therefore, when a high-performance TFT is required, it is also possible to use a The CVD film forms a gate insulating film, and other insulating films are formed from the coating insulating film of the present invention.

In the TFT structure of FIG. 4 , the coating insulating film of the present invention can be used for the underlying insulating film 32 , the gate insulating film 36 , and the channel protective film 46 .

(Formation method of coated silicon film)

By preparing a liquid containing silicon particles as the coating liquid stored in the coating liquid storage unit 105 shown in FIG. 1 or 2 , a silicon coated film can be formed using the same apparatus as that shown in FIG. 1 or 2 .

The particle diameter of the silicon particles contained in the coating liquid can be used within a range of, for example, 0.01 to 10 μm. The particle diameter of the silicon particles is selected according to the film thickness of the coated silicon film. The particle diameter of the silicon particles obtained by the present inventors is: 10% of the silicon particles are about 1 μm, and 95% of them are less than 10 μm. Silicon particles having a desired particle diameter can be obtained by further micronizing silicon particles having such a particle diameter by means of a micronizing device.

Silicon particles having a particle diameter within a predetermined range are mixed with a liquid such as alcohol and stored in the coating liquid storage unit 105 as a suspension. Then, the suspension of silicon particles and alcohol is discharged onto the substrate conveyed from the loader 105 into the spin coater 106 . Then, the stage 130 was rotated under the same coating conditions as those used for forming the coating insulating film, and the coating film of silicon particles was gradually coated on the substrate. At this time, most of the alcohol evaporated.

Next, in the heat treatment section 103 or the first heat treatment section 103A, the substrate is heat-treated under the same heat treatment conditions as in the case of forming the coating insulating film. At this time, a crystallized silicon film is formed on the substrate by the reaction between the silicons.

In the case of using the apparatus shown in FIG. 2 , further, the substrate is heat-treated in the second heat treatment unit 103B at a temperature higher than the heat treatment temperature in the first heat treatment unit 103A. This heat treatment is preferably performed in a short time by means of laser annealing or lamp annealing.

By performing the heat treatment again in the second heat treatment section 103B, the crystallinity, compactness, and adhesion of the silicon film to other films are improved, compared to heat treatment performed only in the first heat treatment section 103A.

5 and 6 are configuration diagrams of a film-forming apparatus for continuously forming a silicon-coated film and a coated insulating film.

In the film forming apparatus of FIG. 5, the loader 101, the first spin coater 102A, the first heat treatment unit 103A, the second heat treatment unit 103B, the second spin coater 102B, the heat treatment unit 103, and the unloader 104 are connected in series. stand up. The first coating liquid storage unit 105A and the first control unit 106A storing a suspension of silicon particles and alcohol are connected to the first spin coater 102A. A second coating liquid storage unit 105B and a second control unit 106B storing a mixed liquid of polysilazane and xylene are connected to the second spin coating unit 102B.

If the device in Fig. 5 is used, the number of times of loading and unloading is reduced by 1 on average, so the output is further improved.

The film formation apparatus of FIG. 6 shows a modified example in which the second heat treatment unit 103B of the film formation apparatus of FIG. 5 is disposed in the coated insulating film heat treatment unit 103 . In this case, the insulating film capping layer is crystallized by the second heat treatment portion 103B in which the accompanying silicon film is laser annealed. The insulating film has the effect of reducing the surface reflectance of the silicon film, and therefore has the advantage of making the silicon film absorb laser energy efficiently. In addition, the surface of the silicon film after laser annealing is smooth. One heat treatment unit may also be used as the heat treatment unit 103 and the second heat treatment unit 103B in FIG. 6 . In this case, in the one combined heat treatment part, the firing of the coating insulating film and the crystallization heat treatment of the silicon film thereon can be performed simultaneously.

(Other formation methods of coated silicon film)

Fig. 7 shows another coating type silicon film forming apparatus which forms a silicon film by applying a coating liquid followed by heat treatment. When forming a silicon film by CVD, monosilane (SiH ₄ ) and disilane (Si ₂ H ₆ ) can be used, but in the present invention, higher silanes such as disilane and trisilane (Si ₃ H ₈ ) are used . The boiling points of silanes are -111.9°C for monosilane, -14.5°C for disilane, 52.9°C for trisilane, and 108.1°C for tetrasilane (Si ₄ H ₁₀ ). Monosilane and disilane are gases at normal temperature and pressure, but higher silanes higher than trisilane are liquids. When disilane is made to be several tens of degrees C negative, it becomes liquid and can be used as a coating film. Here, the case where trisilane is mainly used will be described.

In FIG. 7 , the glass substrates are taken out one by one from the box by the loader 201 and transported to the charge lock chamber 202 , and the charge lock chamber 202 is decompressed by means of an exhaust device 711 . When the predetermined pressure is reached, the glass substrate is moved to the spin coating unit 203 which is in a depressurized state at the same limit as the above pressure, and trisilane is applied from the trisilane storage unit 207 to the glass substrate through the dispenser. In the spin coater 203, the substrate is rotated at a rotation speed of 100 to 1000 rpm for several to 20 seconds, and trisilane is spin-coated. The glass substrate spin-coated with trisilane is directly conveyed to the first heat treatment part 204 with the same pressure as the above-mentioned pressure, and heat treatment is performed at 300°-450°C for tens of minutes to form a film with a thickness of several hundreds. silicon membrane. Next, the glass substrate is transported to the second heat treatment section 205 having the same pressure as the above, and subjected to high-temperature short-time heat treatment such as laser annealing and lamp annealing. Thereby, the silicon film is crystallized. Then, the glass substrate is transported into the load lock chamber 206, and after being returned to the atmospheric pressure by nitrogen, it is transported to the unloader 207, and loaded in a box.

Here, it is desirable that the exhaust device 211 is composed of two units in total, one is connected to the two charge lock chambers 202 and 206, and the other is connected to the spin coating unit 203 and the first and second heat treatment units 204 and 205. superior. Furthermore, the spin coater 203 , the first heat treatment unit 204 and the second heat treatment unit 205 are constantly exhausted by means of the exhaust device 211 to maintain a depressurized state of an inert atmosphere (about 1.0 to 0.5 atmosphere). This is because silanes are toxic, and vaporized silanes are prevented from leaking out of the device. The allowable concentration (TLV) of monosilane is 5 ppm, and it is considered that the allowable concentration of higher silanes such as disilane is also within the same limit. In addition, silanes burn naturally in air at normal temperature, and burn explosively when the concentration is high. Therefore, the exhaust gas of the exhaust device 211 connected to at least the spin coater 203 and the first and second heat treatment units 204 and 205 is connected to the exhaust gas treatment device 212 for detoxifying silanes. Furthermore, the processing chambers 201 to 207 in FIG. 7 are connected to each other by slide valves, and the slide valves are opened and closed when transporting glass substrates so that gasified silanes do not flow into the two charging chambers.

The main part of the spin coater 203 is substantially the same as that in FIG. 12 , however, in FIG. 7 , the temperature of the stage on which the glass substrate is vacuum clamped is preferably controlled by the temperature control unit 210 . Here, when trisilane is used, it is normal temperature, and it is desirable to control it to about 0°C; when disilane is used, it is -40°C or lower, and it is desirable to control it to -60°C or lower. In addition, the storage unit 208 and the supply line (not shown) of disilane and trisilane are also preferably controlled by the temperature control unit 210 to a temperature substantially in the same range as the platen temperature.

In order to apply disilane and trisilane as a liquid, the coating operation must be carried out at a temperature lower than its boiling point. However, considering that at normal temperature and pressure, the vapor pressure of trisilane is about 0.4 atmosphere; , At -40°C, the vapor pressure of disilane is about 0.3 atmosphere, and the vapor pressure must be reduced as much as possible. Therefore, it is desirable to reduce the temperature of these silanes and the substrate as much as possible.

In order to further reduce the vapor pressure of disilane and trisilane and improve the uniformity of the coating film, the spin coater 203 and the first and second heat treatment parts 204 and 205 may be in a pressurized state of inert gas. In a pressurized state, the boiling point temperature of disilane and the like rises, and the vapor pressure at the same temperature decreases. Therefore, the temperature of the spin coater 203 can be set higher than the above-mentioned set temperature, and can be set at a temperature close to room temperature. temperature. Considering this situation, in case trisilane leaks out, it is better to make a double structure that can be in a depressurized state outside the structure that can be in a pressurized state, and use a specially arranged exhaust device to drain the leaked trisilane. Silane, etc. outgassing. The exhaust gas is processed by the exhaust processing unit 212 .

In addition, the silane gas stagnant inside the spin coater 203 and the first and second heat treatment parts 204 and 205 is also exhausted by the exhaust device 211 .

In the silicon film forming apparatus shown in FIG. 8, the silicon film forming apparatus shown in FIG. 7 and the insulating film forming apparatus shown in FIG. 1 are connected in series. That is, the spin coating unit 102 and the heat treatment furnace 103 of FIG. 1 are introduced between the second heat treatment unit 205 of FIG. 7 and the charge lock chamber 206 .

In FIG. 8, in the second heat treatment section 205, the operation is the same as that of the device in FIG. 7 up to the crystallization treatment of the silicon film by laser annealing. In the spin coater 102, the crystallized silicon film is coated with a polysilazane and an inorganic SOG film. Next, in the heat treatment section 103, the applied film is made into an insulating film.

The spin coater 203 and the first and second heat treatment units 204 and 205 are in a depressurized state of an inert atmosphere similarly to FIG. 7 . In FIG. 1 , the spin coater 102 and the heat treatment unit 103 of the insulating film are under normal pressure, but in the apparatus of FIG. 8 , it is in a depressurized state of an inert atmosphere. For this purpose, exhaust is performed by the exhaust device 108 .

In order to form an insulating film in an inert atmosphere over this silicon film, the silicon film formed by means of FIG. 8 is not exposed to the atmosphere. Therefore, the interface between the silicon film and the insulating film that governs the characteristics of the TFT element can be controlled, and therefore the characteristics of the TFT element and the uniformity of the characteristics can be improved.

Furthermore, in FIG. 8, the insulating film is formed on the silicon film after the silicon film is crystallized. However, like the device in FIG. 6, the insulating film may be formed after the first heat treatment of the silicon film, so that Crystallization of the silicon film proceeds after heat treatment of the insulating film. Also in this case, as in the case of FIG. 6 , the insulating film capping layer is crystallized by performing laser annealing on the accompanying silicon film. The insulating film has the effect of reducing the surface reflectance of the silicon film, and therefore has the advantage of making the silicon film absorb laser energy efficiently. In addition, the surface of the silicon film after laser annealing is smooth.

(Method of diffusing impurities into coated silicon film)

The method of diffusing impurities into the silicon film can also be implemented by using an existing ion implantation device, but as shown in FIG. 10 or 11, it is preferable to diffuse the impurities into the lower layer after coating an insulating layer containing impurities. in the silicon membrane.

The formation of the insulating film containing impurities can use the same apparatus as that shown in FIG. 2 . In this embodiment, an SOG film containing phosphorous glass or boron glass is applied as the impurity-containing coating film. In the case of forming an N-type high-concentration impurity region, each 100ml of liquid (the liquid uses alcohol and ethyl acetate as a solvent and contains a siloxane polymer so that the Si concentration is a few percent by weight) contains An SOG film of several hundred μg of P250 is used as a coating film containing impurities. In this case, the coating liquid is stored in the coating liquid storage unit 105 in FIG. 2 , and the coating liquid is applied from the spin coater 102 to the substrate. Furthermore, in the spin coater 102, by rotating the substrate at a rotation speed of 1000 rpm, several thousands film thickness. In the first heat treatment section 103A, the impurity-containing coating film is heat-treated at 300°C to 500°C to form a phosphorous glass film containing P250 in a molar percentage of several percent. The TFT substrate on which the phosphorous glass film is formed is subjected to high-temperature short-time heat treatment such as lamp annealing or laser annealing in the second heat treatment part 103B, so that the impurities in the SOG film are diffused into the underlying silicon film in the solid phase. A high-concentration impurity region is formed. Finally, using the unloader 104, the TFT substrate is placed in the box.

In the formation of the source and drain regions, the coating process and the high-temperature short-time annealing process can be processed within 1 minute, which has very high productivity. Furthermore, the heat treatment process takes several tens of minutes, but it is also possible to reduce the intermission time by devising measures in terms of the length and structure of the heat treatment furnace.

10 and 11 are cross-sectional views of a TFT coated with a coating film containing the above impurities. FIG. 10 is a coplanar TFT corresponding to FIG. 3 . On a glass substrate 14 , an underlying insulating film 12 is formed, and a silicon layer 14 is patterned thereon. The gate insulating film 16 is etched and removed to mask the gate electrode 18 and temporarily expose the silicon layer to be the source/drain region. Accordingly, the impurity-containing coating film 50 is formed so as to be joined to the regions 14S and 14D which are the source and drain of the above-mentioned silicon film. Then, by the heat treatment at high temperature and for a short time, phosphorus contained in the impurity-containing coating film 50 diffuses into the above-mentioned silicon film by solid-phase diffusion, forming an N-type source/drain region 14S having a sheet resistance of 1 kΩ/□ or less. , 14D.

As can be clarified from the cross-sectional view of the TFT shown in FIG. 3, the subsequent steps are formed in the following order: forming an interlayer insulating film, and after removing the coating film 50 containing impurities, it can also be changed to form The interlayer insulating film of the coating film may instead be re-formed on the coating film 50 containing impurities. In the method of re-forming the interlayer insulating film on the coating film 50 containing impurities, the insulating film is two layers, so that the short-circuit defects of the source line and the gate line in the liquid crystal display device are reduced.

FIG. 11 is an inverted staggered TFT corresponding to FIG. 4 . An underlying insulating film 32 is formed on a glass substrate 30 , a gate 35 is formed thereon, and a silicon layer 33 is patterned through the gate insulating film 34 . The insulating film 52 is a protective film for the channel region and also serves as a mask for impurity diffusion, and is formed by coating an insulating film.

The insulating film 54 containing impurities is bonded to the insulating film 52 serving as a mask and the regions 33S and 33D to be the source/drain regions of the silicon film 33, and is formed as a coating insulating film. When the impurity-containing insulating film 54 is heat-treated at a high temperature and for a short time, phosphorus contained in the impurity-containing insulating coating film 54 diffuses into the silicon film 33 by solid-phase diffusion, forming a sheet resistance of about 1 kΩ/□. N-type source/drain regions 33S, 33D.

As can be seen from the cross-sectional view of the TFT shown in FIG. 4, in the subsequent steps, after the insulating film 54 containing impurities is removed, the pixel electrode, source wiring, and connection portion of the drain electrode are formed in this order.

According to this embodiment, in the coplanar TFT shown in FIG. 3 , the formation of the source and drain regions does not use conventional ion implantation and ion doping, but is carried out by forming a coating film and high-temperature short-time heat treatment. , and thus, it is possible to manufacture TFTs using an inexpensive and high-yield device. In addition, in the inverted staggered TFT shown in FIG. 4, the formation of the source and drain regions by CVD is replaced by the formation of a coating film and high-temperature short-time heat treatment, which is the same as the case of the coplanar TFT. High-yield devices are used to manufacture liquid crystal display devices.

(Formation method of coated conductive film)

的导电膜。在导电性物质的微粒中，除了银以外还有金、铝、铜、镍、钴、铬、ITO等，能够借助于涂敷型导电膜形成装置形成导电膜。Next, a method for forming a coated conductive film by applying a liquid containing conductive particles will be described. Coated conductive films can also be produced using the apparatus shown in FIG. 1 or FIG. 2 . At this time, as the liquid stored in the coating liquid storage unit 105 shown in FIGS. 1 and 2, a solution obtained by dispersing fine particles of a conductive substance such as metal in a liquid (for example, an organic solvent) is used. For example, the particle diameter A solution of silver particles dispersed in organic solvents such as terpineol and toluene is discharged from the spin coater 102 onto the substrate. Thereafter, the substrate was rotated at 1000 rpm, and the coating liquid was spin-coated on the substrate. Furthermore, if heat treatment is performed at 250° to 300°C in the heat treatment section 103 of FIG. 1 or the first heat treatment section 103A of FIG. 2 , several thousand

conductive film. Fine particles of conductive substances include gold, aluminum, copper, nickel, cobalt, chromium, ITO, etc. in addition to silver, and a conductive film can be formed by a coating type conductive film forming apparatus.

The obtained conductive film is a collection of fine particles and is very active. Therefore, it is necessary to make the spin coater 102, the heat treatment part 103, or the first heat treatment part 103A in an inert atmosphere.

In addition, the resistance value (compared with the volume resistance value) of the coated conductive film is about 1 digit higher. In this case, if the coated conductive film is further heat-treated at 300 to 500° C. in the second heat treatment portion 103B in FIG. 2 , the resistance value of the conductive film will decrease. At the same time, the contact resistance between the source region of the TFT and the source wiring formed by coating the conductive film, and further, the contact resistance between the drain region and the pixel electrode formed by coating the conductive film can be reduced. If high-temperature short-time heat treatment such as lamp annealing and laser annealing is performed in the second heat treatment part 103B, it is possible to more effectively lower the resistance of the coated conductive film and reduce the contact resistance. In addition, reliability can be improved by forming multiple layers of different metals. Silver is easily oxidized in air, so aluminum and copper, which are difficult to oxidize in air, can be formed on silver.

(Formation method of transparent electrode)

Next, a method for forming a transparent electrode using a coated ITO film will be described. Film formation of coated ITO can also be performed using the same apparatus as in FIG. 2 . The coating solution used in this example is a liquid in which organic indium and organic tin are blended into mixed xylene at a ratio of 97:3 to 8% (for example, the product name of Asahi Denka Co., Ltd.: アデカITO Coating film/ITO-103L). Furthermore, the range that can be used as a coating liquid is that the ratio of organic copper to organic tin is from 99:1 to 90:10. The coating liquid is stored in the coating liquid storage unit 105 shown in FIG. 2 .

The coating liquid is discharged onto the substrate by the spin coater 102, and spin coating is performed by rotating the substrate.

的ITO膜能够成为具有作为象素电极41充分性能的ITO膜：薄膜电阻为10²Ω/□～10⁴Ω/□、光透过率为90％以上。上述第1热处理后的ITO膜的薄膜电阻的量级为10⁵～10⁶Ω/□，但是，由于上述第2热处理使薄膜电阻的量级降低到10²～10⁴Ω/□。Next, heat treatment of the coating film is performed, but the heat treatment conditions at this time are set as follows. First, in the first heat treatment part 103A of FIG. 2 , the first heat treatment is performed in an air or oxygen atmosphere at 250° C. to 450° C. for 30 minutes to 60 minutes. Next, in the second heat treatment part 103B, the second heat treatment is performed in an atmosphere containing hydrogen at 200° C. to 400° C. for 30 minutes to 60 minutes. As a result, after removing the organic components, a mixed film of indium oxide and tin oxide (ITO) is formed. With the help of the above heat treatment, the film thickness is about ~ about

The ITO film can be an ITO film having sufficient performance as the pixel electrode 41: the sheet resistance is 10 ² Ω/□ to 10 ⁴ Ω/□, and the light transmittance is 90% or more. The sheet resistance of the ITO film after the first heat treatment was on the order of 10 ⁵ to 10 ⁶ Ω/□, but the sheet resistance was reduced to 10 ² to 10 ⁴ Ω/□ by the second heat treatment.

In the formation of the coated ITO film, the coated ITO film and the coated insulating film can be produced in series by the apparatus shown in FIG. 5 or 6 . If manufactured in this way, the surface of the active coated ITO film immediately after formation can be protected with an insulating film.

(Other formation methods of the conductive layer)

This method is a method of forming a metal plating layer on the above-mentioned coated ITO film.

FIG. 9 shows a flow chart of nickel plating on an ITO-coated surface. In step 1 of Fig. 9, an ITO film is formed by the method described above. Next, in step 2, the ITO coated surface is activated, for example by photolithography. In step 3, as a pretreatment of the nickel plating treatment in step 4, first, a palladium/tin complex salt is adhered to the ITO-coated surface, and second, a treatment for precipitating palladium on the surface is performed.

In the nickel plating process in Step 4, for example, by performing an electroless plating process, the palladium deposited on the ITO-coated surface is replaced with nickel to complete the nickel plating process. In step 4, the electroplating layer is further densified by annealing the nickel plating layer. Finally, in step 5, the conductive layer is completed by performing noble metal plating, such as gold plating, as an oxidation preventing layer on the Ni plating layer.

By this method, a plating layer is formed on the basis of coating an ITO film, and a conductive layer other than a transparent electrode can be formed.

(Coating methods other than spin coating)

14 to 16 are diagrams showing a coating device for coating a liquid such as a resist film used for a mask when the fluid used to form a thin film is photolithography. In this embodiment, a protective film is exemplified as a liquid to be applied. Of course, it is not limited to the protective film coating, and it can also be used for formation of the above-mentioned various coating films. In FIG. 14 , a substrate 302 is vacuum-adsorbed onto a platform 301 . The protective liquid is supplied from the liquid storage unit 307 to the dispenser 304 through the supply tube 306 . The protection liquid is then applied to the substrate 302 as a large number of dots 303 from a plurality of nozzles 305 provided on a dispenser head 307 .

FIG. 15 shows a detailed cross-sectional view of nozzle 305 . The structure shown in FIG. 15 is the same as that of the inkjet printing head, and the protective liquid is discharged by vibration of the piezoelectric element. The protective liquid passes through the supply port 312 from the inlet portion 311 and is stored in the cavity portion 313 . By expanding and contracting the piezoelectric element 314 bonded to the vibrating plate 315, the vibrating plate 315 is moved to reduce or increase the volume of the cavity 313. When the volume of the cavity 313 decreases, the protection liquid is discharged from the nozzle port 316 , and when the volume of the cavity 313 increases, the protection liquid is supplied into the cavity 313 from the supply port 312 . For example, as shown in FIG. 16, multiple nozzle openings 316 are arranged two-dimensionally. As shown in FIG. .

In FIG. 16, the nozzle openings 316 are arranged at intervals of several tens of μm in the horizontal interval P1 and several mm in the vertical interval P2. The diameter of the nozzle opening 316 is several tens of μm to several hundreds of μm. The discharge amount at one time is tens of ng or even hundreds of ng, and the droplet diameter of the discharged protection liquid is tens of μm or even hundreds of μm. Immediately after the dot-applied protective liquid is discharged from the nozzle 305, it has a circular shape of several hundred μm. In the case of applying the protective liquid to the entire surface of the substrate, if the interval between the above-mentioned points 303 is several hundred μm, and the substrate is rotated at several hundred to several thousand rpm for a few seconds, coating with a uniform film thickness can be obtained. membrane. The film thickness of the coating film can be controlled not only by the rotation speed and rotation time of the substrate, but also by the diameter of the nozzle opening 316 and the interval between the dots 303 .

This protective liquid coating method is the liquid coating method of the ink jet method, because it is applied in dots on the entire surface of the substrate, so the substrate is moved (for example, rotated) so that the protective liquid is applied between the points 303 Therefore, the protective liquid can be used effectively. This method can not only be applied to protective films, but also can be applied to the formation of insulating films, silicon films, and conductive films that utilize the above-mentioned coating films. Effect.

In addition, in the liquid application by the inkjet method, since the diameter of the nozzle opening 316 can be made smaller, it is possible to apply on a linear pattern with a width of 10 to 20 μm. If this technique is used in the formation of silicon film and conductive film, it can be directly drawn without photolithography process. If the pattern ratio of TFT is limited to several tens of μm, by combining this direct drawing and coating method of film formation technology, without using CVD equipment, sputtering equipment, ion implantation and ion dopant equipment, exposure device, corrosion device, you can manufacture a liquid crystal display device. That is, a liquid crystal display device can be manufactured using only heat treatment devices such as an inkjet coating device, a laser annealing device, and a lamp annealing device according to the present invention.

Furthermore, the first embodiment exemplifies a thin film device by taking a TFT active matrix substrate as an example, but this embodiment can be similarly applied to MIM (metal-insulator-metal), MIS (metal-insulator-silicon) and the like. Other two-terminal elements and three-terminal elements are on the same active matrix substrate as the pixel switching element. For example, the present invention can also be applied to a thin-film laminated structure of an active matrix substrate using a MIM that does not include a semiconductor layer but only uses a conductive layer and an insulating layer. Furthermore, the present invention can be applied not only to active matrix substrates but also to those using elements such as EL (Electroluminescence) as display elements instead of liquid crystals. Furthermore, the present invention can be applied to semiconductor devices including TFTs, DMDs (Digital Miller Devices), and thin film devices having various thin film stack structures including conductive layers, insulating layers, and semiconductor layers.

Next, the second to seventh embodiments in which the present invention is applied to an active matrix substrate for a liquid crystal display device, in particular, pixel electrodes formed using a conductive coating film, will be described.

2nd embodiment

FIG. 18 is an enlarged plan view showing part of a pixel area formed by division on an active matrix substrate for a liquid crystal display device; FIG. 19 is a cross-sectional view at a position corresponding to line I-I' thereof.

In Fig. 18 and Fig. 19, the active matrix substrate 400 for the liquid crystal display device utilizes data lines Sn, Sn+1, ... and scan lines Gm, Gm+1 to form a plurality of partitions on the insulating substrate 410. In the pixel area 402 , a TFT 404 is formed for each pixel area 402 . This TFT 404 has: a channel region 417 for forming a channel between a source region 414 and a drain region 416; a gate 415 opposed to the channel region 417 through a gate insulating film 413; The interlayer insulating film 421 formed on one side is electrically connected to the source electrode 431 on the source region 414 through the contact hole 421A of the interlayer insulating film 421, and is electrically connected to the source electrode 431 on the source region 414 through the contact hole 421B of the interlayer insulating film 421. The pixel electrode 414 is formed of an ITO film on the drain region 416 . The source 431 is a part of the data lines Sn, Sn+1, . . . , and the gate 415 is a part of the scan lines Gm, Gm+1, . . .

Here, the pixel electrode 441 is formed on the surface of the interlayer insulating film 421 similarly to the source electrode (data line) 431 . Therefore, the pixel electrode 441 is configured so that the outer edge portions 441A, 441B parallel to the data lines Sn, Sn+1 are located on the inside rather than the data lines Sn, Sn+1 so that there is no short circuit between these electrodes.

20(A) to (D) and FIGS. 21(A) to (C) are cross-sectional views showing the steps of the method of manufacturing the active matrix substrate of this embodiment.

In such a method of manufacturing the active matrix substrate 400, first, as shown in FIG. 20(A), as the insulating substrate 410, a general-purpose non-alkali glass is used. First, after cleaning the insulating substrate 410, an underlying protective film 411 made of a silicon oxide film or the like is formed on the insulating substrate 410 by means of CVD (chemical vapor deposition) and PVD (physical vapor deposition) methods. . As the CVD method, there are, for example, a low-pressure CVD method (LPCVD method), a plasma CVD method (PECVD method), and the like. The PVD method includes, for example, a sputtering method and the like. Furthermore, depending on the impurities contained in the insulating substrate 410 and the cleanliness of the substrate surface, the underlying protection film 11 can also be omitted.

Next, a semiconductor film 406 such as an intrinsic silicon film to be an active layer of the TFT 404 is formed. The semiconductor film 406 can be formed by CVD or PVD. The semiconductor film 406 obtained in this way can be used as a semiconductor layer such as a TFT channel region as an intact amorphous silicon film. Furthermore, as shown in FIG. 20(B), the semiconductor film 120 can be irradiated with light energy such as laser light or electromagnetic energy for a short time to advance its crystallization.

Next, after forming a resist mask having a predetermined pattern, the semiconductor film 406 is patterned using the resist mask to form an island-like semiconductor film 412 as shown in FIG. 20(C). After patterning the semiconductor film 412, a gate insulating film 413 is formed by PVD or CVD.

Next, a thin film such as an aluminum film to be a gate is formed by sputtering. Usually, the gate electrode and the gate wiring are formed by the same process using the same metal material or the like. After depositing a thin film to be a gate electrode, patterning is performed to form a gate electrode 415 as shown in FIG. 20(D). At this time, scan lines are also formed. Next, impurity ions are introduced into the semiconductor film 412 to form a source region 414 and a drain region 416 . The portion to which impurity ions are not introduced serves as the channel region 417 . Using this method, the gate 415 becomes a mask for ion implantation, so the channel region 417 becomes a self-matching structure formed only under the gate 415, and a TFT with an offset gate structure and an LDD structure can also be formed. Impurity ions can be introduced by ion doping method or ion implantation method. The ion doping method uses an isotope non-separation type ion implantation device to inject hydride and hydrogen implanted with impurity elements. The ion implantation method uses isotope separation type ions. The implantation device only implants the required impurity ions. As a gas source for the ion dopant method, hydrides implanted with impurities such as phosphine (PH ₃ ) and diborane (B ₂ H ₆ ) diluted in hydrogen to a concentration of about 0.1% are used.

Next, as shown in FIG. 21(A), an interlayer insulating film 421 made of a silicon oxide film is formed by CVD or PVD. After ion implantation and formation of the interlayer insulating film 421 , heat treatment is performed for several tens of minutes to several hours in a suitable thermal environment below about 350° C. to activate the implanted ions and sinter the interlayer insulating film 421 .

Next, as shown in FIG. 21(B), contact holes 421A and 421B are formed in the interlayer insulating film 421 at positions corresponding to the source region 414 and the drain region 416 . Next, after sputtering forms an aluminum film or the like for forming the source, it is patterned to form the source 431 . At this time, the data line is also formed.

Next, as shown in FIG. 21(C), on the entire surface of the interlayer insulating film 421, an ITO film 408 is applied as a film.

When coating to form a film, various liquid or pasty coating materials can be used. Among these coating materials, if it is a liquid material, a dipping method, a spin coating method, etc. can be used; if it is a pasty material, a screen printing method, etc. can be used. Like the first embodiment, in the second embodiment, the coating material is a liquid material in which organic indium and organic tin are blended into 8% in a ratio of 97:3 in mixed xylene (for example, Soden Chemical Industry Co., Ltd. Co., Ltd. trade name: ADEKA ITO Coating Film/ITO-103L) can be applied to the surface side of the insulating substrate 410 (the surface of the interlayer insulating film 20 ) by the spin coating method. In this case, a material having a ratio of organic indium to organic tin in the range from 99/1 to 90/10 can be used as coating material.

～约的ITO膜成为：薄膜电阻为10²Ω/□～10⁴Ω/□、光透过率为90％以上，能够成为具有作为象素电极441的充分性能的ITO膜。第1热处理后ITO膜的薄膜电阻的量级为10⁵～10⁶Ω/□，但是，第2热处理的作用使薄膜电阻的量级降低到10²～10⁴Ω/□。In the second embodiment, after the solvent is dried and removed, the film coated on the surface of the insulating substrate 410 is also heat-treated (fired). At this time, the conditions for the heat treatment are, for example, performing the first heat treatment in an atmosphere containing hydrogen at 200°C to 400°C for 30 minutes to 60 minutes in air or atmospheric oxygen at 250°C to 450°C 2nd heat treatment for 30 minutes to 60 minutes. As a result, after removing the organic components, a mixed film (ITO film) of indium oxide and tin oxide is formed. With the above heat treatment, the film thickness is about 500

~ about The ITO film has a sheet resistance of 10 ² Ω/□ to 10 ⁴ Ω/□, a light transmittance of 90% or more, and an ITO film having sufficient performance as the pixel electrode 441 . The sheet resistance of the ITO film after the first heat treatment was on the order of 10 ⁵ to 10 ⁶ Ω/□, but the second heat treatment reduced the sheet resistance to 10 ² to 10 ⁴ Ω/□.

After forming the ITO film 408 in this way, patterning is performed as shown in FIG. 19, and when the pixel electrode 441 is formed, a TFT 404 is formed on each pixel region 402. Therefore, if the TFT 404 is driven by a control signal supplied through the scanning line Gm, an image signal can be written from the data line Sn through the TFT 404 into the liquid crystal cell enclosed between the pixel electrode 441 and the counter substrate (not shown). , for the given display.

Thus, in the second embodiment, when the ITO film for forming the pixel electrode 441 is formed, the liquid coating material is applied to the insulating substrate 410 by a coating film-forming method such as spin coating suitable for processing a large substrate. Therefore, unlike the film-forming method that requires a bulky film-forming apparatus having a vacuum system such as a sputtering method, a film can be formed using an inexpensive film-forming apparatus.

And, as shown in FIG. 25(B), according to the coating film-forming method, when the liquid or paste coating material for constituting the pixel electrode 441 is applied to the surface of the interlayer insulating film 421, the coating The material fills the contact hole 421B smoothly, so that the surface shape of the pixel electrode 441 is less likely to be affected by unevenness or the like on the side of the lower layer. Therefore, it is possible to form a flat pixel electrode 441 (conductive film) without step-like deformation on the surface, so that polishing can be performed stably, and at the same time, the generation of reverse slope regions can be prevented. Therefore, according to the second embodiment, display resolution can be improved.

On the contrary, as shown in FIG. 25(A), when utilizing the sputtered ITO film 450 to form the pixel electrode, the sputtered ITO film 450 is formed after the step-like deformation on the face where the sputtered ITO film 450 is formed occurs. . The step-like deformation formed on the surface of the sputtered ITO film 450 becomes the cause of unstable grinding and anti-slope regions, degrading the display quality. Furthermore, when the sputtered ITO film 450 is formed, it is difficult to completely fill the contact hole 421B, and therefore, an opening is formed thereon, and the presence of the opening also causes unstable polishing and an anti-tilt region. Therefore, as shown in FIG. 25(B), it is useful to form the pixel electrode 441 by coating an ITO film.

3rd embodiment

FIG. 22 is an enlarged plan view showing a part of a pixel area formed in divisions on an active matrix substrate for a liquid crystal display device; FIG. 23 is a cross-sectional view at a position corresponding to line II-II' thereof.

In Fig. 22 and Fig. 23, the structure of the thin film device on the active matrix substrate 401 for the liquid crystal display device related to the third embodiment, and the structure of the thin film device on the active matrix substrate 400 in the second embodiment The differences are as follows.

First, in the third embodiment, the interlayer insulating film has a two-layer structure: the lower layer side interlayer insulating film 421 on the side of the lower layer on the side of the surface of the gate 415; An upper layer side interlayer insulating film 422 is formed on the surface of the film 421 . Here, source electrode 431 is formed on the surface of lower-layer-side insulating interlayer film 421 so as to be electrically connected to source region 414 through contact hole 421A of lower-layer-side insulating interlayer film 421 .

On the contrary, the pixel electrode 441 is formed on the surface of the upper layer side interlayer insulating film 422 so as to be electrically connected to the drain region 416 through the contact hole 422A of the upper layer side interlayer insulating film 422 and the lower layer side interlayer insulating film 421. superior. In this way, since the pixel electrode 441 is formed on a layer different from the source electrode 431, there is no short circuit between these electrodes.

Therefore, in the third embodiment, as can be seen from FIG. 22, the pixel electrode 441 is formed in any pixel region 402 so that the outer edge portions 441A, 441B of the two sides parallel to the data lines Sn, Sn+1 It is located above the data lines Sn and Sn+1 between adjacent pixels. In addition, the pixel electrode 441 is formed so that the outer edge portions 441C, 441D on both sides parallel to the scanning lines Gm, Gm+1 are located above the scanning lines Gm, Gm+1 between adjacent pixels. That is, a part of the pixel electrode 441 covers the data lines Sn, Sn+1 and the scan lines Gm, Gm+1. Therefore, no gap can be seen in plan between the four outer edges 441A to 441D of the pixel electrode 441 and the data lines Sn, Sn+1 and scanning lines Gm, Gm+1. Therefore, the data lines Sn, Sn+1 and the scan lines Gm, Gm+1 themselves function as black matrices. As a result, high-definition display can be performed without increasing the number of steps for forming the black matrix layer.

Such a method of manufacturing the active matrix substrate 401 is the same as that of FIGS. 20(A) to 20(D) described in the second embodiment. Therefore, in the following description, referring to FIGS. 24(A) to 24(D), the steps following the step shown in FIG. 20(D) will be described.

First, as shown in FIG. 24(A), after forming the source region 414, the drain region 416, the channel region 417, the gate insulating film 413, and the gate 415, the surface of the gate 415 is formed by CVD or PVD. On that side, a lower layer side interlayer insulating film 412 made of a silicon oxide film is formed.

Next, as shown in FIG. 24(B), a contact hole 421A is formed at a position corresponding to the source region 414 in the lower layer side interlayer insulating film 421 . Secondly, after the aluminum film for forming the source electrode 431 and the data line is formed by sputtering, it is patterned to form the source electrode 431 and the data line Sn, Sn+1, ...

Next, as shown in FIG. 24(C), an upper interlayer insulating film 422 made of a silicon oxide film is formed on the surface of the lower interlayer insulating film 421 by CVD or PVD. Next, a contact hole 422A is formed at a position corresponding to the drain region 416 in the lower interlayer insulating film 421 and the upper interlayer insulating film 422 .

Next, as shown in FIG. 24(D), the entire surface of the interlayer insulating film 422 is coated with ITO 409 .

When forming a film by coating, various liquid or pasty coating materials can be used similarly to the first and second embodiments. Among these coating materials, if it is a liquid material, a dipping method, a spin coating method, etc. can be used, and if it is a pasty material, a screen printing method etc. can be used. In addition, in the third embodiment, the above-mentioned first and second heat treatments are also performed on the coated ITO film 409 to lower the sheet resistance.

Then, the ITO film 409 is patterned to form a pixel electrode 441 as shown in FIG. 23 . At this time, as described with reference to FIG. 22, in any pixel area 2, the outer edges 441A to 441D of the four sides of the pixel electrode 441 are patterned so that they cover the data lines Sn, Sn, and Sn between adjacent pixels. Sn+1 and scan lines Gm, Gm+1. Usually, data lines and scanning lines are formed of a metal film, so these data lines and scanning lines can be used as a light-shielding film and can be used as a black matrix. Therefore, high-definition display can be performed without increasing the number of steps.

Moreover, the formation range of the pixel area 441 is expanded to the maximum until it covers the data line and the scanning line, so the numerical aperture of the pixel area 402 is large. In this way, the clarity of display is also improved.

Also, in the third embodiment, when forming the ITO film for forming the pixel electrode 441, the liquid coating material is applied to On the insulating substrate 410, therefore, as shown in Fig. 10 (B), on the side of the lower layer, the part where the pixel electrode 441 is formed is thicker at the concave portion; That part of the 441 is thinner. Therefore, unevenness due to the data lines is not reflected on the surface of the pixel electrode 441 . Therefore, it is possible to form a flat pixel electrode 441 without step-like deformation on the surface, so that polishing can be performed stably, and at the same time, generation of reverse slope regions and the like can be prevented. Such advantages are also the same on the scanning line layer side. Therefore, according to the present invention, display clarity is improved.

Furthermore, when forming the ITO film for forming the pixel electrode 441, the liquid coating material is applied to the insulating substrate 410 by a spin coating method. The film-forming method of the device is different, and a film can be formed using an inexpensive film-forming device.

Furthermore, the coating film-forming method is excellent in covering the stepped deformation. Therefore, even if the contact holes 421A and 422A of the lower interlayer insulating film 421 and the upper interlayer insulating film 422 exist on the lower layer side, it is relatively difficult to Large irregularities do not affect the surface shape of the pixel electrode 441 (ITO film). That is, an interlayer insulating film of a two-layer structure is formed; the lower layer side interlayer insulating film 421 and the upper layer side interlayer insulating film 422 . Therefore, even if the unevenness due to the contact holes 421A and 422A is large, it is possible to form a flat pixel electrode 441 without step-like deformation on the surface. Therefore, it is possible to adopt a structure in which the pixel electrode 441 is directly connected to the drain region 416. Obviously, it is also possible to form an electrical connection between the lower interlayer insulating film 421 and the upper interlayer insulating film 422 without forming an electrical connection to the drain region 416. The relay electrodes (vias) on the drain region 416 can simplify the manufacturing process.

Furthermore, in the third embodiment as well, when forming the pixel electrode 441, the ITO film is formed from a liquid coating material, therefore, the spin coating method is used, but if a paste coating material is used, use The printing method can form the ITO film. Furthermore, if a paste-like coating material is used, screen printing can also be used. Therefore, the paste-like coating material is only printed on the region where the pixel electrode 441 should be formed, and thereafter, the dried and heat-treated The film is used as the pixel electrode 441 as it is. In this case, since there is no need to pattern the ITO film by etching, there is an advantage that the manufacturing cost can be significantly reduced.

In addition, any one of the second and third embodiments is described by taking the surface TFT whose surface shape is easily affected by the existence of the contact hole of the interlayer insulating film as an example, but even in the reverse In a staggered TFT, etc., when the present invention is applied to form a pixel electrode on a region where there is unevenness on the lower layer side, the influence of the unevenness on the surface shape of the pixel electrode can be eliminated.

Fourth embodiment

As the structure of the fourth embodiment, the structure of the II-II' section in FIG. 22 is shown in FIG. 26 which is different from that of FIG. 22 of the third embodiment.

In the fourth embodiment, the interlayer insulating film 420 has a two-layer structure: the lower layer side interlayer insulating film 421 located on the lower layer side; the upper layer side interlayer insulating film laminated on the surface of the lower layer side interlayer insulating film 421 422.

As the structure shown in FIG. 26, the difference from FIG. 23 is that the pixel electrode 441 has a two-layer structure: a sputtered ITO film 446 formed by sputtering on the surface of the upper layer side interlayer insulating film 422 (conductive sputtering) film); a film-formed coated ITO film 447 (conductive transparent coated film) is coated on the sputtered ITO film surface.

Thus, the coated ITO film 447 is electrically connected to the drain region 416 through the sputtered ITO film 446 on the lower side thereof. The sputtered ITO film 446 and the applied ITO film 447 are patterned and formed together as described below, so their formation regions are the same.

Except for this point, the structure is the same as that of FIG. 23, and therefore, the same symbols as those used in FIG. 23 are assigned, and detailed description thereof will be omitted.

In the structure of the fourth embodiment, its planar layout is also the same as that of FIG. 22 described in the third embodiment. Therefore, the data lines Sn, Sn+1... and the scanning lines Gm, Gm+1. .....It itself has the function as a black matrix. Therefore, high-definition display can be performed without increasing the number of steps.

In the third embodiment, the contact resistance of the coated ITO film 447 in contact with the drain region 416 tends to increase compared with the sputtered ITO film. In the fourth embodiment, since the coated ITO film 447 is always electrically connected to the drain region 416 by sputtering the ITO film 446, there is an advantage that the so-called problem of high contact resistance can be eliminated.

A method of manufacturing such an active matrix substrate 401 will be described with reference to FIGS. 27(A) to (E) and FIGS. 28(A) to (E). Here, FIG. 27(A)-(E) is the same as FIG. 20(A)-(D) and FIG. 24(A) showing the process of the embodiment shown in FIG. 3, and therefore, description thereof will be omitted. In addition, Fig. 28(B), (C) is the same as Fig. 24(B), (C) showing the process of the third embodiment.

Fig. 28(A) shows a protective pattern forming step preceding Fig. 28(B). In order to form the source electrode 431 and the source line shown in FIG. 28(B), in FIG. 28, an aluminum film 460 is formed by sputtering. Thereafter, a patterned resist mask 461 is formed on the aluminum film 460 . As shown in FIG. 28(B), the source electrode 431 and the data line are formed by etching the aluminum film 460 using the protective film 461 .

Next, as shown in FIG. 28(C), an upper interlayer insulating film 422 made of a silicon oxide film is formed on the surface of the lower interlayer insulating film 421 by CVD or PVD. After ion implantation and formation of the interlayer insulating film, heat treatment is performed from tens of minutes to several hours in a suitable thermal environment below about 350°C to activate the implanted ions and interlayer insulating film 420 (lower layer side interlayer insulating film 420). film 421 and the upper side interlayer insulating film 422). Next, a contact hole 422A is formed at a position corresponding to the drain region 416 in the lower interlayer insulating film 421 and the upper interlayer insulating film 422 .

Next, as shown in FIG. 28(D), a sputtered ITO film 446 is formed on the entire surface of the interlayer insulating film 420 composed of the lower interlayer insulating film 421 and the upper interlayer insulating film 422 by sputtering. (conductive sputtered film).

Next, as shown in FIG. 28(E), a coating ITO film 447 (conductive transparent coating film) is formed on the surface of the sputtered ITO film 446 .

～约2000

的涂敷ITO膜447成为：薄膜电阻为10²Ω/□～10⁴Ω/□、光透过率为90％以上，能够与溅射ITO膜446一起，构成具有充分性能的象素电极441。When forming the coated ITO film 447, the same processing conditions as those in the first to third embodiments can be employed. In the fourth embodiment, after drying and removing the solvent of the liquid or paste coating applied on the surface side, heat treatment is carried out in the heat treatment apparatus. At this time, the conditions for the heat treatment are, for example, at a temperature of 250° C. to 450° C., preferably in air at 250° C. to 400° C., or in an atmosphere containing oxygen, or in a non-reducing atmosphere for from 30 minutes to After the first heat treatment (firing) for 60 minutes, the second heat treatment is performed for 30 minutes to 60 minutes in a reducing atmosphere containing hydrogen at a temperature of 200°C or higher, preferably 200°C to 350°C. In either case, the treatment temperature in the second heat treatment is set lower than the treatment temperature in the first heat treatment so that the protective film stabilized in the first heat treatment does not thermally deteriorate. When such heat treatment is performed, the organic components are removed, and at the same time, the coating becomes a mixed film of indium oxide and tin oxide (coated ITO film 447). As a result, a film thickness of approx.

~ about 2000

The coated ITO film 447 has a sheet resistance of 10 ² Ω/□ to 10 ⁴ Ω/□, and a light transmittance of 90% or more. Together with the sputtered ITO film 446, a pixel electrode 441 with sufficient performance can be formed. .

Then, until the substrate temperature becomes 200° C. or lower, the insulating substrate 410 is kept in a reducing atmosphere subjected to the second heat treatment, or in a non-oxidizing atmosphere such as nitrogen gas, or in another non-oxidizing atmosphere. After the temperature is below 200° C., the insulating substrate 410 is taken out from the heat treatment apparatus and released into the air. In this way, if the temperature of the insulating substrate 410 is lowered to about 200° C. or lower before being exposed to the atmosphere, it is possible to prevent the low-resistance protective film from being oxidized again due to reduction in the second heat treatment in an atmosphere containing hydrogen. Therefore, the coated ITO film 447 having a small sheet resistance can be obtained. In order to prevent re-oxidation of the coated ITO film 447, it is more desirable that the temperature when the insulating substrate 410 is taken out from the heat treatment apparatus and released into the air is 100° C. or lower. This is because the more deficient oxygen in the coated ITO film 447, the lower its specific resistance, and therefore, when the coated ITO film 447 is re-oxidized due to oxygen in the atmosphere, its specific resistance increases.

After forming the sputtered ITO film 446 and the coated ITO film 447 in this way, as shown in FIG. Alternatively, by dry etching patterning using methane or the like, as shown in FIG. 26, the pixel electrode 441 is formed. Thereby, TFTs are formed on the respective pixel regions 402, respectively. Therefore, if the TFT is driven by the control signal supplied through the scanning line Gm, the image signal can be written from the data line Sn into the liquid crystal enclosed between the pixel electrode 441 and the counter electrode (not shown) through the TFT, Make the given display.

Also, in this embodiment, when forming the pixel electrode 441, the coated ITO film 447 is used. The coating film-forming method is excellent in covering the stepped deformation. Therefore, as shown in FIG. The irregularities and the like on the surface of the ITO film 446 are smoothly filled. Also, when the coating material is applied to the insulating substrate 410, the portion where the ITO coating film 447 is formed is thicker at the concave portion; One part is thinner. Therefore, unevenness due to the data line 431 is not reflected on the surface of the pixel electrode 441 either. The same is true for the upper side of the scanning line 415 . Therefore, it is possible to form a flat pixel electrode 441 without step-like deformation on the surface, so that polishing can be performed stably, and at the same time, the generation of reverse slope regions can be prevented. Therefore, according to the present invention, display clarity is improved.

On the other hand, as shown in FIG. 39(A), when only the sputtered ITO film 446 is used to form the pixel electrode, after the step-like deformation on the surface where the sputtered ITO film 446 is formed occurs, the sputtered ITO film is formed. Film 446. The step-like deformation formed on the surface of the sputtered ITO film 446 becomes the cause of unstable grinding and anti-slope regions, degrading the display quality. Furthermore, when forming the sputtered ITO film 446, it is difficult to completely fill the contact hole 442A, so an opening is formed thereon. The presence of openings also causes unstable polishing and reverse slope regions. Therefore, it is useful to form the coated ITO film 447 .

Also, as in the fourth embodiment, when the interlayer insulating film 420 has a two-layer structure for the purpose of forming the pixel electrode 441 and the source electrode 431 on different layers, the vertical dimension of the contact hole However, when the coated ITO film 447 is used, the effect of being able to form a flat pixel electrode 441 is remarkable.

Also, compared with the coated ITO film 447, the sputtered ITO film 446 tends to have poor adhesion to the resist mask. However, in this embodiment, the protective layer is formed on the surface of the coated ITO film 447 The mask 462, therefore, does not cause the problem of low composition accuracy. Therefore, the pixel electrode 441 having a high-definition pattern can be formed.

fifth embodiment

Fig. 29 is a plan view showing an enlarged part of the pixel region formed by division on the active matrix substrate for liquid crystal display to which the present invention is applied; Sectional view. In addition, in the fifth embodiment, the same reference numerals are assigned to the same parts as those in the fourth embodiment, and description thereof will be omitted.

In FIG. 29, the active matrix substrate 401 for liquid crystal display related to the fifth embodiment is divided into a plurality of pixel regions 402 by using the data lines 431 and scanning lines 415 on the insulating substrate 410. The element regions 402 respectively form TFTs.

In the structure of the fifth embodiment, except for the sputtered ITO film, its planar layout is also the same as that of FIG. 22 described in the third and fourth embodiments. Therefore, the data lines Sn, Sn+1... The lines Gm, Gm+1... itself function as a black matrix. Therefore, high-definition display can be performed without increasing the number of steps.

The difference between the fifth embodiment and the fourth embodiment is that, as described below, the sputtered ITO film 456 and the coated ITO film 457 are respectively formed by patterning, and their formation regions are different. The ratio of the formation region of the coated ITO film 457 to The formation area of the sputtered ITO film 456 is wide.

Here, as in the fourth embodiment, when the coated ITO film and the sputtered ITO film are formed on the same region, both ITO films can be patterned together. That is, the protective mask is formed only on the surface of the coated ITO film with good adhesion to the protective mask; and the protective mask does not need to be formed on the surface of the sputtered ITO film with poor adhesion to the protective mask. . Therefore, high-definition graphics can be achieved.

On the contrary, in the case of the fifth embodiment, it is also necessary to form a resist mask on the surface of the sputtered ITO film. However, in the case where the coated ITO film is formed on a region wider than the formation region of the sputtered ITO film, even if, for example, the adhesion between the sputtered ITO film and the resist mask is poor and the patterning accuracy is low, it is not compatible with the resist mask. The patterning accuracy of the coated ITO film with good adhesion determines the final pattern, therefore, high-definition patterns can be achieved.

Such a method of manufacturing the active matrix substrate 401 is the same as the steps shown in FIGS. 27(A) to 27(E) described in the fourth embodiment. ) process is also common. Therefore, in the following description, only the steps subsequent to the step shown in FIG. 31(D) will be described with reference to FIGS. 31(D) to 31(F).

In FIG. 31(C), an upper interlayer insulating film 422 made of a silicon oxide film is formed on the surface of a lower interlayer insulating film 421, and a contact hole 422A is formed.

Next, as shown in FIG. 31(D), an ITO film 456 (conductive conductive film 456) is formed on the entire surface of the interlayer insulating film 420 composed of the lower layer side interlayer insulating film 421 and the upper layer side interlayer insulating film 422 by sputtering. sputtered film). The steps so far are the same as those of the fourth embodiment.

However, in the fifth embodiment, first, only the sputtered ITO film 456 is patterned using an etchant such as aqua regia series or hydrogen bromide, or by dry etching using methane or the like. That is, as shown in FIG. 31(D), after the sputtered ITO film 456 is formed, a resist mask 464 is formed and patterned. The sputtered ITO film 456 is etched using the mask 464, and the sputtered ITO film 456 remains on a region narrower than the region where the pixel electrode 441 is to be formed, as shown in FIG. 31(E). Next, on the surface of the sputtered ITO film 456, a coating ITO film 457 (conductive transparent coating film) is formed. When forming the coated ITO film 457, the coating materials described in the above-mentioned embodiments can also be used.

After forming the coating ITO film 457 in this way, as shown in FIG. 31(F), a resist mask 462 is formed, and it is etched using an etchant such as aqua regia series or hydrogen bromide, or by a drying agent using methane or the like. The etchant is patterned to form a pixel electrode 441 as shown in FIG. 30 .

Also in the structure of the fifth embodiment, the same effect as that of the structure of the fourth embodiment can be provided. In particular, compared with the sputtered ITO film, the contact resistance of the coated ITO film 457 in contact with the drain region 416 tends to increase. However, in the fifth embodiment, the coated ITO film 447 is The film 456 is always electrically connected to the drain region 416, so there is an advantage that the problem of a so-called high contact resistance can be eliminated. In addition, since the sputtered ITO film 456 is thin, for example, even if the adhesion to the resist mask 464 is poor, it can be dealt with in a short etching time, so there is no hindrance in patterning. In addition, since the final pattern accuracy of the pixel electrode 40 is determined for the pattern accuracy of the coated ITO film 457 with high pattern accuracy, high-definition patterns can be achieved.

sixth embodiment

Fig. 32 is a plan view showing an enlarged part of the pixel area formed by division on the active matrix substrate for liquid crystal display to which the present invention is applied; Fig. 33 is a cross-section at a position corresponding to line IV-IV' picture.

The characteristic structure of the sixth embodiment is that the pixel electrode 441 is composed of a coating ITO film 468 (conductive transparent coating film) coated on the surface of the upper layer side interlayer insulating film 422; Film 468 is electrically connected to relay electrode 466 formed of an aluminum film formed on the surface of lower interlayer insulating film 421 by sputtering through contact hole 442A of upper interlayer insulating film 442 . Also, the relay electrode 466 is electrically connected to the drain region 416 through the contact hole 421B of the lower layer side interlayer insulating film 421 . Thus, the pixel electrode 441 is electrically connected to the drain region 416 through the relay electrode 466 on the lower layer side thereof.

Here, the relay electrode 466 is an aluminum film and has no light transmittance. Therefore, the formation area thereof is limited to the inside and surrounding of the contact hole 421B so as not to reduce the numerical aperture.

Such a method of manufacturing the active matrix substrate 401 is the same as the steps shown in FIGS. 27(A) to 27(E) described in the fourth embodiment. Therefore, in the following description, only the steps performed after the step shown in Fig. 27(E) will be described with reference to Figs. 34(A) to 34(D).

As shown in FIG. 34(A), after contact holes 421A and 421B are formed in the lower interlayer insulating film 421 at positions corresponding to the source region 414 and the drain region 416, sputtering is used to form the source electrode. 431 and the aluminum film 460 (conductive sputtered film/metal film) of the data line. Next, a resist mask 470 is formed, and the aluminum film 460 is patterned using the resist mask 470 . As a result, as shown in FIG. 34(B), the source electrode 431, the data line, and the relay electrode 466 are formed simultaneously.

Next, as shown in FIG. 34(C), an upper interlayer insulating film 422 made of a silicon oxide film is formed on the surface of the lower interlayer insulating film 421 by CVD or PVD. Next, a contact hole 422A is formed at a position corresponding to the relay electrode 466 (a position corresponding to the drain region 416 ) in the upper interlayer insulating film 422 .

Next, as shown in FIG. 34(D), on the entire surface of the interlayer insulating film 420 composed of the lower interlayer insulating film 421 and the upper interlayer insulating film 422, a coated ITO film 468 (conductive transparent coating film).

When forming the coated ITO film 468, the coating materials described in the above-mentioned embodiments can also be used.

After the ITO film 468 is thus formed, a resist mask 462 is formed and patterned to form a pixel electrode 441 as shown in FIG. 33 .

In this case, as can be seen from FIG. 33 , a black matrix including data lines Sn, Sn+1 . . . and scanning lines Gm, Gm+1 . . . can also be configured. Furthermore, the numerical aperture of the pixel region 402 is increased, and a flat pixel electrode 441 without step-like deformation on the surface can be formed, so polishing can be performed stably, and at the same time, generation of reverse slope regions can be prevented.

Also, the contact resistance between the pixel electrode 441 and the drain region 416 (silicon film) formed by coating the ITO film 468 tends to increase compared with the sputtered ITO film, etc. However, in the sixth embodiment, The coated ITO film 468 is electrically connected to the drain region 416 through the relay electrode 466 formed of an aluminum film formed by sputtering, so that the problem of a so-called high contact resistance can also be eliminated.

Furthermore, in this embodiment, aluminum is used as the relay electrode 466. However, if a two-layer film of aluminum and a high-melting point metal is used for the relay electrode 466, the ITO film 468 and the coated ITO film 468 can be combined. The contact resistance is suppressed to be lower. That is, refractory metals such as tungsten and molybdenum are more difficult to oxidize than aluminum, so they are not oxidized even if they come into contact with the coated ITO film 468 containing a large amount of oxygen. Therefore, the contact resistance between the relay electrode 466 and the ITO coating film 468 can be kept low.

Seventh embodiment

Fig. 35 is an enlarged plan view showing a part of the pixel area formed by division on the active matrix substrate for liquid crystal display to which the present invention is applied; Fig. 36 is a cross-sectional view at a position corresponding to its V-V' line .

The seventh embodiment is characterized in that the structure of the second embodiment shown in FIGS. 18 and 19 is improved, and the electrical connection between the coated ITO film 441 and the drain region 416 is ensured through the relay electrode 480 .

In FIG. 35, the active matrix substrate 401 related to the seventh embodiment is also divided into a plurality of pixel regions 402 by using the data lines 431 and scanning lines 415 on the insulating substrate 410, and each pixel region 402 is formed separately. TFT (non-linear element for pixel switching). Here, if only the flattening of the pixel electrode and the reduction of its contact resistance are aimed at, the following configuration can be achieved.

That is, as shown in FIG. 36, in the seventh embodiment, the interlayer insulating film 421 is composed of only one silicon oxide film.

On the side of the lower layer, on the surface of the interlayer insulating film 421, on the side of the surface of the relay electrode 480 made of an aluminum film (conductive sputtering film/metal film) formed by sputtering On it, a pixel electrode 4441 composed of a coated ITO film is formed. Thus, the pixel electrode 441 is electrically connected to the drain region 416 through the relay electrode 480 . Here, the relay electrode 480 is an aluminum film, which has no light-transmitting property. Therefore, the formation area thereof is also limited to only the inside and the periphery of the contact hole 421B.

In the seventh embodiment, the pixel electrode 441 is arranged in the same layer as the source electrode 431 so that there is no short circuit between these electrodes (see FIGS. 35 and 36).

The manufacturing method of the active matrix substrate 401 thus constituted is substantially the same as the steps shown in FIGS. 27(A) to 27(E) described in the fourth embodiment. Therefore, in the following description, only the steps performed after the step shown in Fig. 27(E) will be described with reference to Figs. 37(A) to 37(C).

As shown in FIG. 37(A), contact holes 421A and 421B are formed in interlayer insulating film 421 at positions corresponding to source region 414 and drain region 416 . Next, after the aluminum film 460 for forming the source electrode 431 and the data line is formed by sputtering, a protective mask 470 is formed. Next, the aluminum film 460 is patterned using the resist mask 470, and as shown in FIG. 37(B), source electrodes 431, data lines, and relay electrodes 480 are formed.

Next, as shown in FIG. 37(C), an ITO coating film 482 (conductive transparent coating film) is formed on the entire surface side of the interlayer insulating film 421 . When forming the coated ITO film 482, the coating materials of the above-described embodiments can also be used.

After the coated ITO film 482 is formed in this way, a resist mask 484 is formed, and the ITO film 482 is patterned using this to form a pixel electrode 441 as shown in FIG. 36 .

In the seventh embodiment, the coating film-forming method excellent in covering the step-like deformation is also used when forming the pixel electrode 441, so that the flat pixel electrode 441 without the step-like deformation on the surface can be formed. Thus, polishing can be performed stably, and at the same time, generation of reverse slope regions and the like can be prevented. In addition, by inserting the relay electrode, the problem of an increase in the contact resistance between the pixel electrode 441 and the drain region 416, which is formed of an ITO film formed by a coating film-forming method, can be eliminated.

In addition, the present invention is not limited to the above-described embodiments, and various modified implementations are possible within the scope of the gist of the present invention.

For example, in the sixth and seventh embodiments, from the viewpoint of minimizing the number of steps, the relay electrodes 466, 480, the source electrodes 431 and the data lines are connected by a metal film (aluminum film) made of the same material. formed simultaneously. Instead, as shown in FIG. 38(A), when the interlayer insulating film 420 is composed of the lower layer side interlayer insulating film 421 and the upper layer side interlayer insulating film 422, the upper layer side interlayer insulating film 422 may be On the surface, both a pixel electrode 441 made of an ITO film formed by coating film formation and a relay electrode 486 made of a conductive sputtered film are formed. With such a configuration, unlike the sixth embodiment, the area where the pixel electrodes 441 are formed can be expanded, so that the data lines and scanning lines can be used as black matrices. In addition, since the relay electrode 486 (conductive sputtering film) is formed in a different process from that of the source electrode 431, the same metal material as that of the source electrode 431 or a different material may be used for the material. .

Also, any one of the sixth and seventh embodiments has been described as an example of a planar TFT in which the contact hole of the interlayer insulating film easily affects the surface shape of the pixel electrode. However, even in reverse staggered The present invention can also be applied to TFTs such as TFTs. In particular, when it is necessary to form a pixel electrode on a region with unevenness, if a pixel electrode using a conductive transparent coating film formed by coating film formation as in the present invention is formed, the pixel electrode can be removed. The influence of such unevenness on the surface shape of the pixel electrode.

For example, in the reverse staggered TFT shown in FIG. 38(B), if the pixel electrode 441 is coated with an ITO film, the surface of the pixel electrode 441 can be flattened. In the TFT shown in FIG. 38(B), the intrinsic amorphous silicon film constituting the surface side of the insulating substrate 410, the underlying protective film 411, the gate 415, the gate insulating film 413, the channel region 417, and the channel protection Insulating films 490 are stacked sequentially, and on both sides of the insulating film 490 for channel protection, source/drain regions 414, 416 of high-concentration N-type amorphous silicon films are formed; in these source/drain regions 414, 416 A source electrode 431 and a relay electrode 492 made of sputtered films of chromium, aluminum, titanium, etc. are formed on the surface of the electrode. Furthermore, on the surface side thereof, an interlayer insulating film 494 and a pixel electrode 441 are formed. Here, the pixel electrode 441 is formed by coating an ITO film, and therefore, the surface is flat. The pixel electrode 441 is electrically connected to the relay electrode 496 through the contact hole of the interlayer insulating film 441 . That is, the pixel electrode 441 is electrically connected to the drain region 416 through the relay electrode 496 made of a sputtered film. Therefore, the so-called connection between the pixel electrode 441 and the drain region 416 made of an ITO film (silicon) can be eliminated. Membrane) the problem of high contact resistance. Furthermore, since the pixel electrode 441 and the source electrode 431 are formed in different layers, these electrodes are not short-circuited. Therefore, the pixel electrode 441 can be formed in a wide area until it covers the data line and the scanning line (not shown), so that the data line and the scanning line can be used as a black matrix, and at the same time , can increase the numerical aperture of the pixel area.

Furthermore, when forming a pixel electrode, a coating ITO film is formed from a liquid coating material, so a spin coating method is used, but if a paste coating material is used, a printing method can be used to form a coating ITO film. . Furthermore, if a paste coating material is used, screen printing can also be used. Therefore, the paste coating material is only printed on the region where the pixel electrode should be formed, and thereafter, the dried and heat-treated film can also be printed. It is used as a pixel electrode as it is. In this case, since there is no need to pattern the ITO film by etching, there is an advantage that the production cost can be significantly reduced.

Furthermore, the second to seventh embodiments have only described examples in which the pixel electrodes are formed using the coating film. However, as described in the first embodiment, it is of course possible to form the pixel electrodes using the coating film. Any of the insulating layers, conductive layers, and semiconductor layers.

Eighth embodiment

The electronic device constructed using the liquid crystal display device of the above embodiment includes a display information output source 1000 shown in FIG. The display information output source 1000 includes memory such as ROM and RAM, an adjustment circuit that adjusts and outputs a video signal, and outputs display information such as a video signal based on a clock from the clock generation circuit 1008 . The display information processing circuit 1002 processes and outputs display information based on the clock from the clock generation circuit 1008 . The display information processing circuit 1002 may include, for example, an amplification/inversion circuit, a phase expansion circuit, a rotation circuit, a sub-correction circuit, a clamping circuit, and the like. The display driving circuit 1004 includes a scanning side driving circuit and a data side driving circuit, and drives the liquid crystal panel 1006 for display. The power supply circuit 1010 supplies power to each of the above-mentioned circuits.

As the electronic device of such structure, can enumerate the liquid crystal projector shown in Figure 41, the personal computer (PC) corresponding to the multimedia shown in Figure 42 and engineering workstation (EWS), the BP machine shown in Figure 43, mobile phone, Word processors, televisions, video recorders or direct-view video recorders, electronic notebooks, desktop computers, car navigation devices, POS terminals, devices with touch screens, etc.

The liquid crystal projector shown in FIG. 41 is a projection projector using a transmissive liquid crystal panel as a light valve, and uses an optical system of, for example, three prisms.

In FIG. 41 , in a projector 1100, a plurality of reflectors 1106 and two dichroic mirrors 1108 are used inside an optical waveguide 1104 to divide the projection light emitted from a lamp device 1102 of a white light source into three primary colors of R, G, and B. It is directed to three liquid crystal panels 1110R, 1110G, and 1110B that display images of respective primary colors. Then, the light modulated by the respective liquid crystal panels 1110R, 1110G, and 1110B is incident on the dichroic prism 1112 from three directions. Dichroic prism 1112 bends red light R and blue light B by 90°, makes green light G propagate along a straight line, synthesizes images of primary colors, and projects color images onto a screen through projection lens 1114.

A personal computer 1200 shown in FIG. 42 includes a three-dimensional unit 1204 having a keyboard 1202 and a liquid crystal display screen 1206 .

The BP machine 1300 shown in Figure 43 includes: an optical waveguide 1306 with a liquid crystal display substrate 1304 and a backlight 1306a in a metal frame 1302, a circuit substrate 1308, the first and second shielding plates 1310, 1312, and two elastic conductors 1314, 1316, and a strap 1318 carrying the film. Two elastic conductors 1314, 1316 and a film-carrying tape 1318 connect the liquid crystal display substrate 1304 with the circuit substrate 1308.

Here, the liquid crystal display substrate 1304 is a device in which liquid crystal is sealed between two transparent substrates 1304a and 1304b, thereby forming at least a dot matrix liquid crystal display. The drive circuit 1004 shown in FIG. 40 may be formed on one transparent substrate, or the display information processing circuit 1002 may be provided in addition to the drive circuit 1004 . Circuits that are not mounted on the liquid crystal display substrate 1304 can be used as external circuits of the liquid crystal display substrate and mounted on the circuit substrate 1308 in the case of FIG. 43 .

Since FIG. 43 shows the structure of the BP machine, a circuit board 1308 is required in addition to the liquid crystal display substrate 1304. However, when the liquid crystal display device is used as a part of an electronic device, the display drive circuit is installed In the case of a transparent substrate, the minimum unit of the liquid crystal display device is the liquid crystal display substrate 1304 . Alternatively, the liquid crystal display substrate 1304 can be fixed to the metal frame 1302 serving as a casing, and it can be used as a part of an electronic device (that is, a liquid crystal display device). Furthermore, in the case of a backlight type, an optical waveguide 1306 having a liquid crystal display substrate 1304 and a backlight 1306a is mounted in a metal frame 1302 to constitute a liquid crystal display device. Instead, as shown in FIG. 44, a TCP (tape carrying color) 1320 in which an IC chip 1324 is mounted on a polyimide tape 1322 on which a metal conductive film is formed is connected to two transparent substrates 1304a constituting a liquid crystal display substrate 1304. and 1304b, it can be used as a component for an electronic device (that is, a liquid crystal display device).

Claims (8)

1. method that forms thin-film device, it comprises:

Make head relatively move and head is located on substrate substrate, described has a plurality of nozzles;

From a plurality of nozzles of described head first fluent material is discharged on the substrate, so that form the composition of first coated film on substrate, first fluent material is the solution that comprises solvent and solute; And

From first coated film, remove solvent, so that on substrate, form the first film.

2. the method for formation thin-film device according to claim 1 is characterized in that also comprising:

Second fluent material is discharged on the first film, so that form second coated film on the first film, second fluent material is the suspension that comprises decentralized medium and dispersion; And

Remove decentralized medium from second coated film, so that on substrate, form second film.

3. the method for formation thin-film device according to claim 1 is characterized in that: the first film is a semiconductor film, and described solute comprises the semi-conducting material that is dissolved in the described solution.

4. the method for formation thin-film device according to claim 1 is characterized in that: described the first film is a semiconductor film, and described solution comprises the polysilane material that is dissolved in the described solution.

5. the method for formation thin-film device according to claim 1 is characterized in that:

Described the first film is a dielectric film, and described solute comprises the poly-silazane that is dissolved in the solution, and described solution comprises dimethylbenzene.

6. the method for formation thin-film device according to claim 2 is characterized in that: described second film is a conducting film, and described dispersion comprises the silver particles that is dispersed in the decentralized medium.

7. an employing forms the method for electroluminescent device according to the described method of claim 1 to 6.

8. an employing forms the method for electric equipment according to the described method of claim 1 to 6.

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