CN100362491C - Detecting system and method - Google Patents
Detecting system and method Download PDFInfo
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- CN100362491C CN100362491C CNB200510112935XA CN200510112935A CN100362491C CN 100362491 C CN100362491 C CN 100362491C CN B200510112935X A CNB200510112935X A CN B200510112935XA CN 200510112935 A CN200510112935 A CN 200510112935A CN 100362491 C CN100362491 C CN 100362491C
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Abstract
The present invention relates to a detecting system which comprises a terminal host machine and an awaiting testing circuit board, wherein the terminal host machine generates a trigger signal. The awaiting testing circuit board comprises a system chip, a memory and a processor, wherein the system chip receives the trigger signal from the terminal host machine and generates an interruption, the memory stores a detecting program code which corresponds to the interruption, the processor receives the interruption and executes the detecting program which corresponds to the interruption in the memory so as to generate a detecting result, and then the system chip transfers the detecting result to the terminal host machine through the processor.
Description
Technical field
The invention relates to a kind of detection system and method, particularly about a kind of detection system and method for circuit board.
Background technology
Generally speaking, hardware unit is made up of several spare parts, if hardware unit will move normally, then needs each spare part cooperation, and is in harmonious proportion with suitable interface such as driver.
As shown in Figure 1, one main frame 1 is installed a testing software 11, whether can normally be used between System on Chip/SoC and each device on the motherboard 12 of testing software 11 Test Hosts 1, the developer can supervise every setting value (as driver, hard disk setting value, processor cache device or interrupt vector table or the like) of circuit board 12 at main frame 1 on-the-spot use test software 11.
Yet, if main frame 1 load operation system successfully, then testing software 11 also can't successfully carry out, and the mistake that circuit board 12 is taken place before the load operation system can't be found out, the developer also efficiently correction circuit plate 12 or with the mistake of circuit board 12 relevant apparatus.
Therefore, a kind of detection system and method are provided, in the hope of can be before the load operation system testing circuit plate, and then provide the result of developer's testing circuit plate, with assist the developer promptly the correction circuit plate or with the mistake of circuit board relevant apparatus, improve the development efficiency of circuit board, one of current just important problem.
Summary of the invention
Because above-mentioned problem, purpose of the present invention for provide a kind of can be before the load operation system detection system and the method for testing circuit plate.
So, for reaching above-mentioned purpose, comprise an end host and a circuit board to be tested according to detection system of the present invention, wherein end host produces a trigger pip, circuit board to be tested comprises a System on Chip/SoC, a storer and a processor, the trigger pip of System on Chip/SoC receiving terminal main frame and produce an interruption wherein, memory storage is interrupted a pairing trace routine code, processor receives and interrupts and carry out interrupting pairing trace routine code in this storer to produce a testing result, and System on Chip/SoC is sent to end host with testing result by processor.
In addition, the present invention also provides a kind of detection method, the method comprises following steps: produce a trigger pip by an end host, then by the trigger pip of a circuit board receiving terminal main frame to be tested, then producing one according to trigger pip interrupts, according to interrupting a pairing trace routine code producing a testing result, and transmit testing result to end host by circuit board to be tested.
From the above, because of having System on Chip/SoC, storer and processor according to remote detecting system of the present invention and method, so the trigger pip that System on Chip/SoC can the receiving terminal main frame and processor produced is interrupted, processor can interrupt pairing trace routine code to produce testing result in the execute store before the load operation system, therefore the developer be able to according to testing result promptly the correction circuit plate or with the mistake of circuit board relevant apparatus, to improve the development efficiency of circuit board.
Description of drawings
Fig. 1 is for showing a block diagram of known detection system;
Fig. 2 is for showing the block diagram according to the detection system of preferred embodiment of the present invention;
Fig. 3 is for showing the block diagram according to the detection system embodiment of preferred embodiment of the present invention; And
Fig. 4 is a synoptic diagram, shows the detection method according to preferred embodiment of the present invention.The element numbers explanation:
1: main frame
11: detect software
12: motherboard
2: detection system
21: end host
22,23: distance host
3: circuit board to be tested
31: System on Chip/SoC
32: storer
321,361: program code
33: processor
34: communication port is gone in output
35: System on Chip/SoC
36: random access memory
TRI: trigger pip
INT: interrupt
RUT: testing result
S01-S05: detection method
Embodiment
Hereinafter with reference to correlative type, detection system and method according to preferred embodiment of the present invention are described.
As shown in Figure 2, comprise an end host 21 and a circuit board 3 according to the detection system 2 of preferred embodiment of the present invention, wherein circuit board 3 comprises a System on Chip/SoC 31, a storer 32 and a processor 33.
Interrupt INT is the interruption (SMI, System Management Interrupt) of a system management.Circuit board 3 is motherboards.End host 21 is mobile communications devices, and storer 32 can be the ROM (read-only memory) (BIOS ROM) of ROM-BIOS.
As shown in Figure 3, in the present embodiment, circuit board 3 more comprises an output and goes into communication port 34, a System on Chip/SoC 35 and a random access memory 36, and detection system 2 more comprises a distance host 22 and a distance host 23.
Output is gone into the trigger pip TRI of communication port 34 receiving terminal main frames 21 and is transmitted trigger pip TRI to System on Chip/ SoC 31,31 pairs of processors of System on Chip/SoC 33 produce after the interrupt INT, processor 33 is that the program code 321 that sees through in System on Chip/SoC 35 and System on Chip/SoC 31 pseudostatic rams 32 is program code 361 to random access memory 36, and processor 33 executive routine codes 361 are to produce testing result RUT then.Testing result RUT sees through System on Chip/SoC 35 from processor 33 to be sent to System on Chip/SoC 31, and it is to receive testing result RUT and transmit testing result RUT to end host 21 from System on Chip/SoC 31 that communication port 34 is gone in output.It is a serial communication port (Serial Communication Port) that communication port 34 is gone in output.
In the present embodiment, circuit board 3 can be in power down state earlier, the back is waken up by the trigger pip of end host 21, processor 33 is finished after the wake up procedure and processor 33 as yet before the not load operation system, the interrupt INT that System on Chip/SoC 31 produces is the interruption SMI of highest ranking, so processor 33 meeting priority processing are interrupted SMI and can not interrupted by other interruption or operation, so the trace routine of interrupt INT correspondence must be carried out by processor 33.
In addition, distance host 22 or distance host 23 produce one and detect requirement, end host 21 receives to detect and requires also to require to produce trigger pip TRI according to detecting, and after testing result RUT generation, distance host 22 sees through end host with distance host 23 and obtains testing result.Can be connected by network (LAN or world-wide web) between end host 21, distance host 22 and the distance host 23, therefore, the developer not only can be at end host testing circuit plate, also can be in the distance host testing circuit plate of different location.That is to say that developer and circuit board need not in same place, and many people detect same circuit board throughout jointly simultaneously.
As shown in Figure 4, the detection method according to preferred embodiment of the present invention comprises step S01 to step S05.
Step S01 produces a trigger pip by an end host.
Step S02 is the trigger pip by a circuit board receiving terminal main frame to be tested.
Step S03 produces an interruption according to trigger pip.
Step S04 is according to interrupting a pairing trace routine code to produce a testing result.
Step S05 transmits testing result to end host by circuit board to be tested.
The detection method of present embodiment can be applicable to aforesaid detection system, and aforesaid detection system discussed in the embodiment of Fig. 2 and Fig. 3, so repeat no more the detection method of present embodiment.
In sum, because of having System on Chip/SoC, storer and processor according to remote detecting system of the present invention and method, so the trigger pip that System on Chip/SoC can the receiving terminal main frame and processor produced is interrupted, processor can interrupt pairing trace routine code to produce testing result in the execute store before the load operation system, therefore the developer be able to according to testing result promptly the correction circuit plate or with the mistake of circuit board relevant apparatus, to improve the development efficiency of circuit board.
The above only is an illustrative, but not is restrictive.Anyly do not break away from spirit of the present invention and category, and, all should be contained in the appended claim its equivalent modifications of carrying out or change.
Claims (20)
1. detection system comprises:
One end host, it produces a trigger pip; And
One circuit board to be tested, it comprises a System on Chip/SoC, a storer and a processor, wherein this System on Chip/SoC receives this trigger pip of this end host and produces an interruption, this memory storage should be interrupted a pairing trace routine code, this processor receives this interruption and carries out in this storer pairing this trace routine code of this interruption producing a testing result, and this testing result is sent to this end host.
2. detection system as claimed in claim 1, wherein this interruption is the interruption of a system management.
3. detection system as claimed in claim 1, wherein this circuit board to be tested more comprises:
Communication port is gone in one output, and it receives this trigger pip of this end host and transmits this trigger pip to this System on Chip/SoC, and this is exported into communication port and also receives this testing result and transmit this testing result to this end host.
4. detection system as claimed in claim 3, wherein this to export into communication port be a serial communication port.
5. detection system as claimed in claim 1 more comprises:
One distance host, it obtains this testing result by this end host.
6. detection system as claimed in claim 1 more comprises:
One distance host, it produces one and detects requirement, and wherein this end host receives this detection requirement and requires to produce trigger pip according to this detection.
7. detection system as claimed in claim 1 more comprises:
One distance host, it is connected with this end host by network.
8. detection system as claimed in claim 1, wherein this circuit board to be tested is a motherboard.
9. detection system as claimed in claim 1, wherein this end host is a mobile communications device.
10. detection method comprises:
Produce a trigger pip by an end host;
Receive this trigger pip of this end host by a circuit board to be tested;
Producing one by a System on Chip/SoC according to this trigger pip interrupts;
Interrupt a pairing trace routine code to produce a testing result by a processor according to this; And
Transmit this testing result to this end host by this circuit board to be tested.
11. detection method as claimed in claim 10, wherein this interruption is the interruption of a system management.
12. detection method as claimed in claim 10, wherein the step that receives this trigger pip of this end host by this circuit board to be tested is to go into this trigger pip that communication port receives this end host by an output of this circuit board to be tested.
13. detection method as claimed in claim 12, wherein this to export into communication port be a serial communication port.
14. detection method as claimed in claim 10, wherein transmitting this testing result to the step of this end host by this circuit board to be tested is to go into communication port by an output of this circuit board to be tested to transmit this testing result to this end host.
15. detection method as claimed in claim 14, wherein this to export into communication port be a serial communication port.
16. detection method as claimed in claim 10 more comprises:
Obtain this testing result by a distance host by this end host.
17. detection method as claimed in claim 10 more comprises:
Produce one by a distance host and detect requirement, wherein this end host receives this detection requirement and requires to produce trigger pip according to this detection.
18. detection method as claimed in claim 10 more comprises:
Set up being connected of a distance host and this end host by network.
19. detection method as claimed in claim 10, wherein this circuit board to be tested is a motherboard.
20. detection method as claimed in claim 10, wherein this end host is a mobile communications device.
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CNB200510112935XA CN100362491C (en) | 2005-10-14 | 2005-10-14 | Detecting system and method |
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CNB200510112935XA CN100362491C (en) | 2005-10-14 | 2005-10-14 | Detecting system and method |
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CN100362491C true CN100362491C (en) | 2008-01-16 |
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CN102096617B (en) * | 2009-12-14 | 2014-07-02 | 联想(北京)有限公司 | Detection device and detection method |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07219812A (en) * | 1994-01-28 | 1995-08-18 | Meidensha Corp | Abnormality monitoring system |
CN1181539A (en) * | 1996-11-04 | 1998-05-13 | 神达电脑股份有限公司 | Detection method for system host board and input/output system |
CN1185587A (en) * | 1996-11-26 | 1998-06-24 | 特克特朗尼克公司 | Method for generating self-diagnosis information from circuitboard and apparatus thereof |
US6567933B1 (en) * | 1999-02-19 | 2003-05-20 | Texas Instruments Incorporated | Emulation suspension mode with stop mode extension |
-
2005
- 2005-10-14 CN CNB200510112935XA patent/CN100362491C/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07219812A (en) * | 1994-01-28 | 1995-08-18 | Meidensha Corp | Abnormality monitoring system |
CN1181539A (en) * | 1996-11-04 | 1998-05-13 | 神达电脑股份有限公司 | Detection method for system host board and input/output system |
CN1185587A (en) * | 1996-11-26 | 1998-06-24 | 特克特朗尼克公司 | Method for generating self-diagnosis information from circuitboard and apparatus thereof |
US6567933B1 (en) * | 1999-02-19 | 2003-05-20 | Texas Instruments Incorporated | Emulation suspension mode with stop mode extension |
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