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CN109979510A - A kind of method, apparatus reducing non-volatile flash memory block erasing operation leakage current - Google Patents

A kind of method, apparatus reducing non-volatile flash memory block erasing operation leakage current Download PDF

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Publication number
CN109979510A
CN109979510A CN201711447020.3A CN201711447020A CN109979510A CN 109979510 A CN109979510 A CN 109979510A CN 201711447020 A CN201711447020 A CN 201711447020A CN 109979510 A CN109979510 A CN 109979510A
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CN
China
Prior art keywords
erasing
memory cell
cell group
judgement
erased
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CN201711447020.3A
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Chinese (zh)
Inventor
胡洪
张赛
付永庆
李宁
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GigaDevice Semiconductor Beijing Inc
Hefei Geyi Integrated Circuit Co Ltd
Original Assignee
GigaDevice Semiconductor Beijing Inc
Hefei Geyi Integrated Circuit Co Ltd
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Application filed by GigaDevice Semiconductor Beijing Inc, Hefei Geyi Integrated Circuit Co Ltd filed Critical GigaDevice Semiconductor Beijing Inc
Priority to CN201711447020.3A priority Critical patent/CN109979510A/en
Publication of CN109979510A publication Critical patent/CN109979510A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/14Circuits for erasing electrically, e.g. erase voltage switching circuits
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/34Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436Arrangements for verifying correct programming or erasure
    • G11C16/3468Prevention of overerasure or overprogramming, e.g. by verifying whilst erasing or writing
    • G11C16/3477Circuits or methods to prevent overerasing of nonvolatile memory cells, e.g. by detecting onset or cessation of current flow in cells and using the detector output to terminate erasing

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Abstract

The present invention relates to memory read/write scrub techniques fields, the invention discloses a kind of method and devices for reducing non-volatile flash memory block erasing operation leakage current, which comprises all storage units in the flash block at least one wordline are divided into a memory cell group;Receive the flash block erasing instruction;According to the flash block erasing instruction, erasing judgement is executed to memory cell group each in the flash block;If there is no the storage units that do not wipe in a memory cell group, the memory cell group erasing judging result is yes;The memory cell group for being yes for the erasing judging result does not execute erasing operation.The embodiment of the present invention executes erasing judgement to above-mentioned each memory cell group, for there is no the memory cell groups for the storage unit that do not wipe not to execute erasing operation, guarantee that the memory cell group will not be wiped by crossing, reduce the storage unit of crossing erasing of non-volatile flash memory block during block erasing, reduces the presence of leakage current.

Description

A kind of method, apparatus reducing non-volatile flash memory block erasing operation leakage current
Technical field
The invention belongs to memory read/write scrub techniques fields, and in particular to a kind of reduction non-volatile flash memory block erasing behaviour Make the method and device of leakage current.
Background technique
Now, data storage is a critical function in computer use.Nonvolatile memory is wherein important One type, NOR Flash (non-volatile flash memory) are common nonvolatile memories.
For NOR Flash product, reading and writing, wiping are its three most basic functions.Thereby it is ensured that this three The correct realization of a function is most important for NOR Flash product.Lower Fig. 1 is the threshold voltage distribution of storage unit Scheme, storage unit is that program (writes) process by the storage unit of 1- > 0 in Fig. 1, and on the contrary is erase (erasing) process, and Vr is Read voltage.Currently, being to all storage units in NOR Flash block (non-volatile flash memory block) erase process An erasing operation is executed, however in NOR Flash block in the erase process of all storage units, it is likely that it can go out Some storage units are now crossed erasing, led to the storage unit threshold voltage (Vt) < 0 of erasing, i.e. dashed region is corresponding in Fig. 1 Storage unit threshold voltage (Vt) < 0, so as to cause the presence of leakage current.
Inventor has found during studying the above-mentioned prior art, due to NOR Flash block erase process In, it is that an erasing operation is executed to all storage units, it is understood that there may be the storage unit for crossing erasing, so that leakage current is deposited , and then leading to different WL (word line, wordline), the storage unit on same root BL (bit line, bit line) is likely to occur It misreads.In Fig. 2, if storage unit 1, i.e. there is erasing, then might have electric current on entire BLn in cell1 in Fig. 2 Presence, if then storage unit 2 is originally program storage unit, then due to the presence of leakage current, when reading just It is possible that storage unit 2, i.e. cell2 in Fig. 2 misreads as erase storage unit, the result read is caused mistake occur. Sense Amplifier (sense amplifier) in Fig. 2 can be used for reading the storage state of each storage unit, and will read It takes result to amplify, is transferred to other control units.
Summary of the invention
A kind of method, apparatus reducing non-volatile flash memory block erasing operation leakage current provided by the invention, it is intended to it solves, In NOR Flash block erase process, an erasing operation directly is executed to all storage units, there is depositing for erasing Storage unit so that more leakage current there are the problem of.
A kind of method reducing non-volatile flash memory block erasing operation leakage current provided by the invention, which comprises
All storage units in the flash block at least one wordline are divided into a memory cell group;
Receive the flash block erasing instruction;
According to the flash block erasing instruction, erasing judgement is executed to memory cell group each in the flash block;If one There is no the storage units that do not wipe in a memory cell group, and the memory cell group erasing judging result is yes;
The memory cell group for being yes for the erasing judging result does not execute erasing operation.
Preferably, described to include: to memory cell group each in flash block execution erasing judgement
Positive voltage is added to the memory cell group of described one judgement to be erased, negative voltage is added to remaining memory cell group;It is described The absolute value of negative voltage is less than the absolute value of erasing voltage;
To the memory cell group of the judgement to be erased, determined;If in the memory cell group of the judgement to be erased There is no the storage units not being wiped free of, then the judgement result of the memory cell group to be erased judged is yes;
Using the judgement result as the erasing judging result of the memory cell group of the judgement to be erased;
Erasing into the memory cell group of next judgement to be erased judges operation.
Preferably, the memory unit address in the memory cell group of described one judgement to be erased with it is described next to be erased Memory unit address in the memory cell group of judgement is continuous.
Preferably, the method also includes: for it is described erasing judging result be no memory cell group execute erasing grasp Make.
Preferably, it includes: needle that the memory cell group for being yes for the erasing judging result, which does not execute erasing operation, To the memory cell group that the erasing judging result is yes, add the voltage reversed with the erasing instruction.
Preferably, the method also includes: record the erasing judging result of each memory cell group.
The present invention also provides a kind of reduction non-volatile flash memory block erasing operation leakage current device, described device includes:
Grouping module, for all storage units in the flash block at least one wordline to be divided into a storage Unit group;
Erasing instruction receiving module, for receiving the flash block erasing instruction;
Judgment module is wiped, is used for according to the flash block erasing instruction, to each memory cell group in the flash block Execute erasing judgement;If there is no the storage unit that do not wipe, the memory cell group erasing judgements in a memory cell group It as a result is yes;
First erasing executing module, the memory cell group for being yes for the erasing judging result do not execute erasing behaviour Make.
Preferably, the erasing judgment module includes:
Voltage control unit, it is single to remaining storage for adding positive voltage to the memory cell group of described one judgement to be erased Tuple adds negative voltage;The absolute value of the negative voltage is less than the absolute value of erasing voltage;
Judging unit is determined for the memory cell group to the judgement to be erased;If the judgement to be erased The storage unit not being wiped free of is not present in memory cell group, then the judgement result of the memory cell group of the judgement to be erased is It is;
Judging result acquiring unit is wiped, for using the judgement result as the memory cell group of the judgement to be erased Erasing judging result;
Jump-transfer unit judges operation for entering the erasing of memory cell group of next judgement to be erased.
Preferably, described device further include:
Second erasing executing module, the memory cell group for being no for the erasing judging result execute erasing behaviour Make.
Preferably, first erasing executing module includes: erasing instruction backward voltage unit, for being directed to the erasing The memory cell group that judging result is yes adds the voltage reversed with the erasing instruction.
In embodiments of the present invention, all storage units in flash block at least one wordline are divided into one first Memory cell group executes erasing judgement to memory cell group each in above-mentioned flash block according to flash block erasing instruction;If one There is no the storage unit do not wiped in memory cell group, memory cell group erasing judging result be it is yes, for above-mentioned erasing The memory cell group that judging result is yes does not execute erasing operation, is judged by grouping, for there is no the storage lists that do not wipe The memory cell group of member does not execute erasing operation, can guarantee that the memory cell group will not be wiped by crossing, reduce non-volatile Flash block crosses the storage unit of erasing in block erase process, and then reduces the presence of leakage current.
Detailed description of the invention
Fig. 1 is the threshold voltage distribution map of storage unit in non-volatile flash block;
The circuit diagram of storage unit in Fig. 2 non-volatile flash memory block;
The step of Fig. 3 is the method for the reduction non-volatile flash memory block erasing operation leakage current in the embodiment of the present invention one stream Cheng Tu;
The step of Fig. 4 is the method for the reduction non-volatile flash memory block erasing operation leakage current in the embodiment of the present invention two stream Cheng Tu;
Fig. 5 is to execute the circuit diagram that erasing determines to the memory cell group of WL0 in the embodiment of the present invention two;
Fig. 6 is to execute the circuit diagram that erasing determines to the memory cell group of WL15 in the embodiment of the present invention two;
Fig. 7 is the circuit diagram that erasing instruction is executed in the embodiment of the present invention two;
Fig. 8 is the structural frames that the device of non-volatile flash memory block erasing operation leakage current is reduced in the embodiment of the present invention three Figure;
Fig. 9 is the knot for the device that another in the embodiment of the present invention three reduces non-volatile flash memory block erasing operation leakage current Structure block diagram.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below with reference to attached in the embodiment of the present invention Figure, by specific embodiment, is fully described by technical solution of the present invention.Obviously, described embodiment is of the invention A part of the embodiment, instead of all the embodiments, based on the embodiment of the present invention, those of ordinary skill in the art are not doing The every other embodiment obtained under the premise of creative work out, falls within the scope of protection of the present invention.
Embodiment one
A kind of reduction non-volatile flash memory block erasing operation leakage current of the embodiment of the present invention is shown referring to Fig. 3, Fig. 3 The step flow chart of method, may comprise steps of:
All storage units in the flash block at least one wordline are divided into a storage unit by step 101 Group.
In the embodiment of the present invention, a storage unit in non-volatile flash memory block is usually one and possesses and can store charge Floating-gate device, (metal-oxide-semiconductor is metal (metal)-oxide (oxid)-semiconductor compared to general metal-oxide-semiconductor (semiconductor) field effect transistor), it is in addition to possessing a source electrode (source), a drain electrode (drain), and one Except grid (gate), also additionally possess the floating grid (floating gate) that can store charge.As it can be seen that its structure It makes and is slightly different with general metal-oxide-semiconductor, more floating grids, which electrically isolates from other parts, for storing electricity Lotus.A storage unit in the embodiment of the present invention can be such as the cell2 in the cell1 in Fig. 2, or such as Fig. 2.
In embodiments of the present invention, the grid of the storage unit in same wordline is all connected in this wordline, be only One chooses some storage unit, then to choose the corresponding bit line of the storage unit and wordline simultaneously.
In embodiments of the present invention, all storage units in non-volatile flash memory block all have corresponding address right with it It answers.Such as the non-volatile flash memory block for 64K, if the memory unit address range of the block is 0-ffffh, address is 0 Storage unit is the storage unit of first wordline and the control of first bit line.
In embodiments of the present invention, all storage units in non-volatile flash memory block at least one wordline are divided into One memory cell group.Referring to shown in Fig. 2, it can incite somebody to action, the upper all storage units of WLn+1 are divided into a memory cell group, It can also be and storage unit all on WLn+1 and WLn is divided into a memory cell group, can also be WLn+1, WLn It is divided into a memory cell group with storage unit all on WLn-1, in embodiments of the present invention, to specifically by several wordline On all storage units be divided into a memory cell group, be not especially limited.
In embodiments of the present invention, one is being divided into all storage units at least one wordline in flash block Memory cell group, a memory cell group can be the memory cell group of 1K, are also possible to the memory cell group of 4K, can also be Other memory cell groups are in embodiments of the present invention not especially limited the memory cell group of division.
To in non-volatile flash memory block storage unit divide memory cell group process, be referred to as under type into Row, if Fig. 5 is the non-volatile flash memory block of a 64K, the non-volatile flash memory block of the 64K can be drawn for example, referring to Fig. 5 It is divided into 16 storage unit groupings, each storage unit grouping can be 4K, at this point, in each wordline in WL0-WL15 all Have the storage unit of 4K, at this point, at least need 4*1024 bit line in the non-volatile flash memory block, in this way, a wordline with Above-mentioned 4*1024 bit line, combination defines the memory cell group of 4K, can be common true by above-mentioned WL0 and 4*1024 bit line Determine the memory cell group of 4K as the 1st memory cell group, as shown in dotted line frame in Fig. 5, as the 1st memory cell group.Equally , by WL1 and 4*1024 bit line, the memory cell group of determining 4K is as the 2nd memory cell group jointly, and so on, it will WL15 and 4*1024 bit line, the memory cell group of determining 4K is as the 16th memory cell group jointly.Thus by above-mentioned 64K Non-volatile flash memory block divide for 16 memory cell groups.
It should be noted that in embodiments of the present invention, the component of identical mark can be same portion in Fig. 2,5,6,7 Part is not limited this embodiment of the present invention.
It in embodiments of the present invention, can be according to the ground of storage unit thereon for the non-volatile flash memory block after grouping Location determines memory cell group belonging to the storage unit.Such as the non-volatile flash memory block for 64K, if the storage unit of the block Address range is 0-ffffh, and all storage units in the block at least one wordline are divided into a memory cell group, if Storage unit on the block is divided into 16 memory cell groups, then the address of its each memory cell group can be such as the following table 1 institute Show.
Table 1
As the storage unit in table 1 can determine the grouping where the storage unit according to each access unit address Number.
Step 102 receives the flash block erasing instruction.
In embodiments of the present invention, the erasing instruction of non-volatile flash memory block searches corresponding non-volatile cache block, into And erasing operation is executed according to the erasing instruction.For example, an erasing ground can be given when transmission block erasing operation instructs Location, if it is the erasing of the non-volatile flash memory block for above-mentioned 64k, as long as address given when sending instruction falls in 0- In ffffh, which receives block erasing instruction.In embodiments of the present invention, to non-volatile Flash block erasing instruction is not especially limited.
Step 103, according to the flash block erasing instruction, erasing is executed to memory cell group each in the flash block and is sentenced It is disconnected;If there is no the storage units that do not wipe in a memory cell group, the memory cell group erasing judging result is yes.
In embodiments of the present invention, according to block erasing instruction, erasing is executed to each memory cell group in the flash block Judgement.Such as the non-volatile flash memory block for above-mentioned 64K, if the memory unit address range of the block is 0-ffffh, if this is non- All storage units in 1 wordline in volatibility flash block are divided into a memory cell group, then in each wordline All storage units carry out erasing judgement, judge that there is no the storage units that are not wiped free of in each memory cell group.If There is no the storage units that do not wipe in one memory cell group, and it is yes which, which wipes judging result,.
In embodiments of the present invention, for example, for above-mentioned 64K non-volatile flash memory block, if the memory unit address of the block Range is 0-ffffh, if the block is divided into 16 memory cell groups, can judge that this is deposited with the highest order of access unit address Which memory cell group storage unit particularly belongs to.Specifically, 0h-0fffh is the 1st memory cell group, then the 1st memory cell group Highest order is 0 in memory unit address;1000h-1fffh is the 2nd memory cell group, then the storage unit of the 2nd memory cell group Highest order is 1 in address;2000h-2fffh is the 3rd memory cell group, then in the memory unit address of the 3rd memory cell group most A high position is 2;3000h-3fffh is the 4th memory cell group, then highest order is 3 in the memory unit address of the 4th memory cell group; 4000h-4fffh is the 5th memory cell group, then highest order is 4 in the memory unit address of the 5th memory cell group ..., F000h-ffffh is the 16th memory cell group;Then highest order is f in the memory unit address of the 16th memory cell group.
In the present example, for above-mentioned example, the above-mentioned erasing judgement to each memory cell group can be from first Memory cell group starts, then it is 0h-0fffh that first, which is wiped the memory unit address range of memory cell group judged, the In one memory cell group, storage unit judge one by one, when there is the storage list not being wiped free of in the first memory cell group When first, the erasing judging result of the memory cell group be it is no, when there is no the storage lists that are not wiped free of in the first memory cell group When first, the erasing judging result of the memory cell group is yes.It, can be with after the erasing judgement of the first memory cell group is finished According to continuous address, continue the erasing judgement of the second memory cell group, memory cell group carries out erasing judgement one by one, until this All memory cell groups in non-volatile deletion block all wipe judgement finish until.In embodiments of the present invention, to non-volatile Property flash block in the erasing judgement sequence of each memory cell group be not especially limited.
Step 104, the memory cell group for being yes for the erasing judging result do not execute erasing operation.
In embodiments of the present invention, it according to the erasing judging result of memory cell group each in non-volatile flash memory block, holds The above-mentioned erasing operation instruction of row.Specifically, showing the storage when the erasing judging result of above-mentioned a certain memory cell group, which is, is Without not erased storage unit in unit group, i.e., all storage units in the memory cell group are all in having wiped State, at this point, not executing erasing operation to the memory cell group.In turn, all storage units in the memory cell group are just The case where being not in erasing.
It should be noted that in embodiments of the present invention, smaller, a possibility that crossing erasing is divided to the memory cell group Also just smaller, it is also just smaller that there are the probability of leakage current, in embodiments of the present invention, does not make specifically to the memory cell group of division It limits.
Such as above-mentioned example, for the non-volatile flash memory block of above-mentioned 64K, if the block is divided into 16 storage units Group judges there is the storage unit not being wiped free of in only the 1st memory cell group by above-mentioned erasing, and 2-16 is stored There is no the memory cell group not being wiped free of in unit group, i.e., all storage units in 2-16 memory cell group are all in Erase status;At this point, the erasing judging result of the 1st memory cell group is no, the erasing judging result of 2-16 memory cell group Be it is yes, then erasing operation is not executed to 2-16 memory cell group, can guarantee all storages in 2-16 memory cell group Unit will not be wiped by crossing.So for disposably wiping all storage units, the present invention is real in compared with the existing technology It applies in example, can at least guarantee that the memory cell group for being completely in erased state will not be wiped by crossing, and then reduce non-easy The property lost flash block erasing operation leakage current.
In embodiments of the present invention, all storage units in flash block at least one wordline are divided into one first Memory cell group executes erasing judgement to memory cell group each in above-mentioned flash block according to flash block erasing instruction;If one There is no the storage unit do not wiped in memory cell group, memory cell group erasing judging result be it is yes, for above-mentioned erasing The memory cell group that judging result is yes does not execute erasing operation, is judged by grouping, for there is no the storage lists that do not wipe The memory cell group of member does not execute erasing operation, can guarantee that the memory cell group will not be wiped by crossing, reduce non-volatile Flash block crosses the storage unit of erasing in block erase process, and then reduces the presence of leakage current.
Embodiment two
The another of the embodiment of the present invention, which is shown, referring to Fig. 4, Fig. 4 reduces non-volatile flash memory block erasing operation leakage current Method step flow chart, may comprise steps of:
All storage units in the flash block at least one wordline are divided into a storage unit by step 201 Group.
Step 202 receives the flash block erasing instruction.
Above-mentioned steps 201 and step 202, respectively with reference to the step 101 and step 102 in the embodiment of the present invention one, herein It repeats no more.
Step 203 adds positive voltage to the memory cell group of described one judgement to be erased, adds negative electricity to remaining memory cell group Pressure;The absolute value of the negative voltage is less than the absolute value of erasing voltage.
In inventive embodiments, it can be opened according to the memory cell group of above-mentioned volatibility flash block from the 1st memory cell group Begin.In embodiments of the present invention, it is not especially limited to since that memory cell group.
In embodiments of the present invention, for the non-volatile flash memory block of above-mentioned 64K, if the block is divided into 16 storage units Group adds remaining memory cell group negative if the wordline for the 1st memory cell group adds positive voltage since the 1st memory cell group Voltage, referring to Figure 5.It should be noted that needing to guarantee the negative voltage added to remaining group, the absolute value of the negative voltage needs Less than the absolute value of erasing voltage, because, in the embodiment of the present invention, if erasing voltage is to add bearing for certain threshold value in wordline Pressure will wipe above-mentioned remaining memory cell group if the absolute value of the negative pressure is greater than the absolute value of the erasing voltage Operation, in order to avoid the generation of similar situation, so that the negative voltage that remaining group adds, the absolute value of the negative voltage need to be less than erasing The absolute value of voltage.
Step 204, to the memory cell group of the judgement to be erased, determined;If the storage of the judgement to be erased There is no the storage unit not being wiped free of in unit group, then the judgement result of the memory cell group to be erased judged is yes.
In embodiments of the present invention, add positive voltage in the memory cell group of above-mentioned one judgement to be erased, it is single to remaining storage Tuple adds negative voltage, the storage in the case that the absolute value of the negative voltage is less than the absolute value of erasing voltage, to erasing judgement Unit group carries out erasing judgement.At this point, even if there is the storage unit of erasing in other memory cell groups, since its wordline adds Negative voltage, the storage unit can not also be connected, and therefore, it is single that the erasing of the memory cell group determines that result not will receive other storages The influence of tuple leakage current ensure that the erasing of the memory cell group determines that result is accurate.
For example, being directed to above-mentioned example, referring to Figure 5, add positive voltage for the wordline WL0 of the 1st memory cell group, to remaining Memory cell group adds negative voltage, i.e., adds negative voltage to WL1-WL15, at this point, even if there is erasing in other memory cell groups Storage unit, since its wordline adds negative voltage, which can not be also connected, and therefore, the erasing of the 1st memory cell group determines As a result the influence that not will receive other memory cell group leakage currents ensure that the erasing of the 1st memory cell group determines that result is accurate.
In embodiments of the present invention, if there is no the storage lists not being wiped free of in the memory cell group of the judgement to be erased Member, then the judgement result of the memory cell group to be erased judged is yes.For example, it is directed to above-mentioned example, referring to Figure 5, If the storage unit not being wiped free of is not present in the 1st memory cell group, i.e. all storage units in the 1st memory cell group are all located In erased state, then the erasing of the 1st memory cell group determines that result is yes;It is not wiped free of if existing in the 1st memory cell group Storage unit, then the 1st memory cell group erasing determine result be no.
Step 205, using the judgement result as the erasing judging result of the memory cell group of the judgement to be erased.
In embodiments of the present invention, the erasing of the memory cell group of the judgement to be erased of this in above-mentioned steps 204 is determined into knot Fruit, the erasing judging result of the memory cell group as the judgement to be erased, due to ensure that the storage in above-mentioned steps 204 The erasing of unit group determines that result is accurate, equally ensure that the accuracy of the erasing judging result of the memory cell group.
For example, be directed to above-mentioned example, if the 1st memory cell group erasing determine result be it is yes, the 1st memory cell group Erasing judging result is yes, if the erasing of the 1st memory cell group determines that result is no, the erasing judgement of the 1st memory cell group It as a result is no.
Step 206 judges operation into the erasing of the memory cell group of next judgement to be erased, until each storage is singly The erasing of tuple judges end of operation.
In embodiments of the present invention, according to step 203 to step 205, to each storage list in non-volatile flash memory block Tuple carries out erasing judgement, and obtains the erasing judging result of each memory cell group.In embodiments of the present invention, when the 1st deposits Storage unit group erasing judgement carry out after, can continue with the memory unit address of the 1st memory cell group it is continuous under One memory cell group, such as the erasing of the 1st memory cell group judge after being finished, and can sequentially execute the 2nd memory cell group Erasing judge operation.In embodiments of the present invention, the erasing judgement sequence of memory cell group is not especially limited.
In embodiments of the present invention, for non-volatile flash memory block, sentence if executing erasing in order from the 1st memory cell group Disconnected operation, for above-mentioned example, referring to Fig. 6, if in 16 memory cell groups, the erasing judgement of 1-15 memory cell group is complete Finish, when the erasing of the 16th memory cell group of progress judges, voltage added by the wordline in each memory cell group, referring to Fig. 6 It is shown.Pair at this point, in addition to the wordline WL15 of the 16th memory cell group adds positive voltage, negative voltage added to remaining memory cell group, i.e., WL0-WL14 adds negative voltage, at this point, even if there is the storage unit of erasing in 1-15 memory cell group, since its wordline adds All storage units of negative voltage, 1-15 memory cell group can not all be connected, and therefore, the erasing of the 16th memory cell group determines As a result the influence that not will receive other memory cell group leakage currents ensure that the erasing of the 16th memory cell group determines that result is quasi- Really, and then it ensure that the erasing judging result of the 16th memory cell group is accurate.
Step 207, the erasing judging result for recording each memory cell group.
In embodiments of the present invention, the erasing judging result of each memory cell group can be recorded.Such as Above-mentioned example, if in 1-16 memory cell group in the non-volatile flash memory block, the erasing of only the 2nd memory cell group judges As a result be it is no, other erasing judging results be it is yes, then in the non-volatile flash memory block each memory cell group erasing judge knot Fruit is as shown in table 2 below.
Table 2
Step 208, the memory cell group for being yes for the erasing judging result, add the electricity reversed with the erasing instruction Pressure.
In embodiments of the present invention, when the erasing judging result of above-mentioned a certain memory cell group, which is, is, show the storage Without not erased storage unit in unit group, i.e., all storage units in the memory cell group are all in having wiped State can be directed to the memory cell group, add anti-with erasing instruction at this point, do not execute erasing operation to the memory cell group To voltage, it is 0 that the erasing instruction of wordline WL in the memory cell group, which is neutralized, and then prevents wiping to the memory cell group It removes.In turn, the case where erasing would not occur in all storage units in the memory cell group.
Such as above-mentioned example, 16 memory cell groups of the non-volatile flash memory block judge by above-mentioned erasing, only Have and there is the storage unit that is not wiped free of in the 2nd memory cell group, and in the 1st and 3-16 memory cell group there is no not by The memory cell group of erasing, i.e., the 1st and 3-16 memory cell group in all storage units all in erased state;This When, the erasing judging result of the 2nd memory cell group be it is no, the 1st and 3-16 memory cell group erasing judging result be it is yes, then Erasing operation is not executed to the 1st and 3-16 memory cell group, referring to shown in Fig. 7, then the 1st and 3-16 memory cell group are added The reversed voltage with erasing instruction neutralizes the erasing instruction of the 1st and 3-16 memory cell group, can guarantee the 1st and 3-16 All storage units in memory cell group will not be wiped by crossing.So disposably being wiped all in compared with the existing technology For storage unit, in the embodiment of the present invention, the memory cell group that can at least guarantee to be completely in erased state will not be by Erasing is crossed, and then reduces non-volatile flash memory block erasing operation leakage current.
Step 209, the memory cell group for being no for the erasing judging result execute erasing operation.
In embodiments of the present invention, when the erasing judging result of above-mentioned a certain memory cell group is no, show the storage There is not erased storage unit in unit group, at this point, executing erasing operation to the memory cell group.Such as above-mentioned example Son executes erasing operation for the 2nd memory cell group.
In embodiments of the present invention, it is the memory cell group of a judgement to be erased, negative voltage is added to remaining memory cell group, The absolute value of the negative voltage is less than the absolute value of erasing voltage, even if there is the storage list of erasing in other memory cell groups Member, since its wordline adds negative voltage, which can not be also connected, and ensure that the wiping of the memory cell group of the judgement to be erased Except judgement result not will receive the influence of other memory cell group leakage currents, the memory cell group of the judgement to be erased ensure that Erasing determines that result is accurate;It is subsequent not execute erasing operation for the memory cell group that above-mentioned erasing judging result is yes, pass through Grouping judgement can guarantee the storage for there is no the memory cell groups for the storage unit that do not wipe not to execute erasing operation Unit group will not be wiped by crossing, and reduce the storage unit of crossing erasing of the non-volatile flash memory block in block erase process, in turn Reduce the presence of leakage current.
Embodiment three
Referring to Fig. 8, a kind of reduction non-volatile flash memory block erasing operation leakage current provided in an embodiment of the present invention is shown The structural block diagram of device 800.The device 800 includes:
Grouping module 801, for all storage units in the flash block at least one wordline to be divided into one Memory cell group;
Erasing instruction receiving module 802, for receiving the flash block erasing instruction;
Judgment module 803 is wiped, is used for according to the flash block erasing instruction, to each storage unit in the flash block Group executes erasing judgement;If there is no the storage unit that do not wipe in a memory cell group, the memory cell group erasing is sentenced Disconnected result is yes;
First erasing executing module 805, the memory cell group for being yes for the erasing judging result do not execute wiping Except operation.
Referring to Fig. 9, on the basis of Fig. 8, the erasing judgment module 803 may include:
Voltage control unit 8031, for adding positive voltage to the memory cell group of described one judgement to be erased, to its balance Storage unit group adds negative voltage;The absolute value of the negative voltage is less than the absolute value of erasing voltage;
Judging unit 8032 is determined for the memory cell group to the judgement to be erased;To be erased sentence if described The storage unit not being wiped free of is not present in disconnected memory cell group, then the judgement knot of the memory cell group of the judgement to be erased Fruit is yes;
Judging result acquiring unit 8033 is wiped, for using the judgement result as the storage list of the judgement to be erased The erasing judging result of tuple;
Jump-transfer unit 8034 judges operation for entering the erasing of memory cell group of next judgement to be erased.
Described device can also include:
Second erasing executing module 806, the memory cell group for being no for the erasing judging result execute erasing Operation.
First erasing executing module 805 may include:
Erasing instruction backward voltage unit 8051, the memory cell group for being yes for the erasing judging result, adds The reversed voltage with the erasing instruction.
Described device can also include:
Judging result logging modle 804 is wiped, for recording the erasing judging result of each memory cell group.
Reduction non-volatile flash memory block erasing operation leakage current device provided in an embodiment of the present invention, can be realized Fig. 3 extremely Each process in the embodiment of the method for Fig. 4, to avoid repeating, which is not described herein again.
In embodiments of the present invention, it is the memory cell group of a judgement to be erased, negative voltage is added to remaining memory cell group, The absolute value of the negative voltage is less than the absolute value of erasing voltage, even if there is the storage list of erasing in other memory cell groups Member, since its wordline adds negative voltage, which can not be also connected, and ensure that the wiping of the memory cell group of the judgement to be erased Except judgement result not will receive the influence of other memory cell group leakage currents, the memory cell group of the judgement to be erased ensure that Erasing determines that result is accurate;It is subsequent not execute erasing operation for the memory cell group that above-mentioned erasing judging result is yes, pass through Grouping judgement can guarantee the storage for there is no the memory cell groups for the storage unit that do not wipe not to execute erasing operation Unit group will not be wiped by crossing, and reduce the storage unit of crossing erasing of the non-volatile flash memory block in block erase process, in turn Reduce the presence of leakage current.
All the embodiments in this specification are described in a progressive manner, the highlights of each of the examples are with The difference of other embodiments, the same or similar parts between the embodiments can be referred to each other.
It should be noted that, in this document, relational terms such as first and second and the like are used merely to a reality Body or operation are distinguished with another entity or operation, are deposited without necessarily requiring or implying between these entities or operation In any actual relationship or order or sequence.Moreover, the terms "include", "comprise" or its any other variant are intended to Non-exclusive inclusion, so that the process, method, article or the terminal device that include a series of elements not only include those Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or end The intrinsic element of end equipment.In the absence of more restrictions, the element limited by sentence "including a ...", not There is also other identical elements in process, method, article or the terminal device for including the element for exclusion.
Above to a kind of multi-center selection circuit for being suitable for A/D converter with high speed and high precision provided by the present invention, into It has gone and has been discussed in detail, used herein a specific example illustrates the principle and implementation of the invention, the above implementation The explanation of example is merely used to help understand method and its core concept of the invention;Meanwhile for the general technology people of this field Member, according to the thought of the present invention, there will be changes in the specific implementation manner and application range, in conclusion this explanation Book content should not be construed as limiting the invention.

Claims (10)

1. a kind of method for reducing non-volatile flash memory block erasing operation leakage current, which is characterized in that the described method includes:
All storage units in the flash block at least one wordline are divided into a memory cell group;
Receive the flash block erasing instruction;
According to the flash block erasing instruction, erasing judgement is executed to memory cell group each in the flash block;If one is deposited There is no the storage units that do not wipe in storage unit group, and the memory cell group erasing judging result is yes;
The memory cell group for being yes for the erasing judging result does not execute erasing operation.
2. the method according to claim 1, wherein described execute memory cell group each in the flash block Erasing judges
Positive voltage is added to the memory cell group of described one judgement to be erased, negative voltage is added to remaining memory cell group;The negative electricity The absolute value of pressure is less than the absolute value of erasing voltage;
To the memory cell group of the judgement to be erased, determined;If not deposited in the memory cell group of the judgement to be erased In the storage unit not being wiped free of, then the judgement result of the memory cell group to be erased judged is yes;
Using the judgement result as the erasing judging result of the memory cell group of the judgement to be erased;
Erasing into the memory cell group of next judgement to be erased judges operation.
3. according to the method described in claim 2, it is characterized in that,
The storage of memory unit address and next judgement to be erased in the memory cell group of one judgement to be erased Memory unit address in unit group is continuous.
4. the method according to claim 1, wherein the method also includes:
The memory cell group for being no for the erasing judging result executes erasing operation.
5. the method according to claim 1, wherein the storage list for being yes for the erasing judging result It includes: the memory cell group for being yes for the erasing judging result that tuple, which does not execute erasing operation, is added and the erasing instruction Reversed voltage.
6. the method according to claim 1, wherein the method also includes: record each storage unit The erasing judging result of group.
7. a kind of reduction non-volatile flash memory block erasing operation leakage current device, which is characterized in that described device includes:
Grouping module, for all storage units in the flash block at least one wordline to be divided into a storage unit Group;
Erasing instruction receiving module, for receiving the flash block erasing instruction;
Judgment module is wiped, for being executed to memory cell group each in the flash block according to the flash block erasing instruction Erasing judgement;If there is no the storage unit that do not wipe in a memory cell group, the memory cell group wipes judging result It is yes;
First erasing executing module, the memory cell group for being yes for the erasing judging result do not execute erasing operation.
8. device according to claim 7, which is characterized in that the erasing judgment module includes:
Voltage control unit, for adding positive voltage to the memory cell group of described one judgement to be erased, to remaining memory cell group Add negative voltage;The absolute value of the negative voltage is less than the absolute value of erasing voltage;
Judging unit is determined for the memory cell group to the judgement to be erased;If the storage of the judgement to be erased There is no the storage unit not being wiped free of in unit group, then the judgement result of the memory cell group to be erased judged is yes;
Judging result acquiring unit is wiped, for using the judgement result as the wiping of the memory cell group of the judgement to be erased Except judging result;
Jump-transfer unit judges operation for entering the erasing of memory cell group of next judgement to be erased.
9. device according to claim 7, which is characterized in that described device further include:
Second erasing executing module, the memory cell group for being no for the erasing judging result execute erasing operation.
10. device according to claim 7, which is characterized in that first erasing executing module includes:
Erasing instruction backward voltage unit, the memory cell group for being yes for the erasing judging result, adds and the wiping Except the reversed voltage of instruction.
CN201711447020.3A 2017-12-27 2017-12-27 A kind of method, apparatus reducing non-volatile flash memory block erasing operation leakage current Pending CN109979510A (en)

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