CN109818620A - A kind of restructural Sigma-Delta modulator - Google Patents
A kind of restructural Sigma-Delta modulator Download PDFInfo
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- CN109818620A CN109818620A CN201910066483.8A CN201910066483A CN109818620A CN 109818620 A CN109818620 A CN 109818620A CN 201910066483 A CN201910066483 A CN 201910066483A CN 109818620 A CN109818620 A CN 109818620A
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Abstract
The embodiment of the invention discloses a kind of restructural Sigma-Delta modulators, may include: input resistance, feedforward path, the loop filter of multi-stage operational amplifier including concatenation, the 5bit quantizer of SAR ADC structure and the feedback control loop being made of multiple DAC；Wherein, input resistance is resistance value adjustable resistance, and one end of input resistance connects input signal, the input terminal of the other end linkloop filter of input resistance；Feedforward path is connected across the input terminal of the deferent segment of the chopped-off head operational amplifier of loop filter and the final stage operational amplifier of loop filter；The input terminal of quantizer is connected with the output end of the final stage operational amplifier of loop filter, and passes through output end output digit signals；DAC quantity in feedback control loop is corresponding with the operational amplifier quantity in loop filter, and the input terminal of each DAC is connected with the output end of quantizer in feedback control loop, and the output end of each DAC is connected with the input terminal of operational amplifier corresponding in loop filter respectively in feedback control loop.
Description
Technical field
The present invention relates to wireless communication techniques, more particularly to a kind of restructural Sigma-Delta modulator.
Background technique
With the development of wireless communication technique, the requirement to the integrated level of chip, power consumption and cost is higher and higher.For nothing
For radio-frequency transmitter in line communication system architecture, for integrated level is improved, these aspects of power consumption and design cost, nothing are reduced
There are following trend for the relevant technologies development of line receiver: firstly, a large amount of signal processing function is placed in digital circuit
It realizes；Secondly, being integrated to reduce hardware cost and power consumption to analog circuit, realized in single circuit as far as possible multiple
Function；For various modes communication system, the reconfigurable design of circuit is a kind of saving hardware spending, optimization energy
The scheme of effect has increasing need for carrying out reconfigurable design to modules to meet different application scenarios.
Develop for the above technology, in wireless communication technique, continuous time sigma-delta modulator has more carefully
Anti-aliasing effect, front end frequency overlapped-resistable filter can be saved；In addition, continuous time sigma-delta modulator can also drop
Requirement of the low system to amplifier speed in integrator has apparent power consumption and speed advantage, is suitble in broadband application occasion.Cause
This, more and more radio-frequency transmitters are used in realization analog-digital conversion function, but there is no sufficiently benefits for presently relevant technology
With the framework advantage of continuous time sigma-delta modulator circuit, integrated level can not be further improved, reduces hardware cost
And power consumption.
Summary of the invention
In order to solve the above technical problems, an embodiment of the present invention is intended to provide a kind of restructural Sigma-Delta modulator,
Not only make the function of analog filter filter and programmable gain amplifier VGA in its compatible radio receiver access, in turn
It saves in radio-frequency transmitter about two circuits of filter and VGA；But also continuous time sigma-delta modulator is carried out
Reconfigurable design makes it in different applications, bandwidth that can be different by software configuration.To not only can satisfy
Various application scenarios can also improve the level of integrated system of radio-frequency transmitter, reduce hardware cost and power consumption.
The technical scheme of the present invention is realized as follows:
The embodiment of the invention provides a kind of restructural Sigma-Delta modulators characterized by comprising input
Resistance, feedforward path, the loop filter of multi-stage operational amplifier including concatenation, successive approximation register type analog-to-digital converter
The 5bit quantizer of SAR ADC structure and the feedback control loop being made of multiple digital analog converter DAC；
Wherein, the input resistance is resistance value adjustable resistance, and one end of the input resistance connects input signal, described defeated
The other end for entering resistance connects the input terminal of the loop filter；
The feedforward path is connected across deferent segment and the loop filter of the chopped-off head operational amplifier of the loop filter
The input terminal of the final stage operational amplifier of wave device, the feedforward path are used to adjust the signal of the Sigma-Delta modulator
Transfer function；
The input terminal of the quantizer is connected with the output end of the final stage operational amplifier of the loop filter, and passes through
Output end output digit signals；
DAC quantity in the feedback control loop is corresponding with the operational amplifier quantity in the loop filter, and
The input terminal of each DAC is connected with the output end of the quantizer in the feedback control loop, and each DAC's is defeated in the feedback control loop
Outlet is connected with the input terminal of corresponding operational amplifier in the loop filter respectively.
The embodiment of the invention provides a kind of restructural Sigma-Delta modulators；By the way that adjustable input electricity is arranged
Resistance and capacitor element, not only make analog filter filter and programmable gain amplifier in its compatible radio receiver access
The function of VGA, and then save in radio-frequency transmitter about two circuits of filter and VGA；It can also be to continuous time sigma-
Delta modulator carries out reconfigurable design, makes it in different applications, bandwidth that can be different by software configuration.
To not only can satisfy various application scenarios, the level of integrated system of radio-frequency transmitter can also be improved, hardware cost is reduced
And power consumption.
Detailed description of the invention
Fig. 1 is a kind of generic structure schematic diagram of radio-frequency transmitter provided in an embodiment of the present invention；
Fig. 2 is the structural schematic diagram of the restructural Sigma-Delta modulator of one kind provided in an embodiment of the present invention；
Fig. 3 is the structural schematic diagram of the restructural Sigma-Delta modulator of another kind provided in an embodiment of the present invention；
Fig. 4 is a kind of structural schematic diagram of quantizer provided in an embodiment of the present invention；
Fig. 5 is a kind of structural schematic diagram of adjustable resistance provided in an embodiment of the present invention；
Fig. 6 is a kind of structural schematic diagram of tunable capacitor provided in an embodiment of the present invention；
Fig. 7 is a kind of signal transfer function schematic diagram provided in an embodiment of the present invention；
Fig. 8 is a kind of noise transfer function schematic diagram provided in an embodiment of the present invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description.
Referring to Fig. 1, it illustrates a kind of generic structures of radio-frequency transmitter provided in an embodiment of the present invention, which can
Pervasively it is applied to radio frequency receiver equipment, which may include being arranged between radio frequency input RF_in and base band output
Multiple components, these components successively include low-noise amplifier (LNA, Low Noise Amplifier), frequency mixer, simulation filter
Wave device, programmable variable gain amplifier (VGA, Variable Gain Amplifiers), analog-digital converter (ADC,
Analog-to-Digital Converter) and digital filter.In these components, frequency mixer can will pass through low noise
The amplified radiofrequency signal of acoustic amplifier is moved according to the frequency of local oscillation signal (LO, Local Oscillator).Usually
For, the frequency of mixer output signal is higher than the frequency of radiofrequency signal, then the frequency mixer is referred to as up-conversion mixer；And it mixes
The frequency of frequency device output signal is lower than the frequency of radiofrequency signal, then the frequency mixer is referred to as down-conversion mixer.It is penetrated in common
In frequency receiver framework, frequency mixer is usually down-conversion mixer.
Analog filter can high-frequency noise before ADC conversion in canceled signal path and interference, avoid aliasing from making an uproar
Sound pollution signal；Additionally it is possible to eliminating crossing except filter bandwidht drives influence of the signal to signal path, avoid at
There is modulator saturated phenomenon in ADC；And when occurring to input over-voltage, analog filter can also limit input current, decay defeated
Enter voltage.
Digital filter is arranged after ADC, can remove the digital noise injected in analog-digital conversion process, usually number
Filter can be chosen by lowpass digital filter (LPF, Low Pass Filter) and high-pass digital filter (HPF, High
Pass Filter) concatenation be formed by bandpass filter.
For generic structure shown in FIG. 1, mould can be can be realized by continuous time sigma-delta modulator
Number conversion function.And continuous time sigma-delta modulator is based on over-sampling and noise shaping theory, by the amount in frequency band
Change noise to remove to outside frequency band by loop filter, then is eliminated by decimation filter of digital.But it is presently relevant
Technology can only substitute ADC using the analog-digital conversion function of continuous time sigma-delta modulator, but there is no deeply
Ground utilizes the design feature of continuous time sigma-delta modulator.Based on this, referring to fig. 2, the embodiment of the invention provides one
The structure of the restructural Sigma-Delta modulator 2 of kind, the Sigma-Delta modulator 2 can not only realize analog-to-digital conversion function
Can, but also can be realized the function of VGA and analog filter, which may include: input electricity
Resistance 21, feedforward path 22, multi-stage operational amplifier 231 including concatenation loop filter 23, successive approximation register pattern
Number converter (SAR ADC, Successive-AppRoximation Analog to Digital Converter) structure
5bit quantizer 24 and by multiple digital analog converters (DAC, Digital to Analog Converter) 251 form it is anti-
Present loop 25；
Wherein, the input resistance 21 is resistance value adjustable resistance, and one end of the input resistance 21 connects input signal, institute
The other end for stating input resistance 21 connects the input terminal of the loop filter 23；
The feedforward path 22 is connected across the deferent segment and the ring of the chopped-off head operational amplifier of the loop filter 23
The input terminal of the final stage operational amplifier of path filter 23, the feedforward path 22 is for adjusting the Sigma-Delta modulation
The signal transfer function of device 2；
The input terminal of the quantizer 24 is connected with the output end of the final stage operational amplifier of the loop filter 23, and
Pass through output end output digit signals；
DAC quantity in the feedback control loop 25 is corresponding with the operational amplifier quantity in the loop filter 23,
And the input terminal of each DAC 251 is connected with the output end of the quantizer 24 in the feedback control loop 25, the feedback loop
In road 25 output end of each DAC 251 respectively with the input terminal phase of corresponding operational amplifier 231 in the loop filter 23
Even.
It, can be for the selection of input resistance 21 not since input resistance 21 is adjustable for technical solution shown in Fig. 2
Same resistance value, so that gain adjustment corresponding to each resistance value is realized, so as to realize in the Sigma-Delta modulator 2
The function of VGA, and ADC signal transfer function and noise transmission function will not be changed, as a result, radio frequency reception shown in Fig. 1
In machine generic structure, if analog-to-digital conversion is realized using Sigma-Delta modulator 2 shown in Fig. 2, in radio frequency reception
It may dispense with VGA circuit in the framework of machine.Further, since feedforward path 22 can change the signal transfer function of modulator,
It can so be generated outside frequency band trap (null), to increase the inhibition to out-of-band interference signal；Pass through feedthrough before adjusting
Road 22, thus it is possible to vary the position of null to realize the interference signal for selectively inhibiting some frequency range, that is, realizes simulation
The function of filter, as a result, in radio-frequency transmitter framework shown in Fig. 1, so that it may remove analog filter or reduce to mould
The demand of quasi- filter.And the 5bit quantizer 24 of SAR ADC structure is compared with the quantizer of currently used flash ADC,
It has a clear superiority in power consumption and area, and excessive loop delay (ELD, Excess can also be compensated as desired
Loop Delay), as soon as thus further save a DAC circuit, can also further reduced area and power consumption.
For Sigma-Delta modulator 2 shown in Fig. 2, in one possible implementation, the loop filter
23 preferably the active reinforced concrete structure of three ranks, specifically, the loop filter 23 include three-stage operational amplifier, three pairs of capacitors with
And three pairs of adjustable resistances；Wherein, one operational amplifier of each correspondence of each pair of tunable capacitor, and each pair of tunable capacitor is connected across
The input terminal and output end of corresponding operational amplifier；In three pairs of resistance, first resistor is to being connected across the first operational amplifier
Output end and second operational amplifier input terminal, second resistance is to the output end and third for being connected across second operational amplifier
The input terminal of operational amplifier, 3rd resistor are defeated to the input terminal and third operational amplifier for being connected across second operational amplifier
Outlet.
Based on above-mentioned implementation, the operational amplifier in the loop filter 23 is preferably that dual input two-way is defeated
Operational amplifier out.It is shown in Figure 3 corresponding to the operational amplifier of dual input doubleway output, the input resistance 21
Input resistance is preferably included to R1, one end of one of input resistance R1 connects the first input signal VIN_P, other end connection
The positive input of first operational amplifier OP1 of the loop filter 23；One end connection the of another input resistance R1
Two input signal VIN_N, the other end connect the negative input of the first operational amplifier OP1 of the loop filter 23.
Shown in Figure 3 corresponding to the operational amplifier of dual input doubleway output, the feedforward path 22 includes adjustable
Capacitor is defeated to the negative sense of C4, one of tunable capacitor C4 the first operational amplifier OP1 for being connected across the loop filter 23
The negative sense output end of the third operational amplifier OP3 of outlet and the loop filter 23, another tunable capacitor C4 bridging
In the positive output end of the first operational amplifier OP1 of the loop filter 23 and the third fortune of the loop filter 23
Calculate the positive output end of amplifier OP3.
Corresponding to the operational amplifier of dual input doubleway output, for each tunable capacitor of the loop filter 23
For, one of tunable capacitor is connected across the positive input and negative sense output end of corresponding operational amplifier, wherein separately
One tunable capacitor is connected across the negative input and positive output end of corresponding operational amplifier；Shown in Figure 3, first is adjustable
Capacitor is connected across the positive input and negative sense output end of the first operational amplifier OP1 to a tunable capacitor C1 of C1, another
A tunable capacitor C1 is connected across the negative input and positive output end of the first operational amplifier OP1；Second tunable capacitor is to C2
A tunable capacitor C2 be connected across the positive input and negative sense output end of second operational amplifier OP2, another adjustable electric
Hold negative input and positive output end that C2 is connected across second operational amplifier OP2；Third tunable capacitor can to one of C3
Capacitor C3 is adjusted to be connected across the positive input and negative sense output end of third operational amplifier OP3, another tunable capacitor C3 bridging
In the negative input and positive output end of third operational amplifier OP3；It is to be appreciated that due to using tunable capacitor, thus
It can be configured according to capacitance of the bandwidth to tunable capacitor, to realize the restructural of communication pattern.
And for loop filter 23 three for resistance, shown in Figure 3, first resistor is to a resistance in R2
R2 is connected across the negative sense output end of the first operational amplifier OP1 and the positive input of second operational amplifier OP2, first resistor
The positive output end and second operational amplifier OP2 of the first operational amplifier OP1 are connected across to another resistance R2 in R2
Negative input；
Second resistance is connected across the negative sense output end of second operational amplifier OP2 to a resistance R3 in R3 and third is transported
The positive input of amplifier OP3 is calculated, another resistance R3 in second resistance R3 is being connected across second operational amplifier OP2 just
To the negative input of output end and third operational amplifier OP3；
3rd resistor is connected across the positive input of second operational amplifier OP2 to a resistance R4 in R4 and third is transported
The positive output end of amplifier OP3 is calculated, 3rd resistor is connected across second operational amplifier OP2's to another resistance R4 in R4
The negative sense output end of negative input and third operational amplifier OP3.
DAC shown in Figure 3 corresponding to the operational amplifier of dual input doubleway output, in the feedback control loop 25
Quantity is 3, and the positive output end of the first DAC (DAC1) is connected with the negative input of the first operational amplifier OP1, the first DAC
(DAC1) inverse output terminal is connected with the positive input of the first operational amplifier OP1；The positive output of 2nd DAC (DAC2)
End is connected with the positive input of second operational amplifier OP2, the inverse output terminal and the second operation amplifier of the 2nd DAC (DAC2)
The negative input of device OP2 is connected；The positive output end of 3rd DAC (DAC3) and the negative sense of third operational amplifier OP3 input
End is connected, and the inverse output terminal of the 3rd DAC (DAC3) is connected with the positive input of third operational amplifier OP3.
It is shown in Figure 3 corresponding to the operational amplifier of dual input doubleway output, the positive input of the quantizer 24
End is connected with the negative sense output end of the third operational amplifier OP3 of the loop filter 23；The negative sense of the quantizer 24 is defeated
Enter end to be connected with the positive output end of the third operational amplifier OP3 of the loop filter 23.
For Sigma-Delta modulator 2 shown in Fig. 2, in one possible implementation, referring to fig. 4, the amount
Changing device 24 includes: that switching capacity digital analog converter (SC-DAC, Switched-Capacitor DAC), two-output impulse generator compare
Device Comp, SAR logic device SAR Logic, reference voltage cache REF BUF, delayer Z-1And binary code turns thermometer-code
Circuit (B2T, Binary code to Thermometer code)；Wherein, SC-DAC receives input signal Vin and REF
The reference voltage of BUF transmission, by the analog signal transmission of output to Comp, output is transmitted to SAR Logic by Comp；
The SAC coding Code of output is fed back to SC-DAC by SARLogic, and the digital signal D of output is passed through delayer by SAR Logic
Z-1The ELD coding Code obtained after delay is compensated to SC-DAC；Output signal D is also converted to timing by B2T by SAR Logic
After signal T, carries out data and export Dataout.
For above technical scheme, it is preferable that the adjustable resistance and tunable capacitor be based on digital control word into
The device that row is adjusted.Referring to a representative embodiment described in Fig. 5 about adjustable resistance, by taking input resistance is to R1 as an example,
By opening relevant bypass cock sw<1>to sw<10>, resistance R101 to R110 can selectively in series
It is added to fixed resistance R_fix；By closing relevant bypass cock, selectivity removes resistance R101 from input resistance R1
To R110；And R101 concatenates a switch sw<0>, to control the access of entire resistance string.As described above, resistance
R101 to R110 can be binary-weighted, and switch is controlled by binary value.Those skilled in the art can be seen that number
The adjustable resistance of control can be realized by other means.
Referring to a representative embodiment described in Fig. 6 about tunable capacitor, the capacitance of 6 capacitors is with binary system
Mode increases, and selects capacitor by the way that binary code is applied to bit switch corresponding with each capacitor.
Fig. 2 and Sigma-Delta modulator shown in Fig. 32 are being implemented in elaboration through the above technical solution
It has the advantage that in the process
Firstly, the resistance value of input resistance R1 is one embodiment of adjustable, shown in Figure 5 adjustable resistance, pass through
Different resistance values is selected, the gain adjustment of 0dB-10dB, such as every grade of 2dB may be implemented.Due to increasing input resistance R1's
Adjustability, Sigma-Delta modulator 2 are provided with the function of VGA, and will not change ADC signal transfer function and noise biography
Therefore defeated function can save VGA circuit in radio-frequency transmitter.
Secondly, increasing feedforward path C4, the use of C4 can change the signal transmission letter of Sigma-Delta modulator 2
Number, so as in the inhibition with one trap (null) of outer generation with increase to out-of-band interference signal；Pass through reality shown in fig. 6
Apply the size that example adjusts C4, thus it is possible to vary the interference signal of some frequency range of the inhibition of selectivity is also capable of in the position of null, from
And realize the function of filter, so that radio-frequency transmitter is removed analog filter or reduces the demand to analog filter.
Then, it has used 5bit SAR ADC to make quantizer, has done and quantify compared to flash ADC used in conventional scheme
Device, SAR ADC make quantizer and have a clear superiority in power consumption and area, and can integrate ELD compensation, can save one
DAC circuit further reduced area and power consumption.
Finally, passing through the restructural of software configuration capacitance implementation pattern, for example, setting Sigma-Delta modulation
2 minimum bandwidth of device is 10MHz, and maximum bandwidth 20MHz is illustrated with embodiment shown in fig. 6, in each bandwidth mode
Under, the calibration bits of capacitor are 5, it is assumed that capacitor calibration value is 10000, then when bandwidth is 20M Hz mode, clock frequency is
320MHz, dout<5:0>=010000；When bandwidth is 10M Hz mode, clock frequency 160MHz, dout<5:0>=
100000；When bandwidth is between 10M Hz and 20MHz, it is only necessary to which equal proportion changes clock frequency, and equal proportion scales capacitor
Control word dout<5:0>.
Below by way of signal transfer function (STF, the Signal Transfer of Sigma-Delta modulator 2 shown in Fig. 7
Function) and noise transfer function shown in Fig. 8 (NTF, Noise Transfer Function) figure is illustrated.
In Fig. 7, solid line is the STF of gain=0dB, and dotted line is the STF of gain=20dB, by taking 10MHZ bandwidth as an example, by
For Fig. 7 and Fig. 8 it is found that signal gain range is 0dB-20dB, the variation of gain does not influence noise transmission function and STF；In band
In the case that interior decaying is no more than 0.5dB, at 2 times of signal bandwidths, the attenuating of 9dB is obtained, is pressed down with outer null bring
Effect processed also becomes apparent from.
It should be understood that between technical solution documented by the embodiment of the present invention, in the absence of conflict, Ke Yiren
Meaning combination.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, protection scope of the present invention should be based on the protection scope of the described claims.
Claims (9)
1. a kind of restructural Sigma-Delta modulator characterized by comprising
Input resistance, feedforward path, multi-stage operational amplifier including concatenation loop filter, successive approximation register pattern
The 5bit quantizer of number converter SAR ADC structure and the feedback control loop being made of multiple digital analog converter DAC；
Wherein, the input resistance is resistance value adjustable resistance, and one end of the input resistance connects input signal, the input electricity
The other end of resistance connects the input terminal of the loop filter；
The feedforward path is connected across the deferent segment and the loop filter of the chopped-off head operational amplifier of the loop filter
Final stage operational amplifier input terminal, the feedforward path be used for adjust the Sigma-Delta modulator signal transmission
Function；
The input terminal of the quantizer is connected with the output end of the final stage operational amplifier of the loop filter, and passes through output
Hold output digit signals；
DAC quantity in the feedback control loop and the operational amplifier quantity in the loop filter are corresponding and described
The input terminal of each DAC is connected with the output end of the quantizer in feedback control loop, the output end of each DAC in the feedback control loop
It is connected respectively with the input terminal of corresponding operational amplifier in the loop filter.
2. Sigma-Delta modulator according to claim 1, which is characterized in that the loop filter includes three-level
Operational amplifier, three pairs of capacitors and three pairs of adjustable resistances；Wherein, one operational amplifier of each correspondence of each pair of tunable capacitor, and
And each pair of tunable capacitor is connected across the input terminal and output end of corresponding operational amplifier；In three pairs of resistance, first resistor
Input terminal to the output end and second operational amplifier that are connected across the first operational amplifier, second resistance is to being connected across the second fortune
Calculate the output end of amplifier and the input terminal of third operational amplifier, input of the 3rd resistor to second operational amplifier is connected across
The output end at end and third operational amplifier.
3. Sigma-Delta modulator according to claim 2, which is characterized in that be corresponding to the operational amplifier
The operational amplifier of dual input doubleway output, the input resistance include input resistance pair, and the one of one of input resistance
The first input signal of end connection, the other end connect the positive input of the first operational amplifier of the loop filter；It is another
One end of a input resistance connects the second input signal, and the other end connects the negative of the first operational amplifier of the loop filter
To input terminal.
4. Sigma-Delta modulator according to claim 2, which is characterized in that be corresponding to the operational amplifier
The operational amplifier of dual input doubleway output, the feedforward path include tunable capacitor pair, one of tunable capacitor bridging
In the negative sense output end of the first operational amplifier of the loop filter and the third operation amplifier of the loop filter
The negative sense output end of device, another tunable capacitor are connected across the positive output end of the first operational amplifier of the loop filter
And the positive output end of the third operational amplifier of the loop filter.
5. Sigma-Delta modulator according to claim 2, which is characterized in that be corresponding to the operational amplifier
The operational amplifier of dual input doubleway output, for the loop filter each tunable capacitor for, therein one
A tunable capacitor is connected across the positive input and negative sense output end of corresponding operational amplifier, the bridging of another one tunable capacitor
In the negative input and positive output end of corresponding operational amplifier.
6. Sigma-Delta modulator according to claim 2, which is characterized in that be corresponding to the operational amplifier
The operational amplifier of dual input doubleway output, for three pairs of resistance of the loop filter: one of first resistor centering
Resistance is connected across the negative sense output end of the first operational amplifier and the positive input of second operational amplifier, first resistor centering
Another resistance be connected across the positive output end of the first operational amplifier and the negative input of second operational amplifier；
One resistance of second resistance centering is connected across the negative sense output end and third operational amplifier of second operational amplifier
Positive input, another resistance in second resistance is connected across the positive output end of second operational amplifier and third operation is put
The negative input of big device；
One resistance of 3rd resistor centering is connected across the positive input and third operational amplifier of second operational amplifier
Positive output end, another resistance of 3rd resistor centering are connected across negative input and the third operation of second operational amplifier
The negative sense output end of amplifier.
7. Sigma-Delta modulator according to claim 2, which is characterized in that be corresponding to the operational amplifier
The operational amplifier of dual input doubleway output, the DAC quantity in the feedback control loop are 3, wherein the forward direction of the first DAC is defeated
Outlet is connected with the negative input of the first operational amplifier, and the inverse output terminal and the first operational amplifier of the first DAC is just
It is connected to input terminal；The positive output end of 2nd DAC is connected with the positive input of second operational amplifier, and the 2nd DAC's is anti-
It is connected to output end with the negative input of second operational amplifier；The positive output end and third operational amplifier of 3rd DAC
Negative input be connected, the inverse output terminal of the 3rd DAC is connected with the positive input of third operational amplifier.
8. Sigma-Delta modulator according to claim 2, which is characterized in that be corresponding to the operational amplifier
The operational amplifier of dual input doubleway output, the third operation of the positive input of the quantizer and the loop filter
The negative sense output end of amplifier is connected；The third operational amplifier of the negative input of the quantizer and the loop filter
Positive output end be connected.
9. Sigma-Delta modulator according to claim 1, which is characterized in that the quantizer 24 includes: switch electricity
Hold digital analog converter SC-DAC, two-output impulse generator comparator Comp, SAR logic device SAR Logic, reference voltage and caches REF
BUF, delayer Z-1And binary code turns thermometer-code circuit B2T；Wherein, SC-DAC receives input signal Vin and REF
The reference voltage of BUF transmission, by the analog signal transmission of output to Comp, output is transmitted to SAR Logic by Comp；SAR
The SAC coding Code of output is fed back to SC-DAC by Logic, and the digital signal D of output is passed through delayer Z by SAR Logic-1Prolong
When after obtain excessive loop delay ELD coding Code compensate to SC-DAC；Output signal D is also passed through B2T by SAR Logic
After being converted to clock signal T, carries out data and export Dataout.
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| CN110492885A (en) * | 2019-07-11 | 2019-11-22 | 东南大学 | A kind of passive noise shaping Approach by inchmeal SAR analog-digital converter |
| CN110995272A (en) * | 2019-12-25 | 2020-04-10 | 重庆大学 | Switched capacitor resistance feedback continuous time modulator based on variable resistor |
| CN114200995A (en) * | 2021-12-10 | 2022-03-18 | 上海富芮坤微电子有限公司 | Reference voltage generating circuit and Sigma Delta modulator |
| CN114420055A (en) * | 2021-12-24 | 2022-04-29 | 北京奕斯伟计算技术有限公司 | Driving circuit and driving method, backlight module and display device |
| US11626885B1 (en) | 2021-11-30 | 2023-04-11 | Analog Devices, Inc. | Gain programmability techniques for delta-sigma analog-to-digital converter |
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| CN202488406U (en) * | 2011-12-30 | 2012-10-10 | 上海集成电路研发中心有限公司 | Highly stable programmable gain amplifier structure |
| CN102832948A (en) * | 2012-09-07 | 2012-12-19 | 复旦大学 | Reconfigurable continuous time type high-speed low-power consumption sigma-delta modulator |
| US20160336946A1 (en) * | 2015-05-14 | 2016-11-17 | Mediatek Inc. | Continuous time delta sigma modulator, analog to digital converter and associated compensation method |
| WO2017037744A2 (en) * | 2015-09-03 | 2017-03-09 | Indian Institute Of Technology Madras | A delta sigma modulator with noise attenuating feedback filters |
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| US11626885B1 (en) | 2021-11-30 | 2023-04-11 | Analog Devices, Inc. | Gain programmability techniques for delta-sigma analog-to-digital converter |
| CN114200995A (en) * | 2021-12-10 | 2022-03-18 | 上海富芮坤微电子有限公司 | Reference voltage generating circuit and Sigma Delta modulator |
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