CN109787716B - Data transmission method and device - Google Patents
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Abstract
The application discloses a data transmission method, which comprises the following steps: when a data signal is detected, acquiring a clock signal corresponding to the data signal; acquiring the potential of the clock signal in real time within a time interval, wherein the time interval is less than or equal to half a clock period of the clock signal; and increasing the output amplitude of the clock signal when the acquired potential is lower than a preset threshold. The application also discloses a data transmission device. After the output amplitude of the clock signal is increased, the clock signal accords with the new output amplitude, and the electric potential corresponding to the time point of which the electric potential is lower than the preset threshold value is increased, so that a rising edge or a falling edge cannot occur near the time point, and the data is effectively prevented from being captured by mistake.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a data transmission method and apparatus.
Background
With the increasing size and resolution of lcd tvs, data to be transmitted is increasing, and differential signals are becoming popular as a high-speed transmission protocol. During Data transmission with differential signals, a Data signal (Data) accompanies a clock signal, and the Data signal is relatively stable at a rising edge or a falling edge of the clock signal, and at this time, a receiving end acquires target Data in the Data signal.
However, in practical situations, due to the inconsistency of the characteristic impedance of the transmission trace, the signal may encounter a reflection phenomenon during the transmission process, and the reflected signal is then superimposed with the initial signal, resulting in an uneven actual signal waveform. Therefore, when the clock signal is affected by reflection, the actually generated clock signal is uneven, and when the potential at the uneven portion is low, the receiving end is liable to erroneously regard the fluctuation near the uneven wave as a rising edge or a falling edge, and acquire transmission data from the erroneously recognized rising edge or falling edge, resulting in an error in data acquisition.
Content of application
The present application mainly aims to provide a data transmission method and apparatus, and aims to solve the technical problem of data acquisition errors caused by reflection influence on a clock signal.
In order to achieve the above object, the present application provides a data transmission method, including the following steps:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring the potential of the clock signal in real time within a time interval, wherein the time interval is less than or equal to half a clock period of the clock signal;
and increasing the output amplitude of the clock signal when the acquired potential is lower than a preset threshold.
Optionally, the step of increasing the output amplitude of the clock signal includes:
acquiring an initial amplitude of the clock signal in the clock period;
and determining a target amplitude according to the initial amplitude, and increasing the output amplitude of the clock signal to the target amplitude.
Optionally, after the step of obtaining the clock signal corresponding to the data signal, the method further includes:
monitoring a zero-volt time point when the potential of the clock signal is zero volt in real time;
and when the zero-volt time point is delayed for a preset time length, acquiring the potential of the clock signal in the time interval in real time by taking the current time point as an initial time point.
Optionally, after the step of obtaining the clock signal corresponding to the data signal, the method further includes:
acquiring a clock period of the clock signal.
Optionally, the step of acquiring a clock cycle of the clock signal includes:
acquiring the frequency of the clock signal, and acquiring the clock period of the clock signal according to the frequency;
or acquiring a zero-volt time point of the clock signal, and acquiring a clock cycle of the clock signal according to a time interval between two adjacent zero-volt time points.
Optionally, after the step of increasing the output amplitude of the clock signal, the method further includes:
and acquiring the data of the data signal according to the clock signal with the increased output amplitude.
Optionally, the step of obtaining the data of the data signal according to the clock signal with the increased output amplitude includes:
acquiring the rising edge and the falling edge of the clock signal after the output amplitude is increased;
determining a time point in the data signal corresponding to the rising edge and the falling edge;
and capturing data corresponding to the time point in the data signal.
In addition, in order to achieve the above object, the present application further provides a data transmission method, which is characterized by comprising the following steps:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring a clock period of the clock signal;
acquiring the potential of the clock signal in a half clock period in real time;
and when the acquired potential is lower than a preset threshold value, increasing the output amplitude of the clock signal to a preset amplitude.
Optionally, the step of obtaining the potential of the clock signal in half of the clock cycle in real time includes:
monitoring a zero-volt time point when the potential of the clock signal is zero volt;
and acquiring the potential of the clock signal in a half clock period after the zero-volt time point in real time.
In addition, in order to achieve the above object, the present application also provides a data transmission device, including: a memory, a processor and a transmission program of data stored on the memory and executable on the processor, the transmission program of data implementing the steps of the transmission method of data as described above when executed by the processor.
According to the data transmission method and device provided by the embodiment of the application, when the data transmission is detected, the clock signal corresponding to the data signal is obtained. And determining the potential of the clock signal within a time interval, wherein the time interval is less than or equal to one half clock cycle. When the fact that the electric potential of the clock signal is smaller than the preset threshold value in the time interval is detected, feeding back a signal with too low amplitude to a sending end (for example, a time sequence driving chip) of the clock signal, so that the sending end of the clock signal can increase the output amplitude of the clock signal. After the output amplitude of the clock signal is increased, the clock signal accords with the new output amplitude, and the electric potential corresponding to the time point of which the electric potential is lower than the preset threshold value is increased, so that a rising edge or a falling edge cannot occur near the time point, and the data is effectively prevented from being captured by mistake.
Drawings
Fig. 1 is a schematic terminal structure diagram of a hardware operating environment according to an embodiment of the present application;
fig. 2 is a schematic flowchart of an embodiment of a data transmission method according to the present application;
FIG. 3 is a waveform diagram illustrating a data transmission method according to the present application;
FIG. 4 is another waveform diagram illustrating a data transmission method according to the present application;
fig. 5 is a schematic flow chart illustrating another embodiment of a data transmission method of the present application;
fig. 6 is a flowchart illustrating a data transmission method according to another embodiment of the present application.
The implementation, functional features and advantages of the objectives of the present application will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
The main solution of the embodiment of the application is as follows:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring the potential of the clock signal in real time within a time interval, wherein the time interval is less than or equal to half a clock period of the clock signal;
and increasing the output amplitude of the clock signal when the acquired potential is lower than a preset threshold.
When the clock signal is affected by reflection, the actually generated clock signal is uneven, and when the potential at the uneven part is low, the receiving end easily and mistakenly takes the fluctuation near the uneven wave as a rising edge or a falling edge, and acquires transmission data according to the mistaken rising edge or the mistaken falling edge, so that data acquisition errors are caused.
The application provides a solution for starting to acquire a clock signal corresponding to a data signal when detecting that there is data transmission. And determining the potential of the clock signal within a time interval, wherein the time interval is less than or equal to one half clock cycle. When the fact that the electric potential of the clock signal is smaller than the preset threshold value in the time interval is detected, feeding back a signal with too low amplitude to a sending end (for example, a time sequence driving chip) of the clock signal, so that the sending end of the clock signal can increase the output amplitude of the clock signal. After the output amplitude of the clock signal is increased, the clock signal accords with the new output amplitude, and the electric potential corresponding to the time point of which the electric potential is lower than the preset threshold value is increased, so that a rising edge or a falling edge cannot occur near the time point, and the data is effectively prevented from being captured by mistake.
As shown in fig. 1, fig. 1 is a schematic terminal structure diagram of a hardware operating environment according to an embodiment of the present application.
The terminal in the embodiment of the application can be a data extraction device of a data signal, a television, and a computer.
As shown in fig. 1, the terminal may include: the processor 1001 includes, for example, a CPU, a memory 1002, a communication bus 1003, a Data Driver 1004, and a timing driving chip (TCON IC) 1005. Wherein the communication bus 1003 is configured to implement connection communication between the components in the terminal. The memory 1002 may be a high-speed random access memory or a non-volatile memory (e.g., a disk memory). The memory 1002 may alternatively be a storage device separate from the processor 1001. The data driver 1004 performs processing of the data signal, and may include at least one of a frequency determination unit, a potential determination unit, and an internal processing module. The timing driving chip 1005 is configured to generate and transmit a data signal and a clock signal.
Those skilled in the art will appreciate that the configuration of the terminal shown in fig. 1 is not intended to be limiting of the terminals of the embodiments of the present application and may include more or less components than shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, a transmission program for transmitting data may be included in the memory 1002 as a kind of computer storage medium.
In the server shown in fig. 1, the processor 1001 may be configured to call a transfer program of data stored in the memory 1002, and perform the following operations:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring the potential of the clock signal in real time within a time interval, wherein the time interval is less than half a clock period of the clock signal;
and increasing the output amplitude of the clock signal when the acquired potential is lower than a preset threshold.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
acquiring an initial amplitude of the clock signal in the clock period;
and determining a target amplitude according to the initial amplitude, and increasing the output amplitude of the clock signal to the target amplitude.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
monitoring a zero-volt time point when the potential of the clock signal is zero volt in real time;
and when the zero-volt time point is delayed for a preset time length, acquiring the potential of the clock signal in the time interval in real time by taking the current time point as an initial time point.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
acquiring a clock period of the clock signal.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
acquiring the frequency of the clock signal, and acquiring the clock period of the clock signal according to the frequency;
or acquiring a zero-volt time point of the clock signal, and acquiring a clock cycle of the clock signal according to a time interval between two adjacent zero-volt time points.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
and acquiring the data of the data signal according to the clock signal with the increased output amplitude.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
acquiring the rising edge and the falling edge of the clock signal after the output amplitude is increased;
determining a time point in the data signal corresponding to the rising edge and the falling edge;
and capturing data corresponding to the time point in the data signal.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring a clock period of the clock signal;
acquiring the potential of the clock signal in a half clock period in real time;
and when the acquired potential is lower than a preset threshold value, increasing the output amplitude of the clock signal to a preset amplitude.
Further, the processor 1001 may call a transfer program of data stored in the memory 1002, and also perform the following operations:
monitoring a zero-volt time point when the potential of the clock signal is zero volt;
and acquiring the potential of the clock signal in a half clock period after the zero-volt time point in real time.
Referring to fig. 2, in an embodiment of a data transmission method of the present application, the data transmission method includes:
step S10, when the data signal is detected, a clock signal corresponding to the data signal is obtained.
Step S20, acquiring the potential of the clock signal in real time within a time interval, wherein the time interval is less than or equal to half a clock period of the clock signal.
In the modern life, as communication technologies are developed more and more, more and more signal transmission is adopted to realize data transmission. Taking the technical field of digital televisions as an example, as the liquid crystal televisions are increasingly larger in size and higher in resolution, data to be transmitted is increasingly increased, and differential signals are widely popularized as a high-speed transmission protocol in data signals. However, in the actual transmission process of the data signal, due to the inconsistency of the characteristic impedance of the transmission trace, the data signal may encounter a reflection phenomenon in the transmission process, and the reflected data signal is then signal-superposed with the initial clock signal, so that the waveform of the actually obtained clock signal has an uneven phenomenon.
As shown in fig. 3, the upper part of the figure is the waveform of the data signal, and the lower part is the waveform generated by the clock signal. When the clock signal is influenced by reflection, the shape of the clock signal changes, for example, a concave point a and a corresponding convex point B appear in fig. 3, when the potential of the point a is smaller than a certain value, the potential of the point is easily regarded as a negative value during signal identification, at this time, a rising edge is formed on the right side of the point a, and then data in the data signal is captured according to the generated rising edge, and an abnormal capture phenomenon occurs, resulting in data capture errors. Similarly, a falling edge is formed on the right side of the point B, and the falling edge captures data in the data signal, resulting in a capture error of the data. When the receiving end receives wrong data, the display of the data is easy to be abnormal or noisy.
In order to avoid the phenomenon of abnormal data capture, the application provides a data transmission method, and when data transmission is detected, a clock signal corresponding to a data signal is obtained. And determining the potential of the clock signal in a time interval, wherein the potential directions of the clock signals in a half clock period are the same, so the clock period is a half clock period, and the time interval is a period of time in the half clock period. A potential judging unit is added to a Data Driver (Data Driver), and after the Data Driver acquires a clock signal, the potential judging unit can acquire a potential corresponding to each time point of the clock signal.
Further, after the zero volt time point when the potential of the clock signal is detected to be 0V is delayed for a certain preset time, the potential of the clock signal in the time interval starts to be detected in real time. As shown in fig. 4, the potential of the clock signal in the Δ t time interval is detected. It is easily understood that, in a half cycle of the clock signal, the clock signal decreases in a sinusoidal manner after the output amplitude potential increases, and a time point of the smaller potential may be lower than the preset threshold value in a certain time period existing at the beginning of rising and approaching the end of falling, so that the time interval for acquiring the potential of the clock signal in real time is a partial time period in the half cycle, i.e., a time period after the beginning of the half cycle and a time period before the end of the half cycle are deducted. The misjudgment of an abnormal grabbing point (point C) is avoided, when the output amplitude can meet the grabbing requirement of normal data of the clock signal, the output amplitude is increased, and the workload of a clock signal sending end is increased.
In step S30, when the acquired potential is lower than a preset threshold, the output amplitude of the clock signal is increased.
When the fact that the potential in the clock signal is smaller than the preset threshold value in the time interval is detected, it is indicated that a time point corresponding to the potential is possibly mistaken by the signal receiving end as a negative voltage, a rising edge or a falling edge is easily generated at the time point, and then the rising edge or the falling edge is used as a data capture point. In order to avoid forming an erroneous data capture point, when the acquired potential is lower than the preset threshold, a signal with too low amplitude is fed back to a sending end (for example, a timing sequence driving chip) of the clock signal, so that the sending end of the clock signal increases the output amplitude of the clock signal. After the output amplitude of the clock signal is increased, the clock signal accords with the new output amplitude, and the electric potential corresponding to the time point of which the electric potential is lower than the preset threshold value is increased, so that a rising edge or a falling edge cannot occur near the time point, and the data is effectively prevented from being captured by mistake. The preset threshold is a critical value for signal judgment, and may be 0-0.3V.
In addition, the data signal is transmitted in a sinusoidal waveform, and the positive and negative of the potential at each time point in the signal wave are opposite, which can be regarded as an example of the former half period. When the detection is a second half period, the judgment direction is opposite, namely when the acquired potential is higher than a preset threshold value, the output amplitude of the clock signal is increased, and the preset threshold value is a negative value; or changing the potential direction of the second half period, and judging whether the potential is lower than the preset threshold value after taking the opposite number of the potential of the second half period as a positive value.
As shown in fig. 4, the potential in the Δ t period in the clock signal is detected, and when the potential at the point C is detected to be less than 0.3V, feedback information of increasing amplitude is fed back to the clock signal output terminal, and the clock signal output terminal increases the output amplitude of the subsequent clock signal to form a clock signal wave corresponding to the following solid line (the dotted line is the clock signal wave before the output amplitude is increased), at this time, the potential at the point D corresponding to the period of the point C is increased, and the data driver receives the clock signal after the amplitude is increased to correctly identify the high level or the low level, and no misjudged rising edge or falling edge is generated near the point D, thereby avoiding the erroneous capture of data.
Further, since the initial amplitudes of the initial clock signals sent by each clock signal sending end are different, when the output amplitude of the clock signal is increased, the initial amplitude is obtained first, then the target amplitude is determined according to the initial amplitude, and the output amplitude of the clock signal is increased to the target amplitude. For example, when the initial amplitude is 0.5V, which indicates that 0.5V is used as the output amplitude, and an abnormal grabbing point exists, it is determined that the target amplitude is 0.8, that is, a clock signal is generated and transmitted with 0.8V as the output amplitude; if the initial amplitude is 0.4V, the target amplitude may be 0.6V. The magnitude of the increase in the specific amplitude is determined experimentally and is merely illustrative.
In this embodiment, when the presence of data transmission is detected, the clock signal corresponding to the data signal starts to be acquired. And determining the potential of the clock signal over a time interval, wherein the time interval is less than half a clock cycle. When the fact that the electric potential of the clock signal is smaller than the preset threshold value in the time interval is detected, feeding back a signal with too low amplitude to a sending end (for example, a time sequence driving chip) of the clock signal, so that the sending end of the clock signal can increase the output amplitude of the clock signal. After the output amplitude of the clock signal is increased, the clock signal accords with the new output amplitude, and the electric potential corresponding to the time point of which the electric potential is lower than the preset threshold value is increased, so that a rising edge or a falling edge cannot occur near the time point, and the data is effectively prevented from being captured by mistake.
Further, referring to fig. 5, another embodiment of the data transmission method according to the present application is based on the above embodiment, after step S10, the method further includes:
step S40, acquiring a clock cycle of the clock signal.
The Data Driver (Data Driver) is provided with a frequency determination unit, the frequency of the clock signal can be obtained by the frequency determination unit, and the clock period of the clock signal can be obtained according to the obtained frequency because the period and the frequency are reciprocal.
In addition, the zero-volt time point of the clock signal with the potential of 0V can be acquired by the potential judging unit provided in the Data Driver, and the time interval between two adjacent zero-volt time points in the clock signal is half a clock cycle, so that the clock cycle can be acquired from the two adjacent zero-volt time points. The clock period of the clock signal can be obtained in other manners, which will not be described again.
In this embodiment, after the clock signal is acquired, the clock period is acquired according to the clock signal, so as to determine a judgment time interval for detecting whether the abnormal data capturing point exists in the clock signal according to the clock period, that is, determine the time interval, so as to acquire the potential of the clock signal in real time in the time interval, which is beneficial to eliminating the abnormal data capturing point and avoiding data capturing errors.
Further, referring to fig. 6, another embodiment of the data transmission method according to the present application, based on the above embodiments, after step S30, the method further includes:
step S50, obtaining data of the data signal according to the clock signal with the increased output amplitude.
Although the output amplitude of the clock signal is increased, the period and the frequency of the clock signal are not changed, so that the clock signal with the increased output amplitude can still effectively capture effective data in the data signal corresponding to the clock signal. And after the output amplitude of the clock signal is increased, some abnormal grabbing points which exist previously are removed, so that the data in the data signal can be grabbed accurately according to the clock signal, and the data grabbing accuracy is improved.
When the data is captured by the clock signal with the increased amplitude, the rising edge and/or the falling edge of the clock signal are/is obtained, the time point corresponding to the rising edge or the falling edge in the data signal is determined, and the data in the data signal is captured at the determined time point.
In this embodiment, when capturing data by the clock signal with the increased amplitude, a rising edge and/or a falling edge of the clock signal is obtained, a time point corresponding to the rising edge or the falling edge in the data signal is determined, and data in the data signal is captured at the determined time point. Although the output amplitude of the clock signal is increased, the period and the frequency of the clock signal are not changed, so that the clock signal with the increased output amplitude can still effectively capture effective data in the data signal corresponding to the clock signal. And after the output amplitude of the clock signal is increased, some abnormal grabbing points which exist previously are removed, so that the data in the data signal can be grabbed accurately according to the clock signal, and the data grabbing accuracy is improved.
In addition, the embodiment of the present application further provides a data transmission method, where when it is detected that there is data transmission, a clock signal corresponding to the data signal is obtained, and a clock period of the clock signal is obtained. Because the potential directions are the same in a half complete clock cycle, the potential of the clock signal is acquired in real time, when the potential existing in the clock signal is smaller than a preset threshold value, it indicates that a time point corresponding to the potential may be mistaken as a negative voltage by a signal receiving end, a rising edge or a falling edge is easily generated at the time point, and then the rising edge or the falling edge is used as a data capture point. In order to avoid forming an erroneous data capture point, when the acquired potential is lower than the preset threshold, a signal with too low amplitude is fed back to a sending end (for example, a timing sequence driving chip) of the clock signal, so that the sending end of the clock signal increases the output amplitude of the clock signal. And acquiring a preset amplitude value, and increasing the output amplitude value of the clock signal to the preset amplitude value. After the output amplitude of the clock signal is increased, the clock signal accords with the new output amplitude, and the electric potential corresponding to the time point of which the electric potential is lower than the preset threshold value is increased, so that a rising edge or a falling edge cannot occur near the time point, and the data is effectively prevented from being captured by mistake.
Furthermore, in order to make the acquisition time period of the electric potential of the clock signal be a complete half clock cycle, a zero-volt time point of the electric potential of the clock signal being zero volt is detected, and the electric potential of the clock signal in the half clock cycle is acquired by taking the zero-volt time point as a revealing time point
In addition, an embodiment of the present application further provides a data transmission device, where the data transmission device includes: the data transmission method comprises a memory, a processor and a data transmission program stored on the memory and capable of running on the processor, wherein the data transmission program realizes the steps of the data transmission method according to the various embodiments when being executed by the processor.
Furthermore, the present application may also include a computer-readable storage medium having stored thereon a transmission program of data for implementing the steps of the transmission method of data as described in the above embodiments when executed by a processor.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solutions of the present application may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present application.
The above description is only a preferred embodiment of the present application, and not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application, or which are directly or indirectly applied to other related technical fields, are included in the scope of the present application.
Claims (9)
1. A method for transmitting data, the method comprising:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring the potential of the clock signal in real time within a time interval, wherein the time interval is less than or equal to half a clock period of the clock signal;
and increasing the output amplitude of the clock signal when the acquired potential is lower than a preset threshold.
2. The method of claim 1, wherein the step of increasing the output amplitude of the clock signal comprises:
acquiring an initial amplitude of the clock signal in the clock period;
and determining a target amplitude according to the initial amplitude, and increasing the output amplitude of the clock signal to the target amplitude.
3. The method for transmitting data according to claim 1, wherein the step of obtaining the clock signal corresponding to the data signal is followed by further comprising:
monitoring a zero-volt time point when the potential of the clock signal is zero volt in real time;
and when the zero-volt time point is delayed for a preset time length, acquiring the potential of the clock signal in the time interval in real time by taking the current time point as an initial time point.
4. The method for transmitting data according to claim 1, wherein the step of obtaining the clock signal corresponding to the data signal is followed by further comprising:
acquiring a clock period of the clock signal.
5. The method of claim 4, wherein the step of obtaining the clock period of the clock signal comprises:
acquiring the frequency of the clock signal, and acquiring the clock period of the clock signal according to the frequency;
or acquiring a zero-volt time point of the clock signal, and acquiring a clock cycle of the clock signal according to a time interval between two adjacent zero-volt time points.
6. The method for transmitting data according to any one of claims 1 to 5, wherein the step of increasing the output amplitude of the clock signal is followed by further comprising:
and acquiring the data of the data signal according to the clock signal with the increased output amplitude.
7. The method according to claim 6, wherein the step of acquiring the data of the data signal according to the clock signal with the increased output amplitude comprises:
acquiring the rising edge and the falling edge of the clock signal after the output amplitude is increased;
determining a time point in the data signal corresponding to the rising edge and the falling edge;
and capturing data corresponding to the time point in the data signal.
8. A method for transmitting data, the method comprising:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring a clock period of the clock signal;
monitoring a zero-volt time point when the potential of the clock signal is zero volt;
acquiring the potential of the clock signal in a half clock period after the zero-volt time point in real time;
and when the acquired potential is lower than a preset threshold value, increasing the output amplitude of the clock signal to a preset amplitude.
9. An apparatus for transmitting data, the apparatus comprising: a memory, a processor and a transmission program of data stored on the memory and operable on the processor, the transmission program of data implementing the steps of the transmission method of data as follows when executed by the processor:
when a data signal is detected, acquiring a clock signal corresponding to the data signal;
acquiring the potential of the clock signal in real time in the clock period of the clock signal;
and increasing the output amplitude of the clock signal when the acquired potential is lower than a preset threshold.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811559201.XA CN109787716B (en) | 2018-12-19 | 2018-12-19 | Data transmission method and device |
| PCT/CN2019/122791 WO2020125408A1 (en) | 2018-12-19 | 2019-12-03 | Data transmission method and apparatus |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811559201.XA CN109787716B (en) | 2018-12-19 | 2018-12-19 | Data transmission method and device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN109787716A CN109787716A (en) | 2019-05-21 |
| CN109787716B true CN109787716B (en) | 2020-12-29 |
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| CN109787716A (en) | 2019-05-21 |
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