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CN109656297B - A program-controlled load adaptive constant current source module - Google Patents

A program-controlled load adaptive constant current source module Download PDF

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CN109656297B
CN109656297B CN201811598638.4A CN201811598638A CN109656297B CN 109656297 B CN109656297 B CN 109656297B CN 201811598638 A CN201811598638 A CN 201811598638A CN 109656297 B CN109656297 B CN 109656297B
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resistor
module
operational amplifier
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inverting input
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CN109656297A (en
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汝玉星
毕琳旭
孙茂强
于广安
杨忠岗
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Jilin University
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    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current 
    • G05F1/46Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/56Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in series with the load as final control devices

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Abstract

本发明的一种程控式负载自适应恒流源模块属于电子设备的技术领域,主要结构有单片机(1)、数模转换模块(2)、功率输出模块(3)、负载判断模块(4)、延时补偿模块(5)、电压跟踪模块(6)、断电保护模块(8)、程控模块(9)等。本发明在工作时能够主动适应负载的变化,具有效率高、负载适应范围宽、安全性高、可靠性高等优点。

Figure 201811598638

A program-controlled load-adaptive constant current source module of the present invention belongs to the technical field of electronic equipment, and the main structure includes a single-chip microcomputer (1), a digital-to-analog conversion module (2), a power output module (3), and a load judgment module (4) , a delay compensation module (5), a voltage tracking module (6), a power failure protection module (8), a program control module (9), and the like. The invention can actively adapt to the change of the load during operation, and has the advantages of high efficiency, wide load adaptation range, high safety and high reliability.

Figure 201811598638

Description

一种程控式负载自适应恒流源模块A program-controlled load adaptive constant current source module

技术领域technical field

本发明属于电子设备的技术领域。特别涉及一种程控式负载自适应恒流源模块。The present invention belongs to the technical field of electronic equipment. In particular, it relates to a program-controlled load adaptive constant current source module.

背景技术Background technique

恒流源在LED驱动、激光器驱动、传感器驱动、各种辉光放电光源驱动等很多领域内都有重要的应用。恒流源电路的基本原理一般是利用三极管或场效应管的非线性特性以及深度负反馈技术,使输出电流受控制电压的控制,当负载变化的时候保持流过负载的电流恒定。在恒流源电路中,电流的稳定度和电路的效率是两个至关重要的参数。Constant current sources have important applications in many fields such as LED driving, laser driving, sensor driving, and various glow discharge light source driving. The basic principle of the constant current source circuit is generally to use the nonlinear characteristics of the triode or the field effect transistor and the deep negative feedback technology, so that the output current is controlled by the control voltage, and the current flowing through the load is kept constant when the load changes. In the constant current source circuit, the stability of the current and the efficiency of the circuit are two crucial parameters.

与本发明最接近的现有技术是本课题组2015年12月29日申请的中国专利“一种双环反馈恒流源电路”(申请号:201511008766.5),该专利在普通恒流源的基础上增加了一个反馈环,有效提高了输出电流的稳定度以及电路工作的可靠性。但是与其它现有技术恒流源电路一样,该专利存在对负载适应能力差的问题。具体来说,一个恒流源电路只能驱动一种固定的负载,或只允许负载在很小范围内变化,当负载增大时导致控制电流的三极管进入到饱和区,进而导致最大输出电流迅速下降(即无法继续保持受控地输出恒流),而当负载减小时则会使三极管进入到欠压区(因为负载小,负载两端产生的电压也小,在本领域内称为欠压),由于三极管与负载同处一个串联回路中,且三极管是非线性器件,因此负载电压的减小导致三极管自动承担回路多余的电压,进而导致三极管的内部功耗急剧上升,而三极管的内部功耗属于电路的“副产物”,对系统百害而无一利:一方面管功耗的增加会使管子温度急剧升高而增加管子烧坏的风险(降低仪器的使用寿命),另一方面当负载变化时不能及时调整功率供给导致整个电路的效率大幅度降低,这在将恒流源用于移动设备时是非常不利的。因为在移动平台上工作时,为了保证系统的续航时间,效率往往是需要重点考虑的一项指标。另外,上述专利所公开的技术方案中没有过流断电保护功能,一旦限流模块失效时会导致输出电流超过限制电流(一般为最大安全电流)的风险,造成负载或仪器的损坏。The closest prior art to the present invention is the Chinese patent "A Dual-loop Feedback Constant Current Source Circuit" (application number: 201511008766.5) filed by our research group on December 29, 2015. This patent is based on a common constant current source. A feedback loop is added, which effectively improves the stability of the output current and the reliability of the circuit operation. However, like other prior art constant current source circuits, this patent has the problem of poor adaptability to the load. Specifically, a constant current source circuit can only drive a fixed load, or only allow the load to vary within a small range. When the load increases, the triode that controls the current will enter the saturation region, resulting in a rapid maximum output current. drop (that is, it cannot continue to maintain a controlled output constant current), and when the load is reduced, the triode will enter the undervoltage region (because the load is small, the voltage generated across the load is also small, which is called undervoltage in this field. ), since the triode and the load are in the same series loop, and the triode is a nonlinear device, the reduction of the load voltage causes the triode to automatically bear the excess voltage of the loop, which in turn causes the internal power consumption of the triode to rise sharply, while the internal power consumption of the triode It is a "by-product" of the circuit, which is harmful to the system without any benefit: on the one hand, the increase in the power consumption of the tube will cause the temperature of the tube to rise sharply and increase the risk of the tube burning out (reducing the service life of the instrument), on the other hand, when the load The inability to adjust the power supply in time when changing causes the efficiency of the entire circuit to be greatly reduced, which is very unfavorable when the constant current source is used in mobile devices. Because when working on mobile platforms, in order to ensure the battery life of the system, efficiency is often an indicator that needs to be considered. In addition, the technical solutions disclosed in the above patents have no overcurrent and power-off protection function. Once the current limiting module fails, it will cause the output current to exceed the limit current (generally the maximum safe current), resulting in damage to the load or the instrument.

因此现有的恒流源技术还需要进一步优化。Therefore, the existing constant current source technology needs to be further optimized.

发明内容SUMMARY OF THE INVENTION

本发明要解决的技术问题是,针对现有技术存在的缺点,提供一种程控式负载自适应恒流源模块,当负载阻抗发生变化时,能够自动调节电路自身的参数,以适应负载的阻抗变化,保持高效率,且具备过流断电保护的功能。The technical problem to be solved by the present invention is to provide a program-controlled load adaptive constant current source module in view of the shortcomings of the prior art. When the load impedance changes, the parameters of the circuit itself can be automatically adjusted to adapt to the load impedance. change, maintain high efficiency, and have the function of over-current and power-off protection.

本发明的具体的技术方案是:The concrete technical scheme of the present invention is:

一种程控式负载自适应恒流源模块,结构有单片机1、数模转换模块2、功率输出模块3、程控模块9、模数转换模块10、电源管理模块12和前面板13;其特征在于,结构还有负载判断模块4、延时补偿模块5、电压跟踪模块6、过流判断模块7、断电保护模块8和参考电压模块11;其中,单片机1分别与程控模块9、模数转换模块10、数模转换模块2相连,数模转换模块2与功率输出模块3相连,功率输出模块3分别与模数转换模块10、负载判断模块4、过流判断模块7相连,参考电压模块11与负载判断模块4相连,负载判断模块4与延时补偿模块5相连,延时补偿模块5与电压跟踪模块6相连,电压跟踪模块6与功率输出模块3相连,过流判断模块7与断电保护模块8相连,断电保护模块8分别与功率输出模块3和电压跟踪模块6相连;电源管理模块12是能将市电交流电转换成直流电压的电路,为各模块提供Vcc、Vcc/2、Vdd三种直流电压;A program-controlled load self-adaptive constant current source module has a structure of a single-chip microcomputer 1, a digital-to-analog conversion module 2, a power output module 3, a program-controlled module 9, an analog-to-digital conversion module 10, a power management module 12 and a front panel 13; it is characterized in that , the structure also has a load judgment module 4, a delay compensation module 5, a voltage tracking module 6, an overcurrent judgment module 7, a power-off protection module 8 and a reference voltage module 11; wherein, the single-chip microcomputer 1 is respectively connected with the program control module 9, the analog-to-digital conversion module Module 10, digital-to-analog conversion module 2 are connected, digital-to-analog conversion module 2 is connected with power output module 3, power output module 3 is respectively connected with analog-to-digital conversion module 10, load judgment module 4, overcurrent judgment module 7, reference voltage module 11 It is connected with the load judgment module 4, the load judgment module 4 is connected with the delay compensation module 5, the delay compensation module 5 is connected with the voltage tracking module 6, the voltage tracking module 6 is connected with the power output module 3, and the overcurrent judgment module 7 is connected with the power failure. The protection module 8 is connected, and the power failure protection module 8 is respectively connected with the power output module 3 and the voltage tracking module 6; the power management module 12 is a circuit that can convert the AC AC into a DC voltage, and provides Vcc, Vcc/2, Vdd three DC voltages;

所述的功率输出模块3的结构为:继电器EK1的开关的一端作为功率输出模块3的第一个输入端,记为端口PWR-in1,另一端接场效应管Q1的漏极,并作为功率输出模块3的第一个输出端,记为端口PWR-out1,继电器EK1的线圈的一端接电源Vdd,另一端作为功率输出模块3的第二个输入端,记为端口PWR-in2,场效应管Q1的栅极与运放U1A的输出端相连,源极作为功率输出模块3的第二个输出端,记为端口PWR-out2,电阻R1的一端接运放U1A的同相输入端,并作为功率输出模块3的第三个输入端,记为端口PWR-in3,电阻R1的另一端作为功率输出模块3的第四个输入端,记为端口PWR-in4,与数模转换模块2的输出端相连;运放U1A的反相输入端与电容C1的一端和电阻R2的一端相连,电容C1的另一端与运放U1A的输出端相连,电阻R2的另一端与滑动变阻器W1的一端、滑动变阻器W1的滑线端及运放U1B的输出端相连,滑动变阻器W1的另一端与电阻R3的一端相连,电阻R3的另一端与运放U1B的反相输入端和电阻R4的一端相连,电阻R4的另一端接地,运放U1B的同相输入端与电阻Rs的一端相连,并作为功率输出模块3的第三个输出端,记作端口PWR-out3,电阻Rs的另一端接地;The structure of the power output module 3 is as follows: one end of the switch of the relay EK1 is used as the first input end of the power output module 3, denoted as port PWR-in1, and the other end is connected to the drain of the field effect transistor Q1, and is used as the power output. The first output terminal of output module 3 is marked as port PWR-out1, one end of the coil of relay EK1 is connected to power supply Vdd, and the other end is used as the second input terminal of power output module 3, marked as port PWR-in2, field effect The gate of the tube Q1 is connected to the output terminal of the operational amplifier U1A, and the source is used as the second output terminal of the power output module 3, denoted as port PWR-out2, and one end of the resistor R1 is connected to the non-inverting input terminal of the operational amplifier U1A, and is used as The third input terminal of power output module 3 is denoted as port PWR-in3, and the other end of resistor R1 is used as the fourth input terminal of power output module 3, denoted as port PWR-in4, and the output of digital-to-analog conversion module 2 The inverting input end of the operational amplifier U1A is connected to one end of the capacitor C1 and one end of the resistor R2, the other end of the capacitor C1 is connected to the output end of the operational amplifier U1A, the other end of the resistor R2 is connected to one end of the sliding varistor W1, the sliding The sliding end of the varistor W1 is connected to the output end of the operational amplifier U1B, the other end of the sliding varistor W1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the inverting input end of the operational amplifier U1B and one end of the resistor R4. The other end of R4 is grounded, the non-inverting input end of the operational amplifier U1B is connected to one end of the resistor Rs, and is used as the third output end of the power output module 3, denoted as port PWR-out3, and the other end of the resistor Rs is grounded;

所述的负载判断模块4的结构为:运放U2A的同相输入端作为负载判断模块4的第一个输入端,记作端口Vjdg-in1,与功率输出模块3的端口PWR-out1相连,运放U2A的反相输入端与运放U2A的输出端和电阻R5的一端相连,电阻R5的另一端与电阻R6的一端和运放U3A的同相输入端相连,电阻R6的另一端接地,运放U3A的输出端与电阻R8的一端和电阻R9的一端相连,电阻R8的另一端与运放U3A的反相输入端和电阻R7的一端相连,电阻R7的另一端与运放U2B的反相输入端和运放U2B的输出端相连,运放U2B的同相输入端作为负载判断模块4的第二个输入端,记作端口Vjdg-in2,与功率输出模块3的端口PWR-out2相连,电阻R9的另一端与电阻R10的一端和运放U3B的同相输入端相连,电阻R10的另一端接电源Vcc/2,运放U3B的输出端与电阻R12的一端相连,并作为负载判断模块4的输出端,记作端口Vjdg-out,与延时补偿模块5的输入端相连,电阻R12的另一端与运放U3B的反相输入端和R11的一端相连,电阻R11的另一端与运放U4B的输出端和运放U4B的反相输入端相连,运放U4B的同相输入端与滑动变阻器W2的滑线端相连,滑动变阻器W2的一端接地,另一端作为负载判断模块4的第三个输入端,记作端口Vjdg-in3,与参考电压模块12的输出端相连;The structure of the load judging module 4 is as follows: the non-inverting input terminal of the operational amplifier U2A is used as the first input terminal of the load judging module 4, which is denoted as port Vjdg-in1, and is connected to the port PWR-out1 of the power output module 3. The inverting input terminal of the amplifier U2A is connected to the output terminal of the operational amplifier U2A and one end of the resistor R5, the other end of the resistor R5 is connected to one end of the resistor R6 and the non-inverting input terminal of the operational amplifier U3A, the other end of the resistor R6 is grounded, and the operational amplifier The output end of U3A is connected to one end of resistor R8 and one end of resistor R9, the other end of resistor R8 is connected to the inverting input end of op amp U3A and one end of resistor R7, the other end of resistor R7 is connected to the inverting input of op amp U2B The terminal is connected to the output terminal of the operational amplifier U2B. The non-inverting input terminal of the operational amplifier U2B is used as the second input terminal of the load judgment module 4, denoted as port Vjdg-in2, which is connected to the port PWR-out2 of the power output module 3, and the resistor R9 The other end of the resistor R10 is connected to one end of the resistor R10 and the non-inverting input end of the op amp U3B, the other end of the resistor R10 is connected to the power supply Vcc/2, the output end of the op amp U3B is connected to one end of the resistor R12, and is used as the output of the load judgment module 4 The terminal, denoted as port Vjdg-out, is connected to the input terminal of the delay compensation module 5, the other end of the resistor R12 is connected to the inverting input terminal of the op amp U3B and one end of R11, and the other end of the resistor R11 is connected to the op amp U4B. The output terminal is connected to the inverting input terminal of the operational amplifier U4B, the non-inverting input terminal of the operational amplifier U4B is connected to the sliding wire terminal of the sliding rheostat W2, one end of the sliding rheostat W2 is grounded, and the other end is used as the third input terminal of the load judgment module 4 , denoted as port Vjdg-in3, connected with the output end of the reference voltage module 12;

所述的参考电压模块11的结构为:电阻R37的一端接电源Vcc,另一端与稳压二极管D2的负极和滑动变阻器W5的一端相连,稳压二极管D2的正极和滑动变阻器W5的另一端接地,滑动变阻器W5的滑线端与运放U7B的同相输入端相连,运放U7B的反相输入端与运放U7B的输出端相连,并作为参考电压模块12的输出端,记作端口Vref-out,与负载判断模块4的端口Vjdg-in3相连;The structure of the reference voltage module 11 is as follows: one end of the resistor R37 is connected to the power supply Vcc, the other end is connected to the negative electrode of the zener diode D2 and one end of the sliding varistor W5, and the positive electrode of the zener diode D2 and the other end of the sliding varistor W5 are grounded. , the sliding line terminal of the sliding rheostat W5 is connected to the non-inverting input terminal of the operational amplifier U7B, the inverting input terminal of the operational amplifier U7B is connected to the output terminal of the operational amplifier U7B, and is used as the output terminal of the reference voltage module 12, denoted as port Vref- out, connected to the port Vjdg-in3 of the load judgment module 4;

所述的延时补偿模块5的结构为:电阻R13的一端与电阻R18的一端相连,并作为延时补偿模块5的输入端,记作端口Vdly-in,与负载判断模块4的端口Vjdg-out相连,电阻R13的另一端与运放U4A的反相输入端和电阻R15的一端相连,运放U4A的同相输入端与电阻R14的一端相连,电阻R14的另一端接电源Vcc/2,电阻R15的另一端与运放U4A的输出端和电阻R16的一端相连,电阻R16的另一端与电阻R17的一端、电阻R21的一端和运放U5A的反相输入端相连,电阻R17的另一端与运放U5A的输出端相连,并作为延时补偿模块5的输出端,记作端口Vdly-out,与电压跟踪模块6的第二个输入端相连,运放U5A的同相输入端与电阻R22的一端相连,电阻R22的另一端与电源Vcc/2相连,电阻R21的另一端与电阻R20的一端、电容C2的一端和运放U5B的输出端相连,电阻R20的另一端与电容C2的另一端、运放U5B的反相输入端及电阻R18的另一端相连,电阻R19的一端接运放U5B的同相输入端,另一端接Vcc/2;The structure of the delay compensation module 5 is as follows: one end of the resistance R13 is connected to one end of the resistance R18, and is used as the input end of the delay compensation module 5, denoted as port Vdly-in, and the port Vjdg- of the load judgment module 4. The other end of the resistor R13 is connected to the inverting input end of the op amp U4A and one end of the resistor R15, the non-inverting input end of the op amp U4A is connected to one end of the resistor R14, the other end of the resistor R14 is connected to the power supply Vcc/2, and the resistor The other end of R15 is connected to the output end of op amp U4A and one end of resistor R16, the other end of resistor R16 is connected to one end of resistor R17, one end of resistor R21 is connected to the inverting input end of op amp U5A, the other end of resistor R17 is connected to The output terminal of the operational amplifier U5A is connected and used as the output terminal of the delay compensation module 5, denoted as port Vdly-out, which is connected to the second input terminal of the voltage tracking module 6, and the non-inverting input terminal of the operational amplifier U5A is connected to the resistor R22. One end is connected, the other end of resistor R22 is connected to power supply Vcc/2, the other end of resistor R21 is connected to one end of resistor R20, one end of capacitor C2 is connected to the output end of op amp U5B, the other end of resistor R20 is connected to the other end of capacitor C2 , The inverting input terminal of the op amp U5B is connected to the other end of the resistor R18, one end of the resistor R19 is connected to the non-inverting input terminal of the op amp U5B, and the other end is connected to Vcc/2;

所述的电压跟踪模块6的结构为,电阻R23的一端接电源Vcc/2,另一端与运放U6A的反相输入端相连,运放U6A的同相输入端与电阻R24的一端、电阻R25的一端相连,电阻R24的另一端与运放U6A的输出端相连,电阻R25的另一端与运放U6B的输出端相连,电阻R26的一端与运放U6A的输出端相连,另一端与运放U6B的反相输入端相连;电阻R27的一端与运放U6B的同相输入端相连,另一端接电源Vcc/2;电容C3的一端及电阻R28的一端与运放U6B的反相输入端相连,另一端与运放U6B的输出端相连,运放U6B的输出端与电阻R29的一端相连,电阻R29的另一端与运放U7A的同相输入端相连,并作为电压跟踪模块6的第一个输入端,记为端口Vflw-in1,与断电保护模块8的第二个输出端相连;电阻R30的一端与运放U7A的反相输入端相连,另一端作为电压跟踪模块6的第二个输入端,记为端口Vflw-in2,与延时补偿模块5的端口Vdly-out相连;电阻R31的一端与运放U7A的反相输入端相连,另一端接电源Vcc/2;运放U7A的输出端与场效应管Q2的栅极相连,场效应管Q2的漏极接电源Vcc,源极接电感L1的一端和二极管D1的负极,二极管D1的正极接地,电感L1的另一端与电解电容C4的正极、电解电容C5的正极、电容C6的一端、电容C7的一端均相连,并作为电压跟踪模块6的输出端,记为端口Vflw-out,与功率输出模块3的端口PWR-in1相连;电解电容C4的负极、电解电容C5的负极、电容C6的另一端以及电容C7的另一端均接地;The structure of the voltage tracking module 6 is that one end of the resistor R23 is connected to the power supply Vcc/2, the other end is connected to the inverting input end of the operational amplifier U6A, and the non-inverting input end of the operational amplifier U6A is connected to one end of the resistor R24 and the other end of the resistor R25. One end is connected, the other end of the resistor R24 is connected to the output end of the operational amplifier U6A, the other end of the resistor R25 is connected to the output end of the operational amplifier U6B, one end of the resistor R26 is connected to the output end of the operational amplifier U6A, and the other end is connected to the operational amplifier U6B One end of the resistor R27 is connected to the non-inverting input of the operational amplifier U6B, and the other end is connected to the power supply Vcc/2; one end of the capacitor C3 and one end of the resistor R28 are connected to the inverting input of the operational amplifier U6B, and the other end is connected to the power supply Vcc/2. One end is connected to the output end of the operational amplifier U6B, the output end of the operational amplifier U6B is connected to one end of the resistor R29, the other end of the resistor R29 is connected to the non-inverting input end of the operational amplifier U7A, and is used as the first input end of the voltage tracking module 6 , denoted as port Vflw-in1, which is connected to the second output end of the power-off protection module 8; one end of the resistor R30 is connected to the inverting input end of the operational amplifier U7A, and the other end is used as the second input end of the voltage tracking module 6 , denoted as port Vflw-in2, connected to the port Vdly-out of the delay compensation module 5; one end of the resistor R31 is connected to the inverting input end of the operational amplifier U7A, and the other end is connected to the power supply Vcc/2; the output end of the operational amplifier U7A It is connected to the gate of the FET Q2, the drain of the FET Q2 is connected to the power supply Vcc, the source is connected to one end of the inductor L1 and the cathode of the diode D1, the anode of the diode D1 is grounded, and the other end of the inductor L1 is connected to the electrolytic capacitor C4. The positive electrode, the positive electrode of the electrolytic capacitor C5, one end of the capacitor C6, and one end of the capacitor C7 are all connected, and are used as the output end of the voltage tracking module 6, denoted as port Vflw-out, and connected with the port PWR-in1 of the power output module 3; The negative electrode of the capacitor C4, the negative electrode of the electrolytic capacitor C5, the other end of the capacitor C6 and the other end of the capacitor C7 are all grounded;

所述的过流判断模块7的结构为,运放U9A的同相输入端作为过流判断模块7的输入端,记为端口OC-in,与功率输出模块3的端口PWR-out3相连;电阻R35的一端与运放U9A的反相输入端相连,另一端接地;电阻R36的一端与运放U9A的反相输入端相连,另一端与滑动变阻器W3的一端相连;滑动变阻器W3的另一端和滑线端与运放U9A的输出端及运放U9B的同相输入端相连;滑动变阻器W4的一端接电源Vdd,另一端接地,滑线端与运放U9B的反相输入端相连;运放U9B的输出端作为过流判断模块7的输出端,记为端口OC-out,与断电保护模块8的输入端相连;The structure of the overcurrent judgment module 7 is that the non-inverting input end of the operational amplifier U9A is used as the input end of the overcurrent judgment module 7, denoted as port OC-in, and is connected to the port PWR-out3 of the power output module 3; resistor R35 One end of the resistor R36 is connected to the inverting input end of the operational amplifier U9A, and the other end is grounded; one end of the resistor R36 is connected to the inverting input end of the operational amplifier U9A, and the other end is connected to one end of the sliding varistor W3; the other end of the sliding varistor W3 is connected to the sliding varistor W3. The line end is connected to the output end of the operational amplifier U9A and the non-inverting input end of the operational amplifier U9B; one end of the sliding rheostat W4 is connected to the power supply Vdd, the other end is grounded, and the sliding line end is connected to the inverting input end of the operational amplifier U9B; The output terminal is used as the output terminal of the overcurrent judgment module 7, and is denoted as port OC-out, which is connected with the input terminal of the power-off protection module 8;

所述的断电保护模块8的结构为,与非门U8A的两个输入端相连,记为端口BRK-in,作为断电保护模块8的输入端,与过流判断模块7的输出端相连,与非门U8A的输出端接与非门U8B的一个输入端,与非门U8B的另一个输入端接与非门U8C的输出端,与非门U8B的输出端接与非门U8C的一个输入端和场效应管Q3的栅极,与非门U8C的另一个输入端接电容C8的一端和电阻R33的一端,电阻R33的另一端接开关K1的一端和电阻R32的一端,电阻R32的另一端接电源Vdd,开关K1的另一端和电容C8的另一端均接地;场效应管Q3的源极接地,电阻R34的一端作为断电保护模块8的第一个输出端,记为端口BRK-out1,并与功率输出模块3的端口PWR-in2相连,电阻R34的另一端接场效应管Q3的漏极,并作为断电保护模块8的第二个输出端,记为端口BRK-out2,端口BRK-out2同时与功率输出模块3的端口PWR-in3和电压跟踪模块6的端口Vflw-in1相连;The structure of the power-off protection module 8 is that the two input ends of the NAND gate U8A are connected, denoted as port BRK-in, as the input end of the power-off protection module 8, and connected with the output end of the overcurrent judgment module 7. , the output terminal of NAND gate U8A is connected to one input terminal of NAND gate U8B, the other input terminal of NAND gate U8B is connected to the output terminal of NAND gate U8C, and the output terminal of NAND gate U8B is connected to one input terminal of NAND gate U8C. The input terminal and the gate of the field effect transistor Q3, the other input terminal of the NAND gate U8C is connected to one end of the capacitor C8 and one end of the resistor R33, and the other end of the resistor R33 is connected to one end of the switch K1 and one end of the resistor R32. The other end is connected to the power supply Vdd, the other end of the switch K1 and the other end of the capacitor C8 are grounded; the source of the FET Q3 is grounded, and one end of the resistor R34 is used as the first output of the power-off protection module 8, which is marked as port BRK -out1, and is connected to the port PWR-in2 of the power output module 3, the other end of the resistor R34 is connected to the drain of the FET Q3, and is used as the second output of the power-off protection module 8, denoted as port BRK-out2 , the port BRK-out2 is connected to the port PWR-in3 of the power output module 3 and the port Vflw-in1 of the voltage tracking module 6 at the same time;

所述的前面板13的结构包括:RS232接口131、电源开关132、复位按钮133、电流输出接口134。The structure of the front panel 13 includes: an RS232 interface 131 , a power switch 132 , a reset button 133 , and a current output interface 134 .

在本发明的一种程控式负载自适应恒流源模块中,所述的电源Vcc、电源Vcc/2、电源Vdd分别优选48V、24V和5V。In a program-controlled load adaptive constant current source module of the present invention, the power supply Vcc, the power supply Vcc/2, and the power supply Vdd are preferably 48V, 24V, and 5V, respectively.

在本发明的一种程控式负载自适应恒流源模块中,所述的延时补偿模块5的电路参数优选如下:电阻R13、R14为4K,R15为40K,R16、R21为20K,R17、R20为10K,R18、R19为1K,R22为5.1K,电容C2为5PF。In a program-controlled load adaptive constant current source module of the present invention, the circuit parameters of the delay compensation module 5 are preferably as follows: resistors R13, R14 are 4K, R15 is 40K, R16, R21 are 20K, R17, R20 is 10K, R18 and R19 are 1K, R22 is 5.1K, and capacitor C2 is 5PF.

所述的单片机、数模转换模块2、程控模块9、模数转换模块10、电源管理模块12均为现有技术,可根据实际需求进行设计。The single-chip microcomputer, the digital-to-analog conversion module 2, the program control module 9, the analog-to-digital conversion module 10, and the power management module 12 are all in the prior art, and can be designed according to actual needs.

有益效果:Beneficial effects:

1、本发明利用负载判断模块、延时补偿模块和电压跟踪模块协同工作,实现电流源对负载阻抗的自适应,使得负载阻抗在大范围变化时,本发明的装置均能安全、稳定、高效地工作。1. The present invention uses the load judgment module, the delay compensation module and the voltage tracking module to work together to realize the self-adaptation of the current source to the load impedance, so that when the load impedance changes in a large range, the device of the present invention can be safe, stable and efficient. work.

2、本发明在设计负载判断模块时,采用特殊的无损检测技术,在既不影响功率输出模块的输出电流又不影响实际负载的前提下实现对负载变化的有效判断。2. When designing the load judgment module, the present invention adopts a special non-destructive testing technology to effectively judge the load change without affecting the output current of the power output module or the actual load.

3、本发明具有过流断电保护功能,当输出电流超过预设的安全值时,迅速切断功率输出模块的供电回路,且同时把功率输出模块及电压跟踪模块的控制信号均锁死到0,实现对系统的多方位保护,大大提高了系统的安全性。3. The present invention has the function of overcurrent and power-off protection. When the output current exceeds the preset safety value, the power supply circuit of the power output module is quickly cut off, and the control signals of the power output module and the voltage tracking module are locked to 0 at the same time. , to achieve multi-directional protection of the system, greatly improving the security of the system.

4、本发明的断电保护采用单向触发机制,一旦断电保护被触发,需要排除故障后手动复位才能正常输出电流,以防止断电保护模块在安全值附近反复动作,进一步提高了系统的安全性。4. The power-off protection of the present invention adopts a one-way trigger mechanism. Once the power-off protection is triggered, it needs to be manually reset after the fault is removed to output the current normally, so as to prevent the power-off protection module from repeatedly operating near the safe value, which further improves the system's reliability. safety.

5、本发明具有程控模块,通过RS232接口可方便与上位机连接,实现程控功能。5. The present invention has a program control module, which can be conveniently connected with the host computer through the RS232 interface to realize the program control function.

附图说明Description of drawings

图1是本发明的整体结构示意图。Figure 1 is a schematic diagram of the overall structure of the present invention.

图2是本发明的前面板布局示意图。FIG. 2 is a schematic diagram of the layout of the front panel of the present invention.

图3是本发明的功率输出模块3的原理图。FIG. 3 is a schematic diagram of the power output module 3 of the present invention.

图4是本发明的负载判断模块4的原理图。FIG. 4 is a schematic diagram of the load judging module 4 of the present invention.

图5是本发明的延时补偿模块5的原理图。FIG. 5 is a schematic diagram of the delay compensation module 5 of the present invention.

图6是本发明的电压跟踪模块6的原理图。FIG. 6 is a schematic diagram of the voltage tracking module 6 of the present invention.

图7是本发明的过流判断模块7的原理图。FIG. 7 is a schematic diagram of the overcurrent judgment module 7 of the present invention.

图8是本发明的断电保护模块8的原理图。FIG. 8 is a schematic diagram of the power-off protection module 8 of the present invention.

图9是本发明的参考电压模块11的原理图。FIG. 9 is a schematic diagram of the reference voltage module 11 of the present invention.

具体实施方式Detailed ways

下面通过具体实施例对本发明的工作原理作进一步说明,附图中所标示的参数为各实施例选用的优选参数,而不是对本专利的保护范围的限制。The working principle of the present invention will be further described below through specific embodiments. The parameters marked in the accompanying drawings are the preferred parameters selected by each embodiment, rather than limiting the protection scope of this patent.

实施例1本发明的整体结构Embodiment 1 Overall structure of the present invention

本发明的整体结构如图1所示,有单片机1、数模转换模块2、功率输出模块3、负载判断模块4、延时补偿模块5、电压跟踪模块6、过流判断模块7、断电保护模块8、程控模块9、模数转换模块10、参考电压模块11、电源管理模块12和前面板13;其中,单片机1分别与程控模块9、模数转换模块10、数模转换模块2相连,数模转换模块2与功率输出模块3相连,功率输出模块3分别与模数转换模块10、负载判断模块4、过流判断模块7相连,参考电压模块11与负载判断模块4相连,负载判断模块4与延时补偿模块5相连,延时补偿模块5与电压跟踪模块6相连,电压跟踪模块6与功率输出模块3相连,过流判断模块7与断电保护模块8相连,断电保护模块8分别与功率输出模块3和电压跟踪模块6相连;电源管理模块12是能将市电交流电转换成直流电压的电路,为各模块提供Vcc、Vcc/2、Vdd三种直流电压。The overall structure of the present invention is shown in Figure 1, which includes a single-chip microcomputer 1, a digital-to-analog conversion module 2, a power output module 3, a load judgment module 4, a delay compensation module 5, a voltage tracking module 6, an overcurrent judgment module 7, and a power outage Protection module 8, program control module 9, analog-to-digital conversion module 10, reference voltage module 11, power management module 12 and front panel 13; wherein, the single-chip microcomputer 1 is respectively connected with the program-control module 9, the analog-to-digital conversion module 10, and the digital-to-analog conversion module 2 , the digital-to-analog conversion module 2 is connected with the power output module 3, the power output module 3 is respectively connected with the analog-to-digital conversion module 10, the load judgment module 4, and the overcurrent judgment module 7, and the reference voltage module 11 is connected with the load judgment module 4. The module 4 is connected with the delay compensation module 5, the delay compensation module 5 is connected with the voltage tracking module 6, the voltage tracking module 6 is connected with the power output module 3, the overcurrent judgment module 7 is connected with the power failure protection module 8, and the power failure protection module 8 are respectively connected to the power output module 3 and the voltage tracking module 6; the power management module 12 is a circuit that can convert the AC AC into a DC voltage, and provides three DC voltages of Vcc, Vcc/2, and Vdd for each module.

实施例2本发明的功率输出模块Embodiment 2 The power output module of the present invention

所述的功率输出模块3的原理电路图如图3所示,继电器EK1的开关的一端作为功率输出模块3的第一个输入端,记为端口PWR-in1,另一端接场效应管Q1的漏极,并作为功率输出模块3的第一个输出端,记为端口PWR-out1,继电器EK1的线圈的一端接电源Vdd,另一端作为功率输出模块3的第二个输入端,记为端口PWR-in2,场效应管Q1的栅极与运放U1A的输出端相连,源极作为功率输出模块3的第二个输出端,记为端口PWR-out2,电阻R1的一端接运放U1A的同相输入端,并作为功率输出模块3的第三个输入端,记为端口PWR-in3,电阻R1的另一端作为功率输出模块3的第四个输入端,记为端口PWR-in4,与数模转换模块2的输出端相连;运放U1A的反相输入端与电容C1的一端和电阻R2的一端相连,电容C1的另一端与运放U1A的输出端相连,电阻R2的另一端与滑动变阻器W1的一端、滑动变阻器W1的滑线端及运放U1B的输出端相连,滑动变阻器W1的另一端与电阻R3的一端相连,电阻R3的另一端与运放U1B的反相输入端和电阻R4的一端相连,电阻R4的另一端接地,运放U1B的同相输入端与电阻Rs的一端相连,并作为功率输出模块3的第三个输出端,记作端口PWR-out3,电阻Rs的另一端接地。The principle circuit diagram of the power output module 3 is shown in Figure 3. One end of the switch of the relay EK1 is used as the first input end of the power output module 3, which is denoted as port PWR-in1, and the other end is connected to the drain of the field effect transistor Q1. It is used as the first output terminal of the power output module 3, which is marked as port PWR-out1. One end of the coil of the relay EK1 is connected to the power supply Vdd, and the other end is used as the second input terminal of the power output module 3, which is marked as port PWR. -in2, the gate of the FET Q1 is connected to the output terminal of the operational amplifier U1A, the source is used as the second output terminal of the power output module 3, which is marked as port PWR-out2, and one end of the resistor R1 is connected to the in-phase of the operational amplifier U1A The input terminal is used as the third input terminal of the power output module 3, denoted as port PWR-in3, and the other end of the resistor R1 is used as the fourth input terminal of the power output module 3, denoted as the port PWR-in4, and the digital-analog The output end of the conversion module 2 is connected; the inverting input end of the operational amplifier U1A is connected to one end of the capacitor C1 and one end of the resistor R2, the other end of the capacitor C1 is connected to the output end of the operational amplifier U1A, and the other end of the resistor R2 is connected to the sliding rheostat One end of W1, the sliding wire end of the sliding rheostat W1 and the output end of the operational amplifier U1B are connected, the other end of the sliding varistor W1 is connected to one end of the resistor R3, and the other end of the resistor R3 is connected to the inverting input end of the operational amplifier U1B and the resistor R4 One end of the resistor R4 is connected to the ground, and the other end of the resistor R4 is grounded. The non-inverting input end of the op amp U1B is connected to one end of the resistor Rs, and is used as the third output end of the power output module 3, denoted as port PWR-out3, and the other end of the resistor Rs ground.

功率输出模块在数模转换模块2输出的电压的控制下,将电压转换成对应的输出电流,通过前面板13的电流输出端口134输出至负载。Under the control of the voltage output by the digital-to-analog conversion module 2 , the power output module converts the voltage into a corresponding output current, and outputs it to the load through the current output port 134 of the front panel 13 .

实施例3本发明的负载判断模块Embodiment 3 Load judging module of the present invention

所述的负载判断模块4的原理电路如图4所示,运放U2A的同相输入端作为负载判断模块4的第一个输入端,记作端口Vjdg-in1,与功率输出模块3的端口PWR-out1相连,运放U2A的反相输入端与运放U2A的输出端和电阻R5的一端相连,电阻R5的另一端与电阻R6的一端和运放U3A的同相输入端相连,电阻R6的另一端接地,运放U3A的输出端与电阻R8的一端和电阻R9的一端相连,电阻R8的另一端与运放U3A的反相输入端和电阻R7的一端相连,电阻R7的另一端与运放U2B的反相输入端和运放U2B的输出端相连,运放U2B的同相输入端作为负载判断模块4的第二个输入端,记作端口Vjdg-in2,与功率输出模块3的端口PWR-out2相连,电阻R9的另一端与电阻R10的一端和运放U3B的同相输入端相连,电阻R10的另一端接电源Vcc/2,运放U3B的输出端与电阻R12的一端相连,并作为负载判断模块4的输出端,记作端口Vjdg-out,与延时补偿模块5的输入端相连,电阻R12的另一端与运放U3B的反相输入端和R11的一端相连,电阻R11的另一端与运放U4B的输出端和运放U4B的反相输入端相连,运放U4B的同相输入端与滑动变阻器W2的滑线端相连,滑动变阻器W2的一端接地,另一端作为负载判断模块4的第三个输入端,记作端口Vjdg-in3,与参考电压模块12的输出端相连。The principle circuit of the load judgment module 4 is shown in Figure 4. The non-inverting input terminal of the operational amplifier U2A is used as the first input terminal of the load judgment module 4, which is denoted as the port Vjdg-in1, and the port PWR of the power output module 3. -out1 is connected, the inverting input terminal of op amp U2A is connected to the output terminal of op amp U2A and one end of resistor R5, the other end of resistor R5 is connected to one end of resistor R6 and the non-inverting input terminal of op amp U3A, the other end of resistor R6 is connected to the non-inverting input terminal of op amp U3A. One end is grounded, the output end of op amp U3A is connected to one end of resistor R8 and one end of resistor R9, the other end of resistor R8 is connected to the inverting input end of op amp U3A and one end of resistor R7, the other end of resistor R7 is connected to the op amp The inverting input terminal of U2B is connected to the output terminal of the operational amplifier U2B. The non-inverting input terminal of the operational amplifier U2B is used as the second input terminal of the load judgment module 4, which is denoted as port Vjdg-in2, which is connected with the port PWR- of the power output module 3. out2 is connected, the other end of the resistor R9 is connected to one end of the resistor R10 and the non-inverting input end of the op amp U3B, the other end of the resistor R10 is connected to the power supply Vcc/2, the output end of the op amp U3B is connected to one end of the resistor R12, and acts as a load The output end of the judgment module 4, denoted as port Vjdg-out, is connected to the input end of the delay compensation module 5, the other end of the resistor R12 is connected to the inverting input end of the operational amplifier U3B and one end of R11, and the other end of the resistor R11 is connected. It is connected to the output terminal of the operational amplifier U4B and the inverting input terminal of the operational amplifier U4B. The non-inverting input terminal of the operational amplifier U4B is connected to the sliding wire terminal of the sliding rheostat W2. One end of the sliding rheostat W2 is grounded, and the other end is used as the load judgment module The third input terminal, denoted as port Vjdg-in3 , is connected to the output terminal of the reference voltage module 12 .

当本发明所驱动的负载发生变化时,由于本发明输出为恒流,因此会导致负载两端电压发生变化,功率输出模块3中的场效应管由于其非线性特点则会调整自身所分担的电压,因此该负载判断模块4通过端口Vjdg-in1、Vjdg-in2检测场效应管Q1两端(即功率输出模块3中的端口PWR-out1和PWR-out2)的电压变化实现对负载变化的判断:负载变大时,负载两端电压增大,进而Q1两端的电压变小;负载变小时,负载两端电压变小,Q1两端电压则变大。由于Q1与负载同处于一个输出回路中,因此流过Q1的电流的微小变化都会影响输出至负载的电流的稳定度,因此在对Q1两端电压进行检测时要求尽量不能影响流过Q1的电流,本发明的负载判断模块4采用高阻抗无损检测的设计,既保证对Q1两端电压的检测达到极高精度,又保证检测电压时完全不影响流过Q1的电流。检测出的Q1两端的电压与端口Vjdg-in3处的参考电压(来自参考电压模块11)进行比较求差,其差值决定了后级电压跟踪模块所要调整的电压量。When the load driven by the present invention changes, since the output of the present invention is a constant current, the voltage across the load will change, and the FET in the power output module 3 will adjust its own share due to its nonlinear characteristics Therefore, the load judgment module 4 detects the voltage changes at both ends of the field effect transistor Q1 (that is, the ports PWR-out1 and PWR-out2 in the power output module 3) through the ports Vjdg-in1 and Vjdg-in2 to realize the judgment of the load change. : When the load becomes larger, the voltage across the load increases, and then the voltage across Q1 becomes smaller; when the load becomes smaller, the voltage across the load becomes smaller, and the voltage across Q1 becomes larger. Since Q1 and the load are in the same output circuit, the small change of the current flowing through Q1 will affect the stability of the current output to the load. Therefore, when detecting the voltage across Q1, it is required that the current flowing through Q1 should not be affected as much as possible. The load judging module 4 of the present invention adopts the design of high-impedance non-destructive testing, which not only ensures the detection of the voltage at both ends of Q1 to achieve extremely high precision, but also ensures that the current flowing through Q1 is not affected at all when the voltage is detected. The detected voltage across Q1 is compared with the reference voltage at the port Vjdg-in3 (from the reference voltage module 11 ) to obtain a difference, and the difference determines the voltage to be adjusted by the subsequent voltage tracking module.

实施例4本发明的延时补偿模块Embodiment 4 Delay compensation module of the present invention

由于后级的电压跟踪模块6中的电感、电容网络存在延时效应,因此在负载判断模块4检测出负载的变化到最终电压跟踪模块6作出适应性调整不可避免地会出现一定的延时,因此本发明采取了延时补偿设计,通过延时补偿模块5消除该延时,使电压跟踪模块6的电压适应性调整与负载判断模块4的检测完全处于同步工作,以实现精确有效的控制。所述的延时补偿模块5的原理电路如图5所示,电阻R13的一端与电阻R18的一端相连,并作为延时补偿模块5的输入端,记作端口Vdly-in,与负载判断模块4的端口Vjdg-out相连,电阻R13的另一端与运放U4A的反相输入端和电阻R15的一端相连,运放U4A的同相输入端与电阻R14的一端相连,电阻R14的另一端接电源Vcc/2,电阻R15的另一端与运放U4A的输出端和电阻R16的一端相连,电阻R16的另一端与电阻R17的一端、电阻R21的一端和运放U5A的反相输入端相连,电阻R17的另一端与运放U5A的输出端相连,并作为延时补偿模块5的输出端,记作端口Vdly-out,与电压跟踪模块6的第二个输入端相连,运放U5A的同相输入端与电阻R22的一端相连,电阻R22的另一端与电源Vcc/2相连,电阻R21的另一端与电阻R20的一端、电容C2的一端和运放U5B的输出端相连,电阻R20的另一端与电容C2的另一端、运放U5B的反相输入端及电阻R18的另一端相连,电阻R19的一端接运放U5B的同相输入端,另一端接Vcc/2。Due to the delay effect of the inductance and capacitance network in the voltage tracking module 6 of the later stage, a certain delay will inevitably occur when the load judgment module 4 detects the change of the load until the final voltage tracking module 6 makes an adaptive adjustment. Therefore, the present invention adopts a delay compensation design, and the delay is eliminated by the delay compensation module 5, so that the voltage adaptive adjustment of the voltage tracking module 6 and the detection of the load judgment module 4 are completely synchronized to achieve accurate and effective control. The principle circuit of the delay compensation module 5 is shown in Figure 5. One end of the resistor R13 is connected to one end of the resistor R18, and is used as the input end of the delay compensation module 5, denoted as port Vdly-in, which is connected to the load judgment module. 4 is connected to the port Vjdg-out, the other end of the resistor R13 is connected to the inverting input end of the op amp U4A and one end of the resistor R15, the non-inverting input end of the op amp U4A is connected to one end of the resistor R14, and the other end of the resistor R14 is connected to the power supply Vcc/2, the other end of the resistor R15 is connected to the output end of the op amp U4A and one end of the resistor R16, the other end of the resistor R16 is connected to one end of the resistor R17, one end of the resistor R21 is connected to the inverting input end of the op amp U5A, the resistor The other end of R17 is connected to the output end of the operational amplifier U5A, and is used as the output end of the delay compensation module 5, denoted as port Vdly-out, which is connected to the second input end of the voltage tracking module 6, and the non-inverting input of the operational amplifier U5A The terminal is connected to one end of the resistor R22, the other end of the resistor R22 is connected to the power supply Vcc/2, the other end of the resistor R21 is connected to one end of the resistor R20, one end of the capacitor C2 is connected to the output end of the operational amplifier U5B, and the other end of the resistor R20 is connected to The other end of the capacitor C2, the inverting input end of the operational amplifier U5B and the other end of the resistor R18 are connected. One end of the resistor R19 is connected to the non-inverting input end of the operational amplifier U5B, and the other end is connected to Vcc/2.

实施例5本发明的电压跟踪模块Embodiment 5 Voltage tracking module of the present invention

所述的电压跟踪模块6的原理电路如图6所示,电阻R23的一端接电源Vcc/2,另一端与运放U6A的反相输入端相连,运放U6A的同相输入端与电阻R24的一端、电阻R25的一端相连,电阻R24的另一端与运放U6A的输出端相连,电阻R25的另一端与运放U6B的输出端相连,电阻R26的一端与运放U6A的输出端相连,另一端与运放U6B的反相输入端相连;电阻R27的一端与运放U6B的同相输入端相连,另一端接电源Vcc/2;电容C3的一端及电阻R28的一端与运放U6B的反相输入端相连,另一端与运放U6B的输出端相连,运放U6B的输出端与电阻R29的一端相连,电阻R29的另一端与运放U7A的同相输入端相连,并作为电压跟踪模块6的第一个输入端,记为端口Vflw-in1,与断电保护模块8的第二个输出端相连;电阻R30的一端与运放U7A的反相输入端相连,另一端作为电压跟踪模块6的第二个输入端,记为端口Vflw-in2,与延时补偿模块5的端口Vdly-out相连;电阻R31的一端与运放U7A的反相输入端相连,另一端接电源Vcc/2;运放U7A的输出端与场效应管Q2的栅极相连,场效应管Q2的漏极接电源Vcc,源极接电感L1的一端和二极管D1的负极,二极管D1的正极接地,电感L1的另一端与电解电容C4的正极、电解电容C5的正极、电容C6的一端、电容C7的一端均相连,并作为电压跟踪模块6的输出端,记为端口Vflw-out,与功率输出模块3的端口PWR-in1相连;电解电容C4的负极、电解电容C5的负极、电容C6的另一端以及电容C7的另一端均接地。The principle circuit of the voltage tracking module 6 is shown in Figure 6. One end of the resistor R23 is connected to the power supply Vcc/2, and the other end is connected to the inverting input terminal of the operational amplifier U6A. The non-inverting input terminal of the operational amplifier U6A is connected to the resistance R24. One end of the resistor R25 is connected to one end, the other end of the resistor R24 is connected to the output end of the operational amplifier U6A, the other end of the resistor R25 is connected to the output end of the operational amplifier U6B, one end of the resistor R26 is connected to the output end of the operational amplifier U6A, and the other end is connected to the output end of the operational amplifier U6A. One end is connected to the inverting input end of the operational amplifier U6B; one end of the resistor R27 is connected to the non-inverting input end of the operational amplifier U6B, and the other end is connected to the power supply Vcc/2; one end of the capacitor C3 and one end of the resistor R28 are connected to the inverting phase of the operational amplifier U6B The input end is connected, the other end is connected to the output end of the operational amplifier U6B, the output end of the operational amplifier U6B is connected to one end of the resistor R29, the other end of the resistor R29 is connected to the non-inverting input end of the operational amplifier U7A, and is used as the voltage tracking module 6. The first input terminal, marked as port Vflw-in1, is connected to the second output terminal of the power-off protection module 8; one end of the resistor R30 is connected to the inverting input terminal of the operational amplifier U7A, and the other end is used as the voltage tracking module The second input terminal, denoted as port Vflw-in2, is connected to the port Vdly-out of the delay compensation module 5; one end of the resistor R31 is connected to the inverting input terminal of the operational amplifier U7A, and the other end is connected to the power supply Vcc/2; The output terminal of the amplifier U7A is connected to the gate of the FET Q2, the drain of the FET Q2 is connected to the power supply Vcc, the source is connected to one end of the inductor L1 and the cathode of the diode D1, the anode of the diode D1 is grounded, and the other end of the inductor L1 It is connected to the positive electrode of the electrolytic capacitor C4, the positive electrode of the electrolytic capacitor C5, one end of the capacitor C6, and one end of the capacitor C7, and is used as the output end of the voltage tracking module 6, denoted as port Vflw-out, and the port PWR of the power output module 3 -in1 is connected; the negative electrode of the electrolytic capacitor C4, the negative electrode of the electrolytic capacitor C5, the other end of the capacitor C6, and the other end of the capacitor C7 are all grounded.

电压跟踪模块6将电源管理模块12提供的电压Vcc自动调节后输出到功率输出模块3的端口PWR-in1,作为功率输出模块3的电流输出回路的功率电压,该电压会跟随负载的变化,在负载发生变化时,使得端口PWR-in1处的电压既不会因为负载减小而出现冗余也不会因为负载变大而不足,始终工作于“临界状态”,保证了整个系统的最大效率。The voltage tracking module 6 automatically adjusts the voltage Vcc provided by the power management module 12 and outputs it to the port PWR-in1 of the power output module 3 as the power voltage of the current output loop of the power output module 3. The voltage will follow the change of the load. When the load changes, the voltage at the port PWR-in1 will neither appear redundant due to the decrease of the load nor insufficient due to the increase of the load, and always work in a "critical state", ensuring the maximum efficiency of the entire system.

实施例6本发明的过流判断模块Embodiment 6 The overcurrent judgment module of the present invention

所述的过流判断模块7的原理电路如图7所示,运放U9A的同相输入端作为过流判断模块7的输入端,记为端口OC-in,与功率输出模块3的端口PWR-out3相连;电阻R35的一端与运放U9A的反相输入端相连,另一端接地;电阻R36的一端与运放U9A的反相输入端相连,另一端与滑动变阻器W3的一端相连;滑动变阻器W3的另一端和滑线端与运放U9A的输出端及运放U9B的同相输入端相连;滑动变阻器W4的一端接电源Vdd,另一端接地,滑线端与运放U9B的反相输入端相连;运放U9B的输出端作为过流判断模块7的输出端,记为端口OC-out,与断电保护模块8的输入端相连。The principle circuit of the overcurrent judgment module 7 is shown in Figure 7. The non-inverting input end of the operational amplifier U9A is used as the input end of the overcurrent judgment module 7, which is denoted as port OC-in, which is the same as the port PWR-in of the power output module 3. One end of the resistor R35 is connected to the inverting input terminal of the op amp U9A, and the other end is grounded; one end of the resistor R36 is connected to the inverting input terminal of the op amp U9A, and the other end is connected to one end of the sliding rheostat W3; the sliding rheostat W3 The other end of the varistor is connected to the output end of the operational amplifier U9A and the non-inverting input end of the operational amplifier U9B; one end of the sliding rheostat W4 is connected to the power supply Vdd, the other end is grounded, and the sliding end is connected to the inverting input end of the operational amplifier U9B ; The output end of the operational amplifier U9B is used as the output end of the overcurrent judgment module 7, denoted as the port OC-out, and is connected with the input end of the power failure protection module 8.

该模块实时检测功率输出模块输出的电流值,并与设定的安全值(由图中的滑动变阻器W4设置)进行比较,当实际输出的电流超过设定的安全值时,会通过端口OC-out输出过流信号,用来触发断电保护模块8执行断电动作。The module detects the current value output by the power output module in real time, and compares it with the set safety value (set by the sliding rheostat W4 in the figure). When the actual output current exceeds the set safety value, it will pass the port OC- out outputs an overcurrent signal, which is used to trigger the power-off protection module 8 to perform a power-off action.

实施例7本发明的断电保护模块Embodiment 7 Power-off protection module of the present invention

本发明的断电保护模块8的原理电路如图8所示,与非门U8A的两个输入端相连,记为端口BRK-in,作为断电保护模块8的输入端,与过流判断模块7的输出端相连,与非门U8A的输出端接与非门U8B的一个输入端,与非门U8B的另一个输入端接与非门U8C的输出端,与非门U8B的输出端接与非门U8C的一个输入端和场效应管Q3的栅极,与非门U8C的另一个输入端接电容C8的一端和电阻R33的一端,电阻R33的另一端接开关K1的一端和电阻R32的一端,电阻R32的另一端接电源Vdd,开关K1的另一端和电容C8的另一端均接地;场效应管Q3的源极接地,电阻R34的一端作为断电保护模块8的第一个输出端,记为端口BRK-out1,并与功率输出模块3的端口PWR-in2相连,电阻R34的另一端接场效应管Q3的漏极,并作为断电保护模块8的第二个输出端,记为端口BRK-out2,端口BRK-out2同时与功率输出模块3的端口PWR-in3和电压跟踪模块6的端口Vflw-in1相连。The principle circuit of the power-off protection module 8 of the present invention is shown in FIG. 8 . The two input terminals of the NAND gate U8A are connected, which is denoted as port BRK-in, which is used as the input terminal of the power-off protection module 8 and is connected to the overcurrent judgment module. The output terminal of NAND gate U8A is connected to one input terminal of NAND gate U8B, the other input terminal of NAND gate U8B is connected to the output terminal of NAND gate U8C, and the output terminal of NAND gate U8B is connected to the output terminal of NAND gate U8B. One input terminal of NOT gate U8C and the gate of field effect transistor Q3, the other input terminal of NAND gate U8C is connected to one end of capacitor C8 and one end of resistor R33, and the other end of resistor R33 is connected to one end of switch K1 and one end of resistor R32. One end, the other end of the resistor R32 is connected to the power supply Vdd, the other end of the switch K1 and the other end of the capacitor C8 are grounded; the source of the FET Q3 is grounded, and one end of the resistor R34 is used as the first output of the power-off protection module 8 , denoted as port BRK-out1, and connected to port PWR-in2 of power output module 3, the other end of resistor R34 is connected to the drain of field effect transistor Q3, and used as the second output of power-off protection module 8, denoted The port BRK-out2 is connected to the port PWR-in3 of the power output module 3 and the port Vflw-in1 of the voltage tracking module 6 at the same time.

该模块实时监测过流判断模块7的“过流信号”,当过流信号有效(高电平)时,会触发断电动作,即控制场效应管Q3导通,端口BRK-out1与功率输出模块3中的端口PWR-in2相连,将触发功率输出模块3中的继电器EK1将开关断开,切断输出电流回路中的能量来源;而端口BRK-out2同时与功率输出模块3的端口PWR-in3、电压跟踪模块6的端口Vflw-in1相连,使端口PWR-in3、端口Vflw-in1处电压同时被限制为0,同时切断了功率输出模块3和电压跟踪模块6的控制电压,进一步提高了断电的有效性和安全性。同时断电保护模块8还采取了单向不可逆触发方式,一旦断电信号出现触发了断电动作,即使断电信号消失了,也不会立刻解除断电状态,而是需要通过手动按动开关K1(即前面板13上的复位按钮133)才能解除断电状态,以防止触发信号在安全值临界点附近反复触发。This module monitors the "overcurrent signal" of the overcurrent judgment module 7 in real time. When the overcurrent signal is valid (high level), it will trigger a power-off action, that is, control the conduction of the field effect transistor Q3, the port BRK-out1 and the power output The port PWR-in2 in the module 3 is connected, which will trigger the relay EK1 in the power output module 3 to disconnect the switch and cut off the energy source in the output current loop; and the port BRK-out2 is connected with the port PWR-in3 of the power output module 3 at the same time. , The port Vflw-in1 of the voltage tracking module 6 is connected, so that the voltage at the port PWR-in3 and the port Vflw-in1 is limited to 0 at the same time, and the control voltage of the power output module 3 and the voltage tracking module 6 is cut off at the same time. Efficacy and safety of electricity. At the same time, the power-off protection module 8 also adopts a one-way irreversible triggering method. Once the power-off signal appears to trigger the power-off action, even if the power-off signal disappears, the power-off state will not be released immediately, but the switch needs to be manually pressed. K1 (ie, the reset button 133 on the front panel 13 ) can release the power-off state, so as to prevent the trigger signal from being repeatedly triggered near the critical point of the safety value.

实施例8本发明的参考电压模块Embodiment 8 Reference voltage module of the present invention

所述的参考电压模块11的原理电路如图9所示,电阻R37的一端接电源Vcc,另一端与稳压二极管D2的负极和滑动变阻器W5的一端相连,稳压二极管D2的正极和滑动变阻器W5的另一端接地,滑动变阻器W5的滑线端与运放U7B的同相输入端相连,运放U7B的反相输入端与运放U7B的输出端相连,并作为参考电压模块12的输出端,记作端口Vref-out,与负载判断模块4的端口Vjdg-in3相连。The principle circuit of the reference voltage module 11 is shown in Figure 9. One end of the resistor R37 is connected to the power supply Vcc, and the other end is connected to the negative electrode of the zener diode D2 and one end of the sliding varistor W5. The positive electrode of the zener diode D2 is connected to the sliding varistor. The other end of W5 is grounded, the sliding line end of the sliding rheostat W5 is connected to the non-inverting input end of the operational amplifier U7B, the inverting input end of the operational amplifier U7B is connected to the output end of the operational amplifier U7B, and serves as the output end of the reference voltage module 12, Denoted as the port Vref-out, it is connected to the port Vjdg-in3 of the load judging module 4 .

实施例9本发明的前面板Example 9 Front panel of the present invention

所述的前面板13的结构如图2所示,包括:RS232接口131、电源开关132、复位按钮133、电流输出接口134。The structure of the front panel 13 is shown in FIG. 2 , including: an RS232 interface 131 , a power switch 132 , a reset button 133 , and a current output interface 134 .

使用时,本装置的程控模块9可以通过前面板13上的RS232接口131与上位机进行通信,以实现远程控制,电流输出接口134用于向负载输出驱动电流。In use, the program control module 9 of the device can communicate with the host computer through the RS232 interface 131 on the front panel 13 to realize remote control, and the current output interface 134 is used to output driving current to the load.

Claims (3)

1. A program-controlled load self-adaptive constant current source module structurally comprises a single chip microcomputer (1), a digital-to-analog conversion module (2), a power output module (3), a program control module (9), an analog-to-digital conversion module (10), a power management module (12) and a front panel (13); the device is characterized by also comprising a load judgment module (4), a delay compensation module (5), a voltage tracking module (6), an overcurrent judgment module (7), a power-off protection module (8) and a reference voltage module (11); the single chip microcomputer (1) is respectively connected with the program control module (9), the analog-to-digital conversion module (10) and the digital-to-analog conversion module (2), the digital-to-analog conversion module (2) is connected with the power output module (3), the power output module (3) is respectively connected with the analog-to-digital conversion module (10), the load judgment module (4) and the overcurrent judgment module (7), the reference voltage module (11) is connected with the load judgment module (4), the load judgment module (4) is connected with the delay compensation module (5), the delay compensation module (5) is connected with the voltage tracking module (6), the voltage tracking module (6) is connected with the power output module (3), the overcurrent judgment module (7) is connected with the power-off protection module (8), and the power-off protection module (8) is respectively connected with the power output module (3) and the voltage tracking module (6); the power management module (12) is a circuit capable of converting commercial power alternating current into direct current voltage and provides three direct current voltages of Vcc, Vcc/2 and Vdd for each module;
the structure of the power output module (3) is as follows: one end of a switch of the relay EK1 is used as a first input end of the power output module (3) and is recorded as a port PWR-in1, the other end is connected with a drain of the field effect transistor Q1 and is used as a first output end of the power output module (3) and is recorded as a port PWR-out1, one end of a coil of the relay EK1 is connected with a power supply Vdd, the other end is used as a second input end of the power output module (3) and is recorded as a port PWR-in2, a grid electrode of the field effect transistor Q1 is connected with an output end of the operational amplifier U1A, a source electrode is used as a second output end of the power output module (3) and is recorded as a port PWR-out2, one end of a resistor R1 is connected with a non-inverting input end of the operational amplifier U1A and is used as a third input end of the power output module (3) and is recorded as a port PWR-in3, the other end of the resistor R, is connected with the output end of the digital-to-analog conversion module (2); the inverting input end of the operational amplifier U1A is connected with one end of a capacitor C1 and one end of a resistor R2, the other end of the capacitor C1 is connected with the output end of the operational amplifier U1A, the other end of the resistor R2 is connected with one end of a sliding rheostat W1, the slide wire end of the sliding rheostat W1 and the output end of the operational amplifier U1B, the other end of the sliding rheostat W1 is connected with one end of a resistor R3, the other end of the resistor R3 is connected with the inverting input end of the operational amplifier U1B and one end of a resistor R4, the other end of the resistor R4 is grounded, the non-inverting input end of the operational amplifier U1B is connected with one end of a resistor Rs and serves as a third output end of the power output module (3) and serves as a port PWR-out;
the load judgment module (4) has the structure that: the non-inverting input terminal of the operational amplifier U2A is used as the first input terminal of the load judging module (4) and is recorded as a port Vjdg-in1, and is connected with a port PWR-out1 of the power output module (3), the inverting input terminal of the operational amplifier U2A is connected with the output terminal of the operational amplifier U2A and one end of a resistor R5, the other end of the resistor R5 is connected with one end of a resistor R6 and the non-inverting input terminal of the operational amplifier U3A, the other end of the resistor R6 is grounded, the output terminal of the operational amplifier U3A is connected with one end of a resistor R8 and one end of a resistor R9, the other end of the resistor R6329 is connected with the inverting input terminal of the operational amplifier U3A and one end of the resistor R7, the other end of the resistor R7 is connected with the inverting input terminal of the operational amplifier U2B and the output terminal 57348, the non-inverting input terminal of the operational amplifier U2 465 is used as the second input terminal of the load judging module (4), and is recorded as a port Vjdg-in2, the other end of the resistor R9 is connected with one end of the resistor R10 and the non-inverting input end of the operational amplifier U3B, the other end of the resistor R10 is connected with a power supply Vcc/2, the output end of the operational amplifier U3B is connected with one end of the resistor R12 and serves as the output end of the load judgment module (4) and is recorded as a port Vjdg-out, the output end of the load judgment module (4) is connected with the input end of the delay compensation module (5), the other end of the resistor R12 is connected with the inverting input end of the operational amplifier U3B and one end of the resistor R11, the other end of the resistor R11 is connected with the output end of the operational amplifier U4B and the inverting input end of the operational amplifier U4B, the non-inverting input end of the operational amplifier U4B is connected with the sliding terminal of the sliding rheostat W2, one end of the sliding rheostat W2 is grounded, the other end of the load judgment module (4) serves;
the reference voltage module (11) has the structure that: one end of the resistor R37 is connected with a power supply Vcc, the other end of the resistor R37 is connected with the cathode of the voltage stabilizing diode D2 and one end of the sliding rheostat W5, the anode of the voltage stabilizing diode D2 and the other end of the sliding rheostat W5 are grounded, the slide wire end of the sliding rheostat W5 is connected with the non-inverting input end of the operational amplifier U7B, the inverting input end of the operational amplifier U7B is connected with the output end of the operational amplifier U7B and serves as the output end of the reference voltage module (12) and is recorded as a port Vref-out, and is connected with a port Vjdg-in3 of the load judging module (;
the structure of the delay compensation module (5) is as follows: one end of a resistor R13 is connected with one end of a resistor R18, the resistor R13 is used as an input end of a delay compensation module (5) and is recorded as a port Vdly-in and is connected with a port Vjdg-out of a load judging module (4), the other end of the resistor R13 is connected with an inverting input end of an operational amplifier U4A and one end of a resistor R15, a non-inverting input end of the operational amplifier U4A is connected with one end of a resistor R14, the other end of the resistor R14 is connected with a power supply Vcc/2, the other end of the resistor R15 is connected with an output end of the operational amplifier U4A and one end of a resistor R16, the other end of the resistor R16 is connected with one end of a resistor R17, one end of a resistor R21 and an inverting input end of the operational amplifier U5A, the other end of the resistor R17 is connected with an output end of the operational amplifier U5A and is used as an output end of the delay compensation module (5) and is recorded as a port Vd-out and is connected with a second input end of a second input, the other end of the resistor R22 is connected with a power supply Vcc/2, the other end of the resistor R21 is connected with one end of a resistor R20, one end of a capacitor C2 and the output end of the operational amplifier U5B, the other end of the resistor R20 is connected with the other end of a capacitor C2, the inverting input end of the operational amplifier U5B and the other end of the resistor R18, one end of the resistor R19 is connected with the non-inverting input end of the operational amplifier U5B, and the other end of the resistor R19 is connected with Vcc/2;
the structure of the voltage tracking module (6) is that one end of a resistor R23 is connected with a power Vcc/2, the other end of the resistor R23 is connected with an inverting input end of an operational amplifier U6A, a non-inverting input end of the operational amplifier U6A is connected with one end of a resistor R24 and one end of a resistor R25, the other end of a resistor R24 is connected with an output end of an operational amplifier U6A, the other end of a resistor R25 is connected with an output end of an operational amplifier U6B, one end of a resistor R26 is connected with an output end of an operational amplifier U6A, and the other end of the resistor R26 is connected with an inverting input; one end of the resistor R27 is connected with the non-inverting input end of the operational amplifier U6B, and the other end is connected with a power supply Vcc/2; one end of a capacitor C3 and one end of a resistor R28 are connected with the inverting input end of the operational amplifier U6B, the other end of the capacitor C3 is connected with the output end of the operational amplifier U6B, the output end of the operational amplifier U6B is connected with one end of a resistor R29, the other end of the resistor R29 is connected with the non-inverting input end of the operational amplifier U7A, and the non-inverting input end of the resistor R29 is used as the first input end of the voltage tracking module (6), is recorded as a port Vflw-in1 and is connected with the second output end of the power-; one end of the resistor R30 is connected with the inverting input end of the operational amplifier U7A, the other end of the resistor R30 is used as the second input end of the voltage tracking module (6), is recorded as a port Vwlw-in 2 and is connected with a port Vdly-out of the delay compensation module (5); one end of the resistor R31 is connected with the inverting input end of the operational amplifier U7A, and the other end is connected with a power supply Vcc/2; the output end of the operational amplifier U7A is connected with the grid of a field effect transistor Q2, the drain of a field effect transistor Q2 is connected with a power supply Vcc, the source is connected with one end of an inductor L1 and the cathode of a diode D1, the anode of a diode D1 is grounded, the other end of the inductor L1 is connected with the anode of an electrolytic capacitor C4, the anode of the electrolytic capacitor C5, one end of a capacitor C6 and one end of a capacitor C7, the output ends of the voltage tracking module (6) are used as the output end, are recorded as a port Vflw-out and are connected with a port PWR-in1 of the power output module (3); the negative electrode of the electrolytic capacitor C4, the negative electrode of the electrolytic capacitor C5, the other end of the capacitor C6 and the other end of the capacitor C7 are all grounded;
the structure of the over-current judgment module (7) is that the non-inverting input end of the operational amplifier U9A is used as the input end of the over-current judgment module (7), is marked as a port OC-in, and is connected with a port PWR-out3 of the power output module (3); one end of the resistor R35 is connected with the inverting input end of the operational amplifier U9A, and the other end is grounded; one end of the resistor R36 is connected with the inverting input end of the operational amplifier U9A, and the other end is connected with one end of the slide rheostat W3; the other end and the slide wire end of the slide rheostat W3 are connected with the output end of the operational amplifier U9A and the non-inverting input end of the operational amplifier U9B; one end of the slide rheostat W4 is connected with a power supply Vdd, the other end of the slide rheostat W4 is grounded, and a slide wire end is connected with an inverted input end of the operational amplifier U9B; the output end of the operational amplifier U9B is used as the output end of the overcurrent judgment module (7), is recorded as a port OC-out and is connected with the input end of the power-off protection module (8);
the power-off protection module (8) is structurally characterized in that two input ends of a NAND gate U8A are connected and are recorded as a port BRK-in, the input end of the power-off protection module (8) is connected with the output end of an overcurrent judgment module (7), the output end of the NAND gate U8A is connected with one input end of a NAND gate U8B, the other input end of the NAND gate U8B is connected with the output end of a NAND gate U8C, the output end of the NAND gate U8B is connected with one input end of a NAND gate U8C and the grid of a field effect transistor Q3, the other input end of the NAND gate U8C is connected with one end of a capacitor C8 and one end of a resistor R33, the other end of the resistor R33 is connected with one end of a switch K1 and one end of a resistor R32, the other end of the resistor R32 is connected with; the source electrode of the field effect transistor Q3 is grounded, one end of the resistor R34 is used as a first output end of the power-off protection module (8) and is marked as a port BRK-out1 and is connected with a port PWR-in2 of the power output module (3), the other end of the resistor R34 is connected with the drain electrode of the field effect transistor Q3 and is used as a second output end of the power-off protection module (8) and is marked as a port BRK-out2, and the port BRK-out2 is simultaneously connected with a port PWR-in3 of the power output module (3) and a port Vflw-in1 of the voltage tracking module (6);
the structure of the front panel (13) comprises: RS232 interface (131), power switch (132), reset button (133), current output interface (134).
2. The programmable load adaptive constant current source module according to claim 1, wherein the power supply Vcc, Vcc/2 and Vdd are 48V, 24V and 5V, respectively.
3. The programmable load adaptive constant current source module according to claim 1, wherein the circuit parameters of the delay compensation module (5) are as follows: the resistors R13 and R14 are 4K, R15 is 40K, R16 and R21 are 20K, R17 and R20 are 10K, R18 and R19 are 1K, R22 is 5.1K, and the capacitor C2 is 5 pF.
CN201811598638.4A 2018-12-26 2018-12-26 A program-controlled load adaptive constant current source module Expired - Fee Related CN109656297B (en)

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