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CN109642985A - Mode converter and its manufacturing method - Google Patents

Mode converter and its manufacturing method Download PDF

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Publication number
CN109642985A
CN109642985A CN201780043323.0A CN201780043323A CN109642985A CN 109642985 A CN109642985 A CN 109642985A CN 201780043323 A CN201780043323 A CN 201780043323A CN 109642985 A CN109642985 A CN 109642985A
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CN
China
Prior art keywords
layer
mode converter
buried oxide
transmission line
isolated groove
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN201780043323.0A
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Chinese (zh)
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CN109642985B (en
Inventor
J.德拉克
D.勒罗斯
H.尼克南
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Lockley Photonics Co Ltd
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Lockley Photonics Co Ltd
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Publication of CN109642985A publication Critical patent/CN109642985A/en
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Publication of CN109642985B publication Critical patent/CN109642985B/en
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    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/14—Mode converters
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/131—Integrated optical circuits characterised by the manufacturing method by using epitaxial growth
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/136—Integrated optical circuits characterised by the manufacturing method by etching
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/26—Optical coupling means
    • G02B6/30—Optical coupling means for use between fibre and thin-film device
    • G02B6/305—Optical coupling means for use between fibre and thin-film device and having an integrated mode-size expanding section, e.g. tapered waveguide
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • G02B6/43—Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0193—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices the components including FinFETs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
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    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12035—Materials
    • G02B2006/12038—Glass (SiO2 based materials)
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    • G02B2006/12083—Constructional arrangements
    • G02B2006/12097—Ridge, rib or the like
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    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12083—Constructional arrangements
    • G02B2006/121—Channel; buried or the like
    • G—PHYSICS
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    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12147—Coupler
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12133—Functions
    • G02B2006/12152—Mode converter
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12166—Manufacturing methods
    • G02B2006/12176—Etching
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12166—Manufacturing methods
    • G02B2006/12178—Epitaxial growth
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B2006/12166—Manufacturing methods
    • G02B2006/12195—Tapering
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/12004—Combinations of two or more optical elements
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/122—Basic optical elements, e.g. light-guiding paths
    • G02B6/1223—Basic optical elements, e.g. light-guiding paths high refractive index type, i.e. high-contrast waveguides
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/132—Integrated optical circuits characterised by the manufacturing method by deposition of thin films
    • G—PHYSICS
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    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/10—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type
    • G02B6/12—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings of the optical waveguide type of the integrated circuit kind
    • G02B6/13—Integrated optical circuits characterised by the manufacturing method
    • G02B6/134—Integrated optical circuits characterised by the manufacturing method by substitution by dopant atoms
    • G02B6/1347—Integrated optical circuits characterised by the manufacturing method by substitution by dopant atoms using ion implantation
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B6/00—Light guides; Structural details of arrangements comprising light guides and other optical elements, e.g. couplings
    • G02B6/24—Coupling light guides
    • G02B6/42—Coupling light guides with opto-electronic elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/021—Silicon based substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
    • H01S5/00—Semiconductor lasers
    • H01S5/02—Structural details or components not essential to laser action
    • H01S5/0206—Substrates, e.g. growth, shape, material, removal or bonding
    • H01S5/0215—Bonding to the substrate
    • H01S5/0216—Bonding to the substrate using an intermediate compound, e.g. a glue or solder

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  • Physics & Mathematics (AREA)
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  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Optical Integrated Circuits (AREA)
  • Optical Couplings Of Light Guides (AREA)

Abstract

本案提供一种光学模式转换器和由包括双绝缘体上硅层结构的晶片制造所述光学模式转换器的方法。所述方法包括：在DSOI层结构的装置层的部分上提供第一掩膜；向下蚀刻装置层的未遮掩部分至至少上掩埋氧化物层，由此提供腔；蚀刻第一隔离沟槽和第二隔离沟槽至模式转换器层，所述模式转换器层：在上掩埋氧化物层相对于装置层的相对侧上并且介于上掩埋氧化物层与下掩埋氧化物层之间，下掩埋氧化物层在衬底上方；其中第一隔离沟槽和第二隔离沟槽限定锥形波导；用绝缘材料填充第一隔离沟槽和第二隔离沟槽，由此光学隔离锥形波导与剩余的模式转换器层；和再生长装置层的所蚀刻区域。

The present application provides an optical mode converter and a method of fabricating the optical mode converter from a wafer comprising a dual silicon-on-insulator structure. The method includes: providing a first mask over a portion of the device layer of the DSOI layer structure; etching the unmasked portion of the device layer down to at least the upper buried oxide layer, thereby providing a cavity; etching the first isolation trench and A second isolation trench to a mode converter layer: on the opposite side of the upper buried oxide layer relative to the device layer and between the upper and lower buried oxide layers, the lower The buried oxide layer is over the substrate; wherein the first isolation trench and the second isolation trench define a tapered waveguide; the first isolation trench and the second isolation trench are filled with an insulating material, thereby optically isolating the tapered waveguide from the remaining mode converter layers; and the etched regions of the regrown device layers.

Description

Mode converter and its manufacturing method
Technical field
The present invention relates to mode converter and its manufacturing methods, and in particular, are related to using for example with double insulation The substrate of body upper silicon layer is come the mode converter that manufactures.
Background technique
The optical mode of fiber optic cable of the size of optical mode usually than being connected is small very in photonic integrated circuits (PIC) It is more.For example, optical mode can be about 13 μm of 13 μm of x in fiber optic cable.However, optical mode generally can be in PIC Several microns or smaller.This mismatch of optical mode may result in the loss of connection when PIC to be connected to fiber optic cable.
In general, increase this solution of the mode sizes of optical mode and infeasible in PIC, because of resulting light Circuit is less likely excessive.
Mode converter well known in the prior art is by the Optical mode converter of fiber optic cable at the optical mode in PIC (vice versa).In general, the mode converter of the prior art is divided into two classes:
(1) it is related to improveing fibre profile (for example, lens or tapered fibre) and via the fiber being mounted on fiber block With the converter of the active alignment of PIC.
(2) it is attached by using the integrated v-shaped slot for being passively aligned or via the fiber of individual fibers block, in PIC Tapered transmission line is provided.
The mode converter for belonging to type (1) usually requires that very accurate fiber alignment tolerance, and packaging cost can Energy can be very high, because number of parts increases and the accurate active alignment of fiber block and PIC are also more laborious.
However, the mode converter for belonging to type (2) typically results in the substantially change of PIC pattern, this is because mode turns The height of parallel operation is relatively large compared to remaining component on PIC.The variation of this pattern carrys out the photoetching process used when manufacture Saying may be challenging, because the size Control of the other component on PIC is caused to be deteriorated.The present invention is intended to provide one kind is not The manufacturing method of low-loss, the PIC being passively aligned is manufactured in the case where there are the limitation of the pattern of the prior art.
Summary of the invention
The present invention provides a kind of using double insulator silicon-on manufacture monolithic optical mode turn in most broad range The method of parallel operation, wherein mode converter relative to chip upper surface and bury.
In a first aspect, the present invention provides a kind of chip manufacture optics by including silicon (DSOI) layer structure on double insulator The method of mode converter, comprising the following steps: the first exposure mask is provided on the part of the device layers of DSOI layers of structure；Erosion downwards Engraving device layer does not cover part at least upper buried oxide layer, thus provides chamber；Etch the first isolated groove and second every From groove to mode converter layer, the mode converter layer: on opposite side of the upper buried oxide layer relative to device layers And between upper buried oxide layer and lower buried oxide layer, lower buried oxide layer is square on substrate；Wherein first Isolated groove and the second isolated groove limit tapered transmission line；The first isolated groove and the second isolated groove are filled with insulating materials, Thus tapered transmission line and remaining mode converter layer are optically isolated；With institute's etching area of regrowth device layers.
Advantageously, this method improves the dimensional tolerance of device and integrated component.In addition, the thickness uniformity of device layers (using high uniformity caused by prefabricated DSOI chip) is not exposed to the harm of the manufacture of mode converter.
In second aspect, it is including being formed on the chip of silicon (DSOI) layer structure on double insulator that the present invention, which provides a kind of, Optical mode converter, comprising: substrate, top is lower buried oxide layer；Mode converter layer, in lower buried oxide Layer top, and include: tapered transmission line, it is coated by the insulator being placed in the first isolated groove and the second isolated groove； With block region, adjoining insulator and on its side relative to tapered transmission line, by material shape identical with tapered transmission line At；Upper buried oxide layer has gap above mode converter layer and above tapered transmission line；And device layers, Above upper buried oxide layer；Wherein device layers include two institute's etching parts for limiting rib waveguide, and rib waveguide Highest face temperature and device layers highest face temperature it is coplanar.
Optional feature of the invention will be proposed now.These features can answer in combination individually or with any aspect of the invention With.
Chip can be silicon wafer on double insulator.Method may include etching rib waveguide from the regrowth region of device layers Step.
The step of not covering part at least upper buried oxide layer of downward Etaching device layer can include: the first etching step Suddenly, the upper surface of upper buried oxide layer is etched to from the upper surface of device layers；With the second etching step, from upper buried oxide The upper surface of layer is etched to the upper surface of mode converter layer.Second etching step may include all burials not removed in chamber Oxide.For example, the part of buried oxide is positively retained at the opposite side of chamber.
Method can include also in the following terms etching between the first and second isolated grooves of non-Mask portion and etching The step of deposited oxide barriers: (i) first exposure mask, and (ii) chamber, lumen are limited by side wall and pedestal.The first isolation of filling The step of groove and the second isolated groove may include thermal oxide mode converter layer, thus fill the first isolated groove with oxide With the second isolated groove.
Method may include the following steps after the etching area of regrowth device layers: the regrowth of plane apparatus layer Thus region makes it coplanar with the highest face temperature of the non-etching area of device layers.
First tapered transmission line can be provided that the first width between 9 μm and 15 μm and the second width less than 1 μm.
The width of institute's etched cavity can be substantially wider than the most wide degree of tapered transmission line.
Method can comprise the further steps of: the first end etching v-shaped slot interface in mode converter, so that conical wave The input face suspension v-shaped slot interface led, to allow the passive alignment of fiber optic cable and tapered transmission line.
Method may also include the step of first end of polishing mode converter, thus provide for actively right with fiber optic cable Quasi- planar input face.
The insulator being placed in the first isolated groove and the second isolated groove can be silica.First isolated groove and Second isolated groove can be respectively provided with the width between 0.4 μm and 1.0 μm.
Detailed description of the invention
It lets us now refer to the figures and describes embodiment of the present invention by way of example, in the accompanying drawings:
Figure 1A and 2B shows mode converter according to the present invention；
Fig. 2 shows the plan view from above of the mode converter of Figure 1A and 1B；
Fig. 3 A and 3B show the cross-sectional view of mode converter；
Fig. 4 shows the cross-sectional view of mode converter when being connected to fiber optic cable；Fig. 5 shows morph mode converter；With
Fig. 6 A to 6N shows each fabrication stage of the mode converter of above each attached drawing.
Specific embodiment
Figure 1A shows the perspective view of mode converter 100 according to the present invention.In the present embodiment, mode converter can be through Fiber optic cable is passively connected to by v-shaped slot 21.V-shaped slot realizes the machine of the suspended portion 101 of fiber optic cable and mode converter Tool alignment.
As being shown more clearly in Figure 1B, suspended portion 101 includes tapered transmission line 102 tapered in the horizontal direction.Taper Waveguide 102 can be described as substantially triangular prism.Tapered transmission line is placed in the mode converter layer 5 of mode converter, and top is Device layers 4.Device layers and mode converter layer are separated by oxide skin(coating) 2.For by two channel 17a and 17b limits in device layers Fixed rib waveguide 16, described two channels have been etched to the highest face temperature of device layers.Channel is etched to provide arrival rib Shape waveguide it is tapered so that width narrows along length.Tapered transmission line 102 and the conversion of the tapered permission mode of rib waveguide 16 Device is by the Optical mode converter in fiber optic cable at the optical mode in photonic integrated circuits.
Because tapered transmission line 102 is positioned at 4 lower section of device layers, can be described as burying tapered transmission line.Tapered transmission line and rib The length of shape waveguide is tunable, is achieved in low-loss connection therebetween.
Fig. 2 is the plan view from above of mode converter 100 shown in Figure 1A and 1B.Here, it can be seen that rib waveguide 16 (and tapered transmission line 102) extends to the input face 22 of mode converter, and the input face hangs v-shaped slot 21.Input face may include Anti-reflective coating, the coating can further decrease loss.It is also easy to find out from this figure, channel 17a and 17b (limit ribbed Waveguide) at an angle to each other, it is accordingly provided in rib waveguide tapered in length.For linear tapered (that is, cone angle is constant), The overall length of mode converter 100 is generally between in the range of 6 to 10mm, or by using non-linear tapered design and very It is extremely shorter.Point out two cross sections: the A-A ' and B-B ' shown in figures 3 a and 3b respectively.
Fig. 3 A is shown along the cross section of A-A '.Mode converter generally includes the first oxide skin(coating) 3, and top is that mode turns Parallel operation layer 5.Mode converter layer 5 is at least partly blocked by the second oxide skin(coating) 2.Tapered transmission line 102 by isolated groove 13a and 13b is at least partially defined, and the isolated groove is to be optically isolated tapered transmission line 102 and remaining mode converter layer 5.Every It can be formed by such as silica from groove.Device layers 4 above second oxide skin(coating) 2, at least partly provide ribbed wave Lead 16.
Rib waveguide 16 and tapered transmission line 102 are in cross section, A-A ' indicated by position have width 305, partly limit Determine optical mode.Since two waveguides are tapered on the width, in cross section B-B as shown in Figure 3B ' indicated by position at Width 306 is narrower than width 305.The width of input face 22 can be between 9 μm to 15 μm, and the width of mode converter end can It is about 1 μm or smaller.In some embodiments, the width of input face is 13 μm, and the width of mode converter end is 0.3μm.The tapered length of tapered transmission line may be about 3.5mm.The height of rib waveguide can be between 1 μm to 5 μm, such as from The upper surface of dioxide layer 2 measures.The height of tapered transmission line 102 can be between 7 μm to 12 μm, such as from the first oxide skin(coating) 3 and second measure between oxide skin(coating) 2.
Fig. 4 shows the mode converter 100 when being connected to fiber optic cable 20.Fiber optic cable 20 is located in v-shaped slot, and its The bottom of the adjacent v-shaped slot of outside cladding 18.Therefore, the kernel 19 of fiber optic cable is aligned with the input face 22 of mode converter, by This makes light that can pass through kernel arrival tapered transmission line 102 and rib waveguide 106 in the case where relatively little of situation is lost.This form Alignment is referred to as passive alignment, because the structure of device realizes the mechanical registeration of kernel 18 and input face 22.
On the contrary, Fig. 5 shows the morph mode converter using active alignment.Active alignment is following process: optics is believed Number mode converter is provided to from fiber optic cable；The loss that measurement optical signalling becomes with position；And calibration fiber relative to The position of mode converter, so that the loss of optical signalling is minimum.
Therefore, as shown in figure 5, providing the surface 501 of substantitally planar, thus active alignment is allowed to realize maximum flexibility. Tapered transmission line 102 can shift in the horizontal and vertical directions relative to the fiber optic cable connected.
Fig. 6 A to 6N shows each fabrication stage of mode converter 100 as described above.
In first step, chip 1 is provided, the chip 1 includes silicon (DSOI) layer structure on double insulator, such as Fig. 6 A institute Show.Chip includes substrate 6, such as silicon handles chip, and top is first or lower the second oxide skin(coating) 3 of burial.First buries oxygen It is mode converter layer 5 above compound layer 3, the mode converter layer 5 upwardly extends (that is, far from substrate 6), to contact second Buried oxide layer 2.It is device layers 4 above second buried oxide layer 2 (that is, on the side relative to mode converter layer 5). Device layers 4 and mode converter layer 5 can be formed by silicon.First and second buried oxide layer can be formed by silica.Mode Converter layer can be between 7 μm and 12 μm, in some embodiments, highly for 9.85 μm (such as from the first buried oxide layer 3 Top is measured to 2 bottom of the second buried oxide layer).The thickness of first and second buried oxide layer can be between 0.3 μm and 1 μm Between, in some embodiments, with a thickness of 0.4 μm.Buried oxide layer should be by mode converter layer 5 and 4 (oxide of device layers Except the place of being removed) and substrate 6 be optically isolated.The thickness of device layers is generally between 1 μm and 5 μm, and in some realities It applies in example, with a thickness of 3 μm.Depending on the diameter (200mm or 150mm) of chip, the thickness of substrate 6 can be 725 μm or 675 μm.
In next step, as shown in Figure 6B, hard mask layer 7 is placed in device layers 4.Hard mask layer can be from silicon device 4 thermally grown silicon dioxide layer of layer.Hard exposure mask is the sacrificial layer that can be removed in processing step later.Hard mask layer serves as dress Set the effective etching mask and protective layer of layer 4.Therefore, hard mask layer should be sufficiently thick, such as 300nm, such as from device layers top to It is measured at the top of hard exposure mask 7.
In figure 6 c, photolithographic patterning hard exposure mask 7 has been used, has been etched downwards then along the part of device layers 4, so as to It removes the silicon in the wafer surface area for manufacturing tapered transmission line.Chamber 8 is formed in device layers.It is preferable to use dry etching techniques to tie up Hold the excellent dimensions control to institute's etch features.
Next processing step is shown in figure 6d.It patterns and etches or the second buried oxide layer 2 in chamber 8. The width 10 of intracavitary buried oxide region is optimized, to improve the lithographic printing of 8 bottom of chamber, and is provided in device layers 4 Rib waveguide part is optically isolated.Next, as illustrated in fig. 6e, aoxidizing barriers 11 in device disposed thereon.Preferably, make Thus low-pressure chemical vapor deposition (LPCVD) technology with barriers thickness lower than 200nm prevents from serving as a contrast come deposited oxide barriers Excessive stress on bottom.
In Fig. 6 F, photolithographic patterning oxidation barriers 11 and upper or the second buried oxide layer 2 are used.Then, it loses Narrow groove 12a and 12b is consequently formed to the upper surface of buried oxide layer 3 in die sinking formula converter layer 5, the groove optics every From tapered transmission line 102.Groove 12a and 12b along its length (enter Fig. 6 F plane direction on) at an angle to each other, thus make The distance between described groove is obtained to change with length.The narrow end of tapered transmission line is typically designed to width less than 0.5 μm (such as in ditch Measured between slot 12a and 12b) because this low-loss for helping to provide rib waveguide 16 in device layers 4 couples.Isolating trenches The width (such as measuring on the horizontal direction across substrate 6) of slot 12a and 12b should minimize (and usually at 0.4 μm -1.0 μm In the range of), while necessary be optically isolated still being provided.
Fig. 6 G shows subsequent step, wherein isolated groove 12a and 12b be filled with to be formed tapered transmission line cladding 13a and 13b.This can be realized by thermal oxide substrate 6, so that cladding is formed by silica.It aoxidizes barriers 11 and prevents surface Any oxidation, therefore the thickness of device layers 4 not by the step for influenced.Advantageously, which means that the accurate control of this layer Uniformity retained.Then removal oxidation barriers 11, such as by using the agent of the wet chemical etch such as phosphoric acid (because of this Sample will not etch following silica 7 or silicon 4), to obtain device as shown in figure 6h.
Then, the regenerating unit layer 4 in chamber 8, as shown in fig. 6i.When device layers 4 are formed by silicon, using the silicon of selection outside Prolong technique.This technique only grows silicon in silicon face, therefore without growth silicon on oxide skin(coating) 7.Regeneration technology leads to oxide The outgrowth region 14 of 7 top of layer.Therefore, as shown in Fig. 6 J, regrowth region 14 is planarized, to provide the original with device layers 4 The matched regrowth region 15 of beginning apparent height.Planarization can be executed by CMP process.
In the next steps, as shown in fig. 6k, remove previous hard exposure mask 7 (such as using the wet chemistrys such as hydrofluoric acid lose Carve agent), and new hard exposure mask 9 is provided.New hard exposure mask can obtain (because can be oxide mask) or can by thermally grown It is obtained by deposition.Now, the highest face temperature of device is substantitally planar, and it is to be understood that then manufacturing in device layers 4 Integrated photonic circuit photonic element not because mode converter 100 there are due to be compromised (method compared with prior art).
Fig. 6 L shows next manufacturing step, wherein using photolithographic patterning hard exposure mask 9, then it is preferable to use dry-etchings Technique etching, to maintain excellent dimensions tolerance.After this step, Etaching device layer 4 is to manufacture rib waveguide 16, the rib Shape waveguide 16 is aligned with the tapered transmission line 102 in mode converter layer 5.Rib waveguide 16 is usually by generate as described above two Channel 17a and 17b are limited.As a result it is shown in Fig. 6 M (i).
Silicon photonic circuit field it will be appreciated by the skilled person that present can be connected to tapered transmission line via rib waveguide 16 Various photons are manufactured in 102 device layers to reach the low-loss connection (vice versa) from photonic integrated circuits to fiber optic cable Element.
Alternate embodiment is shown in Fig. 6 M (ii), and the chamber 8 wherein etched in Fig. 6 C is made as wider than tapered transmission line 102 Degree is significant wide.The width 10 of oxide isolation areas is usually several microns wide, therefore ensures that rib waveguide 16 and mode converter Layer 5 is optically isolated.Advantageously, photoresist in tapered waveguide region 8 bottom of chamber more evenly.So realize compared with Good size Control.In addition, wide chamber is not taper, but still constant width is maintained, this may be beneficial during planarization technology.Example Such as, it was found that during chemically mechanical polishing, polishing rate is wide with chamber and changes.
Fig. 6 N shows the last processing step of mode converter 100, wherein in chip grown on top or deposition clad, by This serves as the hard exposure mask of downstream processing stages and provides passivation and protection to photonic integrated circuits.Those skilled in the art answers Work as understanding, the width of including but not limited to multiplexer, de-multiplexer and other wavelength selectivity devices can be manufactured in device layers The passive photonic element of general range.Equally, increase other downstream process modules such as doping, contact and metallization to allow for out The active photonic devices such as pass, diode and regulator.
It is many equivalent when providing the disclosure although above-mentioned example embodiment has been combined to describe the present invention Modifications and variations will be apparent to those skilled in the art.Therefore, exemplary implementation of the invention listed above Scheme is considered illustrative rather than restrictive.It without departing from the spirit and scope of the present invention, can be to institute It describes embodiment and carries out various changes.
Above-mentioned all bibliography are incorporated herein by reference.
Feature list
1 chip
2 buried oxide layer
3 buried oxide layer
4 device layers
5 mode converter layers
6 substrates
7 oxide skin(coating)s
Chamber in 8 device layers
9 new oxide skin(coating)s
10 oxide isolation areas
11 oxidation barriers
12a, 12b isolated groove
13a, 13b tapered transmission line cladding
14 outgrowth regions
15 regrowth regions
16 rib waveguides
The first and second channel 17a, 17b
18 fiber optic cables cladding
19 fiber optic cable kernels
20 fiber optic cables
21v shape slot
22 input faces
100 mode converters
101 suspended portions
102 tapered transmission lines
The width of 305 first tapered transmission lines
The width of 306 second tapered transmission lines
602 dry-etching faces
The height of 701 rib waveguides
The height of 702 device layers

Claims (17)

1. a kind of method of the chip manufacture optical mode converter by including silicon (DSOI) layer structure on double insulator, including with Lower step:
The first exposure mask is provided on the part of the device layers of the DSOI layers of structure；
Etch described device layer downwards does not cover part at least upper buried oxide layer, thus provides chamber；
The first isolated groove and the second isolated groove are etched to mode converter layer, the mode converter layer:
On opposite side of the upper buried oxide layer relative to described device layer and between the upper buried oxide layer Between lower buried oxide layer, the lower buried oxide layer is square on substrate；
Wherein first isolated groove and second isolated groove limit tapered transmission line；
First isolated groove and second isolated groove are filled with insulating materials, is thus optically isolated the tapered transmission line With remaining mode converter layer；With
Institute's etching area of regrowth described device layer.
2. the method as described in claim 1, further comprising the steps of:
Rib waveguide is etched from the regrowth region of described device layer.
3. the method as described in claim 1 or claim 2, wherein etching the described of described device layer does not cover part downwards The step of at least upper buried oxide layer can include:
First etching step is etched to the upper surface of the upper buried oxide layer from the upper surface of described device layer；With
Second etching step is etched to the upper surface of the mode converter layer from the upper surface of the upper buried oxide layer.
4. method as claimed in claim 3, wherein second etching step all described covering of not removing in the chamber Bury oxide skin(coating).
5. method as claimed in any preceding claim is also etching the non-Mask portion and etching described first and second Between isolated groove the following steps are included:
The deposited oxide barriers in the following terms: (i) described first exposure mask, and (ii) described chamber, wherein the chamber is by side wall It is limited with pedestal.
6. method as claimed in claim 5, wherein the step of filling first isolated groove and second isolated groove Include:
Thus mode converter layer described in thermal oxide fills first isolated groove and second isolating trenches with oxide Slot.
7. method as claimed in any preceding claim further includes after the etching area of regrowth described device layer Following steps:
Planarize described device layer the regrowth region, thus make its with non-etching area described in described device layer most High surface is coplanar.
8. method as claimed in any preceding claim, wherein the tapered transmission line is provided between 9 μm and 15 μm First width and the second width less than 1 μm.
9. method as claimed in any preceding claim, wherein the width of institute's etched cavity is substantially than the tapered transmission line Most wide degree it is wide.
10. method as claimed in any preceding claim, further comprising the steps of:
V-shaped slot interface is etched in the first end of the mode converter, so that the input face of the tapered transmission line hangs institute V-shaped slot interface is stated, to allow the passive alignment of fiber optic cable Yu the tapered transmission line.
11. method as claimed in any one of claims 1-9 wherein, further comprising the steps of:
The first end of the mode converter is polished, is thus provided for the planar input face with fiber optic cable active alignment.
12. a kind of is including the optical mode converter formed on the chip of silicon (DSOI) layer structure on double insulator, comprising:
Substrate, top is lower buried oxide layer；
Mode converter layer above the lower buried oxide layer, and includes:
Tapered transmission line is coated by the insulator being placed in first isolated groove and second isolated groove；With
Block region, abuts the insulator and on its side relative to the tapered transmission line, by with the conical wave Identical material is led to be formed；Upper buried oxide layer, above the mode converter layer and in the tapered transmission line Side has gap；With
Device layers, above the upper buried oxide layer；
Wherein described device layer includes two institute's etching parts for limiting rib waveguide, and the highest face temperature of the rib waveguide It is coplanar with the highest face temperature of described device layer.
13. optical mode converter as claimed in claim 12, wherein the tapered transmission line has between 9 μm and 15 μm The first width and the second width less than 1 μm.
14. the optical mode converter as described in claim 12 or claim 13 further includes in the mode converter The v-shaped slot interface of first end, wherein the input face of the tapered transmission line hangs the v-shaped slot interface, to allow fiber optic cable With the passive alignment of the tapered transmission line.
15. the optical mode converter as described in claim 12 or claim 13 further includes the throwing of the mode converter Thus light first end is provided for the planar input face with fiber optic cable active alignment.
16. optical mode converter described in any one of claim 12 to 15, wherein the insulator is silica.
17. the optical mode converter as described in any one of claim 12 to 16, wherein first isolated groove and institute State the width that the second isolated groove is respectively provided between 0.4 μm and 1.0 μm.
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GB2552264B (en) 2021-06-02
GB2552264A (en) 2018-01-17
WO2018011587A1 (en) 2018-01-18
CN109477936B (en) 2022-03-29
US20200243397A1 (en) 2020-07-30
US11037839B2 (en) 2021-06-15
GB201711258D0 (en) 2017-08-30
GB201711282D0 (en) 2017-08-30
GB2552263B (en) 2019-11-20
CN109477936A (en) 2019-03-15
US11600532B2 (en) 2023-03-07
US10643903B2 (en) 2020-05-05
US20190243070A1 (en) 2019-08-08
US20200258791A1 (en) 2020-08-13
US11133225B2 (en) 2021-09-28
GB2552264A9 (en) 2020-12-23
GB2552263A (en) 2018-01-17
US20190244866A1 (en) 2019-08-08
WO2018011373A1 (en) 2018-01-18

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