CN109508281A - Alarm controller temporal information records system - Google Patents
Alarm controller temporal information records system Download PDFInfo
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- CN109508281A CN109508281A CN201710833321.3A CN201710833321A CN109508281A CN 109508281 A CN109508281 A CN 109508281A CN 201710833321 A CN201710833321 A CN 201710833321A CN 109508281 A CN109508281 A CN 109508281A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3409—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment
- G06F11/3419—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment by assessing time
- G06F11/3423—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment for performance assessment by assessing time where the assessed time is active or idle time
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
- G06F1/14—Time supervision arrangements, e.g. real time clock
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/30—Monitoring
- G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
- G06F11/3466—Performance evaluation by tracing or monitoring
- G06F11/3476—Data logging
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- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Quality & Reliability (AREA)
- Computer Hardware Design (AREA)
- Electric Clocks (AREA)
Abstract
The present invention relates to a kind of alarm controller temporal information recording method and devices, which is characterized in that after alarm controller booting, processor reads the historical time information stored in clock chip first, after judging that its time format is correct, as unused time information；Then processor reads clock chip current time information, after judging that its time format is correct, as available machine time information；Processor reads clock chip current time information, and after judging clock chip normal operation, exports as present clock information.The present invention realizes the time record of power on/off by the method for software using the clocking capability of the clock chip of alarm controller itself；Using Double Data memory mechanism, temporal information risk of missing is reduced；Judged using temporal information format, clock chip monitoring running state etc., improves the time registering capacity of alarm controller power on/off.
Description
Technical field
A kind of alarm controller has clock in particular for monitoring gas leakage or the alarm controller of fire alarm
Display function, and can use the startup and shutdown time of its time clock feature record alarm controller.
Background technique
Fire/gas alarm controller is usually to monitor multiplexed detection device, and show the state of detector and main power supply,
And other data records or display function, circuit and structure are all more complicated, generally all have clock circuit RTC, it is therefore an objective to
Record the time of origin of each alarm/failure.After controller closes power supply, in order to maintain the continuity of clock, knob is generally used
Battery is detained to provide the power supply after shutdown for RTC.
Gas accidents and fire incident repeated at present, and whether fire/gas alarm controller can be usefully in prison
Operating status is controlled, is of great significance for accident responsibility analysis.Namely having for fire/gas alarm controller can
Its power on/off time is recorded, it is significant.
The method for the acquisition machine open/close time record being widely used at present is mostly to detect controller using hardware design
The machine open/close time.To the power on/off time of recording controller, the detection circuit increased to power supply power-fail is generally required.When
When power down occurs for power supply, controller maintains of short duration work using the storage energy of power circuit, and is sent out by power-fail detection circuit
Interrupt signal out notifies the single-chip microcontroller of alarm controller to record its power down time；After controller powers on, single-chip microcontroller records it and opens
The machine time.It records the system of machine open/close time, as shown in Figure 1, mainly by power circuit, single-chip microcontroller, mainboard battery, storage
Device, capacitor and voltage detecting circuit composition.
This system structure makes hardware design complex, and consumption energy is larger, and depends capacitor electric discharge release alone
Energy may not be able to maintain processing to complete the process of power down record, must also need to carry out circuit change in this way, for example increase storage
The capacity of energy capacitor is held time to increase, but thus perhaps can bring other negative interactions, for example cause starting current excessive.If
In order to avoid starting current is excessive, these are first closed when power down occurs by the biggish circuit of other power consumptions on control hardware
The big circuit of power consumption, to reduce energy consumption, to guarantee to store holding time for power down record.
These above-mentioned methods require to realize by change hardware, and also have higher requirements to mcu resource distribution
(detection of power loss need with interrupt mode), or require to provide more output control mouths, implements more complex, and cost also can
Increase.
Summary of the invention
Deficiency in view of the above technology, the present invention provides a kind of system and method for recording the power on/off time.This hair
Bright is the time note for realizing power on/off by the method for software using the clocking capability of the clock chip of controller itself
Record is not needed to extend yet and be held time, the practicality is stronger without increasing power-fail detection circuit.And the machine open/close time is remembered
Record does not need very high precision, is accurate to second grade and is even classified, can satisfy meaning described in background with regard to foot.
The technical solution adopted by the present invention is as follows:
The system of recording controller power on/off time includes processor, RTC clock chip, memory, mainboard battery
(i.e. button cell) and power circuit.Power circuit controller work normally when simultaneously give single-chip microcontroller, RTC clock chip and
Memory power supply, and button cell is only individually for RTC clock chip in controller power down and provides power supply.
Controller is necessarily required to refresh clock in normal course of operation and shows, refresh interval is less than 1 second, otherwise its
The time " second " of display will jump.The newest clock information read (date Hour Minute Second) is deposited by processor
In the memory SRAM of RTC clock chip, after system is powered down, processor is stopped working due to power-off, the time in SRAM
Information will not be updated again certainly by processor, that is to say, that the temporal information saved in the SRAM of RTC clock chip is just
It is the time of power down, and RTC clock chip is powered by button cell after a power failure, can still maintain normal clocking capability,
And the data information in its SRAM will not be lost.
After controller powers on again, processor is read according to programming first to be saved in RTC clock chip SRAM
Temporal information was saved into memory as the unused time, and then processor reads the current of RTC clock chip refresh again
Time saves as the available machine time into memory.
The memory for storing power on/off time record uses the nonvolatile memory of power down, such as EEPROM or FLASH,
According to the limitation of its memory capacity, the record of multiple switching machine can store, and can check that switching on and shutting down record by operation, or
Person is recorded export, checks that it records information on computers.
Because just having to when checking switching on and shutting down time record to system energization.So starting in this electrifying system
When work, the last unused time, which is saved as shutdown record, to be possible.
The present invention relates to a kind of alarm controller temporal information recording methods, comprising:
Step 1, after alarm controller booting, processor reads the first time information in first memory, and should
First time information judges whether the time format of the unused time information is correct, when such as the shutdown as unused time information
Between information time format it is incorrect, prompt be arranged the clock chip clock, as the unused time information time format just
Really, it is stored after label shutdown code to second memory before the unused time information；
Step 2, which reads the second temporal information in the first memory；Judge second temporal information when
Between format it is whether correct；The time format of such as second temporal information is correct, believes second temporal information as the available machine time
Breath stores after label booting code to the second memory before the available machine time information；Such as time of second temporal information
Format is incorrect, then prompts the clock that the clock chip is arranged；
Step 3, which reads the clock chip third temporal information and judges whether clock chip operation is normal；
When the clock chip normal operation, exported the third temporal information as present clock information, and in the first memory
Interior storage third temporal information；When the clock chip is operating abnormally, the clock chip is prompted to be operating abnormally.
Alarm controller temporal information recording method of the present invention, opens up the first memory block in the first memory
With the second memory block, the operation flowing water labelled notation of a byte is formed into information combination, the operation serial number before temporal information
Initial value is 0, every to store primary information combination, which adds 1, is recycled from 0 to 2n-1, wherein n is positive whole
Number；It successively stores the information that the operation serial number is odd number and is combined in first memory block, successively storing the operation serial number is
The information of even number is combined in second memory block.
Alarm controller temporal information recording method of the present invention, when temporal information simultaneously meet the year be 0~
Between 99, month between 1~12, Time of Day be between 1~31, when to be between 0~23, between timesharing be the time 0~59 it
Between, time second be 0~59 between when, it is believed that the temporal information meets time format.
Alarm controller temporal information recording method of the present invention is mentioned when the temporal information does not meet time format
Show the clock that the clock chip is set, and enters clock setting state；When the newly-installed time should lag behind the last booting
Between and the unused time, otherwise continue be arranged clock.
Alarm controller temporal information recording method of the present invention, step 1 further comprises: reading first respectively
The information combination that memory block and the second memory block are stored when shutting down the alarm controller the last time, with operation serial number preceding
The information combination in temporal information, as first time information.
Alarm controller temporal information recording method of the present invention, step 2 further comprises: reading the alarm control
The temporal information of clock chip when this booting of device processed, as the second temporal information.
Alarm controller temporal information recording method of the present invention, step 3 further comprises: reading the alarm control
The temporal information of the clock chip after this booting of device processed, as third temporal information；It is 60 that reference data initial value, which is arranged,
And the second data of the primary third temporal information is read at every t seconds, it is compared with the reference data, to identify the temporal information
Time state；If the second data and the reference data are unequal, the reference data is covered with the second data, then
Judge whether the third temporal information meets time format, meets the time format and then continue recognition time state, do not meet this
Time format then enters clock setting state；If the second data is equal with the reference data, which does not have in t seconds
Refresh, which there is exception, and the processor shows the prompt that the clock chip is operating abnormally on the display at this time,
Wherein 1 < t < 60.
The invention further relates to a kind of temporal information recording devices of alarm controller, comprising:
One unused time information logging modle, for after alarm controller booting, processor to be read in first memory
First time information judge the when layout of the unused time information and using the first time information as unused time information
Whether formula is correct, and the time format such as the unused time information is incorrect, the clock that the clock chip is arranged is prompted, such as the shutdown
The time format of temporal information is correct, stores after label shutdown code to second memory before the unused time information；
One available machine time information logging modle reads the second temporal information in the first memory for the processor；
Judge whether the time format of second temporal information is correct；When using time format, correctly second temporal information is as being switched on
Between information, before the available machine time information label booting code after store to the second memory；Such as second temporal information is not
Meet the time format, prompts the clock that the clock chip is set.
One current time information logging modle, for reading the clock chip third temporal information from the processor and judging
Whether clock chip operation is normal；When the clock chip normal operation, believe the third temporal information as present clock
Breath output, and the third temporal information is stored in the first memory；When the clock chip is operating abnormally, the clock is prompted
Chip is operating abnormally.
Temporal information recording device of the present invention is arranged first in the first memory inside the clock chip and deposits
The operation flowing water labelled notation of one byte is formed information combination, the job stream by storage area and the second memory block before temporal information
Water initial value is 0, every to store primary information combination, which adds 1, is recycled from 0 to 2n-1, wherein n is
Positive integer；It successively stores the information that the operation serial number is odd number and is combined in first memory block, successively store the operation flowing water
Number second memory block is combined in for the information of even number.
Temporal information recording device of the present invention, time format are the year to be between 0~99, month be 1
Between~12, Time of Day is between 1~31, when the time be between 0~23, between 0~59, time second is 0~59 between timesharing
Between.
Temporal information recording device of the present invention, when the temporal information does not meet time format, when prompting that this is arranged
The clock of clock chip, and enter clock setting state；When the newly-installed time should lag behind the last available machine time and shutdown
Between, otherwise continue that clock is arranged.
Temporal information recording device of the present invention, unused time information logging modle further comprise: reading respectively
The information combination for taking the first memory block and the second memory block to store in alarm controller the last time shutdown, with operation flowing water
Temporal information in number preceding information combination, as first time information.
Temporal information recording device of the present invention, the available machine time information logging modle further comprise: reading
The temporal information of clock chip when this booting of the alarm controller, as the second temporal information.
Temporal information recording device of the present invention, current time information logging modle further comprise: reading should
The temporal information of the clock chip after this booting of alarm controller, as third temporal information；It is initial that reference data is set
Value is 60, and the second data of the primary third temporal information is read at every t seconds, is compared with the reference data, should with identification
The time state of temporal information；If the second data and the reference data are unequal, with the second data to the reference data into
Row covering, then judge whether the third temporal information meets time format, meet the time format and then continue recognition time state,
It does not meet the time format and then enters clock setting state；If the second data is equal with the reference data, the second data is in t
Do not refresh in second, which exception occurs, and the processor shows that clock chip operation is different on the display at this time
Normal prompt, wherein 1 < t < 60.
The invention further relates to a kind of alarms, comprising: power circuit, clock control circuit, place inside housings is arranged
Manage device, memory and program controling module, and the display module being arranged on shell, which is characterized in that the clock control
Circuit uses self-powered clock chip, and device is connect with the program controling module and memory respectively through this process；Institute
Stating program controling module includes a kind of temporal information recording device；The main power source of the power circuit and the first electricity of the clock chip
Source input port connection, for providing power supply for the clock chip；Reserce cell during the clock chip is self-powered, when with this
The second source input port of clock chip connects, for providing power supply when the main power source is closed for the clock chip.The display
Module shows that output port is connect with the processor, prompt letter when for showing temporal information and the clock chip operation irregularity
Breath, and operation display interface is provided for clock setting.
The present invention is the clocking capability using controller clock chip itself, and booting/pass is realized by the method for software
The time of machine records, and without increasing power-fail detection circuit, does not also need to supply by increasing external accumulator extension circuit
Electric time, the practicality are stronger.
Detailed description of the invention
The existing machine open/close time keeping system block diagram of Fig. 1；
Fig. 2 schematic diagram of the present invention；
Fig. 3 machine open/close time records flow chart；
Fig. 4 clock chip connection schematic diagram.
Wherein appended drawing reference are as follows:
100: alarm controller
110: processor
120: clock control circuit
121: reserce cell
122: clock chip
123: clock chip memory SRAM
124: the memory block Z1 in clock chip memory SRAM
125: the memory block Z2 in clock chip memory SRAM
130: display
140: the memory of alarm controller
150: main power source
160: program controling module
161: temporal information recording device
162: unused time information logging modle
163: available machine time information logging modle
164: current time information logging modle
S100、S110、S120、S130、S141、S142、S150、S160、S170、S200、S210、S220、S230、
S240, S300, S310, S320, S330, S341, S342, S351, S352: step
Specific embodiment
The depicted schematic diagram for alarm controller described in one embodiment of the invention of Fig. 2.
Alarm controller 100 includes processor 110, clock control circuit 120, display 130, memory 140, power supply electricity
Road 150 and program controling module 160.
Wherein clock control circuit 120 include clock chip 122, and by processor 110 respectively with program controling module
160 and memory 140 connect；Described program control module 160 includes temporal information recording device 161；The main electricity of the source circuit
Source 150 is connect with the first power input port of clock chip 122, for providing power supply for clock chip 122；Reserce cell
121 connect with the second source input port of clock chip 122, for providing when main power source 150 is closed for clock chip 122
Power supply.Display 130 shows that output port is connect with processor 110, for showing that it is different that temporal information and clock chip 122 work
Prompt information when often, and operation display interface is provided for clock setting.
The temporal information recording device of alarm controller described in one embodiment of the invention, comprising:
Unused time information logging modle 162, for reading the memory block Z1 124 respectively after the booting of alarm controller 100
In the information combination stored with the memory block Z2 125 in the last shutdown of alarm controller 100, operation serial number is preceding should
The temporal information of information combination, and regard the temporal information as unused time information, during shutdown between shutdown is marked before information
It is stored after code to memory 140；Judge whether the unused time information meets time format, as the unused time information is not inconsistent
Time format is closed, then prompts the clock of setting clock chip；
Available machine time information logging modle 163 reads the temporal information in memory 123 for processor 110；Judgement should
Whether the time format of temporal information is correct；Using the correct temporal information of time format as available machine time information, in booting
Between store after label booting code to memory 140 before information；If temporal information does not meet the time format, setting clock is prompted
The clock of chip 122.
Current time information logging modle 164, for reading 122 temporal information of clock chip from processor 110 and judging
Whether the operation of clock chip 122 is normal；When 122 normal operation of clock chip, using the temporal information as present clock information
Output, and the temporal information is stored in memory 123；When clock chip 122 is operating abnormally, the clock chip is prompted to run
It is abnormal.
In addition, temporal information recording device 161, the memory block Z1 is set in the memory 123 inside clock chip 122
The operation flowing water labelled notation of one byte is formed information combination, the job stream by the memory block 124 and Z2 125 before temporal information
Water initial value is 0, every to store primary information combination, which adds 1, from 0 to 255 recycling；Successively store
The operation serial number is that the information of odd number is combined in the memory block Z1 124, successively stores the information group that the operation serial number is even number
Together in the memory block Z2 125.
The temporal information recording device 161, time format are the year to be between 0~99, month for 1~12 it
Between, Time of Day is between 1~31, when the time be between 0~23, between 0~59, time second is between 0~59 between timesharing.When
The temporal information does not meet time format, prompts the clock that the clock chip 122 is arranged, and enter clock setting state；Newly set
The time set should lag behind the last available machine time and unused time, otherwise continue that clock is arranged.
The temporal information recording device 161, current time information logging modle 164 further comprise: setting base value
It is 60 according to initial value, and read the second data of a current time information at every 1.5 seconds, is compared with the reference data, with
Identify the time state of the temporal information；If the second data and the reference data are unequal, with the second data to the benchmark
Data are covered, then judge whether the third temporal information meets time format, meet the time format then continue identification when
Between state, do not meet the time format and then enter clock setting state；If the second data is equal with the reference data, the second
Data do not refresh in 1.5 seconds, which exception occurs, and the processor 110 is shown on the display 130 at this time
Show the prompt that the clock chip 122 is operating abnormally.
The depicted flow chart for alarm controller temporal information recording method described in one embodiment of the invention of Fig. 3.
Step S100 is unused time information recording process.
Firstly, carrying out step S110, alarm controller 100 is switched on；
Then, step S120 is carried out, processor 110 reads the Z1 124 and Z2 of SRAM memory 123 in clock chip 122
Serial number before 125 temporal information, and step S130 is carried out, compare the size of serial number: as Z1 < Z2, being transferred to step
S141 reads the temporal information in Z1 as the unused time；As Z1 > Z2, it is transferred to step S142, reads the temporal information in Z2
As the unused time；
Then, step S150 is carried out, judges whether the time format of the unused time is correct: when time format is correct,
Step S160 is carried out, which is stored to alarm controller memory 140, and record shutdown code；Work as time format
When incorrect, step S170 is carried out, prompts user setting clock.
Step S200 is available machine time information recording process.
After completing unused time information record, step S210 is carried out, reads 122 current time information of clock chip；
Followed by step S220, judge whether the time format of the current time is correct: when time format is correct,
Step S230 is carried out, is stored the current time as available machine time information to alarm controller memory 140, and record booting
Machine code；When time format is incorrect, step S240 is carried out, prompts user setting clock.
Step S300 is current time information recording process.
After completing available machine time information record, step S310 is carried out, reads 122 current time information of clock chip, and
Step S320 is carried out, shows the current time on the display 130；
Add serial number before the time in this prior later, carries out step S330, judge that serial number is odd numbers or even numbers: when
When serial number is odd numbers, step S341 is carried out, the serial number and the current time are stored to Z1 124 and step S351, stream
Water number plus 1, and return step S310；When serial number is even numbers, step S342 is carried out, the serial number and the current time are deposited
To Z2 125 and step S352, serial number adds 1, and return step S310 for storage.
Fig. 4 is the clock chip connection schematic diagram of one embodiment of the invention.
Clock chip RTC uses DS1302Z, and there are two power input VCC1, VCC2, chips to use voltage for chip tool
High power end power supply, and can automatically switch.The end VCC that the end VCC1 of clock chip RTC is connected is the inside of controller
System power supply, using DC5V；The end VCC2 of the chip is connected as the button cell of 3V.Power supply is provided by VCC1 usually, the core
Initial time value, self-clocking is arranged according to internal in piece.When system power supply is closed, which uses the knob at the end VCC2 automatically
Cell powers are detained, and continue clock timing.And the inside of DS1302Z has the static memory SRAM of 31 bytes, appoints
What power supply (VCC1 or VCC2) can maintain the data of SRAM, that is, when system power supply is closed, by button cell
The data record in SRAM can be maintained, it is non-volatile to realize power down.And there are one very good by static memory SRAM
Characteristic be its be written number it is unrestricted, writing speed is unrestricted.
CLK, IO, RST of clock chip RTC connects processor CPU, is written and read behaviour to the clock chip by software
Make, which is such as set, or reads its temporal information etc..
The oscillator of X1, X2 external connection 32.768KHz of clock chip RTC, when its clock being maintained to walk.
The operation program of processor usually, needs periodically to read the temporal information of RTC, send to display and show at that time
Clock.The SRAM to RTC is sent to save simultaneously the time data (date Hour Minute Second) of the display.Since the data are deposited
It is SRAM that storage, which uses, and the execution time is very short, and 0.5ms can execute the data storage (speed of specific time and processor
It is related), and the time data break of its storage is about 1 second.The several of power down namely occur during executing storing data
Rate is simultaneously little, what the time data of storage were available with.But in order to ensure the reliability of its storing data, herein using double
The mechanism of data storage, that is, open up two storage regions, is labeled as the area Z1 and the area Z2, respectively storage time information, and each
The operation serial number an of byte, that is, time record of every storage, flowing water are stored before the temporal information of storage again
Number plus one, from 0 to 255 be recycled.Such as when showing this temporal information, serial number is odd number then by serial number and time
Information is stored in the area Z1, and serial number is added 1；When showing temporal information again, as serial number be even numbers if by serial number and when
Between information storage and the area Z2, and serial number is added 1.And serial number is first stored in storage, then storage time record.In this way,
Even if power down occurs when some storage region is in storing data, and cause correctly store current time data, but this
At least one is that correctly, and its memory gap is less than 1 second to the data in two regions, as long as finding any one significant figure
According to.
After controller powers on, the temporal information in the area Z1 and the area Z2 is first read, takes serial number small as last time shutdown
Time record, worst error are 2 seconds, meet requirement described in background.Because the big affirmative of serial number is last data
Record, perhaps it has the possibility being destroyed, and generating system power down during being both currently written into cannot be correctly written in this
Time record so the last record using last time record is used as the unused time, and records the generation for representing shutdown simultaneously
Code, to distinguish the event of the time.
After having judged shutdown record, processor reads the current data of RTC as the available machine time, is stored in system storage
Device, and the code for representing booting is recorded simultaneously, to distinguish the event of the time.
Due to the power consumption very little of DS1302Z, in the state that system does not have power supply, when the state both shut down, by common
2032 button cells when clock can be maintained to walk and the data several months long of internal SRAM.When the overlong time of power-off, then
The power-off time and clock that SRAM is recorded entanglement can all occur when walking.So the shutdown saved in the SRAM for reading RTC
When time and available machine time, the accuracy of data need to be first judged, meet time format ability by record storage in memory,
Otherwise, then user setting clock is prompted after being switched on.
Judge the method for time format are as follows: 1) between Nian Yingwei 0~99；2) moon should be between 1~12；3) it should be 1 day~
Between 31；4) between Shi Yingwei 0~23；5) dividing should be between 0~59；6) second should be between 0~59.
Above-mentioned condition, which all meets, to be just considered to meet time format.
Any of the above conditions are unsatisfactory for, and clock setting state is entered after being switched on.It is newly-installed when the time is arranged
The time that time need to lag behind last time records (when the time in SRAM recording correct, just as the last time
Record；Otherwise recorded using the machine open/close of last time record as the last time), otherwise continue the prompt setting time.It in this way can be with
Prevent the clock for artificially modifying controller from causing to record entanglement, or the modification time for its illegal objective of realization.
In alarm system, the time due to recording various events has great importance, so for the real-time prison of RTC
Depending on being also of great significance, when RTC, which is run, occurs abnormal, processor is given to prompt automatically, repairs processing.Judge RTC
Abnormal method is that timing in about 1.5 seconds is arranged in processor, the second data of RTC is read after being timed within 1.5 seconds every time, with processing
The internal storage SEC (initial value of the memory be 60) of device is compared, currently obtaining if the two is unequal
Second data overrides SEC, then judges whether time format is normal again；If the two is equal, mean that the second data of RTC exists
Do not refresh in 1.5 seconds, i.e. exception occurs in RTC, and processor provides prompt in time, it is ensured that RTC normal operation.
Although the present invention has been disclosed as a preferred embodiment, however, it is not to limit the invention, without departing substantially from this hair
It is bright spirit and its essence in the case where, those skilled in the art make in accordance with the present invention it is various it is corresponding change and
Deformation, but these corresponding changes and modifications all should fall within the scope of protection of the appended claims of the present invention.
Claims (18)
1. a kind of alarm controller temporal information recording method characterized by comprising
Step 1, alarm controller booting after, processor read first memory in first time information, and by this first
Temporal information is as unused time information；Judge whether the time format of the unused time information is correct, as the unused time believes
The time format of breath is incorrect, prompts the clock that the clock chip is arranged, and the time format such as the unused time information is correct,
It is stored after label shutdown code to second memory before the unused time information；
Step 2, which reads the second temporal information in the first memory；Judge the when layout of second temporal information
Whether formula is correct；The time format of such as second temporal information is correct, using second temporal information as available machine time information,
It is stored after label booting code to the second memory before the available machine time information；Such as the time format of second temporal information is not
Correctly, then the clock that the clock chip is set is prompted；
Step 3, which reads the clock chip third temporal information and judges whether clock chip operation is normal；When this
When clock chip normal operation, exported the third temporal information as present clock information, and in the first memory memory
Store up the third temporal information；When the clock chip is operating abnormally, the clock chip is prompted to be operating abnormally.
2. alarm controller temporal information recording method as described in claim 1, which is characterized in that in the first memory
The first memory block and the second memory block are opened up, the operation flowing water labelled notation of a byte is formed into information group before temporal information
It closes, which is 0, and every to store primary information combination, which adds 1, and recycling from 0 to 2n-1 makes
With wherein n is positive integer；It successively stores the information that the operation serial number is odd number and is combined in first memory block, successively store
The operation serial number is that the information of even number is combined in second memory block.
3. alarm controller temporal information recording method as described in claim 1, which is characterized in that when temporal information is full simultaneously
The sufficient year is between 0~99, month be between 1~12, Time of Day is between 1~31, when the time be between 0~23, point
Time is between 0~59, when time second is between 0~59, it is believed that the temporal information meets time format.
4. alarm controller temporal information recording method as claimed in claim 1 or 3, which is characterized in that when the temporal information
Time format is not met, prompts the clock that the clock chip is set, and enter clock setting state；The newly-installed time should lag
In the last available machine time and unused time, otherwise continue that clock is arranged.
5. alarm controller temporal information recording method as claimed in claim 1 or 2, which is characterized in that step 1 is further wrapped
It includes:
The information combination that the first memory block and the second memory block are stored in alarm controller the last time shutdown is read respectively,
With the temporal information in the preceding information combination of operation serial number, as first time information.
6. alarm controller temporal information recording method as described in claim 1, which is characterized in that step 2 further comprises:
The temporal information for reading clock chip when this booting of the alarm controller, as the second temporal information.
7. alarm controller temporal information recording method as claimed in claim 1 or 3, which is characterized in that step 3 is further wrapped
It includes:
The temporal information of the clock chip after reading this booting of the alarm controller, as third temporal information；Base is set
Quasi- data initial value is 60, and the second data of the primary third temporal information is read at every t seconds, is compared with the reference data
Compared with to identify the time state of the temporal information；If the second data and the reference data are unequal, with the second data to this
Reference data is covered, then judges whether the third temporal information meets time format, is met the time format and is then continued to know
Other time state does not meet the time format and then enters clock setting state；If the second data is equal with the reference data,
The second data does not refresh in t seconds, which exception occurs, and the processor shows the clock on the display at this time
The prompt that chip is operating abnormally, wherein 1 < t < 60.
8. a kind of temporal information recording device of alarm controller characterized by comprising
One unused time information logging modle, for after alarm controller booting, processor to read the in first memory
One temporal information, and using the first time information as unused time information；Judging the time format of the unused time information is
No correct, the time format such as the unused time information is incorrect, the clock that the clock chip is arranged is prompted, such as the unused time
The time format of information is correct, stores after label shutdown code to second memory before the unused time information；
One available machine time information logging modle reads the second temporal information in the first memory for the processor；Judgement
Whether the time format of second temporal information is correct；Believe using correct second temporal information of time format as the available machine time
Breath stores after label booting code to the second memory before the available machine time information；Such as second temporal information is not met
The time format prompts the clock that the clock chip is arranged.
One current time information logging modle, when for reading the clock chip third temporal information from the processor and judge this
Whether the operation of clock chip is normal；It is when the clock chip normal operation, the third temporal information is defeated as present clock information
Out, and in the first memory third temporal information is stored；When the clock chip is operating abnormally, the clock chip is prompted
It is operating abnormally.
9. temporal information recording device as claimed in claim 8, which is characterized in that the first storage inside the clock chip
The first memory block of setting and the second memory block, form information for the operation flowing water labelled notation of a byte before temporal information in device
Combination, the operation serial number initial value are 0, every to store primary information combination, which adds 1, are recycled from 0 to 2n-1
It uses, wherein n is positive integer；It successively stores the information that the operation serial number is odd number and is combined in first memory block, successively deposit
It stores up the information that the operation serial number is even number and is combined in second memory block.
10. temporal information recording device as described in claim 1, which is characterized in that the time format be 0~99 the year
Between, month between 1~12, Time of Day is between 1~31, when the time be between 0~23, between 0~59 between timesharing,
Time second is between 0~59.
11. the temporal information recording method as described in claim 8 or 10, which is characterized in that when the temporal information is not met
Between format, prompt be arranged the clock chip clock, and enter clock setting state；The newly-installed time should lag behind nearest one
Otherwise secondary available machine time and unused time continue that clock is arranged.
12. temporal information recording device as claimed in claim 8 or 9, which is characterized in that the unused time information records mould
Block further comprises: reading the storage in alarm controller the last time shutdown of the first memory block and the second memory block respectively
Information combination, with the temporal information in the preceding information combination of operation serial number, as first time information.
13. temporal information recording device as claimed in claim 8, which is characterized in that the available machine time information logging modle, into
One step includes: the temporal information of clock chip when reading this booting of the alarm controller, as the second temporal information.
14. temporal information recording device as claimed in claim 8 or 9, which is characterized in that the current time information records mould
Block further comprises:
The temporal information of the clock chip after reading this booting of the alarm controller, as third temporal information；Base is set
Quasi- data initial value is 60, and the second data of the primary third temporal information is read at every t seconds, is compared with the reference data
Compared with to identify the time state of the temporal information；If the second data and the reference data are unequal, with the second data to this
Reference data is covered, then judges whether the third temporal information meets time format, is met the time format and is then continued to know
Other time state does not meet the time format and then enters clock setting state；If the second data is equal with the reference data,
The second data does not refresh in t seconds, which exception occurs, and the processor shows the clock on the display at this time
The prompt that chip is operating abnormally, wherein 1 < t < 60.
15. a kind of alarm, which is characterized in that including any one temporal information recording device in claim 8-14.
16. a kind of alarm, comprising: be arranged power circuit inside housings, clock control circuit, processor, memory with
And program controling module, which is characterized in that the clock control circuit uses the clock chip with backup power source input function,
And device is connect with the program controling module and memory respectively through this process；Described program control module includes claim 8-
Any one temporal information recording device in 14.
17. alarm as claimed in claim 16, it is characterised in that:
The main power source of the power circuit is connect with the first power input port of the clock chip, for providing for the clock chip
Power supply；
Reserce cell during the clock chip is self-powered is connect, for working as with the second source input port of the clock chip
Power supply is provided when the main power source is closed for the clock chip.
18. alarm as claimed in claim 16, it is characterised in that: further include the display module being arranged on shell, this is aobvious
Show the prompt that module shows that output port is connect, when for showing temporal information and the clock chip operation irregularity with the processor
Information, and operation display interface is provided for clock setting.
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| CN201710833321.3A CN109508281A (en) | 2017-09-15 | 2017-09-15 | Alarm controller temporal information records system |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201710833321.3A CN109508281A (en) | 2017-09-15 | 2017-09-15 | Alarm controller temporal information records system |
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Application publication date: 20190322 |