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CN109461815A - A kind of organic non-volatile memory device and preparation method thereof - Google Patents

A kind of organic non-volatile memory device and preparation method thereof Download PDF

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Publication number
CN109461815A
CN109461815A CN201811210181.5A CN201811210181A CN109461815A CN 109461815 A CN109461815 A CN 109461815A CN 201811210181 A CN201811210181 A CN 201811210181A CN 109461815 A CN109461815 A CN 109461815A
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Prior art keywords
memory device
layer
volatile memory
organic
thickness
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CN201811210181.5A
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陆旭兵
何惠欣
许文超
何宛兒
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Zhaoqing South China Normal University Optoelectronics Industry Research Institute
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Zhaoqing South China Normal University Optoelectronics Industry Research Institute
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10Organic polymers or oligomers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having potential barriers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/60Organic compounds having low molecular weight
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Materials Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Semiconductor Memories (AREA)

Abstract

The present invention relates to a kind of organic non-volatile memory devices and preparation method thereof.The organic non-volatile memory device successively includes bottom gate thin film, silicon dioxide blocking layer, organic polymer α-methylstyrene accumulation layer, small organic molecule pentacene active layer and metal source and drain electrodes from bottom to up;The silicon dioxide blocking layer with a thickness of 50 ~ 100 nm, the organic polymer α-methylstyrene accumulation layer with a thickness of 8 ~ 20nm, the small organic molecule pentacene active layer with a thickness of 30 ~ 50nm.The present invention selects silica as barrier layer, organic polymer α-methylstyrene is as accumulation layer, small organic molecule pentacene is as active layer, and the organic non-volatile memory device preferably obtained to its thickness and growth temperature has good bipolarity storage characteristics, it is stored in information, the fields such as flexible electronic are with a wide range of applications.

Description

A kind of organic non-volatile memory device and preparation method thereof
Technical field
The invention belongs to flexible organic electric technical fields, and in particular to a kind of organic non-volatile memory device and its Preparation method.
Background technique
Organic non-volatile memory is a part important in organic electronic device, especially between last decade, is based on The charge trap-type memory of polymer electret material has obtained more quickly development.It is compared to and uses metal nano Grain floating gate type or ferroelectric polymers type memory, polymer electret type memory have better stability, repeatability and Simple preparation process.It was noted that some memory devices using unipolarity organic semiconductor as active layer are shown Good bipolarity storage characteristics;There are also captures and release that some memory devices only show minority carrier.For this A little phenomenons, it is believed that on the one hand this and organic semiconductor/polymer electret interface potential barrier and polymer electret sheet The property at the charge-trapping center of body has relationship;On the other hand, the transport behavior of the minority carrier in organic semiconductor and defeated Transport mechanism has great influence.In conclusion systematically probing into influence of the transport behavior of minority carrier to storage performance is It is highly desirable, this will deepen our understanding to the working principle of memory device, also will be realization low-work voltage, Gao Ke Memory device by property provides thinking.
Therefore, a kind of transport behavior of minority carrier, and the polymer with preferable bipolarity storage characteristics are developed Electret type memory has important research significance and application value.
Summary of the invention
The purpose of the present invention is to overcome the defects in the prior art and insufficient, provides a kind of organic non-volatile memory Part.Organic non-volatile memory device provided by the invention selects silica as barrier layer, organic polymer Alpha-Methyl benzene As accumulation layer, small organic molecule pentacene preferably obtains its thickness organic non-volatile ethylene as active layer Property memory device have good bipolarity storage characteristics, information store, the fields such as flexible electronic have a wide range of applications Prospect.
Another object of the present invention is to provide the preparation methods of above-mentioned organic non-volatile memory device.
For achieving the above object, the present invention adopts the following technical scheme:
A kind of organic non-volatile memory device successively includes bottom gate thin film, silicon dioxide blocking layer, organic from bottom to up Polymer α-methylstyrene accumulation layer, small organic molecule pentacene active layer and metal source and drain electrodes;The silica resistance Barrier with a thickness of 50~100nm, the organic polymer α-methylstyrene accumulation layer with a thickness of 8~20nm, it is described to have Machine small molecule pentacene active layer with a thickness of 30~50nm.
The present inventor passes through repeatedly the study found that selecting silica as barrier layer, organic polymer α-first As accumulation layer, small organic molecule pentacene preferably obtain as active layer, and to its thickness and growth temperature base styrene The organic non-volatile memory device arrived has good bipolarity storage characteristics, this is primarily due to barrier layer and accumulation layer The size of thickness effect effective electric field, the thickness and growth temperature of active layer will lead to the size of mobility.Such as the thickness of active layer Degree is too big, and mobility change is little, leads to the wasting of resources;Thickness is too small, can not be paved with whole surface, mobility is caused to reduce; And the growth temperature of active layer is excessive or too small to the decline that will lead to mobility.
It should be understood that the bottom gate thin film of organic non-volatile memory device field routine, source-drain electrode are used equally for In the present invention, bottom gate thin film, source-drain electrode thickness also can be selected this field routine thickness.
Preferably, the bottom gate thin film is one of silicon, gold, silver or aluminium.
It is further preferable that the bottom gate thin film is P (100) silicon of heavy doping.
P (100) silicon of heavy doping is conducive to the addition of voltage, and structural stability is good, and cost is relatively low.
Preferably, the source-drain electrode is one of copper, gold, silver or aluminium.
It is further preferable that the source-drain electrode is copper source drain electrode.
Copper source drain electrode is at low cost, and preferable in surface hardness, not easy to scratch, and Yi Zhazhen is conducive to stable testing.
Preferably, the silicon dioxide blocking layer with a thickness of 50nm.
Preferably, the organic polymer α-methylstyrene accumulation layer with a thickness of 12nm.
Preferably, the small organic molecule pentacene active layer with a thickness of 40nm.
To silicon dioxide blocking layer, organic polymer α-methylstyrene accumulation layer or small organic molecule pentacene active layer Thickness carry out preferably, can further promote the bipolarity storage characteristics of organic non-volatile memory device.
The preparation method of organic non-volatile memory device, includes the following steps:
S1: selecting the bottom gate thin film for having grown silicon dioxide blocking layer, carries out UV/O to silicon dioxide blocking layer3It lives Change;
S2: obtaining spin coating poly alpha methylstyrene solution on barrier layer in silica, at 40~150 DEG C anneal 5~ 15min obtains organic polymer α-methylstyrene accumulation layer;
S3: pentacene is deposited in organic polymer α-methylstyrene accumulation layer and obtains active layer;
S4: deposited metal obtains metal source and drain electrodes on active layer.
It is preparation method simple process mild condition provided by the invention, at low cost.
The of the invention signified bottom gate thin film for having grown silicon dioxide blocking layer either commercialization product, can also be with Selection grows silicon dioxide blocking layer in bottom gate thin film.
Preferably, UV/O described in S13The process of surface activation process is the silicon dioxide blocking layer apart from ultraviolet 1~the 10min of ultraviolet light for the use of wavelength being 185~245nm at 10~40cm of lamp.
Preferably, in poly alpha methylstyrene solution described in S2 poly alpha methylstyrene mass concentration be 0.05~ 0.5%.
Preferably, the process of deposition described in S3 is to be deposited with the rate of 0.01~0.05nm/s, when deposition described in The temperature of organic polymer α-methylstyrene accumulation layer is 50~120 DEG C.
Application of the above-mentioned memory device in information storage and flexible electronic field is also within the scope of the present invention.
Compared with prior art, the invention has the following beneficial effects:
The present invention selects silica as barrier layer, and organic polymer α-methylstyrene is as accumulation layer, You Ji little Molecule pentacene is as active layer, and the organic non-volatile memory device preferably obtained to its thickness has good pair Polarity storage characteristics is stored in information, and the fields such as flexible electronic are with a wide range of applications.
Detailed description of the invention
Fig. 1 is bottom gate thin film/silicon dioxide blocking layer/organic polymer Alpha-Methyl benzene second that the embodiment of the present invention 1 provides The signal of alkene accumulation layer/small organic molecule pentacene active layer/metal source and drain electrodes structure organic non-volatile memory device Figure;
Fig. 2 is the relationship that the memory device that the embodiment of the present invention 3,7 and 8 provides scans back and forth number and threshold voltage shift Figure;
Fig. 3 is the relational graph that the memory device that Examples 1 to 7 provides scans back and forth number and threshold voltage shift;
Fig. 4 is the channel resistance for the memory device that embodiment 3 provides, contact resistance, between " MVSC " and grain size Relational graph;
Fig. 5 is that the memory window for the memory device that embodiment 3,7 and 8 provides compares.
Specific embodiment
Below with reference to embodiment, the present invention is further explained.These embodiments are merely to illustrate the present invention rather than limitation The scope of the present invention.Test method without specific conditions in lower example embodiment usually according to this field normal condition or is pressed The condition suggested according to manufacturer;Used raw material, reagent etc., unless otherwise specified, being can be from the business such as conventional market The raw materials and reagents that approach obtains.The variation for any unsubstantiality that those skilled in the art is done on the basis of the present invention And replacement belongs to scope of the present invention.
Embodiment 1~18 and comparative example 1
The present embodiment provides a kind of organic non-volatile memory device, such as Fig. 1 successively includes that bottom gate is electric from top to bottom, 1, Silicon dioxide blocking layer 2, organic polymer α-methylstyrene accumulation layer 3, small organic molecule pentacene active layer 4 and source metal Drain electrode 5.
The organic non-volatile memory device the preparation method is as follows:
S1: substrate cleaning and processing
The bottom gate thin film (P (100) silicon wafer of heavy doping) for having certain thickness silicon dioxide layer of 15 × 15mm is chosen, is used Acetone, isopropanol and deionized water successively clean 5min, according to twice of this sequence cleaning, finally with sample existing after being dried with nitrogen The ultraviolet light 5min for the use of wavelength being 220nm at ultraviolet lamp 10cm.
S2: preparation accumulation layer
Poly alpha methylstyrene is dissolved in the poly alpha methylstyrene solution that certain mass concentration C is made into toluene, two Silicon oxide layer surface spin coating poly alpha methylstyrene solution film forming, 40-80-120 DEG C of ladder-elevating temperature, heating rate be 2.5 DEG C/ Min, then poly alpha methylstyrene film is made as accumulation layer after carrying out annealing 5min at 120 DEG C.
S3: active layer is prepared
Sample obtained by step S2 (is sequentially laminated with silica layer insulating and poly alpha methylstyrene in bottom gate thin film Accumulation layer) T (50~120 DEG C) are heated to, use thermal evaporation on poly alpha methylstyrene film with 0.01~0.05nm/s Rate deposit certain thickness pentacene thin film as active layer.
S4: source-drain electrode is prepared
Use thermal evaporation in pentacene thin film using the metal electrode of the rate deposition 50nm thickness of 0.02nm/s as source Drain electrode.
The preparation method of comparative example 1 is similar with embodiment.
Specifically, the structure composition and preparation condition of each embodiment and comparative example such as the following table 1.
The structure composition and preparation condition of 1 embodiment 1~18 of table
The storage characteristics for the memory device that embodiment 1~18 provides is tested.
Such as Fig. 2, the relational graph of number and threshold voltage shift is scanned back and forth for the memory device that embodiment 3,7 and 8 provides. It can be seen that active layer carries out the organic non-volatile memory device that thermal evaporation obtains at various temperatures all to be had preferably Write efficiency, wherein the write efficiency highest of embodiment 3, scans back and forth number 1 time write-in, and device just shows double well Polarity storage characteristics.It secondly is embodiment 8 and embodiment 7.
Such as Fig. 3, the relational graph of number and threshold voltage shift is scanned back and forth for the memory device that embodiment 3 provides.From figure In it is found that each embodiment provide organic non-volatile memory device all there is preferable write efficiency, wherein working as source-drain electrode Between the channel length that is formed more in short-term, scan back and forth that number is fewer, device just shows better bipolarity storage characteristics. Similarly, embodiment 1~18 all exists with similar effect.
It is channel resistance, contact resistance, the relational graph between " MVSC " and grain size such as Fig. 4.From fig. 4, it can be seen that The change of active layer growth temperature will lead to the generation of certain law, such as active layer crystal grain is bigger, and mobility is bigger, channel Resistance and contact resistance are smaller, reach that the scanned back and forth number of full open position is fewer, and window is also bigger.
Table 4 is corresponding numerical value.From Fig. 4 and table 2 it is found that crystal grain is bigger, mobility is bigger, channel resistance and contact resistance It is smaller, reach that the scanned back and forth number of full open position is fewer, and window is also bigger.
It is that the memory window for the memory device that embodiment 3,7 and 8 provides compares such as Fig. 5.It is stored with field effect transistor cast Unlike device, the capacitive memory device that these embodiments provide almost memory window having the same.Flat-band voltage (Vfb) can be deviated toward positive and negative two voltage directions, show extraordinary bipolarity memory characteristics, similarly, embodiment 1- 18 all exist with similar effect.This means that capacitive memory device can be injected in enough minority carrier electronics In P α MS.Therefore, minority carrier electronics transporting in vertical direction is not limited.
As a comparison, it under room temperature environment, using Agilent B1500A high-precision semiconductor analyzer prepared by comparative example 1 Memory device also tested.As a result, it has been found that comparative example 1 is unfavorable for active layer crystal grain since silicon dioxide blocking layer is too thick Grow up, need scan back and forth number become it is more, memory window is smaller.
To sum up, memory device provided by the invention shows good bipolarity storage characteristics.
The embodiments described above only express several embodiments of the present invention, and the description thereof is more specific and detailed, but simultaneously It cannot therefore be construed as limiting the scope of the patent.It should be pointed out that coming for those of ordinary skill in the art It says, without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection of the invention Range.

Claims (10)

1. a kind of organic non-volatile memory device, which is characterized in that from bottom to up successively include bottom gate thin film, silica resistance Barrier, organic polymer α-methylstyrene accumulation layer, small organic molecule pentacene active layer and metal source and drain electrodes;Described two Silica barrier layer with a thickness of 50 ~ 100nm, the organic polymer α-methylstyrene accumulation layer with a thickness of 8 ~ 20nm, The small organic molecule pentacene active layer with a thickness of 30 ~ 50nm.
2. organic non-volatile memory device according to claim 1, which is characterized in that the bottom gate thin film is silicon, gold, silver Or one of aluminium.
3. organic non-volatile memory device according to claim 2, which is characterized in that the bottom gate thin film is heavy doping P(100) silicon.
4. organic non-volatile memory device according to claim 1, which is characterized in that the source-drain electrode is copper, gold, silver Or one of aluminium.
5. organic non-volatile memory device according to claim 1, which is characterized in that the thickness of the silicon dioxide blocking layer Degree is 50 nm.
6. organic non-volatile memory device according to claim 1, which is characterized in that the organic polymer Alpha-Methyl benzene Ethylene accumulation layer with a thickness of 12nm.
7. organic non-volatile memory device according to claim 1, which is characterized in that the small organic molecule pentacene has Active layer with a thickness of 40nm.
8. the preparation method of any organic non-volatile memory device of claim 1 ~ 7, which is characterized in that including walking as follows It is rapid:
S1: selecting the bottom gate thin film for having grown silicon dioxide blocking layer, carries out UV/O to silicon dioxide blocking layer3It is activated;
S2: obtaining spin coating poly alpha methylstyrene solution on barrier layer in silica, and the 5 ~ 15min that anneals at 40 ~ 150 DEG C must have Machine polymer α-methylstyrene accumulation layer;
S3: pentacene is deposited in organic polymer α-methylstyrene accumulation layer and obtains active layer;
S4: deposited metal obtains metal source and drain electrodes on active layer.
9. preparation method according to claim 8, which is characterized in that poly- α-first in poly alpha methylstyrene solution described in S2 The mass concentration of base styrene is 0.05 ~ 0.5%.
10. preparation method according to claim 8, which is characterized in that the process of deposition described in S3 is with 0 .01 ~ 0 .05 the rate of nm/s is deposited, when deposition the temperature of the organic polymer α-methylstyrene accumulation layer be 80 ~ 120 ℃。
CN201811210181.5A 2018-10-17 2018-10-17 A kind of organic non-volatile memory device and preparation method thereof Pending CN109461815A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110518119A (en) * 2019-08-21 2019-11-29 华南师范大学 A kind of flexible organic non-volatile memory device and its preparation method and application preparing lanthana dielectric layer based on solwution method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140061763A1 (en) * 2012-09-05 2014-03-06 Misako Morota Nonvolatile semiconductor memory device and method of manufacturing the same
CN104409633A (en) * 2014-10-31 2015-03-11 南京邮电大学 Organic film transistor and manufacturing method thereof
CN105591029A (en) * 2016-03-24 2016-05-18 华南师范大学 Organic non-volatile memory device based on high K materials and preparation method thereof

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140061763A1 (en) * 2012-09-05 2014-03-06 Misako Morota Nonvolatile semiconductor memory device and method of manufacturing the same
CN104409633A (en) * 2014-10-31 2015-03-11 南京邮电大学 Organic film transistor and manufacturing method thereof
CN105591029A (en) * 2016-03-24 2016-05-18 华南师范大学 Organic non-volatile memory device based on high K materials and preparation method thereof

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
KANG-JUN BAEG, ET AL.: "Organic Non-Volatile Memory Based on Pentacene Field-Effect Transistors Using a Polymeric Gate Electret", 《ADVANCED MATERIALS》 *

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110518119A (en) * 2019-08-21 2019-11-29 华南师范大学 A kind of flexible organic non-volatile memory device and its preparation method and application preparing lanthana dielectric layer based on solwution method

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