CN109244083A - Show backboard and its manufacturing method, display panel and wearable device - Google Patents
Show backboard and its manufacturing method, display panel and wearable device Download PDFInfo
- Publication number
- CN109244083A CN109244083A CN201811034142.4A CN201811034142A CN109244083A CN 109244083 A CN109244083 A CN 109244083A CN 201811034142 A CN201811034142 A CN 201811034142A CN 109244083 A CN109244083 A CN 109244083A
- Authority
- CN
- China
- Prior art keywords
- data line
- switch unit
- layer
- electrode
- group
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 61
- 239000010410 layer Substances 0.000 claims description 173
- 238000004020 luminiscence type Methods 0.000 claims description 24
- 239000004065 semiconductor Substances 0.000 claims description 24
- 239000010408 film Substances 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims description 11
- 239000011229 interlayer Substances 0.000 claims description 7
- 239000010409 thin film Substances 0.000 claims description 5
- 238000010586 diagram Methods 0.000 description 14
- 238000000034 method Methods 0.000 description 14
- 239000011248 coating agent Substances 0.000 description 11
- 238000000576 coating method Methods 0.000 description 11
- 238000000151 deposition Methods 0.000 description 10
- 230000008021 deposition Effects 0.000 description 10
- 238000004544 sputter deposition Methods 0.000 description 10
- 239000000463 material Substances 0.000 description 8
- 230000003071 parasitic effect Effects 0.000 description 8
- 238000000059 patterning Methods 0.000 description 8
- 230000008569 process Effects 0.000 description 8
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 6
- 230000001276 controlling effect Effects 0.000 description 6
- 230000000875 corresponding effect Effects 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 230000008859 change Effects 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 239000011777 magnesium Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 239000000377 silicon dioxide Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 241001062009 Indigofera Species 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000003044 adaptive effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002596 correlated effect Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000003760 hair shine Effects 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical group O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 239000010453 quartz Substances 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000012163 sequencing technique Methods 0.000 description 1
- 230000008054 signal transmission Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
- 210000000707 wrist Anatomy 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The present invention provides a kind of display backboard and its manufacturing methods, display panel and wearable device, belong to panel manufacturing field.It include: underlay substrate;TFT structure layer and first electrode layer on underlay substrate, first electrode layer include n data line and multiple first electrodes, and n data line includes k number according to line group, and each data line group includes m data line, k=n/m;According to terminal and m control terminal, each data terminal is connect k number on the bonding region of the non-display area of underlay substrate with a data line group;The n switch unit on underlay substrate, n switch unit is connected with n data line one-to-one correspondence, n switch unit includes m group switch unit, and every group of switch unit includes k switch unit, and k switch unit is connect with k number according to a data line in line group respectively;Each control terminal is connect by a control line with one group of switch unit.The present invention realizes the narrow frame of round display panel.
Description
Technical field
The present invention relates to panel manufacturing field, in particular to a kind of display backboard and its manufacturing method, display panel and can
Wearable device.
Background technique
Current round display panel includes cover board and display backboard, and display backboard includes that underlay substrate and multiple films are brilliant
Body pipe (English: Thin Film Transistor;Referred to as: TFT), there is circular display area on underlay substrate, and surround
The non-display area of the annular of display area, multiple TFT are located on the display area of underlay substrate.
The non-display area of above-mentioned underlay substrate includes bonding (English: Bonding) region, multiple TFT and multiple data
Line is correspondingly connected with, and multiple data lines are by being located at one-to-one multiple data terminals and flexible circuit board in the bonding region
(English: Flexible Printed Circuit;Abbreviation FPC) electrical connection.
In current round display panel, due to the limitation of technique, width is difficult to reduce in bonding region, and due to number
More according to the quantity of terminal, the length in the bonding region is also longer, and the bonding region formed in this way is similar to rectangle, causes final
The display panel of formation is actually approximately round display panel, it is difficult to realize the narrow frame of round display panel.
Summary of the invention
The embodiment of the invention provides a kind of display backboard and its manufacturing methods, display panel and wearable device, realize
Under the premise of guaranteeing that each sub-pixel effectively charges, the narrow frame of round display panel, the technical solution is as follows:
In a first aspect, providing a kind of display backboard, comprising:
Underlay substrate, the underlay substrate have circular display area, and around the display area annular
Non-display area;
Thin film transistor (TFT) TFT structure layer on the underlay substrate, the TFT structure layer include the grid of mutually insulated
Pole figure shape, source-drain electrode figure and semiconductor active layer pattern;
First electrode layer on the TFT structure layer, the first electrode layer include n data line of same layer arrangement
And multiple first electrodes, the first electrode are one in cathode and anode, n is the integer greater than 1, the n data
Line includes k number according to line group, and each data line group includes the m data lines, and m is the integer greater than 1, k=n/m, and k
For positive integer;
K number on the bonding region of the non-display area of the underlay substrate is according to terminal, each data terminal
Son is connect with a data line group;
The n switch unit on the underlay substrate, the n switch unit and the n data line one are a pair of
It should connect, the n switch unit includes m group switch unit, and every group of switch unit includes k switch unit, the k switch
Unit is connect with the k number according to a data line in line group respectively;
The m control terminal on the bonding region, each control terminal pass through a control line and one group
Switch unit connection, for controlling the opening and closing of one group of switch unit.
Optionally, buffer layer is provided on the underlay substrate;
The TFT structure layer includes along the semiconductor active layer figure being sequentially overlapped far from the underlay substrate direction
Shape, the first insulating layer, gate patterns, second insulating layer, interlayer insulating film, the source-drain electrode figure and flatness layer.
Optionally, the semiconductor active layer pattern further includes multiple conductor wires, the multiple conductor wire and the k number
It is connected according to terminal,
The source-drain electrode figure further include: n conducting block, the n conducting block pass through the second via hole and the n conduction
Line connection;
The n data line connect by third via hole with the multiple conducting block, with pass through the multiple conducting block with
The multiple conductor wire is connect with the k number according to terminal.
Optionally, the display backboard further include:
Pixel defining layer in first electrode layer;
Luminescent layer in the pixel defining layer;
The second electrode lay on the luminescent layer, the second electrode lay include multiple second electrodes, and described second
Electrode is different from the first electrode polarity.
Optionally, the luminescent layer includes multiple luminescence units of rectangular arrangement, and each luminescence unit includes: red hair
Light block, green emitting block and blue-light-emitting block, the emitting red light block and the green emitting block are arranged along column direction, the indigo plant
Color light-emitting block is located at the side of the emitting red light block and the green emitting block column,
The n data line includes the first data line for driving emitting red light block luminous, for driving green emitting
The second luminous data line of block, and the third data line for driving blue-light-emitting block luminous,
Every two adjacent first data line and the second data line bit are described in the first gap location in a column luminescence unit
Gap of first gap between the emitting red light block and the green emitting block column and blue-light-emitting block, each third
Gap location of the data line bit between two column luminescence units.
Optionally, the first electrode is anode, and the second electrode is cathode, and the switch unit is TFT.
Second aspect provides a kind of display panel, comprising: first aspect any the display backboard and cover board, institute
Cover board is stated to be arranged on the display backboard.
The third aspect provides a kind of wearable device, comprising: display panel described in second aspect and shell, it is described
Shell is for accommodating the display panel.
Optionally, the wearable device be watch or bracelet, the wearable device further includes bandage, the bandage with
The shell connection.
Fourth aspect provides a kind of manufacturing method for showing backboard, comprising:
One underlay substrate is provided, there is circular display area, and surround the display area on the underlay substrate
Annular non-display area;
Thin film transistor (TFT) TFT structure layer is formed on the display area of the underlay substrate, the TFT structure layer includes phase
Gate patterns, source-drain electrode figure and the semiconductor active layer pattern mutually to insulate;
First electrode layer is formed on the TFT structure layer, the first electrode layer includes n data line of same layer arrangement
And multiple first electrodes, the first electrode are one in cathode and anode, n is the integer greater than 1, the n data
Line includes k number according to line group, and each data line group includes the m data lines, and m is the integer greater than 1, k=n/m, and k
For positive integer;
Wherein, k number is also formed on the underlay substrate according to terminal, n switch unit and m control terminal, the k
A data terminal and m control terminal are located at the bonding region of non-display area, each data terminal and a number
It is connected according to line group, the n switch unit is connected with n data line one-to-one correspondence, and the n switch unit includes m group
Switch unit, every group of switch unit include k switch unit, and the k switch unit is respectively with the k number according in line group
One data line connection, each control terminal is connect by a control line with one group of switch unit, described for controlling
The opening and closing of one group of switch unit.
Display backboard provided in an embodiment of the present invention and its manufacturing method, display panel and wearable device, due to being pushed away 1
More MUX are applied in display backboard, and by multiple data lines and the same layer arrangement of first electrode, manage in each data terminal more
While a data line, reduce the load on each data line, therefore, in the premise for guaranteeing that each sub-pixel effectively charges
Under, the length in bonding region is shortened, to realize the narrow frame of round display panel.
It should be understood that the above general description and the following detailed description are merely exemplary, this can not be limited
Invention.
Detailed description of the invention
In order to illustrate more clearly of the embodiment of the present invention, attached drawing needed in embodiment description will be made below
Simply introduce.It should be evident that drawings in the following description are only some embodiments of the invention, it is common for this field
For technical staff, without creative efforts, it is also possible to obtain other drawings based on these drawings.
Fig. 1 is the overlooking structure diagram for the round display panel that an illustrative examples provide.
Fig. 2 is a kind of cross section structure schematic diagram for showing backboard provided in an embodiment of the present invention.
Fig. 3 is the wire connection structure schematic diagram in a kind of display backboard provided by the invention.
Fig. 4 is the cross section structure schematic diagram of a traditional display backboard.
Fig. 5 is the structural schematic diagram of another display backboard provided in an embodiment of the present invention.
Fig. 6 is the structural schematic diagram of another display backboard provided in an embodiment of the present invention.
Fig. 7 is a kind of overlooking structure diagram for showing backboard provided in an embodiment of the present invention.
Fig. 8 is a kind of manufacturing method flow chart for showing backboard provided in an embodiment of the present invention.
Fig. 9 is the manufacturing method flow chart of another display backboard provided in an embodiment of the present invention.
The drawings herein are incorporated into the specification and forms part of this specification, and shows and meets implementation of the invention
Example, and be used to explain the principle of the present invention together with specification.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below in conjunction with attached drawing to the present invention make into
One step it is described in detail.
Referring to FIG. 1, Fig. 1 is the overlooking structure diagram for the round display panel that an illustrative examples provide, at present
The manufacturing objective of round display panel be closer to round better, to realize its narrow frame, and due to the shape in its bonding region
Shape limitation, radius of the round display panel at the bonding region are greater than the radius in other regions.As shown in Figure 1, round display
Panel have circular display area and around the display area annular non-display area, round display panel maximum half
Diameter is the length of D+B, wherein D is the radius of display area, and B is the maximum width of non-display area, maximum width B and nation
The length C and width A for determining region are positively correlated.Currently, limitation of the bonding region due to technique, width A are difficult to reduce, and by
More in the quantity of data terminal, multiple data lines in multiple data terminal and display area correspond, and need for phase
The data line answered provides data-signal, and therefore, in order to accommodate multiple data terminal, the length in the bonding region is longer, in this way
The bonding region of formation is similar to rectangle, then the maximum width of non-display area is also longer, and therefore, it is difficult to realize round display surface
The narrow frame of plate, leading to finally formed display panel is actually approximately round display panel as shown in Figure 1.
The embodiment of the invention provides a kind of display backboards 1, as shown in Fig. 2, Fig. 2 is one kind provided in an embodiment of the present invention
Show the cross section structure schematic diagram of backboard 1, which includes:
Underlay substrate 10, the TFT structure layer 11 on underlay substrate 10, and first on TFT structure layer 11
Electrode layer 12.
The underlay substrate 10 has circular display area, and the non-display area of the annular around display area,
The top view of the underlay substrate 10 can refer to the top view of the round display panel in above-mentioned Fig. 1, aobvious in the underlay substrate
Show that region is consistent with round display panel with non-display area, the embodiment of the present invention repeats no more this.
Exemplary, which can be transparent substrate, and further, which can be using glass, stone
English, transparent resin etc. have made of the leaded light of certain robustness and nonmetallic materials, and it is not limited in the embodiment of the present invention.
Above-mentioned TFT structure layer 11 includes gate patterns 110, source-drain electrode figure 111 and the semiconductor active layer of mutually insulated
Figure 112.Wherein, semiconductor active layer pattern 112 can be made of polycrystalline silicon material.
Above-mentioned first electrode layer 12 includes the n data line 120 and multiple first electrodes 121 of same layer arrangement, the first electricity
Pole 121 is one in cathode and anode, that is to say it as cathode or anode, n is the integer greater than 1.
Fig. 3 is the wire connection structure schematic diagram in the display backboard 1, as shown in figure 3, the display backboard 1 further include:
According to terminal x, above-mentioned n data line 120 wraps k number on the bonding region of the non-display area of underlay substrate
It includes m data line that k number, which is included, according to line group y, a data line group y, and m is that the integer greater than 1, k=n/m, and k are positive integer.
Each data terminal is connect with a data line group.Wherein, in parallel between the data line in a data line group.
N switch unit 13 on underlay substrate 10, optionally, the n switch unit 13 are located at non-display area
On, it is shown to avoid the image influenced on display area, n switch unit 13 is connected with the n one-to-one correspondence of data line 120.The n
A switch unit 13 includes m group switch unit, and every group of switch unit includes k switch unit, and k switch unit is a with k respectively
Data line connection in data line group.Exemplary, above-mentioned switch unit is TFT, which can be with TFT structure layer
It manufactures simultaneously.
M control terminal (also referred to as MUX terminal) z on bonding region, each control terminal z pass through a control line
It is connect with one group of switch unit, for controlling the opening and closing of one group of switch unit.
Correspondingly, control integrated circuit (English: integrated circuit;Referred to as: IC) carried on the back by FPC and the display
Plate connection, control IC are configured as exporting multiple signals, and the signal of control IC output can be input to FPC, be transmitted to via FPC aobvious
Show in backboard, the signal of control IC output include k number it is believed that number and m control signal (also referred to as MUX switching signal), wherein
For FPC by the k number it is believed that number being transmitted to the k number one by one according to terminal x, m control signal is transmitted to the m control terminal one by one
z.It in display backboard in the turn-on time of every grid line, that is to say in the period for scanning a line sub-pixel, this m can be passed through and controlled
Terminal processed controls one group of switch unit that each control terminal is correspondingly connected with respectively and is connected in turn, so that the control for controlling IC be believed
Number data terminal is supplied to by data signal output, makes each data terminal by corresponding data line group y successively to one
Multiple adjacent subpixels in row provide data-signal, realize control IC in this way by a data terminal and drive multiple row
The structure of pixel.Wherein, since the structure is similar to multiple selector (English: Multiplexer;Structure referred to as: MUX),
Because referred to herein as 1 pushes away more MUX, 1 pushes away the ratio for being chiefly used in indicating a data terminal data line connected to it, such as 1 pushes away 3 fingers
It is that a data terminal connects 3 data lines, that is to say in above-mentioned 1 data line group there are 3 data lines.
In traditional display backboard, the data terminal in bonding region and the number of data line are equal, and implement in the present invention
In example, more MUX are pushed away by 1 and are applied in display backboard, since each data terminal can manage multiple data lines, can be with
The number of data terminal is reduced, so as to shorten the length in bonding region.
1 in display backboard pushes away in more MUX structures, and the ratio of data line and data terminal is higher, the sum of data terminal
It is fewer, correspondingly, the length in bonding region is also shorter.But the duration as needed for scanning every row sub-pixel is opposite
Fixed, when scanning every row sub-pixel, multiple data lines that each data terminal is connected are that successively data-signal is written
In corresponding sub-pixel, therefore, more for the data line quantity of each data terminal, connection, each data line is divided
Data-signal write-in duration it is shorter, cause each data terminal be corresponding sub-pixel charging duration shorten.It follows that
In the case where data terminal is less, need to guarantee to be that each sub-pixel completes effectively charging in shorter charging duration.
Referring to FIG. 4, Fig. 4 is the cross section structure schematic diagram of a traditional display backboard 2, which includes:
Underlay substrate 20, gate patterns 21, source-drain electrode figure 22, semiconductor active layer pattern on underlay substrate 20
23 and multiple storage capacitances 24, wherein source-drain electrode figure 22 includes multiple source electrodes 220, multiple drain electrodes 221 and multiple data
Line 222, each storage capacitance 24 include the electrode block 240 of two mutually insulateds.It can thus be seen that traditional display panel
In, multiple data lines 222 are arranged with source electrode 220 and 221 same layers of drain electrode, each data line on underlay substrate with other metal knots
Structure is easy to produce parasitic capacitance, and data line is closer at a distance from other metal structures, and parasitic capacitance is bigger, such as in Fig. 4, often
A data line is closer with two electrode blocks 240 of storage capacitance 24, and the parasitic capacitance of generation is larger.Biggish parasitic electricity
Hold the load increase that will lead to data line, and the size of the load on the charging duration of sub-pixel data line connected to it is at just
Than that is to say, load is bigger, and charging duration is longer, if simply pushing away more MUX applied in traditional display backboard for 1, is easy
Lead to each sub-pixel charging not exclusively, influences final image display effect.
Please continue to refer to above-mentioned Fig. 2, display backboard provided in an embodiment of the present invention, multiple data lines 120 and first electrode
121 same layers setting, due to multiple data lines 120 at a distance from each metal structure in TFT structure layer 11 farther out,
Parasitic capacitance caused by each data line is smaller, correspondingly, the load on data line is smaller, thereby may be ensured that when shorter
The interior effective charging for reaching sub-pixel.
As shown in figure 3, Fig. 3 is illustrated for showing that backboard pushes away 3MUX structure for 1, and in the display backboard, every number
It is 3 according to the data line number in a data line group of terminal connection, therefore, data line and data terminal in the display backboard
Ratio is 3:1, the charging duration of each sub-pixel shorten to the charging duration of the sub-pixel of traditional display backboard three/
One.At this point, using the structure of display backboard shown in Fig. 2, it is assumed that first electrode layer includes 480 data lines of same layer arrangement,
480 data lines include 160 data line groups, and each data line group includes 3 data lines, i.e. n=480, k=160, m=
3, then there are 160 data terminals on the bonding region of underlay substrate, 160 data terminals and 160 data line groups are one by one
It is correspondingly connected with.Correspondingly, have 480 switch units and 3 control terminals on underlay substrate, 480 switch units and 480
Data line corresponds series connection, which includes 3 groups of switch units, and every group of switch unit includes that 160 switches are single
Member, 3 control terminals connect one to one with 3 groups of switch units respectively, control the opening and closing of connected switch unit.
Using structure as shown in Figure 3, parasitic capacitance caused by each data line is smaller, correspondingly, on data line
Load is smaller, thereby may be ensured that the effective charging for reaching sub-pixel within a short period of time.In actual use, the embodiment of the present invention
The display backboard of offer can not only support that 1 pushes away 3MUX structure, and 1 can also be supported to push away 6MUX structure.It is few as far as possible in data terminal
In the case where, ensure that in shorter charging duration to be that each sub-pixel completes effectively charging.And the embodiment of the present invention mentions
The above structure of confession, parasitic capacitance of the parasitic capacitance that multiple data lines generate relative to tradition display backboard, it is possible to reduce
80% to 90%, the ratio of data line and data terminal shows backboard relative to tradition, can be improved 3 to 5 times, above-mentioned bonding area
The length in domain shows backboard relative to tradition, can reduce 2/5 to 4/5.
In conclusion display backboard provided in an embodiment of the present invention, is applied in display backboard due to pushing away more MUX for 1, and
And by multiple data lines and the same layer arrangement of first electrode, while each data terminal manages multiple data lines, reduce every
Therefore load on a data line under the premise of guaranteeing that each sub-pixel effectively charges, shortens the length in bonding region,
To realize the narrow frame of round display panel.
Further, referring to FIG. 5, Fig. 5 is the structural schematic diagram of another display backboard 1 provided in an embodiment of the present invention,
In the display backboard 1, buffer layer 14 is provided on underlay substrate 10, which may include silica and nitridation
On the one hand silicon plays buffer function to TFT, on the other hand can prevent the metal ion in underlay substrate, enter semiconductor
In active layer, the influence to TFT performance is avoided.
In the embodiment of the present invention, TFT structure layer includes multiple TFT, which can be top-gated TFT as shown in Figure 2,
It can be bottom gate TFT, it is not limited in the embodiment of the present invention.With continued reference to FIG. 5, when the TFT in TFT structure layer is top-gated
When TFT, TFT structure layer includes insulating along the semiconductor active layer pattern 112, first being sequentially overlapped far from 10 direction of underlay substrate
Layer 113, gate patterns 110, second insulating layer 114, interlayer insulating film 115, source-drain electrode figure 111 and flatness layer 116, source-drain electrode
Figure 111 includes multiple source electrode 111a and multiple drain electrode 111b, and gate patterns 110 include multiple grid 110a, semiconductor active
Layer pattern 112 has source block 112a including multiple, each has source block 112a to pass through the first via hole 117 and corresponding source electrode 111a and leakage
Pole 111b is separately connected.
Wherein, it shows that source electrode or drain electrode in each data line and source-drain electrode figure in backboard connect, is used for data
Signal is written in sub-pixel, and it is not limited in the embodiment of the present invention.
Optionally, multiple storage capacitances 15 are also provided in above-mentioned TFT structure layer.
Further, as shown in figure 5, semiconductor active layer pattern 112 further includes multiple conductor wire 112b, multiple conduction
Line 112b has the same layer arrangement of source block 112a with multiple, and multiple conductor wire 112b are connect with above-mentioned k number according to terminal x.
Source-drain electrode figure 111 further include: n conducting block 111c, the n conducting block 111c and multiple source electrode 111a and multiple
Drain the same layer arrangement of 111b, which is connect by the second via hole 118 with n conductor wire 112b.
Above-mentioned n data line 120 is connect by third via hole 119 with multiple conducting block 111c, to pass through multiple conducting blocks
It is connected with multiple conductor wires and k number according to terminal, since data line is connect by multiple conducting blocks and via hole with data terminal,
Therefore, multiple conducting blocks have carried out the transfer of signal transmission, thus without directly first electrode layer and semiconductor active layer it
Between long via hole is set, thus simplify display backboard manufacturing process.
Optionally, above-mentioned n data line can also be connect by other means with data terminal, as long as can guarantee data
Terminal can effectively be connect with data line, and it is not limited in the embodiment of the present invention.
Further, referring to FIG. 6, Fig. 6 is the structural schematic diagram of another display backboard 1 provided in an embodiment of the present invention,
The display backboard 1 can also include:
Pixel defining layer 16 in first electrode layer 12.
Luminescent layer 17 in pixel defining layer 16.
The second electrode lay 18 on luminescent layer 17, the second electrode lay include multiple second electrodes, second electrode with
Above-mentioned first electrode polarity is different.For example, first electrode is anode, second electrode is cathode;Or first electrode is cathode, the
Two electrodes are anode.
Support column (English: Photo Spacer on the second electrode lay;Referred to as: PS) 19.The support column is used for
When showing setting cover board on backboard, cover board is supported.
In an alternative embodiment, first electrode is anode, and second electrode is cathode, at this point, cathode is by Mg
The conductive structure of front property made of the alloy that (magnesium) and Ag (silver) are formed, anode include the first conductive layer being sequentially overlapped, the
Two conductive layers and third conductive layer, wherein the material of the first conductive layer and third conductive layer is tin indium oxide (Indium tin
oxide;ITO), the material of the second conductive layer is Ag, since the electric conductivity of Ag is stronger, can make n data line using Ag,
It is that n data line and the second conductive layer same layer manufacture, the two can be formed by a patterning processes, can be produced in this way
The preferable data line of conductive effect.
It should be noted that the structure enumerated in the embodiment of the present invention is the structure sheaf for showing backboard, the film of the structure sheaf
Layer sequence can there are many kinds of variations, if produce display backboard drive necessary element (such as grid, source electrode, drain electrode and
Pixel electrode etc.), it is ensured that display backboard normal driving, such as buffer layer are not necessarily just directly produced on substrate, under
Other film layer can also be arranged in side, and the number of plies of above-mentioned insulating layer can also be according to circumstances adjusted, therefore implements in the present invention
In the display back board structure that example provides, as long as ensuring that each metal layer is insulated from each other, and has and be connected to external electrically conductive component
, it is not limited in the embodiment of the present invention.
Referring to FIG. 7, Fig. 7 is the overlooking structure diagram of another display backboard provided in an embodiment of the present invention, such as Fig. 7 institute
Show, above-mentioned luminescent layer includes multiple luminescence units 170 of rectangular arrangement, each luminescence unit include: emitting red light block 170a,
Green emitting block 170b and blue-light-emitting block 170c, emitting red light block and green emitting block are arranged along column direction, blue-light-emitting block
Positioned at the side of emitting red light block and green emitting block column.
In the embodiment of the present invention, display backboard at work, needs to apply voltage to first electrode layer, so that being located at first
The luminescence unit of the data line driving luminescent layer of electrode layer shines, so that display backboard is normally shown.
Exemplary, above-mentioned n data line 120 includes the first data line 120a for driving emitting red light block luminous, is used
In the second luminous data line 120b of driving green emitting block, and the third data line for driving blue-light-emitting block luminous
120c。
Wherein, above-mentioned n data line is located at the gap location of each luminescence unit, to guarantee that data line does not interfere luminescence unit
Shine, it is exemplary, every two adjacent first data line and the second data line bit in the first gap location of a column luminescence unit,
Gap of first gap between emitting red light block and green emitting block column and blue-light-emitting block, each third data line bit
Gap location between two column luminescence units.
Optionally, the position of above-mentioned n root data line can change, such as: it is luminous single that the first data line can be located at a column
The first gap location in member, the gap of every two adjacent second data line and third data line bit between two column luminescence units
Place, it is not limited in the embodiment of the present invention.
It should be noted that the minimum range of adjacent two light-emitting blocks in above-mentioned left and right is usually 20um, and therefore, above-mentioned number
It can be adjusted between 3~5um according to the distance that line is arranged, it is not limited in the embodiment of the present invention.
Optionally, multiple luminescence units of luminescent layer can also otherwise arrange, light-emitting block in each luminescence unit
It can also otherwise arrange, it is not limited in the embodiment of the present invention.Also, the structure in each luminescence unit can also be with
Change as the case may be, for example, each luminescence unit includes emitting red light block, green emitting block, blue-light-emitting block and white
Light-emitting block.
In conclusion display backboard provided in an embodiment of the present invention, is applied in display backboard due to pushing away more MUX for 1, and
And by multiple data lines and the same layer arrangement of first electrode, while each data terminal manages multiple data lines, reduce every
Therefore load on a data line under the premise of guaranteeing that each sub-pixel effectively charges, shortens the length in bonding region,
To realize the narrow frame of round display panel.
The embodiment of the invention provides a kind of display panel, which includes:
Show backboard and cover board, on display backboard, display backboard is to appoint in the above embodiment of the present invention for cover board setting
Display backboard described in one.
Exemplary, above-mentioned cover board is transparent cover plate, and transparent cover plate can thoroughly completely cut off water oxygen, guarantees manufactured display panel
Quality and service life.Optionally, the material of the transparent cover plate can be rigid material, for example, using glass or quartz etc.
Material is made, and it is not limited in the embodiment of the present invention.
The display panel further include: control IC and FPC, control IC are connect by FPC with display backboard, and control IC is matched
Be set to the multiple signals of output, the signal of control IC output include k number it is believed that number and m control signal, FPC is configured as should
For k number it is believed that number being transmitted to the k number one by one according to terminal x, m control signal is transmitted to the m control terminal z one by one.
In conclusion display panel provided in an embodiment of the present invention, is applied in display panel due to pushing away more MUX for 1, and
And by multiple data lines and the same layer arrangement of first electrode, while each data terminal manages multiple data lines, reduce every
Therefore load on a data line under the premise of guaranteeing that each sub-pixel effectively charges, shortens the length in bonding region,
To realize the narrow frame of round display panel.
The embodiment of the invention provides a kind of wearable device, which includes:
Display panel and shell, shell are in the above embodiment of the present invention for accommodating display panel, display panel
Display panel.
Optionally, which can be watch or bracelet etc..It is not limited in the embodiment of the present invention.
Exemplary, which can also include bandage, and bandage be connect with shell, and wearer can be incited somebody to action by bandage
The wearable device ties up in wrist, is convenient for carrying.
In conclusion wearable device provided in an embodiment of the present invention, due to pushing away more MUX applied to wearable device for 1
In, and multiple data lines and the same layer arrangement of first electrode are reduced while each data terminal manages multiple data lines
Therefore load on each data line under the premise of guaranteeing that each sub-pixel effectively charges, shortens the length in bonding region
Degree, to realize the narrow frame of the round display panel in wearable device.
As shown in figure 8, the embodiment of the invention provides a kind of manufacturing methods for showing backboard, comprising:
Step 801 provides a underlay substrate.
There is circular display area, and the non-display area of the annular around display area on the underlay substrate.
Step 802 forms TFT structure layer on the display area of underlay substrate.
The TFT structure layer includes the gate patterns of mutually insulated, source-drain electrode figure and semiconductor active layer pattern.
Step 803 forms first electrode layer on TFT structure layer.
The first electrode layer include same layer arrangement n data line and multiple first electrodes, first electrode be cathode and
One in anode, n is the integer greater than 1, and n data line includes k number according to line group, and each data line group includes m data
Line, m are that the integer greater than 1, k=n/m, and k are positive integer.
It should be noted that the non-display area of underlay substrate is also formed with k number according to terminal, n switch is single and m controls
Terminal processed.Wherein, each data terminal is connect with a data line group, and n switch unit is corresponded with n data line and gone here and there
Connection, which includes m group switch unit, and every group of switch unit includes k switch unit, the k switch unit difference
It is connect with k number according to a data line in line group.Each control terminal on bonding region by a control line with
One group of switch unit connection, for controlling the opening and closing of one group of switch unit.Wherein, switch unit can be TFT.This is more
The manufacturing process of a switch unit can be performed simultaneously with above-mentioned steps 802.
In conclusion the manufacturing method of display backboard provided in an embodiment of the present invention, is applied to show due to pushing away more MUX for 1
Show in backboard, and by multiple data lines and the same layer arrangement of first electrode, manages the same of multiple data lines in each data terminal
When, reduce the load on each data line, therefore, under the premise of guaranteeing that each sub-pixel effectively charges, shortens bonding
The length in region, to realize the narrow frame of round display panel.
Referring to FIG. 9, Fig. 9 is the manufacturing method of another display backboard provided in an embodiment of the present invention, as shown in figure 9,
The manufacturing method includes:
Step 901 provides a underlay substrate.
There is circular display area, and the non-display area of the annular around display area on the underlay substrate.
Step 902 forms TFT structure layer on the display area of underlay substrate.
The TFT structure layer includes the gate patterns of mutually insulated, source-drain electrode figure and semiconductor active layer pattern.
Optionally, buffer layer can be initially formed on underlay substrate.Then, semiconductor active is sequentially formed on the buffer layer
Layer pattern, the first insulating layer, gate patterns, second insulating layer, interlayer insulating film, source-drain electrode figure and flatness layer.
Wherein, source-drain electrode figure includes multiple source electrodes and multiple drain electrodes, and gate patterns include multiple grids, semiconductor active
Layer pattern include it is multiple have source block, each there is source block to be separately connected by the first via hole with corresponding source electrode and drain electrode.
Optionally, the material of above-mentioned buffer layer, interlayer insulating film, the first insulating layer and second insulating layer may each comprise two
Silicon oxide or silicon nitride, or, the mixing material of silica and silicon nitride.
It is exemplary, buffer layer can be formed by modes such as deposition, coating or sputterings on above-mentioned underlay substrate.It
Afterwards, semiconductor active layer is formed by modes such as deposition, coating or sputterings on the underlay substrate for be formed with buffer layer, then
Patterning processes are executed to form semiconductor active layer pattern to the semiconductor active layer.Later, have being formed with semiconductor
The first insulating layer is formed by modes such as deposition, coating or sputterings on the underlay substrate of active layer, is being formed with the first insulating layer
Underlay substrate on by modes such as deposition, coating or sputterings form grid layer, a composition then is executed to the grid layer
Technique is to form gate patterns.Then, second is sequentially formed absolutely by modes such as deposition, coating or sputterings on underlay substrate
Layer and interlayer insulating film.Source-drain electrode layer is formed by modes such as deposition, coating or sputterings on interlayer insulating film, then to this
Source-drain electrode layer executes a patterning processes to form source-drain electrode figure.Finally, being formed by modes such as deposition, coating or sputterings
Flatness layer, such as pass through chemical vapor deposition (English: Chemical Vapor Deposition;Referred to as: CVD) technique is formed
Flatness layer.
An above-mentioned patterning processes may include: photoresist coating, exposure, development, etching and photoresist lift off.
Step 903 forms first electrode layer on TFT structure layer.
The first electrode layer include same layer arrangement n data line and multiple first electrodes, first electrode be cathode and
One in anode, n is the integer greater than 1, and n data line includes k number according to line group, and each data line group includes m data
Line, m are that the integer greater than 1, k=n/m, and k are positive integer.
It is exemplary, conductive layer can be formed by modes such as deposition, coating or sputterings on TFT structure layer, it is then right
The conductive layer executes a patterning processes to form first electrode layer.
Step 904 forms pixel defining layer in first electrode layer.
It is exemplary, transparent film layer can be formed by modes such as deposition, coating or sputterings in first electrode layer, then
Patterning processes are executed to form pixel defining layer to the transparent film layer.
Step 905 forms luminescent layer in pixel defining layer.
It is exemplary, luminescent layer can be formed by multiple patterning processes in pixel defining layer.The luminescent layer includes matrix
Multiple luminescence units of shape arrangement, each luminescence unit include: emitting red light block, green emitting block and blue-light-emitting block, red
Light-emitting block and green emitting block are arranged along column direction, and blue-light-emitting block is located at the one of emitting red light block and green emitting block column
Side.
Above-mentioned n data line includes the first data line for driving emitting red light block luminous, for driving green emitting
The second luminous data line of block, and the third data line for driving blue-light-emitting block luminous.
Wherein, every two adjacent first data line and the second data line bit be in the first gap location of a column luminescence unit,
Gap of first gap between emitting red light block and green emitting block column and blue-light-emitting block, each third data line bit
Gap location between two column luminescence units.
Step 906 forms the second electrode lay on the light-emitting layer.
It is exemplary, conductive layer can be formed by modes such as deposition, coating or sputterings on the light-emitting layer, then this is led
Electric layer executes a patterning processes to form the second electrode lay.The second electrode lay includes multiple second electrodes, second electrode with
Above-mentioned first electrode polarity is different.
In the embodiment of the present invention, second electrode is different from above-mentioned first electrode polarity.For example, first electrode is anode, the
Two electrodes are cathode;Or first electrode is cathode, second electrode is anode.
It should be noted that the non-display area of underlay substrate is also formed with k number according to terminal, n switch is single and m controls
Terminal processed.Wherein, each data terminal is connect with a data line group, and n switch unit is corresponded with n data line and gone here and there
Connection, which includes m group switch unit, and every group of switch unit includes k switch unit, the k switch unit difference
It is connect with k number according to a data line in line group.Each control terminal on bonding region by a control line with
One group of switch unit connection, for controlling the opening and closing of one group of switch unit.Wherein, switch unit can be TFT.This is more
The manufacturing process of a switch unit can be performed simultaneously with above-mentioned steps 902.
It should be noted that the sequencing of the manufacturing method step of display backboard provided in an embodiment of the present invention can be into
Row appropriate adjustment, step according to circumstances can also accordingly be increased and decreased, and anyone skilled in the art is in this hair
In the technical scope of bright exposure, the method that can readily occur in variation be should be covered by the protection scope of the present invention, therefore not
It repeats again.
In conclusion the manufacturing method of display backboard provided in an embodiment of the present invention, is applied to show due to pushing away more MUX for 1
Show in backboard, and by multiple data lines and the same layer arrangement of first electrode, manages the same of multiple data lines in each data terminal
When, reduce the load on each data line, therefore, under the premise of guaranteeing that each sub-pixel effectively charges, shortens bonding
The length in region, to realize the narrow frame of round display panel.
Obviously, the described embodiments are only some of the embodiments of the present invention, instead of all the embodiments.Based on this
Embodiment in invention, all other reality obtained by those of ordinary skill in the art without making creative efforts
Example is applied, shall fall within the protection scope of the present invention.
Those skilled in the art after considering the specification and implementing the invention disclosed here, will readily occur to of the invention its
Its embodiment.This application is intended to cover any variations, uses, or adaptations of the invention, these modifications, purposes or
Person's adaptive change follows general principle of the invention and including the undocumented common knowledge in the art of the present invention
Or conventional techniques.The description and examples are only to be considered as illustrative, and true scope and spirit of the invention are wanted by right
It asks and points out.
It should be understood that the present invention is not limited to the precise structure already described above and shown in the accompanying drawings, and
And various modifications and changes may be made without departing from the scope thereof.The scope of the present invention is limited only by the attached claims.
Claims (10)
1. a kind of display backboard characterized by comprising
Underlay substrate, the underlay substrate have circular display area, and the non-of annular around the display area shows
Show region;
Thin film transistor (TFT) TFT structure layer on the underlay substrate, the TFT structure layer include the grid figure of mutually insulated
Shape, source-drain electrode figure and semiconductor active layer pattern;
First electrode layer on the TFT structure layer, the first electrode layer include same layer arrangement n data line and
Multiple first electrodes, the first electrode are one in cathode and anode, and n is the integer greater than 1, the n data line packet
K number is included according to line group, each data line group includes the m data lines, and m is the integer greater than 1, k=n/m, and k is positive
Integer;
K number on the bonding region of the non-display area of the underlay substrate according to terminal, each data terminal with
One data line group connection;
The n switch unit on the underlay substrate, the n switch unit and the n data line, which correspond, goes here and there
Connection, the n switch unit includes m group switch unit, and every group of switch unit includes k switch unit, the k switch unit
It is connect respectively with the k number according to a data line in line group;
The m control terminal on the bonding region, each control terminal pass through a control line and one group of switch
Unit connection, for controlling the opening and closing of one group of switch unit.
2. display backboard according to claim 1, which is characterized in that
Buffer layer is provided on the underlay substrate;
The TFT structure layer includes along the semiconductor active layer pattern being sequentially overlapped far from the underlay substrate direction, the
One insulating layer, gate patterns, second insulating layer, interlayer insulating film, the source-drain electrode figure and flatness layer.
3. display backboard according to claim 2, which is characterized in that
The semiconductor active layer pattern further includes multiple conductor wires, and the multiple conductor wire is connect with the k number according to terminal,
The source-drain electrode figure further include: n conducting block, the n conducting block are connected by the second via hole and the n conductor wire
It connects;
The n data line is connect by third via hole with the multiple conducting block, to pass through the multiple conducting block and described
Multiple conductor wires are connect with the k number according to terminal.
4. display backboard according to any one of claims 1 to 3, which is characterized in that the display backboard further include:
Pixel defining layer in first electrode layer;
Luminescent layer in the pixel defining layer;
The second electrode lay on the luminescent layer, the second electrode lay include multiple second electrodes, the second electrode
It is different from the first electrode polarity.
5. display backboard according to claim 4, which is characterized in that
The luminescent layer includes multiple luminescence units of rectangular arrangement, and each luminescence unit includes: emitting red light block, green hair
Light block and blue-light-emitting block, the emitting red light block and the green emitting block are arranged along column direction, blue-light-emitting block position
In the side of the emitting red light block and the green emitting block column,
The n data line includes the first data line for driving emitting red light block luminous, for driving green emitting block to send out
Second data line of light, and the third data line for driving blue-light-emitting block luminous,
Every two adjacent first data line and the second data line bit are in the first gap location in a column luminescence unit, and described first
Gap of the gap between the emitting red light block and the green emitting block column and blue-light-emitting block, each third data
Gap location of the line between two column luminescence units.
6. display backboard according to claim 5, which is characterized in that
The first electrode is anode, and the second electrode is cathode, and the switch unit is TFT.
7. a kind of display panel characterized by comprising
Claim 1 to 6 any the display backboard and cover board, the cover board are arranged on the display backboard.
8. a kind of wearable device characterized by comprising
Display panel and shell as claimed in claim 7, the shell is for accommodating the display panel.
9. wearable device according to claim 8, which is characterized in that the wearable device is watch or bracelet, institute
Stating wearable device further includes bandage, and the bandage is connect with the shell.
10. a kind of manufacturing method for showing backboard characterized by comprising
One underlay substrate is provided, there is circular display area, and the ring around the display area on the underlay substrate
The non-display area of shape;
Thin film transistor (TFT) TFT structure layer is formed on the display area of the underlay substrate, the TFT structure layer includes mutually absolutely
Gate patterns, source-drain electrode figure and the semiconductor active layer pattern of edge;
Form first electrode layer on the TFT structure layer, the first electrode layer include same layer arrangement n data line and
Multiple first electrodes, the first electrode are one in cathode and anode, and n is the integer greater than 1, the n data line packet
K number is included according to line group, each data line group includes the m data lines, and m is the integer greater than 1, k=n/m, and k is positive
Integer;
Wherein, k number is also formed on the underlay substrate according to terminal, n switch unit and m control terminal, the k number
It is located at the bonding region of non-display area, each data terminal and a data line according to terminal and m control terminal
Group connection, the n switch unit are connected with n data line one-to-one correspondence, and the n switch unit includes m group switch
Unit, every group of switch unit include k switch unit, and the k switch unit is respectively with the k number according to one in line group
Data line connection, each control terminal is connect by a control line with one group of switch unit, for controlling described one group
The opening and closing of switch unit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811034142.4A CN109244083B (en) | 2018-09-05 | 2018-09-05 | Display back plate, manufacturing method thereof, display panel and wearable device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201811034142.4A CN109244083B (en) | 2018-09-05 | 2018-09-05 | Display back plate, manufacturing method thereof, display panel and wearable device |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109244083A true CN109244083A (en) | 2019-01-18 |
CN109244083B CN109244083B (en) | 2020-12-08 |
Family
ID=65060635
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201811034142.4A Active CN109244083B (en) | 2018-09-05 | 2018-09-05 | Display back plate, manufacturing method thereof, display panel and wearable device |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN109244083B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112634803A (en) * | 2019-09-24 | 2021-04-09 | 乐金显示有限公司 | Display device |
CN112659953A (en) * | 2020-12-23 | 2021-04-16 | 国网湖北省电力有限公司电力科学研究院 | Three-dimensional matrix type charging stack power distribution device and method |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0694804A2 (en) * | 1994-07-27 | 1996-01-31 | Hitachi, Ltd. | Liquid crystal display apparatus, semiconductor devices, and manufacturing methods therefor |
US20050083461A1 (en) * | 2003-10-16 | 2005-04-21 | Lg.Philips Lcd Co., Ltd. | Transflective-type liquid crystal display device and method of fabricating the same |
JP2011237776A (en) * | 2010-04-12 | 2011-11-24 | Seiko Epson Corp | Electro-optic device and electronic apparatus |
CN104600083A (en) * | 2015-01-29 | 2015-05-06 | 京东方科技集团股份有限公司 | Thin film transistor array substrate and preparation method thereof, display panel and display device |
CN105185791A (en) * | 2015-09-28 | 2015-12-23 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof and display device |
-
2018
- 2018-09-05 CN CN201811034142.4A patent/CN109244083B/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0694804A2 (en) * | 1994-07-27 | 1996-01-31 | Hitachi, Ltd. | Liquid crystal display apparatus, semiconductor devices, and manufacturing methods therefor |
US20050083461A1 (en) * | 2003-10-16 | 2005-04-21 | Lg.Philips Lcd Co., Ltd. | Transflective-type liquid crystal display device and method of fabricating the same |
JP2011237776A (en) * | 2010-04-12 | 2011-11-24 | Seiko Epson Corp | Electro-optic device and electronic apparatus |
CN104600083A (en) * | 2015-01-29 | 2015-05-06 | 京东方科技集团股份有限公司 | Thin film transistor array substrate and preparation method thereof, display panel and display device |
CN105185791A (en) * | 2015-09-28 | 2015-12-23 | 京东方科技集团股份有限公司 | Array substrate and manufacturing method thereof and display device |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112634803A (en) * | 2019-09-24 | 2021-04-09 | 乐金显示有限公司 | Display device |
CN112659953A (en) * | 2020-12-23 | 2021-04-16 | 国网湖北省电力有限公司电力科学研究院 | Three-dimensional matrix type charging stack power distribution device and method |
CN112659953B (en) * | 2020-12-23 | 2023-02-03 | 国网湖北省电力有限公司电力科学研究院 | Three-dimensional matrix type charging stack power distribution device and method |
Also Published As
Publication number | Publication date |
---|---|
CN109244083B (en) | 2020-12-08 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN102751295B (en) | Semiconductor device and method for manufacturing semiconductor device | |
TWI545740B (en) | Organic light emitting display apparatus and method of manufacturing the same | |
CN110047378A (en) | Display device | |
CN109887952A (en) | Display device | |
CN109801949A (en) | Organic light emitting display panel and display device | |
US20060011913A1 (en) | Display device mounted with read function and electric appliance | |
CN108257972A (en) | Display device | |
CN108987437A (en) | Luminous display unit and its manufacturing method | |
CN106997894A (en) | Organic light-emitting display device | |
CN104659057A (en) | Array substrate for display device | |
CN103489894A (en) | Active matrix organic electroluminescence display part and display device and manufacturing method thereof | |
CN102629621A (en) | Circuit, array substrate and manufacturing method thereof, and display | |
CN110010623A (en) | Display device | |
CN109698224A (en) | Display base plate and its manufacturing method and display panel | |
CN108550616A (en) | Oled display substrate and preparation method thereof, display device | |
CN110416257A (en) | Display panel back board structure, preparation method and top emission type display panel | |
CN103794633B (en) | A kind of array base palte and preparation method thereof, display device | |
CN207164732U (en) | A kind of touch-control display panel and touch control display apparatus | |
CN109659347A (en) | Flexible OLED display panel and display device | |
CN109994513A (en) | Display device and the method for manufacturing the display device | |
CN109557729A (en) | A kind of switch unit, display panel and preparation method thereof, display device | |
CN109411516A (en) | Flexible display panels and display device | |
CN109244083A (en) | Show backboard and its manufacturing method, display panel and wearable device | |
CN109390380A (en) | Display panel and preparation method thereof, display device | |
CN108873511A (en) | Two-d display panel and its manufacturing method |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |