CN109189703A - A kind of conversion method of data format - Google Patents
A kind of conversion method of data format Download PDFInfo
- Publication number
- CN109189703A CN109189703A CN201810851326.3A CN201810851326A CN109189703A CN 109189703 A CN109189703 A CN 109189703A CN 201810851326 A CN201810851326 A CN 201810851326A CN 109189703 A CN109189703 A CN 109189703A
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- data
- latch
- conversion method
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- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000006243 chemical reaction Methods 0.000 title claims abstract description 18
- 230000007704 transition Effects 0.000 claims abstract description 11
- 239000002699 waste material Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 abstract description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 241001269238 Data Species 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/382—Information transfer, e.g. on bus using universal interface adapter
- G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/38—Universal adapter
- G06F2213/3852—Converter between protocols
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Communication Control (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a kind of conversion method of data format, including N number of latch is attached, after successively exporting m data to N number of latch, control latch latches the data, complete latch of N number of latch to the data, after cooperating N*m data of data enable signal parallel output, driving clock transition edge is jumped, and completes the N*m reading data.Using the present invention, the problem of can conflicting with effective solution due to the interface that data bits difference generates, and Material Cost is greatly lowered.
Description
Technical field
The present invention relates to more data conversion technique fields more particularly to it is a kind of utilize latch carry out Data Format Transform side
Method.
Background technique
At present control chip GPIO there is the phenomenon that multiplexing functions more, when system function application it is more when, Jiu Huicun
The problem of interface conflicts, software programming is carried out usually using PLD at present, the interface generated due to data bits difference is solved and rushes
Prominent problem.But the cost of PLD is costly, and reproducibility is stronger.
Summary of the invention
The present invention proposes a kind of conversion method of data format, solves the same of the interface conflict generated due to data bits difference
When, Material Cost is greatly lowered.
The embodiment of the present invention provides a kind of conversion method of data format, comprising: m numbers are successively exported to N number of latch
According to so that each latch successively latches m of the data；m≥1；
N number of latch is successively connected in parallel；N≥2；
When N number of latch completes the latch to m of the data, described state is made by data enable signal
N number of latch is to N*m data of recipient's parallel output；
Driving clock transition edge is jumped, so that the recipient completes the reading of the N*m data.
Further, the data that m are successively exported to N number of latch, so that each latch is successively
M of the data are latched, specifically:
Each latch is provided with multiple data bit interfaces；
By the data bit interface of i-th of latch, m of the data are exported to i-th of latch, and
After the latch that i-th of latch completes m of the data, pass through the data of i+1 latches device
Position interface, exports m of the data to the i+1 latch, the i+1 latch is made to export described m
Data；N-1≥i≥1.
Further, N number of latch is successively connected in parallel, specifically:
Between N number of latch, there is identical each data bit interface of number to be connected in parallel with each other.
Further, m of the data are exported to i-th of latch, specifically:
The LE pin for controlling i-th of latch is in high level, by the data bit that m of the data are defeated
Enter to i-th of latch.
Further, each latch successively latches m of the data, specifically:
When the data are input to the latch, the LE pin for controlling the latch is in low level, latches institute
State m data.
Further, when N number of latch completes the latch to m of the data, pass through the enabled letter of data
Number make N number of latch to N*m data of recipient's parallel output, specifically:
When N number of latch completes the latch to m of the data, data enable human hair combing waste and go out the enabled letter of data
Number, the output pin of N number of latch is controlled to N*m described in recipient's parallel output data.
Further, driving HS clock transition edge is jumped, so that the recipient completes the N*m data
It reads, specifically:
After to the recipient, to send the N*m be data, drive clock transition edges and m of the data pair
Together, the recipient is made to complete the reading of the N*m data.
A kind of simple and effective conversion method of data format provided in an embodiment of the present invention, by using multiple latch according to
It is secondary that multiple data are latched, parallel output long numeric data after the latch of multiple data is completed, realizes Data Format Transform
Meanwhile Material Cost is greatly lowered.
Detailed description of the invention
Fig. 1 is a kind of flow diagram of one embodiment of conversion method of data format provided by the invention.
Fig. 2 is a kind of attachment structure schematic diagram of one embodiment of latch provided by the invention.
Specific embodiment
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on
Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other
Embodiment shall fall within the protection scope of the present invention.
It is a kind of flow diagram of one embodiment of conversion method of data format provided by the invention referring to Fig. 1.Packet
It includes:
S11 successively exports m data, so that each latch successively locks m data to N number of latch
It deposits, m >=1.M is positive integer.
Specifically, successively exporting m data to i-th of latch, and m data are completed in i-th of latch
After latch, m of the data are exported to i+1 latch, i+1 latch is made to export m data.Wherein N-1
>=i >=1, i are positive integer.By controlling the successive latch sequence of latch, make the latch of received data not by new defeated
Enter the influence of data.
Further, N number of latch is successively connected in parallel.N >=2, specific connection method are as follows: latch has multiple data
Position.The number of data bit is 1 to a, and the data bit of identical number is in parallel.A >=2 and a are positive integer.
Further, it is in high level by controlling the LE pin of i-th of latch, keeps m-bit data defeated by data bit
Enter to i-th of latch.
Further, when data are input to latch, the LE pin by controlling latch is in low level, makes to latch
Device latches m-bit data.
S12 makes institute by data enable signal when N number of latch completes the latch to m of the data
N number of latch is stated to N*m data of recipient's parallel output.
Specifically, data enable human hair combing waste and go out the enabled letter of data when N number of latch completes the latch to m data
Number, control the output pin of latch, N*m data of parallel output.Time due to sending data makes determination, sends out data
Sending can accomplish not deviate in the timing control enabled with data.
S13, driving clock transition edge is jumped, so that the recipient completes the reading of the N*m data.
Specifically, since data receiver is only related with clock transition edge, when the data of all latch export
After the completion, the transition edges of clock and all data are aligned, recipient is made to complete the reading of N*m data.
It should be noted that when the data of all latch are that before all latch finishes, clock triggers edge will not
Jump avoids receiving side data from reading error.Recipient, which can be liquid crystal etc., can be used for the device that data are shown.
Further, referring to fig. 2, be a kind of latch provided by the invention one embodiment connection structure signal
Figure.Including multiple latch 101.
Latch 101 has multiple data bit, and the number of data bit is 1 to N.N number of latch 101 numbers identical data bit
Parallel connection, for receiving m data.LE foot between N number of latch 101 individually connects, and makes that one can only be changed every time
The level of the LE pin of latch 101, so that multiple m-bit datas be allowed to store into different latch 101.It completes m all
After the latch of data, the output pin On of N number of latch 101 issues the data for the position m that each latch 101 latches parallel, from
And export N*m data.
It should be noted that latch can be, but not limited to as D class latch.
A kind of conversion method of data format provided in an embodiment of the present invention, by the way that multiple latch are attached, and according to
The secondary latch for carrying out data, it is final to export N*m data simultaneously, and HS clock transition edge and alignment of data are driven, complete N*m
The reading of position data.Using the present invention, the problem of being conflicted with effective solution due to the interface that data bits difference generates, and
Material Cost is greatly lowered.
The above is a preferred embodiment of the present invention, it is noted that for those skilled in the art
For, various improvements and modifications may be made without departing from the principle of the present invention, these improvements and modifications are also considered as
Protection scope of the present invention.
Claims (8)
1. a kind of conversion method of data format characterized by comprising
M data are successively exported to N number of latch, so that each latch successively latches the m-bit data,
Wherein, N number of latch is successively connected in parallel；m≥1；N≥2；
After N number of latch completes the latch to the m-bit data, N number of latch is made by data enable signal
Device is to N*m data of recipient's parallel output；
Driving clock transition edge is jumped, so that the recipient completes the reading of the N*m data.
2. a kind of conversion method of data format according to claim 1, which is characterized in that described successively to N number of lock
Storage exports m data, so that each latch successively latches m of the data, specifically:
Each latch is provided with multiple data bit interfaces；
By the data bit interface of i-th of latch, m of the data are exported to i-th of latch, and in institute
After stating the latch that i-th of latch completes m of the data, connect by the data bit of i+1 latches device
Mouthful, m of the data are exported to the i+1 latch, the i+1 latch is made to export m of the data；
N-1≥i≥1。
3. a kind of conversion method of data format according to claim 2, which is characterized in that N number of latch is successively simultaneously
Row connection, specifically:
Between N number of latch, there is identical each data bit interface of number to be connected in parallel with each other.
4. a kind of conversion method of data format according to claim 2, which is characterized in that described defeated to i-th of latch
M of the data out, specifically:
The LE pin for controlling i-th of latch is in high level, by the data bit interface that m of the data are defeated
Enter to i-th of latch.
5. a kind of conversion method of data format according to claim 2, which is characterized in that each latch according to
It is secondary that m of the data are latched, specifically:
When m of the data are input to the latch, the LE pin for controlling the latch is in low level, latches institute
State m data.
6. a kind of conversion method of data format according to claim 1, which is characterized in that described to work as N number of latch
When completing the latch to m of the data, make N number of latch to recipient's parallel output by data enable signal
N*m data, specifically:
When N number of latch completes the latch to m of the data, control data enable human hair combing waste and go out the enabled letter of data
Number, to control the output pin of N number of latch to N*m described in recipient's parallel output data.
7. a kind of conversion method of data format according to claim 6, which is characterized in that driving HS clock transition side
Edge is jumped, so that the recipient completes the reading of the N*m data, specifically:
After sending the N*m data to the recipient, the transition edges and m of the alignment of data of clock are driven,
The recipient is set to complete the reading of the N*m data.
8. a kind of conversion method of data format according to any one of claims 1 to 7, which is characterized in that the latch
For D class latch.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810851326.3A CN109189703A (en) | 2018-07-27 | 2018-07-27 | A kind of conversion method of data format |
| PCT/CN2019/096467 WO2020020038A1 (en) | 2018-07-27 | 2019-07-18 | Data format conversion method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810851326.3A CN109189703A (en) | 2018-07-27 | 2018-07-27 | A kind of conversion method of data format |
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| Publication Number | Publication Date |
|---|---|
| CN109189703A true CN109189703A (en) | 2019-01-11 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810851326.3A Pending CN109189703A (en) | 2018-07-27 | 2018-07-27 | A kind of conversion method of data format |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN109189703A (en) |
| WO (1) | WO2020020038A1 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020020038A1 (en) * | 2018-07-27 | 2020-01-30 | 厦门亿联网络技术股份有限公司 | Data format conversion method |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1396582A (en) * | 2001-07-09 | 2003-02-12 | 阿尔卑斯电气株式会社 | Image signal drive circuit and display unit with image signal drive circuit |
| CN103888147A (en) * | 2014-04-09 | 2014-06-25 | 龙迅半导体科技(合肥)有限公司 | Serial-to-parallel conversion circuit, serial-to-parallel converter and serial-to-parallel conversion system |
| CN204694814U (en) * | 2015-03-23 | 2015-10-07 | 北京中汽恒泰教育科技有限公司 | A kind of multi-channel signal acquiring device |
| CN106523935A (en) * | 2016-10-10 | 2017-03-22 | 深圳市康铭盛科技实业股份有限公司 | Integrated type LED light-emitting module |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4322548B2 (en) * | 2003-05-09 | 2009-09-02 | 日本電気株式会社 | Data format conversion circuit |
| JP5073935B2 (en) * | 2005-10-06 | 2012-11-14 | オンセミコンダクター・トレーディング・リミテッド | Serial data input system |
| CN103792516A (en) * | 2014-01-27 | 2014-05-14 | 中国电子科技集团公司第十研究所 | Range-measuring circuit module |
| CN204413334U (en) * | 2014-10-28 | 2015-06-24 | 佛山科学技术学院 | Based on the discharging gap-state detection module of pulse-train analysis |
| CN109189703A (en) * | 2018-07-27 | 2019-01-11 | 厦门亿联网络技术股份有限公司 | A kind of conversion method of data format |
-
2018
- 2018-07-27 CN CN201810851326.3A patent/CN109189703A/en active Pending
-
2019
- 2019-07-18 WO PCT/CN2019/096467 patent/WO2020020038A1/en active Application Filing
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1396582A (en) * | 2001-07-09 | 2003-02-12 | 阿尔卑斯电气株式会社 | Image signal drive circuit and display unit with image signal drive circuit |
| CN103888147A (en) * | 2014-04-09 | 2014-06-25 | 龙迅半导体科技(合肥)有限公司 | Serial-to-parallel conversion circuit, serial-to-parallel converter and serial-to-parallel conversion system |
| CN204694814U (en) * | 2015-03-23 | 2015-10-07 | 北京中汽恒泰教育科技有限公司 | A kind of multi-channel signal acquiring device |
| CN106523935A (en) * | 2016-10-10 | 2017-03-22 | 深圳市康铭盛科技实业股份有限公司 | Integrated type LED light-emitting module |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2020020038A1 (en) * | 2018-07-27 | 2020-01-30 | 厦门亿联网络技术股份有限公司 | Data format conversion method |
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| Publication number | Publication date |
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| WO2020020038A1 (en) | 2020-01-30 |
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Application publication date: 20190111 |
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