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CN109116829A - The triggering implementation method and automatic test equipment of automatic test equipment - Google Patents

The triggering implementation method and automatic test equipment of automatic test equipment Download PDF

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Publication number
CN109116829A
CN109116829A CN201810677974.1A CN201810677974A CN109116829A CN 109116829 A CN109116829 A CN 109116829A CN 201810677974 A CN201810677974 A CN 201810677974A CN 109116829 A CN109116829 A CN 109116829A
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China
Prior art keywords
test
triggering
backboard
signal
boards
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Granted
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CN201810677974.1A
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CN109116829B (en
Inventor
董亚明
凌献忠
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Suzhou Huaxing Source Polytron Technologies Inc
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Suzhou Huaxing Source Polytron Technologies Inc
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    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B23/00Testing or monitoring of control systems or parts thereof
    • G05B23/02Electric testing or monitoring
    • G05B23/0205Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
    • G05B23/0218Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterised by the fault detection method dealing with either existing or incipient faults
    • G05B23/0256Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterised by the fault detection method dealing with either existing or incipient faults injecting test signals and analyzing monitored process response, e.g. injecting the test signal while interrupting the normal operation of the monitored system; superimposing the test signal onto a control signal during normal operation of the monitored system
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00Program-control systems
    • G05B2219/20Pc systems
    • G05B2219/24Pc safety
    • G05B2219/24065Real time diagnostics

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Tests Of Electronic Circuits (AREA)

Abstract

The present invention discloses the triggering implementation method and automatic test equipment of a kind of automatic test equipment.Automatic test equipment includes backboard and multiple test boards, this method includes the triggering of the combination progress automatic test equipment based on following first to one or more of third triggering mode: the first triggering mode: backboard sends lower trigger signal to each test board, and each test board sends upper trigger signal to backboard;Second triggering mode: backboard sends synchronous triggering signal to all test boards simultaneously;Third triggering mode: connecting backboard and all test boards using original state as the status bus of high level, and backboard and all test boards can be by status bus down for low level and all test boards are pulled low using status bus as low level as trigger signal.The automatic test equipment flexibly can easily realize event control and synchronization, have stronger flexibility and expansibility.

Description

The triggering implementation method and automatic test equipment of automatic test equipment
Technical field
The present invention relates to the field of test technology.A kind of triggering implementation method more particularly, to automatic test equipment and Automatic test equipment.
Background technique
In testing field, test for devices such as chips generallys use automatic test equipment (ATE, Automatic Test Equipment) it realizes, the triggering mode (ATE trigger) of existing automatic test equipment, including backboard and grafting Triggering both touchings between the backboard of triggering between the test board on backboard card slot and different automatic test equipment Originating party formula, existing two kinds of triggering modes are more single, and application mode is limited, inflexible convenient, upgrade to subsequent applications and expand Exhibition is more difficult, is merely able to meet basic automatic test equipment event control.
Accordingly, it is desirable to provide a kind of the triggering implementation method and automatic test equipment of flexibly convenient and fast automatic test equipment.
Summary of the invention
The purpose of the present invention is to provide a kind of flexibly easily triggering implementation method of automatic test equipment and automatic surveys Try equipment.
In order to achieve the above objectives, the present invention adopts the following technical solutions:
First aspect present invention provides a kind of triggering implementation method of automatic test equipment, the automatic test equipment packet Include backboard and multiple test boards, which is characterized in that this method includes based on one of following first to third triggering mode Or several combinations carries out the triggering of automatic test equipment:
First triggering mode: the backboard sends lower trigger signal to each test board, and each test board is to backboard Trigger signal in transmission;
Second triggering mode: the backboard sends synchronous triggering signal to all test boards simultaneously;
Third triggering mode: connecting the backboard and all test boards by the status bus of high level of original state, The backboard and all test boards can be by the status bus down for low level and all test boards are with the shape State bus is pulled low as low level as trigger signal.
Preferably, this method further include based on following 4th triggering mode and its with first into third triggering mode one Kind or several combinations carry out the triggering of automatic test equipment:
4th triggering mode: the backboard sends lower trigger signal to the backboard of other automatic test equipment, it is described other The backboard of automatic test equipment sends upper trigger signal to the backboard.
Preferably, first triggering mode further include: the backboard forwards upper trigger signal to test board.
Preferably, the third triggering mode further include: using a plurality of original state as the Packet State bus of high level point The backboard and all test boards are not connected, and each test board is divided into multiple groupings, the corresponding Packet State of each grouping Bus, the test board in the backboard and each grouping can be by corresponding Packet State bus down for low level and each grouping Interior test board is pulled low using corresponding Packet State bus as low level as trigger signal.
Preferably, the synchronous triggering signal is pulse signal.
Preferably, all test boards are equipped with clock chip, the clock phase between the clock chip of all test boards Bit synchronization is realized based on the combination of first triggering mode and the second triggering mode.
Preferably, realize that the clock phase synchronization between the clock chip of all test boards includes:
It includes when discharging after receiving synchronous triggering signal that backboard is sent to all test boards respectively by bidirectional data line The lower trigger signal at clock chip reset end;
Backboard sends synchronous triggering signal to all test boards simultaneously by synchronous data line;
All test boards receive the reset terminal for after synchronous triggering signal while discharging clock chip, according to the clock of setting Frequency carries out register configuration to clock chip and caches register configuration values write clock chip;
It includes when updating after receiving synchronous triggering signal that backboard is sent to all test boards respectively by bidirectional data line The lower trigger signal of clock chip register;
Backboard sends synchronous triggering signal to all test boards simultaneously by synchronous data line;
All test boards receive after synchronous triggering signal refresh clock chip register simultaneously, so that all test boards Clock chip export the synchronous clock signal of initial phase simultaneously.
Preferably, each test board sends pumping signal to device under test simultaneously and is based on first triggering mode and third The combination of triggering mode is realized.
Preferably, realize that each test board sends pumping signal to device under test simultaneously and includes:
After realizing the clock phase synchronization between the clock chip of all test boards, each test board passes through described two-way Data line sends the upper trigger signal comprising armed state to backboard;
After the backboard receives the upper trigger signal comprising armed state of all test boards, pass through the bi-directional data Line is sent to a certain test board comprising specifying the lower trigger signal that it is main test board;
It receives and specifies the test board of its lower trigger signal for main test board by the status bus down for low electricity It is flat;
All test boards monitor that status bus is pulled low as after low level, in next end count for counting the period It carves and sends pumping signal to device under test simultaneously.
Second aspect of the present invention provides a kind of automatic test equipment, including backboard and multiple test boards, the automatic survey Try the triggering implementation method that equipment executes the automatic test equipment provided such as first aspect present invention.
Beneficial effects of the present invention are as follows:
Technical solution of the present invention can flexible, convenient, efficiently realize event control and the synchronization of automatic test equipment, With stronger flexibility and expansibility.
Detailed description of the invention
Specific embodiments of the present invention will be described in further detail with reference to the accompanying drawing;
Fig. 1 shows the triggering implementation method dorsulum and test board of automatic test equipment provided in an embodiment of the present invention The schematic diagram of connection type.
Fig. 2 shows the flow charts of the clock phase synchronization between the clock chip for realizing all test boards.
Fig. 3 shows the flow chart for realizing that each test board sends pumping signal to device under test simultaneously.
Specific embodiment
In order to illustrate more clearly of the present invention, the present invention is done further below with reference to preferred embodiments and drawings It is bright.Similar component is indicated in attached drawing with identical appended drawing reference.It will be appreciated by those skilled in the art that institute is specific below The content of description is illustrative and be not restrictive, and should not be limited the scope of the invention with this.
An embodiment provides a kind of triggering implementation method of automatic test equipment, automatic test equipment packets Backboard and multiple test boards are included, this method includes the combination based on following first to one or more of third triggering mode Carry out the triggering of automatic test equipment:
First triggering mode: backboard sends lower trigger signal (down trigger), each test board to each test board Upper trigger signal (up trigger) is sent to backboard, wherein lower trigger signal can be used for realizing touching of the backboard to test board Hair control, upper trigger signal can be used for realizing that test board uploads its status information to backboard, in order to improve Trigger Efficiency, this reality The message transmission rate for applying the first triggering mode in example is arranged in 400Mbps or more;
Second triggering mode: backboard sends synchronous triggering signal (AUX trigger) to all test boards simultaneously, synchronous Trigger signal is mainly used for synchronizing, that is, so that being performed simultaneously some after multiple measurement boards receive synchronous triggering signal simultaneously Event, to realize event synchronization;
Third triggering mode: backboard and all test boards, backboard are connected by the status bus of high level of original state With all test boards can by status bus down for low level and all test boards to be pulled low with status bus be low Level is as trigger signal.Status bus can be indicated into some event down for low level by backboard or some test board It is completed, each test board monitors that status bus is pulled low to carry out corresponding event processing after low level.
The triggering implementation method of automatic test equipment provided in this embodiment, can be according to actual event control and synchronous need It asks, a variety of triggering mode any combination is flexibly used, can flexible, convenient, efficiently realize the event control of automatic test equipment It makes and synchronous, there is stronger flexibility and expansibility.
In some optional implementations of the present embodiment, this method further include based on following 4th triggering mode and its Combination with first to one or more of third triggering mode carries out the triggering of automatic test equipment:
4th triggering mode: backboard sends lower trigger signal to the backboard of other automatic test equipment, other automatic tests The backboard of equipment sends upper trigger signal to backboard.Wherein, the 4th triggering mode can be by above-mentioned first to third triggering mode In different trigger signals be forwarded between the backboard of different multiple automatic test equipment, to realize different automatic tests Event control and synchronization after equipment cascading application.
According to the event control and synchronisation requirement of actual automatic test equipment, above-mentioned four kinds of triggering modes can be mutual Cooperation, can also be with some function of complete independently, thus the event control of flexible and efficient realization automatic test equipment and synchronization.
As shown in Figure 1, backboard is connected one to one by each bidirectional data line in automatic test equipment in the present embodiment Each test board, backboard also pass through synchronous data line and are separately connected all test boards, and backboard also passes through cascade data line and connects The backboard of other automatic test equipment, in addition, backboard and the equal access state bus of all test boards.Wherein, bidirectional data line It can be realized, can also be realized by a bi-directional transfer of data line, the present embodiment is without limitation by two unidirectional data transmission lines.
In some optional implementations of the present embodiment, the first triggering mode further include: backboard turns to test board Trigger signal on hair.
In some optional implementations of the present embodiment, third triggering mode further include: third triggering mode also wraps It includes: backboard and all test boards is separately connected by the Packet State bus of high level of a plurality of original state, by each test board Card is divided into multiple groupings, and each grouping corresponds to a Packet State bus, and the test board in backboard and each grouping can be by correspondence Packet State bus down for the test board in low level and each grouping with corresponding Packet State bus be pulled low for Low level is as trigger signal.
In this manner, test board can be carried out according to the event control and synchronisation requirement of automatic test equipment Grouping, the corresponding Packet State bus of each grouping later, for example, being separately connected backboard with the first to the tenth grouping status bus With all test boards, Packet State bus totally ten, by 1,2 and 3 point into first group of test board, by test board 1,4 and 6 Point into second group, first is grouped corresponding first Packet State bus, and second packet correspond to second packet status bus, then backboard and Test board 1,2 and 3 can be by the first Packet State bus down for low level and test board 1,2 and 3 is with the first grouping Status bus is pulled low as low level as trigger signal, and backboard and test board 1,4 and 6 can be by second packet status bus Down for low level and test board 1,4 and 6 is pulled low using second packet status bus as low level as trigger signal.This Corresponding Packet State bus can be indicated grouping down for low level by some test board in backboard or grouping by sample In some event be completed, each test board in grouping monitors that status bus is pulled low to carry out corresponding event after low level Processing.It can the more flexible efficient event control for realizing automatic test equipment and synchronization.
In some optional implementations of the present embodiment, synchronous triggering signal is pulse signal.
The present embodiment uses the combination of a variety of triggering modes, flexibly can easily realize the event to automatic test equipment It controls and synchronous, enumerates two specific examples only below to illustrate.
The first, the clock phase synchronization between the clock chip of all test boards.
Each test board of automatic test equipment is equipped with clock chip, and the input clock signal of clock chip comes from It is fanned out to chip in the clock of backboard, the clock that the clock of backboard is fanned out to the clock chip that chip is sent to each test board is same Phase.On this basis, in order to export the clock chip of test board clock signal also can Phase synchronization, needed At two steps, first is that the reset terminal (reset pin) of test board clock chip is discharged simultaneously, second is that refresh clock core simultaneously The register of piece.The two steps require that each test board is completed at the same time, so this example is using the first and second triggerings Mode is completed to cooperate.
As shown in Fig. 2, realizing that the clock phase synchronization between the clock chip of all test boards includes the following steps:
It includes when discharging after receiving synchronous triggering signal that backboard is sent to all test boards respectively by bidirectional data line The lower trigger signal at clock chip reset end;
Later, backboard sends synchronous triggering signal to all test boards simultaneously by synchronous data line;
Later, all test boards receive the reset terminal for after synchronous triggering signal while discharging clock chip, complete measurement After board clock chip resets operation, test board carries out register configuration to clock chip according to the clock frequency of setting, In, the clock frequency of the clock chip output clock signal of each test board can be different, can also be identical.In this example, By the caching of register configuration values write clock chip when to clock chip progress register configuration, needed later to clock chip Enable end (enabled pin) send the pulse signal value that just register value of clock chip can be made to be updated to newly configure, thus when Clock chip starts to export required clock signal;
Later, backboard is sent to all test boards comprising receiving after synchronous triggering signal more respectively by bidirectional data line The lower trigger signal of new clock chip register;
Backboard sends synchronous triggering signal to all test boards simultaneously by synchronous data line;
All test boards send pulse signal to the enable end of clock chip simultaneously after receiving synchronous triggering signal, realize Each test board clock chip register updates simultaneously, so that the clock chip of all test boards exports initial phase simultaneously Synchronous clock signal.
The second, after the clock phase synchronization between the clock chip for realizing all test boards, each test board is simultaneously Pumping signal is sent to device under test, by taking device under test is chip to be measured as an example, test signal (pattern) contains chip survey The pumping signal of chip to be measured and the response signal of chip anticipated output are output to when examination, test board output is tested in signal After pumping signal to chip to be measured, judge whether the response signal of chip reality output to be measured is believed with the response of chip anticipated output It is number consistent, unanimously then judge that chip functions to be measured are normal, it is inconsistent, judge that chip functions to be measured are abnormal.
If the pin of chip to be measured is less, it is only necessary to when a test board can complete the test of chip to be measured, The pumping signal that each test board is sent to chip to be measured is completely independent, and does not need to be simultaneously emitted by, and test board is completed to survey Pumping signal is directly transmitted after trial signal pretreatment, is not needed using triggering mode.But if the pin of chip to be measured compared with More, when multiple test boards being needed to test simultaneously it, then each test board is needed to send to chip to be measured simultaneously and be motivated Signal, test board (i.e. standby rear) after completing signal pre-processing, needs wait state bus (trigger bus) is pulled low for that could execute in next synchronization point after low level and send pumping signal, then in this example Each test board is sent pumping signal to device under test simultaneously and is realized based on the combination of the first triggering mode and third triggering mode.
After clock phase synchronization between the clock chip for realizing all test boards, the clock core of each test board Piece export first clock signal rising edge be it is phase locked, test board since first rising edge clock from one meter Number is counted from one again when counting down to some count range, and different clock frequencies corresponds to different count ranges, makes to count back The clock phase re-synchronization of difference measurement board, the moment are known as synchronization point at the time of to one.For example, test board 1 Clock frequency is 200MHZ, and the clock frequency of test board 2 is 300MHZ, and the count range of test board 1 is 2000, test board The count range of card 2 is 3000, then the counting period of two test boards is all 1us, and two test boards return to one in counting At the time of clock phase re-synchronization.If the clock frequency of two test boards is identical, count range is also identical.In addition, It is end count at the time of counting down to count range to count midpoint at the time of counting down to count range half.
As shown in figure 3, realizing that each test board sends pumping signal to device under test simultaneously and includes:
After realizing the clock phase synchronization between the clock chip of all test boards, each test board passes through bi-directional data Line sends the upper trigger signal comprising armed state to backboard, that is, test board sends packet after completing signal pre-processing Upper trigger signal containing armed state notifies the backboard test board to complete signal pre-processing to backboard, in Life state;
After backboard receives the upper trigger signal comprising armed state of all test boards, by bidirectional data line to a certain It includes to specify the lower trigger signal that it is main test board that test board, which is sent, and in this example, backboard can be minimum to clock frequency Test board or finally complete signal pre-processing test board send comprising specify its be main test board lower touching Board is measured based on signalling;
It receives and specifies the test board of its lower trigger signal for main test board by status bus down for low level;This In example, the test board for receiving the lower trigger signal for specifying it to be main test board draws status bus when it counts midpoint Low is low level;
All test boards monitor that status bus is pulled low as after low level, in next end count for counting the period It carves and sends pumping signal to chip to be measured simultaneously, it is same that all test boards, which can be realized, and be sent to the pumping signal of chip to be measured Step output, to realize multiple test boards while test the chip to be measured of pin more than one.
In addition, in the case where being provided with Packet State bus, referring to each test board of above-mentioned realization simultaneously to device to be measured Part sends the detailed process of pumping signal, can realize that the test board in grouping is sent out to chip to be measured simultaneously based on similar process Pumping signal and multiple groups test board is sent to send pumping signal to chip to be measured simultaneously respectively.
It will be appreciated that can by setting timer etc. modes multiple test boards test simultaneously pin more than one to After surveying chip, high level is come back to by backboard, primary test board card or other test board release conditions buses, status bus, The process can be realized by the way that the mode of pull-up resistor mode is arranged.
Another embodiment of the present invention provides a kind of automatic test equipment, including backboard and multiple test boards, should Automatic test equipment executes the triggering implementation method of automatic test equipment provided by the above embodiment.
It should be noted that the triggering mode of automatic test equipment provided in this embodiment is said in the above-described embodiments Bright, details are not described herein.
In the description of the present invention, it should be noted that the orientation or positional relationship of the instructions such as term " on ", "lower" is base In orientation or positional relationship shown in the drawings, it is merely for convenience of description of the present invention and simplification of the description, rather than indication or suggestion Signified device or element must have a particular orientation, be constructed and operated in a specific orientation, therefore should not be understood as to this The limitation of invention.Unless otherwise clearly defined and limited, term " installation ", " connected ", " connection " shall be understood in a broad sense, example Such as, it may be fixed connection or may be dismantle connection, or integral connection;It can be mechanical connection, be also possible to be electrically connected It connects;It can be directly connected, the connection inside two elements can also be can be indirectly connected through an intermediary.For this For the those of ordinary skill in field, the specific meanings of the above terms in the present invention can be understood according to specific conditions.
It should also be noted that, in the description of the present invention, relational terms such as first and second and the like are only used Distinguish one entity or operation from another entity or operation, without necessarily requiring or implying these entities or There are any actual relationship or orders between operation.Moreover, the terms "include", "comprise" or its any other change Body is intended to non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wrapped Those elements are included, but also including other elements that are not explicitly listed, or further includes for this process, method, article Or the element that equipment is intrinsic.In the absence of more restrictions, the element limited by sentence "including a ...", and It is not excluded in process, method, article or equipment in the process, method, article or apparatus that includes the element that there is also other identical elements.
Obviously, the above embodiment of the present invention be only to clearly illustrate example of the present invention, and not be pair The restriction of embodiments of the present invention for those of ordinary skill in the art on the basis of the above description can be with It makes other variations or changes in different ways, all embodiments can not be exhaustive here, it is all to belong to the present invention The obvious changes or variations extended out of technical solution still in the scope of protection of the present invention.

Claims (10)

1. a kind of triggering implementation method of automatic test equipment, the automatic test equipment includes backboard and multiple test boards, It is characterized in that, this method includes being surveyed automatically based on following first to one or more of third triggering mode combination Try the triggering of equipment:
First triggering mode: the backboard sends lower trigger signal to each test board, and each test board is sent to backboard Upper trigger signal;
Second triggering mode: the backboard sends synchronous triggering signal to all test boards simultaneously;
Third triggering mode: connecting the backboard and all test boards by the status bus of high level of original state, described Backboard and all test boards can be by the status bus down for low level and all test boards are total with the state Line is pulled low as low level as trigger signal.
2. triggering implementation method according to claim 1, which is characterized in that this method further includes based on following 4th triggering The triggering of mode and its combination progress automatic test equipment with first to one or more of third triggering mode:
4th triggering mode: the backboard sends lower trigger signal to the backboard of other automatic test equipment, and described other are automatic The backboard of test equipment sends upper trigger signal to the backboard.
3. triggering implementation method according to claim 1, which is characterized in that first triggering mode further include: described Backboard forwards upper trigger signal to test board.
4. triggering implementation method according to claim 1, which is characterized in that the third triggering mode further include: with more Original state is that the Packet State bus of high level is separately connected the backboard and all test boards, by each test board point For multiple groupings, each grouping corresponds to a Packet State bus, and the test board in the backboard and each grouping can be by correspondence Packet State bus down for the test board in low level and each grouping with corresponding Packet State bus be pulled low for Low level is as trigger signal.
5. triggering implementation method according to claim 1, which is characterized in that the synchronous triggering signal is pulse signal.
6. triggering implementation method according to claim 1, which is characterized in that all test boards are equipped with clock chip, Clock phase synchronization between the clock chip of all test boards is based on first triggering mode and the second triggering mode Combination is realized.
7. triggering implementation method according to claim 6, which is characterized in that realize all test boards clock chip it Between clock phase synchronization include:
Backboard is sent to all test boards comprising discharging clock core after receiving synchronous triggering signal respectively by bidirectional data line The lower trigger signal of piece reset terminal;
Backboard sends synchronous triggering signal to all test boards simultaneously by synchronous data line;
All test boards receive the reset terminal for after synchronous triggering signal while discharging clock chip, according to the clock frequency of setting Register configuration is carried out to clock chip and caches register configuration values write clock chip;
It includes refresh clock core after receiving synchronous triggering signal that backboard is sent to all test boards respectively by bidirectional data line The lower trigger signal of piece register;
Backboard sends synchronous triggering signal to all test boards simultaneously by synchronous data line;
All test boards receive after synchronous triggering signal refresh clock chip register simultaneously so that all test boards when Clock chip exports the synchronous clock signal of initial phase simultaneously.
8. triggering implementation method according to claim 6, which is characterized in that each test board is sent to device under test simultaneously Pumping signal is realized based on the combination of first triggering mode and third triggering mode.
9. triggering implementation method according to claim 8, which is characterized in that realize each test board simultaneously to device under test Sending pumping signal includes:
After realizing the clock phase synchronization between the clock chip of all test boards, each test board passes through the bi-directional data Line sends the upper trigger signal comprising armed state to backboard;
After the backboard receives the upper trigger signal comprising armed state of all test boards, by the bidirectional data line to A certain test board is sent comprising specifying the lower trigger signal that it is main test board;
It receives and specifies the test board of its lower trigger signal for main test board by the status bus down for low level;
All test boards monitor that status bus is pulled low as after low level, same at next end count moment for counting the period When to device under test send pumping signal.
10. a kind of automatic test equipment, including backboard and multiple test boards, which is characterized in that the automatic test equipment executes Triggering implementation method as claimed in any one of claims 1-9 wherein.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109765480A (en) * 2019-02-01 2019-05-17 苏州华兴源创科技股份有限公司 A kind of test device and test equipment
CN110531132A (en) * 2019-07-10 2019-12-03 天利航空科技深圳有限公司 Test device based on embedded system
CN111123076A (en) * 2020-01-09 2020-05-08 苏州华兴源创科技股份有限公司 Calibration device and automatic test equipment
CN112859727A (en) * 2021-01-11 2021-05-28 苏州华兴源创科技股份有限公司 Appearance inspection PC motion control operation system and motion method

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008147674A1 (en) * 2007-05-25 2008-12-04 Motorola, Inc. Method and apparatus for disabling the user interface of electronic devices
CN102122995A (en) * 2010-12-20 2011-07-13 北京航空航天大学 Wireless distributed automatic test system (WDATS)
CN102929758A (en) * 2012-10-29 2013-02-13 北京航天测控技术有限公司 Integrated triggering route device for PXI intelligent testing platform equipment
CN203455835U (en) * 2013-08-28 2014-02-26 成都盟升科技有限公司 Bus triggering backplate applied to PXI (PCI extension for instrumentation) test platform
EP2937638A2 (en) * 2014-04-22 2015-10-28 Honeywell International Inc. Controller and loop performance monitoring in a heating, ventilating, and air conditioning system
CN106649021A (en) * 2016-11-25 2017-05-10 北京计算机技术及应用研究所 Testing device for PCIe slave device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2008147674A1 (en) * 2007-05-25 2008-12-04 Motorola, Inc. Method and apparatus for disabling the user interface of electronic devices
CN102122995A (en) * 2010-12-20 2011-07-13 北京航空航天大学 Wireless distributed automatic test system (WDATS)
CN102929758A (en) * 2012-10-29 2013-02-13 北京航天测控技术有限公司 Integrated triggering route device for PXI intelligent testing platform equipment
CN203455835U (en) * 2013-08-28 2014-02-26 成都盟升科技有限公司 Bus triggering backplate applied to PXI (PCI extension for instrumentation) test platform
EP2937638A2 (en) * 2014-04-22 2015-10-28 Honeywell International Inc. Controller and loop performance monitoring in a heating, ventilating, and air conditioning system
CN106649021A (en) * 2016-11-25 2017-05-10 北京计算机技术及应用研究所 Testing device for PCIe slave device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109765480A (en) * 2019-02-01 2019-05-17 苏州华兴源创科技股份有限公司 A kind of test device and test equipment
CN109765480B (en) * 2019-02-01 2021-09-10 苏州华兴源创科技股份有限公司 Testing device and testing equipment
CN110531132A (en) * 2019-07-10 2019-12-03 天利航空科技深圳有限公司 Test device based on embedded system
CN111123076A (en) * 2020-01-09 2020-05-08 苏州华兴源创科技股份有限公司 Calibration device and automatic test equipment
CN112859727A (en) * 2021-01-11 2021-05-28 苏州华兴源创科技股份有限公司 Appearance inspection PC motion control operation system and motion method

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Application publication date: 20190101

Assignee: Huaxingyuanchuang (Chengdu) Technology Co.,Ltd.

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Denomination of invention: Trigger Implementation Method and Automatic Test Equipment for Automatic Test Equipment

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