CN109089031B - Method for consistent output of CMOS detector under different frame frequency and same integration time - Google Patents
Method for consistent output of CMOS detector under different frame frequency and same integration time Download PDFInfo
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- CN109089031B CN109089031B CN201811119060.XA CN201811119060A CN109089031B CN 109089031 B CN109089031 B CN 109089031B CN 201811119060 A CN201811119060 A CN 201811119060A CN 109089031 B CN109089031 B CN 109089031B
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- H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
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- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
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- H—ELECTRICITY
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- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
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- H—ELECTRICITY
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- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
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- H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
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Abstract
The embodiment of the invention discloses a method for ensuring consistent output of a CMOS detector under the same integration time at different frame frequencies. The method comprises the steps of dividing the integration time of a CMOS detector into a first type of integration time and a second type of integration time according to the camera frame period and the reading time of a frame pixel of the actual working condition; for the CMOS detector with the integration time belonging to the first type of integration time, the CMOS detector works according to a preset first state sequence; for a CMOS detector with an integration time belonging to a second type of integration time, the CMOS detector operates according to a preset second state sequence, which is different from the first state sequence. For the condition of short integration time, the method can read out immediately after the integration of one frame of image is finished, so that the output cannot be influenced by parasitic light; for the case of long integration time, the reading time of one frame of pixels is divided into two parts, so that the integration time is effectively ensured to be continuously adjustable within the frame period range, and the purpose of consistent output is achieved.
Description
Technical Field
The invention relates to the technical field of photoelectric detection, in particular to a method for ensuring consistent output of a CMOS detector under the conditions of different frame frequencies and the same integration time.
Background
In most imaging systems based on CMOS detectors, the frame period (i.e., the inverse of the frame rate) is defined as the integration time in order to increase the incident energy of the imaging system and the frame rate. If the observed scene is bright, the integration time needs to be reduced, and at present, the frame rate is usually increased.
For an airborne imaging spectrometer, after the spatial resolution index along the direction of the aircraft is determined, the flight speed of the aircraft determines the working frame frequency of the CMOS detector. The flying speed is usually constant and does not change in real time according to the brightness of the ground feature. Therefore, the airborne imaging spectrometer needs to adjust the integration time at any time under a certain frame frequency. However, for the CMOS detector, the output code value of the CMOS detector is interfered by parasitic light due to the leakage phenomenon of the CMOS transistor and the fact that the memory area mask of the pixel is not an ideal phenomenon. After the integration of the photosensitive pixel is finished, if collected photoproduction charges are not immediately converted into voltage and read out, the code value finally output by the detector changes, and the longer the waiting time is, the more the code value is increased. This results in different output values of the imaging system at different frame rates and within the same integration time, which adds a doubling of the effort to laboratory radiometric calibration. The laboratory radiometric calibration work is changed from the original variable with only 'integration time' into two variables of 'integration time' and 'frame frequency'. In addition, if the working mode of 'reading out after integration' is adopted, the pixel reading time detector does not integrate, and the maximum integration time is only the frame period minus the reading time. For systems with higher frame rates, little integration time is available. At present, the existing CMOS detector working mode can not solve the two problems at the same time.
Therefore, the embodiment of the invention provides a method for ensuring consistent output of a CMOS detector under the condition of different frame frequencies and the same integration time, aiming at the problems that the output of the existing CMOS detector is inconsistent in the same integration time under different frame frequencies and the CMOS detector cannot always integrate in the whole frame period.
Disclosure of Invention
Aiming at the problems that the output of the existing CMOS detector is inconsistent in the same integration time at different frame frequencies and the CMOS detector cannot always integrate in the whole frame period, the embodiment of the invention provides a method for ensuring the output consistency of the CMOS detector under the conditions of different frame frequencies and the same integration time. The method for ensuring consistent output of the CMOS detector under the condition of different frame frequencies and the same integration time divides the integration time into two conditions according to the actual working frame period and the actual working reading time of the CMOS detector; different detector working modes are provided according to the two conditions respectively, so that the integration time of the CMOS detector can be continuously adjusted within the frame period range, and the CMOS detector is not influenced by MOS tube leakage and parasitic light.
The specific scheme of the method for ensuring consistent output of the CMOS detector under the same integration time at different frame frequencies provided by the embodiment of the invention is as follows: a method for ensuring consistent output of a CMOS detector at the same integration time at different frame rates, comprising: step S1: dividing the integration time of the CMOS detector into a first type of integration time and a second type of integration time according to the camera frame period and the reading time of a frame pixel of the actual working condition; step S2: for the CMOS detector with the integration time belonging to the first type of integration time, the CMOS detector works according to a preset first state sequence; step S3: for a CMOS detector with an integration time belonging to a second type of integration time, the CMOS detector operates according to a preset second state sequence, which is different from the first state sequence.
Preferably, the integration time is a time period from an integration start state to an integration end state of the CMOS detector.
Preferably, the starting point of the first type of integration time is 0, and the end point of the first type of integration time is the frame period minus the readout time of one frame of picture elements.
Preferably, the start point of the second type of integration time is the frame period minus the readout time of one frame pixel, and the end point of the second type of integration time is the frame period.
Preferably, the first state is an integration start state, an integration time filling state, an integration end state, a pixel reading state and an idle waiting state in sequence.
Preferably, the readout time of a frame of picture elements is divided into two parts, a first part time and a second part time, in said step S3.
Preferably, the first part of time is the camera frame period minus the integration time of the CMOS detector, and the second part of time is the readout time of one frame of picture elements minus the first part of time.
Preferably, the second state is an integration start state, a second partial state read by a previous frame pixel, an integration time filling state, an integration end state, and a first partial state read by a pixel.
Preferably, the CMOS detector is a GSENSE2020 type detector with 16 tap outputs per row.
Preferably, the readout time of one frame pixel of the CMOS detector is 3 ms.
According to the technical scheme, the embodiment of the invention has the following advantages:
the embodiment of the invention provides a method for ensuring that the output of a CMOS detector is consistent under the same integration time at different frame frequencies. In the method for ensuring the output consistency of the CMOS detector under the same integration time at different frame frequencies, the CMOS detector is immediately converted into a digital signal and read out after the integration of the pixels is finished, so that the influence of parasitic light on photo-generated charges in a storage area is avoided, and the output code values of the CMOS detector are ensured to be consistent under the conditions of different frame frequencies and the same integration time. Further, in the method for ensuring consistent output of the CMOS detector under the same integration time of different frame frequencies, in the case that the integration time belongs to the second type of integration time, the pixel readout time of one frame is divided into two parts: one part is placed before the integration time of the next frame, and the other part is placed in the integration time of the next frame; therefore, the proportion of the two parts can be flexibly adjusted according to the frame frequency and the integration time, and the integration time can be continuously adjusted in the range of (namely 0-frame period T).
Drawings
FIG. 1 is a flowchart illustrating steps of a method for ensuring consistent output of a CMOS detector at different frame rates and with the same integration time according to an embodiment of the present invention;
FIG. 2 shows a CM in an embodiment of the present inventionOS detector integration time 0 ~ (T-T)RD) A schematic of a mode of operation of the range;
FIG. 3 shows an embodiment of the present invention in which a CMOS detector is integrated over time (T-T)RD) Schematic diagram of operating mode in T range;
FIG. 4 is a diagram illustrating the specific operation mode time allocation of the CMOS detector integration time of 8ms in the embodiment of the present invention;
fig. 5 is a schematic diagram of the specific operation mode time allocation of the integration time 18ms of the CMOS detector in the embodiment of the present invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It will be appreciated that the data so used may be interchanged under appropriate circumstances such that the embodiments described herein may be practiced otherwise than as specifically illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
As shown in fig. 1, a flowchart of steps of a method for ensuring consistent output of a CMOS detector under the same integration time at different frame rates is provided according to an embodiment of the present invention. The method comprises the steps of firstly, dividing integration time into two conditions according to the actual working frame period and the reading time of a CMOS detector; different detector working modes are provided according to the two conditions respectively, so that the integration time of the CMOS detector is continuously adjustable in the frame period range and is not influenced by CMOS tube leakage and parasitic light. The method specifically comprises three steps, and the specific steps are as follows.
Step S1: according to the camera frame period and the reading time of a frame of pixels under actual working conditions, the integration time of the CMOS detector is divided into a first type of integration time and a second type of integration time. In this embodiment, the camera frame period is simply referred to as a frame period and is denoted by a letter T. Letter T for read-out time of one frame pixelRDAnd (4) showing. The start of the first type of integration time is 0 and the end of the first type of integration time is the frame period minus the readout time of one frame pixel. The range of integration times of the first type is represented graphically by letters from 0 to T-TRD. The starting point of the second type of integration time is the frame period minus the readout time of one frame pixel, and the end point of the second type of integration time is the frame period. The range of integration times of the second type is symbolized by letters T-TRDT. In this embodiment, the integration time is defined as the time period from the integration start state to the integration end state of the CMOS detector.
Step S2: for a CMOS detector with integration time belonging to the first type of integration time, the CMOS detector operates according to a preset first state sequence. Corresponding to a range of 0 to T-T for the integration timeRDThe CMOS detector operates according to a preset first state sequence. As shown in FIG. 2, the CMOS detector has an integration time of 0 to (T-T)RD) Schematic illustration of the operating mode of the range. The first state is an integration starting state, an integration time filling state, an integration ending state, a pixel reading state and an idle waiting state in sequence. And is denoted by letters "SI (N) -BLANK (N) -FOT (N) -RD (N) -IDLE (N) … …", wherein N represents the Nth frame of image. In this embodiment, the two state times "integration start SI" and "integration end FOT" are very short.
Step S3: for productAnd the sub-time belongs to a CMOS detector of a second type of integration time, and the CMOS detector works according to a preset second state sequence, wherein the second state sequence is different from the first state sequence. Corresponding to a range T- (T) for the integration timeRDT), the CMOS detector operates according to a preset second state sequence. In step S3, the readout time for a frame of picture elements is divided into two parts, a first part time and a second part time, respectively. The first part time is the camera frame period minus the integration time of the CMOS detector, and the second part time is the readout time of one frame pixel minus the first part time. As shown in FIG. 3, the CMOS detector is integrated in time (T-T)RD) Schematic diagram of the operating mode in the T range. The second state sequence is an integration starting state, a second part state read by a pixel of a previous frame, an integration time filling state, an integration ending state and a first part state read by the pixel. Is represented by alphabets as
"SI (N) - -RD2(N-1) - -BLANK (N) - -FOT (N) - -RD1(N) - -SI (N +1) - -RD2(N) - -BLANK (N +1) - -FOT (N +1) … …", wherein N represents the Nth image, N-1 represents the Nth-1 image, and N +1 represents the Nth +1 image.
In this embodiment, one of the steps S2 and S3 is selected and implemented according to the difference to which the integration time belongs.
In the method for ensuring consistent output of the CMOS detector under the same integration time at different frame frequencies, provided by the embodiment of the invention, the CMOS detector is immediately converted into a digital signal and read out after pixel integration is completed, so that the influence of parasitic light on photo-generated charges in a storage area is avoided, and the output code values of the CMOS detector are ensured to be consistent under the conditions of different frame frequencies and the same integration time.
In the method for ensuring consistent output of the CMOS detector under the same integration time at different frame frequencies provided by the embodiment of the present invention, under the condition that the integration time belongs to the second type of integration time, the pixel readout time of one frame is divided into two parts: one part is placed before the integration time of the next frame, and the other part is placed in the integration time of the next frame; therefore, the proportion of the two parts can be flexibly adjusted according to the frame frequency and the integration time, and the integration time can be continuously adjusted in the range of (namely 0-frame period T).
The application process embodiment of the method for ensuring consistent output of the CMOS detector under the same integration time at different frame rates of the CMOS detector is now explained by taking a GSENSE2020 model with 16 tap outputs per line as a specific embodiment of the application.
An area array CMOS detector GSENSE2020 of Long-Time-core company has pixel number of 2048 × 2048, pixel reading time of one frame of pixels is 3ms, and working frame frequency of a camera is 50 HZ. The frame period T of the camera is 1/50HZ is 20 ms; read-out time T of a frame pixelRDThe integration time is divided into two cases, 3 ms: the first type integration time is 0-17 ms, and the second type integration time is 17-20 ms.
The integration time of the detector is assumed to be 8ms, which is in accordance with the first-class integration time of 0-17 ms. As shown in fig. 4, the BLANK between the state SI and the state FOT is an integration time of 8ms, the readout time of one frame pixel is fixed to 3ms, and the IDLE state is used to wait for 9ms, thereby completing one frame period.
The integration time of the detector is assumed to be 18ms, which is consistent with the situation of 17-20 ms of the second type of integration time. As shown in fig. 5, firstly, the state SI (N) to the state RD1(N) is one frame period, and the integration time is 18ms (state SI to state FOT), so the first part time of the state RD1 is 20ms-18ms ═ 2 ms; then, 3ms is needed for reading out one frame of pixels, RD1 is 2ms, so that the second part time of the state RD2 is 3ms-2ms which is 1 ms; the final integration time was 18ms, RD2 accounted for 1ms, and the remaining 17ms was supplemented by BLANK.
In this embodiment, for a short integration time (i.e., the integration time is less than or equal to the frame period minus the readout time), the image integration for one frame ends and is immediately read out, and parasitic light does not affect the charge in the storage region; for long integration time (i.e. integration time is greater than or equal to frame period minus readout time), the readout time of one frame is flexibly divided into two parts, and the second part is filled into the integration time of the next frame, so that no idle waiting time is needed. The method effectively ensures that the imaging process of the CMOS detector is not influenced by the leakage of the CMOS tube and parasitic light, and the integration time is continuously adjustable within the frame period range.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A method for ensuring consistent output of a CMOS detector at different frame rates with the same integration time, the method comprising:
step S1: dividing the integration time of the CMOS detector into a first type of integration time and a second type of integration time according to the camera frame period and the reading time of a frame pixel of the actual working condition;
step S2: for the CMOS detector with the integration time belonging to the first type of integration time, the CMOS detector works according to a preset first state sequence;
step S3: for a CMOS detector with integration time belonging to a second type of integration time, the CMOS detector works according to a preset second state sequence, wherein the second state sequence is different from the first state sequence;
the CMOS detector immediately converts the pixel integration into a digital signal and reads the digital signal;
in case the integration time belongs to the second category of integration times, the pixel readout time of a frame is divided into two parts: one part is placed before the integration time of the next frame, and the other part is placed in the integration time of the next frame; so that the ratio of the two parts can be flexibly adjusted according to the frame rate and the integration time.
2. The method of claim 1, wherein the integration time is a time period from an integration start state to an integration end state of the CMOS detector.
3. The method of claim 1, wherein the starting point of the first type of integration time is 0 and the ending point of the first type of integration time is a frame period minus a readout time of one frame pixel.
4. A method for ensuring consistent output of a CMOS detector at different frame rates with the same integration time according to claim 1, wherein the start point of the second type of integration time is the frame period minus the readout time of one frame pixel, and the end point of the second type of integration time is the frame period.
5. The method of claim 1, wherein the first state is an integration start state, an integration time filling state, an integration end state, a pixel readout state, and an idle waiting state.
6. A method for ensuring consistent output of a CMOS detector at different frame rates and the same integration time according to claim 1, wherein the readout time of a frame of picture elements is divided into two parts, a first part time and a second part time in step S3.
7. The method of claim 6, wherein the first portion of time is a camera frame period minus an integration time of the CMOS detector, and the second portion of time is a readout time of one frame pixel minus the first portion of time.
8. The method of claim 6, wherein the second state is sequentially an integration start state, a second part state read out from a pixel of a previous frame, an integration time filling state, an integration end state, and a first part state read out from a pixel.
9. The method of claim 1, wherein the CMOS detector is a GSENSE2020 type detector with 16 tap outputs per row.
10. The method of claim 9, wherein the CMOS detector has a frame pixel readout time of 3 ms.
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