CN108770242B - Method for manufacturing rear half-buried circuit of fine circuit on copper foil by corrosion reduction method - Google Patents
Method for manufacturing rear half-buried circuit of fine circuit on copper foil by corrosion reduction method Download PDFInfo
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- CN108770242B CN108770242B CN201810703306.1A CN201810703306A CN108770242B CN 108770242 B CN108770242 B CN 108770242B CN 201810703306 A CN201810703306 A CN 201810703306A CN 108770242 B CN108770242 B CN 108770242B
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- copper foil
- circuit
- copper
- prepreg
- rear half
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 120
- 239000011889 copper foil Substances 0.000 title claims abstract description 86
- 238000000034 method Methods 0.000 title claims abstract description 51
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 40
- 230000007797 corrosion Effects 0.000 title abstract description 3
- 238000005260 corrosion Methods 0.000 title abstract description 3
- 229910052802 copper Inorganic materials 0.000 claims abstract description 33
- 239000010949 copper Substances 0.000 claims abstract description 33
- 238000005553 drilling Methods 0.000 claims abstract description 25
- 238000005530 etching Methods 0.000 claims abstract description 19
- 238000009713 electroplating Methods 0.000 claims abstract description 17
- 238000004080 punching Methods 0.000 claims abstract description 13
- 230000003287 optical effect Effects 0.000 claims abstract description 7
- 238000003825 pressing Methods 0.000 claims abstract description 7
- 230000003628 erosive effect Effects 0.000 claims abstract description 6
- 238000004381 surface treatment Methods 0.000 claims abstract description 5
- 238000006087 Brown hydroboration reaction Methods 0.000 claims abstract description 4
- 238000001035 drying Methods 0.000 claims abstract description 4
- 239000003292 glue Substances 0.000 claims abstract description 4
- 239000000463 material Substances 0.000 claims abstract description 3
- 230000008021 deposition Effects 0.000 claims description 7
- 229910000831 Steel Inorganic materials 0.000 claims description 6
- 239000010959 steel Substances 0.000 claims description 6
- 239000002655 kraft paper Substances 0.000 claims description 3
- 238000002844 melting Methods 0.000 claims description 3
- 238000003801 milling Methods 0.000 claims description 3
- 238000005406 washing Methods 0.000 claims description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 2
- 101000921339 Dickeya chrysanthemi Cys-loop ligand-gated ion channel Proteins 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000003475 lamination Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 230000037303 wrinkles Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a method for manufacturing a rear half-embedded line of a fine line on a copper foil by an erosion reduction method, which comprises the following steps: s01, manufacturing a copper foil carrier and etching a circuit on the copper foil in a controlled depth manner; s02, etching the copper-clad plate to manufacture an inner core plate; s03, punching positioning holes in the inner-layer core plate and the copper foil carrier; s04, performing brown oxidation treatment on the etched copper foil carrier and the inner core plate; s05, conveying the materials into a press for pressing; s06, removing the hardness support layer on the copper foil carrier; s07, drilling holes in the board, and drying the board after drilling holes; s08, sending the copper-deposited electroplating wire to remove glue and then deposit copper for electroplating; s09, sequentially pasting a photosensitive dry film → exposing → developing → etching the circuit; s10, scanning whether the outer layer circuit has open short circuit by an automatic optical detector; and S11, printing green oil and then performing surface treatment. The method for manufacturing the rear half-embedded circuit of the fine circuit on the copper foil by the corrosion reduction method provided by the invention enables the circuit to be finer, and can realize the effects of manufacturing more circuits on the same area and reducing the crosstalk of the circuit.
Description
Technical Field
The invention relates to a method for manufacturing a semi-buried circuit of a fine circuit on a copper foil by an erosion reduction method, belonging to the field of printed circuit boards.
Background
At present, the type of the PCB is a multi-layer board, and the manufacturing process thereof is "manufacturing inner layer circuits on a CCL (copper clad laminate)", pressing each inner layer CCL (copper clad laminate) + PP (prepreg) + copper foil into a whole → drilling a hole on a pressing body or laser drilling → copper deposition electroplating → manufacturing circuits on the electroplated copper foil of the pressing body again ", and the above process → green printing oil → surface treatment is repeated according to the number of layers. The copper foil is positioned outside the laminated body in the manufacturing process, and the thickness of the copper foil used for the multilayer board is mostly 1oz (35um), Hoz (17 um). However, in the process, the copper layer of the copper foil becomes thicker after the copper deposition electroplating process, wherein the thickness of the multi-layer board after the electroplating with the 1oz copper foil as the base copper is increased to 50-60um, and the thickness of the HDI or ELIC after the electroplating with the H oz and T oz copper foils as the base copper is changed to 20-35 um. The process cannot fabricate fine lines with line width and line spacing L and S smaller than 30um due to the increase of the copper layer thickness.
Since the copper foil increases in thickness after plating, the lateral etching of the etched wiring during etching is aggravated, and the wiring width (W) is increased2) The restriction is made, and the line pitch (S) becomes small. In addition, some techniques use thinner copper foil to control the total copper thickness after plating to achieve the fabrication of fine lines. However, thin copper is expensive and has too little hardness, so that a carrier is required during the lamination process to prevent the lamination wrinkles, and this technique reduces the thermal conductivity of the PCB due to too thin total copper thickness.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention aims to overcome the defect that the L/S of a circuit is limited due to the fact that the copper foil after the traditional electroplating is thicker, and provides a method for manufacturing a rear half embedded circuit of a fine circuit on the copper foil by an erosion reduction method, wherein the thickness of the electroplated copper foil can be reduced.
In order to solve the technical problems, the technical scheme adopted by the invention is as follows:
a method for manufacturing a rear half-embedded circuit of a fine circuit on a copper foil by an erosion reduction method comprises the following steps:
s01, manufacturing a copper foil carrier and controlling deep etching of a circuit on the copper foil, specifically:
1) preparing a plurality of prepregs, punching positioning holes along the periphery direction of the prepregs, fishing out the middle part of the prepregs, and leaving a closed frame edge of the prepregs;
2) preparing a hardness supporting layer with the same size as the middle part of the prepreg, and fishing out the hardness supporting layer;
3) firstly, a first prepreg frame is placed on a copper foil, then a hardness supporting layer is placed in the first prepreg frame, then a prepreg is placed and covered on the first prepreg frame, then a second prepreg frame is placed on the prepreg, then the hardness supporting layer is placed in the second prepreg frame, and finally the copper foil is covered on the second prepreg frame;
4) putting the stacked body obtained in the last step into a press to be pressed to manufacture a copper foil carrier;
s02, sequentially pasting an anti-photosensitive dry film, exposing, developing and etching the copper foil carrier deeply to manufacture a circuit; meanwhile, the copper-clad plate is sequentially subjected to photosensitive dry film pasting, exposure, development and etching to manufacture a circuit to manufacture an inner core plate;
s03, punching positioning holes on the inner core plate and the copper foil carrier, scanning the copper foil carrier and the inner core plate by using an automatic optical detector to perform open-short circuit test, and punching the semi-cured sheet by using a punching machine;
s04, performing brown oxidation treatment on the etched copper foil carrier and the inner core plate;
s05, overlapping the punched prepreg, the inner core plate and the inner core plate of the copper foil carrier after hot melting, sleeving rivets or sleeving steel discs with the rivets, and feeding the steel discs into a press for pressing;
s06, scanning the pressed board S05 by X-Ray, drilling a positioning hole, fishing and milling the frame edge of the prepreg according to the position of the positioning hole by using a fishing machine, and removing the hardness support layer on the copper foil carrier;
s07, drilling holes on the board according to the positioning hole positions in the S06, and drying the board after drilling holes;
s08, washing the drilled board with high-pressure water to remove drilling dirt, and sending the board into a copper deposition electroplating line to remove glue and then deposit copper for electroplating;
s09, sequentially pasting a photosensitive dry film → exposing → developing → etching the circuit;
s10, scanning whether the outer layer circuit has open short circuit by an automatic optical detector;
and S11, printing green oil and then performing surface treatment.
In S01, the thickness of the copper foil carrier is 1.0-1.1 mm.
The material of the hardness support layer comprises kraft paper.
The drilling mode in the S07 comprises mechanical drilling or laser drilling.
In S01, the circuit is etched and the non-circuit part is etched to remove 3/4 of copper thickness.
In S01, the prepreg frame was 3 inches wide.
The trace height was 3/4 copper foil thickness, leaving a bottom copper 1/4 thickness.
The invention has the beneficial effects that: the invention breaks through the traditional process flow, the circuit is etched on the copper foil and then is pressed with the CCL and the PP into a whole, the etching depth of the copper foil is controlled, the etched circuit is partially embedded into the PP, only 1/4 with the thickness of the original copper foil is reserved on the surface of the PP of the dielectric layer, the total copper thickness is still reduced by 3/4 compared with the copper thickness of the traditional process, but the heat-conducting property of the PCB cannot be reduced.
Drawings
FIGS. 1 to 5 are schematic views showing the flow of steps one to eleven in a method for manufacturing a rear half-buried wiring of a fine wiring by a subtractive method on a copper foil according to the present invention;
FIG. 6 is a prior art construction of a conventional process press-fit body;
fig. 7 shows the structure of the press-fit body produced by the present invention.
The present invention is further described with reference to the accompanying drawings, and the following examples are only for clearly illustrating the technical solutions of the present invention, and should not be taken as limiting the scope of the present invention.
As shown in fig. 1 to 5, in order to solve the problem that the copper layer of the copper foil of the multi-layer board in the prior art becomes thick after the copper deposition electroplating process, and further the process cannot manufacture a fine circuit with a line width and line distance L/S <30um, the invention provides a method for manufacturing a rear half embedded circuit of the fine circuit on the copper foil by an erosion reduction method, which comprises the following steps:
the method comprises the steps of manufacturing a copper foil carrier and manufacturing a circuit on the copper foil, wherein the copper foil is unlimited in thickness and wide in application, the method can be particularly applied to thick copper to increase the density of a thick copper circuit, and the thickness range for manufacturing the copper foil carrier is 1.0-1.1 mm.
1) Preparing a plurality of prepregs, punching positioning holes along the periphery direction of the prepregs, fishing out the middle part of the prepregs, and leaving a closed prepreg frame edge, wherein the width of the prepreg frame edge is 3 inches;
2) preparing a hardness supporting layer with the same size as the middle part of the prepreg, and fishing out the hardness supporting layer;
3) firstly, a first prepreg frame is placed on a copper foil, then a hardness support layer is placed in the first prepreg frame, then a prepreg is placed and covered on the first prepreg frame, a second prepreg frame is placed on the prepreg, a hardness support layer is placed in the second prepreg frame, and finally the copper foil is covered on the second prepreg frame, wherein the hardness support layer comprises kraft paper;
4) putting the stacked body obtained in the last step into a press to be pressed to manufacture a copper foil carrier;
and step two, sequentially pasting an anti-photosensitive dry film on the copper foil, exposing, developing and etching to manufacture a circuit, wherein the circuit height is 3/4 the thickness of the copper foil, and the bottom copper 1/4 is reserved. Meanwhile, the copper-clad plate is also subjected to photosensitive dry film, exposure, development and etching to manufacture the circuit to manufacture the inner core plate.
And thirdly, punching positioning holes on the inner core board and the copper foil carrier, scanning the copper foil carrier and the inner core board by using an automatic optical detector to perform open-short circuit test, and punching the semi-cured sheet by using a punching machine, wherein the position and the size of the semi-cured sheet are consistent with those of the core board and the copper foil carrier.
Step four, performing brown oxidation treatment on the etched copper foil carrier and the inner core plate;
fifthly, overlapping and hot-melting the punched prepreg, the inner core plate, the copper foil carrier inner core plate and the copper foil carrier, then sleeving a rivet or sleeving a steel disc with the rivet, and sending the steel disc into a press for pressing;
and step six, scanning the board pressed in the step 5 by X-Ray, drilling a positioning hole, fishing and milling the frame edge of the prepreg by using a fishing machine according to the position of the positioning hole, and removing the hardness support layer on the copper foil carrier.
And step seven, drilling the plate according to the position of the positioning hole in the step 6, wherein the drilling mode comprises mechanical drilling or laser drilling, and drying the plate after drilling.
And step eight, washing the drilled plate with high-pressure water to remove drilling dirt, and sending the plate into a copper deposition electroplating line to remove glue and then deposit copper for electroplating.
And step nine, sequentially pasting a photosensitive dry film → exposing → developing → etching the circuit. Etching to remove 1/4 copper or selectively reserving part of the circuit according to the requirement of the customer; if the HDI board or the ELIC board is manufactured, the process can be repeated.
And step ten, scanning whether the outer layer circuit has open short circuit or not by using an automatic optical detector.
And step eleven, printing green oil and then carrying out surface treatment.
As shown in fig. 6, the circuit of the conventional PCB is on the outer side of the PP layer, as shown in fig. 7, the present invention controls the etching depth of the copper foil, and embeds the etched circuit into the PP, and only 1/4 of the original copper foil thickness is remained on the surface of the PP layer, so that even after the copper deposition and electroplating, the total copper thickness on the outer side of the PP layer is still reduced by 3/4 compared with the copper thickness of the conventional process, but at the same time, the heat-conducting performance of the PCB is not reduced (the conventional process is a laminated body as shown in fig. 6, and the present invention is a laminated body as shown in fig.. The original 50-60um outer layer circuit after 1oz copper foil electroplating can only be used for manufacturing the circuit with L/S >100um/100um, but the 1oz copper foil electroplating of the invention can be used for manufacturing the circuit with the copper thickness of 25-35um and the L/S <25um/25 um. The original H oz copper foil can only be used for manufacturing the circuit with L/S of 75um/75um after 30-50um is electroplated, but the circuit with L/S of 10um/10um can be manufactured by 20-30um after the H oz copper foil is electroplated by the method. The circuit of the T oz copper foil and the micron-sized thin copper foil can be realized by the H oz copper foil, so that the cost is saved to a great extent, the circuit becomes finer, and the effect of manufacturing more circuits in the same area can be realized.
The foregoing is only a preferred embodiment of the present invention, and it will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the principle of the present invention, and such modifications and improvements should be considered as the protection scope of the present invention.
Claims (7)
1. A method for manufacturing a rear half-embedded circuit of a fine circuit on a copper foil by an erosion reduction method is characterized in that: the method comprises the following steps:
s01, manufacturing a copper foil carrier and controlling deep etching of a circuit on the copper foil, specifically:
1) preparing a plurality of prepregs, punching positioning holes along the periphery direction of the prepregs, fishing out the middle part of the prepregs, and leaving a closed frame edge of the prepregs;
2) preparing a hardness supporting layer with the same size as the middle part of the prepreg, and fishing out the hardness supporting layer;
3) firstly, a first prepreg frame is placed on a copper foil, then a hardness supporting layer is placed in the first prepreg frame, then a prepreg is placed and covered on the first prepreg frame, then a second prepreg frame is placed on the prepreg, then the hardness supporting layer is placed in the second prepreg frame, and finally the copper foil is covered on the second prepreg frame;
4) putting the stacked body obtained in the last step into a press to be pressed to manufacture a copper foil carrier;
s02, sequentially pasting an anti-photosensitive dry film, exposing, developing and etching the copper foil carrier deeply to manufacture a circuit; meanwhile, the copper-clad plate is sequentially subjected to photosensitive dry film pasting, exposure, development and etching to manufacture a circuit to manufacture an inner core plate;
s03, punching positioning holes on the inner core plate and the copper foil carrier, scanning the copper foil carrier and the inner core plate by using an automatic optical detector to perform open-short circuit test, and punching the semi-cured sheet by using a punching machine;
s04, performing brown oxidation treatment on the etched copper foil carrier and the inner core plate;
s05, overlapping and hot-melting the punched prepreg, the inner core plate and the copper foil carrier, sleeving a rivet or a steel disc with the rivet, and feeding the steel disc into a press for pressing;
s06, scanning the pressed board S05 by X-Ray, drilling a positioning hole, fishing and milling the frame edge of the prepreg according to the position of the positioning hole by using a fishing machine, and removing the hardness support layer on the copper foil carrier;
s07, drilling holes on the board according to the positioning hole positions in the S06, and drying the board after drilling holes;
s08, washing the drilled board with high-pressure water to remove drilling dirt, and sending the board into a copper deposition electroplating line to remove glue and then deposit copper for electroplating;
s09, sequentially pasting a photosensitive dry film → exposing → developing → etching the circuit;
s10, scanning whether the outer layer circuit has open short circuit by an automatic optical detector;
and S11, printing green oil and then performing surface treatment.
2. The method of claim 1 for fabricating a rear half-buried wiring of a fine wiring on a copper foil by a subtractive process, wherein: in S01, the thickness of the copper foil carrier is 1.0-1.1 mm.
3. The method of claim 1 for fabricating a rear half-buried wiring of a fine wiring on a copper foil by a subtractive process, wherein: the material of the hardness support layer comprises kraft paper.
4. The method of claim 1 for fabricating a rear half-buried wiring of a fine wiring on a copper foil by a subtractive process, wherein: the drilling mode in the S07 comprises mechanical drilling or laser drilling.
5. The method of claim 1 for fabricating a rear half-buried wiring of a fine wiring on a copper foil by a subtractive process, wherein: in S01, the circuit is etched and the non-circuit part is etched to remove 3/4 of copper thickness.
6. The method of claim 1 for fabricating a rear half-buried wiring of a fine wiring on a copper foil by a subtractive process, wherein: in S01, the prepreg frame was 3 inches wide.
7. The method of claim 1 for fabricating a rear half-buried wiring of a fine wiring on a copper foil by a subtractive process, wherein: in S02, the height of the trace was 3/4 cu foil thickness, leaving bottom cu 1/4 thickness.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810703306.1A CN108770242B (en) | 2018-06-29 | 2018-06-29 | Method for manufacturing rear half-buried circuit of fine circuit on copper foil by corrosion reduction method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810703306.1A CN108770242B (en) | 2018-06-29 | 2018-06-29 | Method for manufacturing rear half-buried circuit of fine circuit on copper foil by corrosion reduction method |
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| Publication Number | Publication Date |
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| CN108770242A CN108770242A (en) | 2018-11-06 |
| CN108770242B true CN108770242B (en) | 2020-10-23 |
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Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN114286515B (en) * | 2021-11-12 | 2025-06-17 | 沪士电子股份有限公司 | A method for increasing the power supply area of a circuit board |
| CN114885526B (en) * | 2022-03-31 | 2024-08-13 | 生益电子股份有限公司 | Method for manufacturing PCB with embedded circuit and PCB with embedded circuit |
| CN114679849A (en) * | 2022-05-07 | 2022-06-28 | 湖南柳鑫电子新材料有限公司 | Copper foil carrier and manufacturing method thereof |
| CN114940006A (en) * | 2022-05-07 | 2022-08-26 | 湖南柳鑫电子新材料有限公司 | Copper foil carrier manufacturing method and copper foil carrier |
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Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0955564A (en) * | 1995-08-11 | 1997-02-25 | Cmk Corp | Printed wiring board |
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|---|---|---|---|---|
| US20110114369A1 (en) * | 2009-11-16 | 2011-05-19 | Sang Youp Lee | Heat dissipating substrate and method of manufacturing the same |
| CN102196668A (en) * | 2010-03-08 | 2011-09-21 | 宏恒胜电子科技（淮安）有限公司 | Method for manufacturing circuit board |
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