CN108737704A - CCD camera Debris Image acquisition system and method - Google Patents
CCD camera Debris Image acquisition system and method Download PDFInfo
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- CN108737704A CN108737704A CN201810583178.1A CN201810583178A CN108737704A CN 108737704 A CN108737704 A CN 108737704A CN 201810583178 A CN201810583178 A CN 201810583178A CN 108737704 A CN108737704 A CN 108737704A
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- 238000000034 method Methods 0.000 title claims abstract description 15
- 230000015654 memory Effects 0.000 claims abstract description 65
- 230000005540 biological transmission Effects 0.000 claims abstract description 36
- 230000003287 optical effect Effects 0.000 claims abstract description 25
- 238000012545 processing Methods 0.000 claims abstract description 13
- 238000011946 reduction process Methods 0.000 claims abstract description 4
- 238000010276 construction Methods 0.000 claims description 15
- 238000006243 chemical reaction Methods 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims description 8
- 108091008695 photoreceptors Proteins 0.000 claims description 8
- 241001269238 Data Species 0.000 claims description 5
- 238000005516 engineering process Methods 0.000 claims description 4
- 230000008054 signal transmission Effects 0.000 claims description 4
- 238000013500 data storage Methods 0.000 claims description 3
- 238000004891 communication Methods 0.000 claims description 2
- 230000001360 synchronised effect Effects 0.000 claims 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
- 238000005070 sampling Methods 0.000 description 3
- 239000006061 abrasive grain Substances 0.000 description 2
- 238000004458 analytical method Methods 0.000 description 2
- 230000002596 correlated effect Effects 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 208000005392 Spasm Diseases 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000875 corresponding effect Effects 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 239000012530 fluid Substances 0.000 description 1
- 238000003384 imaging method Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
- H04N23/50—Constructional details
- H04N23/54—Mounting of pick-up tubes, electronic image sensors, deviation or focusing coils
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
- H04N25/65—Noise processing, e.g. detecting, correcting, reducing or removing noise applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
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Abstract
The invention discloses a kind of CCD camera Debris Image acquisition system and method, which includes system power supply, memory, ccd signal processor, ccd image sensor, high-speed level converting unit, control system, USB transmission chip, PC machine and optical lens.This method comprises the following steps：1) it acquires the optical signal of Debris Image and is projected to ccd image sensor；2) optical signal received is converted into charge signal；3) charge stored in ccd image sensor is carried out and forms analog signal；4) noise reduction process is carried out to analog signal and is converted into digital signal；5) part or all of digital signal is stored into memory, then therefrom reads a frame image and is sent to PC machine progress Debris Image processing after the decoding of Baeyer format.The present invention can complete the acquisition, processing and transmission of high definition Debris Image, and video quality is good, there is very strong autgmentability and adaptability.
Description
Technical field
The present invention relates to a kind of Debris Image acquisition technique, particularly relate to a kind of CCD camera Debris Image acquisition system and
Method.
Background technology
Image information is one of the most important information that the mankind obtain, and Image Acquisition is in Digital Image Processing, image recognition
Equal fields are using very extensive.The acquisition and processing of realtime graphic occupy an important position in current multimedia technology.It is daily
Products, the real time image collections such as digital camera, videophone, multimedia IP phone and videoconference seen in life are them
In core technology.Speed, the quality of Image Acquisition directly influence the overall effect of product.
Debris Image acquisition is to carry out shooting processing to the fluid extracted from mechanical equipment by industrial camera, from
And obtain the image of abrasive grain.Image Acquisition is the important component of entire Debris Analysis system, and picture quality is to being entirely
The analysis result of system plays an important role.Especially on-line monitoring equipment has higher requirement to image collecting device, is embodied in
The real-time of front-end acquisition device, processing speed be fast, low in energy consumption and convenient for exploitation etc..Work in on-line monitoring equipment
Industry camera should meet the requirement of following three aspect：Firstly, since needing the image information of acquisition high quality, selection imaging is needed more
Good sensor, while picture signal is effectively improved, noise is eliminated, picture quality is promoted；Second, main control unit is wanted
There is faster processing speed, can timely processing quickly be carried out to viewdata signal；Third, it is desirable that data transmission interface has
Sufficiently fast transmission speed, and have very strong versatility.
Existing Debris Image acquisition method is to use image pick-up card or Video Adapter by CCD (Charge Coupled
Device, charge coupling device) analog video signal of video camera stores after A/D is converted, and then computer is sent to be handled.
This method use is more universal, and Technical comparing is ripe, but there is also some problems.First, the output of CCD camera has converted
It for the NTSC or pal mode of simulation, and is exported in a manner of SVideo or mixed video signal, the sampled point of such capture card is defeated
It is difficult to be corresponded with the picture element of video camera to go out in sequential, and the video image quality after digitlization is caused to lose larger, image
Resolution ratio is also restrained.Secondly, the hardware circuit of this method is complicated, cost is higher, is unfavorable for popularizing using.
Invention content
The purpose of the present invention is to provide the CCD cameras of a kind of acquisition for completing high definition Debris Image, processing and transmission
Debris Image acquisition system and method.
To achieve the above object, the CCD camera Debris Image acquisition system designed by the present invention, including：System power supply,
Memory, ccd signal processor, ccd image sensor, high-speed level converting unit, control system, USB transmission chip, PC
Machine and optical lens；Wherein：
The ccd image sensor uses ICX274AQ chips, the ccd signal processor to use AD9923A chips, institute
It states high-speed level converting unit and uses 74ACT125 chips；
The ccd signal processor be provided with vertical drive pulse output pin, low voltage level driving pulse output pin,
Analog signal input pin, digital signal output pin, lock-out pulse output pin, data clock output pin, master clock are defeated
Enter pin, processor three line construction pin；
The high-speed level converting unit is provided with low voltage level driving pulse input pin and high-pressure horizontal driving pulse
Output pin；
The ccd image sensor be provided with vertical drive pulse input pin, high-pressure horizontal driving pulse input pin,
Analog signal output pin；
The control system is provided with digital signal input pin, lock-out pulse input pin, data clock input
Pin, master clock output pin, FPGA three line constructions pin, FPGA memories pin, FPGA image output pins；
The memory setting has EMS memory data access pin；The USB transmission chip be provided with USB chip input pins and
USB chip data interfaces；The PC machine is provided with PC machine data-interface；
The vertical drive pulse output pin is connected with vertical drive pulse input pin, and ccd signal processor is defeated
The vertical driving signal gone out is transferred to ccd image sensor；The low voltage level driving pulse output pin and low voltage level are driven
Moving pulse input pin is connected, and the horizontal drive signals for the low voltage that ccd signal processor exports are transferred to high-speed level
Converting unit carries out level conversion；The high-pressure horizontal driving pulse output pin and high-pressure horizontal driving pulse input pin phase
Even, the horizontal drive signals of high voltage after conversion are transferred to ccd image sensor；The analog signal output pin and mould
Quasi- signal input pin is connected, and gives the Debris Image analog signal transmission that ccd image sensor exports to ccd signal processor；
The FPGA three line constructions pin is connected with processor three line construction pin, realizes ccd signal processor and FPGA
Two-way communication between control unit；The master clock output pin is connected with master clock input pin, and master clock signal is passed
It is defeated by ccd signal processor；The lock-out pulse output pin is connected with lock-out pulse input pin, and synchronization pulse is passed
It is defeated by control system；The data clock output pin is connected with data clock input pin, and data clock signal is passed
It is defeated by control system；The digital signal output pin is connected with digital signal input pin, at ccd signal processor
Obtained Debris Image digital data transmission is managed to control system；
The FPGA memories pin is connected with EMS memory data access pin, by the still untreated abrasive grain figure of control system
Debris Image data as taking out storage in data storage to memory or from memory；The FPGA images output pin with
USB chip input pins are connected, and the Debris Image data that control system is handled well are sent to USB transmission chip；It is described
USB chip datas interface is attached with PC machine data-interface by USB data line, by Debris Image data transmission to PC machine；
The system power supply is passed with memory, ccd signal processor, ccd image sensor, control system, USB respectively
Defeated chip is connected, to provide required burning voltage；
The optical lens is arranged in the front of ccd image sensor, can optical signal be projected ccd image sensor
Photosensitive region.
Preferably, the system power supply be provided with memory power supply output pin, USB power supply output pin, FPGA power supply it is defeated
Go out pin, processor power supply output pin, sensor power supply output pin；The memory setting has memory power supply to receive pin,
The USB transmission chip is provided with USB power supplies and receives pin, and the control system is provided with FPGA power supplies and receives pin,
The ccd signal processor is provided with processor power supply and receives pin, and the ccd image sensor is provided with sensor power supply and connects
Spasm foot；The memory power supply output pin receives pin with memory power supply and is connected, and required voltage is provided for memory；The USB
Power supply output pin receives pin with USB power supplies and is connected, and required voltage is provided for USB transmission chip；The FPGA is for electricity output
Pin receives pin with FPGA power supplies and is connected, and required voltage is provided for control system；The processor power supply output pin
Pin is received with processor power supply to be connected, and required voltage is provided for ccd signal processor；Sensor power supply output pin with
Sensor power supply receives pin and is connected, and required voltage is provided for ccd image sensor.
Preferably, the memory uses DDR2 specifications, the USB transmission chip to use USB2.0 agreements.
Invention also provides the methods that application aforementioned system acquires Debris Image, include the following steps：
1) optical signal of Debris Image is acquired by the optical lens and is projected to the photosensitive of ccd image sensor
Region；
2) optical signal received is converted by charge signal by the ccd image sensor and is stored in ccd image biography
In sensor；
3) control system generates driver' s timing by ccd image by configuring the register of ccd signal processor
The charge stored in sensor is carried out, forms analog signal；The driver' s timing include+3.3V horizontal drive signals and
The vertical driving signal of+5.0V, wherein vertical driving signal is directly transferred to ccd image sensor, and horizontal drive signals pass through
High-speed level converting unit is transferred to ccd image sensor again after being converted to+5.0V；
4) the ccd signal processor carries out noise reduction process to the analog signal from ccd image sensor and is converted into
It is sent after digital signal to control system；
5) control system stores some or all of reception digital signal into memory, then therefrom reads one
Frame image is sent to PC machine by USB transmission chip after the decoding of Baeyer format, by Debris Image data and carries out Debris Image
Processing.
6) system power supply is control system, ccd image sensor, ccd signal processor, memory, USB transmission
Chip provides required voltage.
Preferably, in step 3), the interference of reset noise in ccd image sensor is eliminated using Correlated Double Sampling,
The specific steps are：1) at the first moment, reset signal removes the charge stored in ccd image sensor；2) the second moment, storage
Charge be emptied, output voltage be reset noise voltage；3) third moment, ccd image sensor receive optical signal and generate sense
Photovoltage, output voltage are the sum of reset noise voltage and photoreceptor voltage, and therefore, the value of photoreceptor voltage is exactly the second moment and the
The voltage difference (the second moment subtracted the third moment) at three moment.
Preferably, in step 6), system power supply provides a variety of confessions by FPGA power supply output pins for control system
Piezoelectric voltage is provided the voltage of+15V and -7.5V for ccd image sensor by sensor power supply output pin, passes through processor
Power supply output pin provides the voltage of+15V, -7.5V ,+3.3V and+3V for ccd signal processor, is drawn for electricity output by memory
Foot provides required voltage for memory, and required voltage is provided for USB transmission chip by USB power supply output pins.
Compared with prior art, the beneficial effects of the present invention are：
1) independent memory is arranged to solve in control system as the external extension storage of control system
The problem that RAM cachings in portion are insufficient, ensures the integrality of picture signal.
2) ADI companies profession is used to be used for the AD9923A chips of CCD drivings, by pair of Timing driver, ccd output signal
Sampling, gain amplification and analog-digital conversion function are integrated, greatly reduce circuit board volume, reduce system power dissipation, improve and are
The stability of system.
3) it uses USB data interface to realize high speed data transfer, the Debris Image data of acquisition is sent to PC machine in time.
4) modularized design is used, thought of design is clear, and going wrong can reduce the scope, and convenient for debugging, also may be used
To carry out the use scope that function improves raising system by updating wherein particular module, there are very strong autgmentability and adaptability.
Description of the drawings
The structural schematic diagram for the CCD camera Debris Image acquisition system that Fig. 1 is provided by the embodiment of the present invention.Wherein：
System power supply 1, including：Memory power supply output pin 1.1, USB power supplies output pin 1.2, FPGA draw for electricity output
Foot 1.3, processor power supply output pin 1.4, sensor power supply output pin 1.5；
Memory 2, including：Memory power supply receives pin 2.1, EMS memory data access pin 2.2；
Ccd signal processor 3, including：Processor power supply receives pin 3.1, analog signal input pin 3.2, vertical drive
Moving pulse output pin 3.3, low voltage level driving pulse output pin 3.4, processor three line construction pin 3.5, master clock are defeated
Enter pin 3.6, data clock output pin 3.7, lock-out pulse output pin 3.8, digital signal output pin 3.9；
Ccd image sensor 4, including：Vertical drive pulse input pin 4.1, high-pressure horizontal driving pulse input pin
4.2, sensor power supply receives pin 4.3, analog signal output pin 4.4, photosensitive region 4.5；
High-speed level converting unit 5, including：Low voltage level driving pulse input pin 5.1, high-pressure horizontal driving pulse are defeated
Go out pin 5.2；
Control system 6, including：Digital signal input pin 6.1, lock-out pulse input pin 6.2, data clock are defeated
Enter pin 6.3, master clock output pin 6.4, FPGA three line constructions pin 6.5, FPGA images output pin 6.6, FPGA memories
Pin 6.7, FPGA power supplies receive pin 6.8；
USB transmission chip 7, including：USB chip input pins 7.1, USB power supplies receive pin 7.2, USB chip datas connect
Mouth 7.3；
PC machine 8, including：PC machine data-interface 8.1；
Optical lens 9.
Specific implementation mode
The following further describes the present invention in detail with reference to the accompanying drawings and specific embodiments.
Embodiment 1
As shown in Figure 1, the CCD camera Debris Image acquisition system designed by the present invention, including：System power supply 1, memory 2,
Ccd signal processor 3, ccd image sensor 4, high-speed level converting unit 5, control system 6, USB transmission chip 7, PC
Machine 8 and optical lens 9.Wherein：
Ccd image sensor 4 uses ICX274AQ chips, ccd signal processor 3 to use AD9923A chips, high-speed level
Converting unit 5 uses 74ACT125 chips, memory 2 that DDR2, USB transmission chip 7 is used to use USB2.0.
Ccd signal processor 3 is provided with vertical drive pulse output pin 3.3, low voltage level driving pulse output pin
3.4, analog signal input pin 3.2, digital signal output pin 3.9, lock-out pulse output pin 3.8, data clock output
Pin 3.7, master clock input pin 3.6, processor three line construction pin 3.5.
High-speed level converting unit 5 is provided with low voltage level driving pulse input pin 5.1 and high-pressure horizontal driving pulse
Output pin 5.2.
Ccd image sensor 4 is provided with vertical drive pulse input pin 4.1, high-pressure horizontal driving pulse input pin
4.2, analog signal output pin 4.4.
It is defeated that control system 6 is provided with digital signal input pin 6.1, lock-out pulse input pin 6.2, data clock
Enter pin 6.3, master clock output pin 6.4, FPGA three line constructions pin 6.5, FPGA memories pin 6.7, the output of FPGA images
Pin 6.6.
Memory 2 is provided with EMS memory data access pin 2.2.USB transmission chip 7 is provided with 7.1 He of USB chip input pins
USB chip datas interface 7.3.PC machine 8 is provided with PC machine data-interface 8.1.
Vertical drive pulse output pin 3.3 is connected with vertical drive pulse input pin 4.1, by ccd signal processor 3
The vertical driving signal of output is transferred to ccd image sensor 4.Low voltage level driving pulse output pin 3.4 and low voltage level
Driving pulse input pin 5.1 is connected, and the horizontal drive signals for the low voltage that ccd signal processor 3 exports are transferred to height
Fast level conversion unit 5 carries out level conversion.High-pressure horizontal driving pulse output pin 5.2 and the input of high-pressure horizontal driving pulse
Pin 4.2 is connected, and the horizontal drive signals of high voltage after conversion are transferred to ccd image sensor 4.Analog signal output draws
Foot 4.4 is connected with analog signal input pin 3.2, the Debris Image analog signal transmission that ccd image sensor 4 is exported to
Ccd signal processor 3.
FPGA three line constructions pin 6.5 is connected with processor three line construction pin 3.5 by three wire serial bus, is realized
Three line construction between ccd signal processor 3 and control system 6, three signal wires are respectively data line SDI, clock line
All registers inside SCK and chip select line SL, AD9923A are all configured by this three wire serial bus.Master clock
Output pin 6.4 is connected with master clock input pin 3.6, and master clock signal is transferred to ccd signal processor 3.Lock-out pulse
Output pin 3.8 is connected with lock-out pulse input pin 6.2, and synchronization pulse is transferred to control system 6.When data
Clock output pin 3.7 is connected with data clock input pin 6.3, and data clock signal is transferred to control system 6.Number
Signal output pin 3.9 is connected with digital signal input pin 6.1, the Debris Image number that the processing of ccd signal processor 3 is obtained
Word signal transmission is to control system 6.
FPGA memories pin 6.7 is connected with EMS memory data access pin 2.2, by the still untreated mill of control system 6
The Debris Image data of storage are taken out in grain image data storage to memory 2 or from memory 2.FPGA image output pins
6.6 are connected with USB chip input pins 7.1, and the Debris Image data that control system 6 is handled well are sent to USB transmission
Chip 7.USB chip datas interface 7.3 is attached with PC machine data-interface 8.1 by USB data line, by Debris Image data
It is transferred to PC machine 8.
Control system 6 has source crystal oscillator as control system clock source using 50MHZ, supply voltage 3.3V,
When internal system module needs other clock signals, PLL phase-locked loop circuits that can be Jing Guo control system chip interior divide
Or frequency multiplication obtains corresponding clock signal.
System power supply 1 respectively with memory 2, ccd signal processor 3, ccd image sensor 4, control system 6, USB
It transmits chip 7 to be connected, to provide required burning voltage.
Optical lens 9 is arranged in the front of ccd image sensor 4, and optical signal can be projected to ccd image sensor 4
Photosensitive region 4.5.
System power supply 1 is provided with memory power supply output pin 1.1, USB power supplies output pin 1.2, FPGA and draws for electricity output
Foot 1.3, processor power supply output pin 1.4, sensor power supply output pin 1.5.Memory 2 is provided with memory power supply and receives pin
2.1, USB transmission chip 7 is provided with USB power supplies and receives pin 7.2, and control system 6 is provided with FPGA power supplies and receives pin
6.8, ccd signal processor 3 is provided with processor power supply and receives pin 3.1, and ccd image sensor 4 is provided with sensor power supply
Receive pin 4.3.
Memory power supply output pin 1.1 receives pin 2.1 with memory power supply and is connected, and required voltage is provided for memory 2.USB
Power supply output pin 1.2 receives pin 7.2 with USB power supplies and is connected, and required voltage is provided for USB transmission chip 7.FPGA power supplies are defeated
Go out pin 1.3 with FPGA power supply reception pins 6.8 to be connected, required voltage is provided for control system 6.Processor is for electricity output
Pin 1.4 receives pin 3.1 with processor power supply and is connected, and required voltage is provided for ccd signal processor 3.Sensor power supply is defeated
Go out pin 1.5 with sensor power supply reception pin 4.3 to be connected, required voltage is provided for ccd image sensor 4.
Embodiment 2
Present embodiments provide the method using Debris Image acquisition system acquisition Debris Image in embodiment 1, step
It is as follows：
1) optical signal of Debris Image is acquired by optical lens 9 and is projected to the photosensitive area of ccd image sensor 4
Domain 4.5.
2) optical signal received is converted by charge signal by ccd image sensor 4 and is stored in ccd image sensor
In 4 charge accumulator.
3) control system 6 is passed ccd image by configuring the register generation driver' s timing of ccd signal processor 3
The charge stored in the charge accumulator of sensor 4 is carried out, forms analog signal.Driver' s timing includes that the horizontal of+3.3V drives
The vertical driving signal of dynamic signal and+5.0V, wherein vertical driving signal is directly transferred to ccd image sensor 4, and level is driven
Dynamic signal is transferred to ccd image sensor 4 again after being converted to+5.0V by high-speed level converting unit 5.During this, utilize
Correlated Double Sampling eliminates the interference of reset noise in ccd image sensor 4, and at the first moment, reset signal removes CCD figures
As sensor 4 charge accumulator in charge；Second moment, charge accumulator are emptied completely, so the voltage of output is only
For CCD reset noise voltages；Third moment, ccd image sensor receive optical signal and generate photoreceptor voltage, and output voltage is to reset
The sum of noise voltage and photoreceptor voltage, therefore, the value of photoreceptor voltage are exactly the voltage difference at the second moment and third moment.
4) ccd signal processor 3 carries out noise reduction process to the analog signal from ccd image sensor 4 and is converted into number
It is sent after word signal to control system 6.
5) control system 6 stores some or all of reception digital signal into memory 2, then therefrom reads a frame
Image is sent to PC machine 8 by USB transmission chip 7 after the decoding of Baeyer format, by Debris Image data and carries out Debris Image
Processing.
6) system power supply 1 is that control system 6 provides a variety of supply voltages by FPGA power supply output pins 1.3, is led to
It is the voltage that ccd image sensor 4 provides+15V and -7.5V to cross sensor power supply output pin 1.5, is powered by processor defeated
It is that ccd signal processor 3 provides the voltage of+15V, -7.5V ,+3.3V and+3V to go out pin 1.4, is powered output pin by memory
1.1 provide required+1.8V voltages for memory 2, by USB power output pin 1.2 be USB transmission chip 7 provide it is required+
3.3V voltage.
Claims (6)
1. a kind of CCD camera Debris Image acquisition system, it is characterised in that：The system include system power supply (1), memory (2),
Ccd signal processor (3), ccd image sensor (4), high-speed level converting unit (5), control system (6), USB transmission
Chip (7), PC machine (8) and optical lens (9)；The ccd image sensor (4) uses ICX274AQ chips, the ccd signal
Processor (3) uses AD9923A chips, the high-speed level converting unit (5) to use 74ACT125 chips；
The ccd signal processor (3) is provided with vertical drive pulse output pin (3.3), the output of low voltage level driving pulse
Pin (3.4), analog signal input pin (3.2), digital signal output pin (3.9), lock-out pulse output pin (3.8),
Data clock output pin (3.7), master clock input pin (3.6), processor three line construction pin (3.5)；
The high-speed level converting unit (5) is provided with low voltage level driving pulse input pin (5.1) and high-pressure horizontal driving
Pulse output pin (5.2)；
The ccd image sensor (4) is provided with vertical drive pulse input pin (4.1), the input of high-pressure horizontal driving pulse
Pin (4.2), analog signal output pin (4.4)；
The control system (6) is provided with digital signal input pin (6.1), lock-out pulse input pin (6.2), data
Clock input pin (6.3), master clock output pin (6.4), FPGA three line constructions pin (6.5), FPGA memory pins
(6.7), FPGA images output pin (6.6)；
The memory (2) is provided with EMS memory data access pin (2.2)；It is defeated that the USB transmission chip (7) is provided with USB chips
Enter pin (7.1) and USB chip datas interface (7.3)；The PC machine (8) is provided with PC machine data-interface (8.1)；
The vertical drive pulse output pin (3.3) is connected with vertical drive pulse input pin (4.1), at ccd signal
The vertical driving signal that reason device (3) exports is transferred to ccd image sensor (4)；The low voltage level driving pulse output pin
(3.4) it is connected with low voltage level driving pulse input pin (5.1), by the water of the low voltage of ccd signal processor (3) output
Flat drive signal is transferred to high-speed level converting unit (5) and carries out level conversion；The high-pressure horizontal driving pulse output pin
(5.2) it is connected with high-pressure horizontal driving pulse input pin (4.2), the horizontal drive signals of high voltage after conversion is transferred to
Ccd image sensor (4)；The analog signal output pin (4.4) is connected with analog signal input pin (3.2), and CCD is schemed
As the Debris Image analog signal transmission that sensor (4) exports gives ccd signal processor (3)；
The FPGA three line constructions pin (6.5) is connected with processor three line construction pin (3.5), realizes ccd signal processor
(3) two-way communication between control system (6)；The master clock output pin (6.4) and master clock input pin
(3.6) it is connected, master clock signal is transferred to ccd signal processor (3)；The lock-out pulse output pin (3.8) with it is synchronous
Pulse input pin (6.2) is connected, and synchronization pulse is transferred to control system (6)；The data clock output is drawn
Foot (3.7) is connected with data clock input pin (6.3), and data clock signal is transferred to control system (6)；The number
Word signal output pin (3.9) is connected with digital signal input pin (6.1), the mill that ccd signal processor (3) processing is obtained
Grain image digital signal is transferred to control system (6)；
The FPGA memories pin (6.7) is connected with EMS memory data access pin (2.2), and control system (6) is not yet located
In the Debris Image data storage to memory (2) of reason；The FPGA images output pin (6.6) and USB chip input pins
(7.1) it is connected, the Debris Image data that control system (6) is handled well is sent to USB transmission chip (7)；The USB cores
Sheet data interface (7.3) is attached with PC machine data-interface (8.1) by USB data line, and Debris Image data transmission is arrived
PC machine (8)；
The system power supply (1) is single with memory (2), ccd signal processor (3), ccd image sensor (4), FPGA controls respectively
First (6), USB transmission chip (7) are connected, to provide required burning voltage；
The optical lens (9) is arranged in the front of ccd image sensor (4), can optical signal be projected ccd image sensor
(4) photosensitive region (4.5).
2. CCD camera Debris Image acquisition system according to claim 1, it is characterised in that：The system power supply (1) sets
Memory power supply output pin (1.1), USB power supply output pins (1.2), FPGA power supply output pins (1.3), processor is equipped with to supply
Electricity output pin (1.4), sensor power supply output pin (1.5)；The memory (2) is provided with memory power supply and receives pin
(2.1), the USB transmission chip (7) is provided with USB power supplies and receives pin (7.2), and the control system (6) is provided with
FPGA power supplies receive pin (6.8), and the ccd signal processor (3) is provided with processor power supply and receives pin (3.1), described
Ccd image sensor (4) is provided with sensor power supply and receives pin (4.3)；The memory power supply output pin (1.1) and memory
Power supply receives pin (2.1) and is connected, for voltage needed for memory (2) offer；The USB power supply output pins (1.2) are powered with USB
It receives pin (7.2) to be connected, required voltage is provided for USB transmission chip (7)；FPGA power supply output pin (1.3) with
FPGA power supplies receive pin (6.8) and are connected, for voltage needed for control system (6) offer；The processor draws for electricity output
Foot (1.4) receives pin (3.1) with processor power supply and is connected, and required voltage is provided for ccd signal processor (3)；The sensing
Device power supply output pin (1.5) receives pin (4.3) with sensor power supply and is connected, and is electric needed for ccd image sensor (4) offer
Pressure.
3. CCD camera Debris Image acquisition system according to claim 1, it is characterised in that：The memory (2) uses
DDR2, the USB transmission chip (7) use USB2.0.
4. a kind of application CCD camera Debris Image acquisition system according to any one of claims 1 to 3 acquires Debris Image
Method, it is characterised in that：Include the following steps：
1) optical signal of Debris Image is acquired by the optical lens (9) and is projected to the sense of ccd image sensor (4)
Light region (4.5)；
2) optical signal received is converted by charge signal by the ccd image sensor (4) and is stored in ccd image sensing
In device (4)；
3) control system (6) is schemed CCD by configuring the register generation driver' s timing of ccd signal processor (3)
The charge stored in picture sensor (4) is carried out, forms analog signal；The driver' s timing includes the horizontal drive of+3.3V
The vertical driving signal of signal and+5.0V, wherein vertical driving signal is directly transferred to ccd image sensor (4), and level is driven
Dynamic signal is transferred to ccd image sensor (4) again after being converted to+5.0V by high-speed level converting unit (5)；
4) the ccd signal processor (3) carries out noise reduction process to the analog signal for coming from ccd image sensor (4) and converts
To be sent after digital signal to control system (6)；
5) control system (6) stores the digital signal of reception into memory (2), then therefrom reads frame image warp
After crossing the decoding of Baeyer format, Debris Image data are sent to PC machine (8) by USB transmission chip (7) and are carried out at Debris Image
Reason.
6) system power supply (1) is control system (6), ccd image sensor (4), ccd signal processor (3), memory
(2), USB transmission chip (7) provides required voltage.
5. the method for acquisition Debris Image according to claim 4, it is characterised in that：In step 3), adopted using related pair
Sample technology eliminates the interference of reset noise in ccd image sensor (4), the specific steps are：1) at the first moment, reset signal is clear
Except the charge stored in ccd image sensor (4)；2) charge at the second moment, storage is emptied, and output voltage is reset noise
Voltage；3) third moment, ccd image sensor (4) receive optical signal and generate photoreceptor voltage, and output voltage is reset noise voltage
The sum of with photoreceptor voltage, therefore, the value of photoreceptor voltage is exactly the voltage difference at the second moment and third moment.
6. the method for acquisition Debris Image according to claim 4, it is characterised in that：In step 6), system power supply (1) is logical
It is that control system (6) provides a variety of supply voltages to cross FPGA power supply output pins (1.3), is drawn for electricity output by sensor
Foot (1.5) is the voltage of ccd image sensor (4) offer+15V and -7.5V, is by processor power supply output pin (1.4)
The voltage of ccd signal processor (3) offer+15V, -7.5V ,+3.3V and+3V are interior by memory power supply output pin (1.1)
It deposits (2) and required voltage is provided, output pin (1.2) is powered as voltage needed for USB transmission chip (7) offer by USB.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112969019A (en) * | 2021-02-26 | 2021-06-15 | 深圳荆虹科技有限公司 | TOF module and electronic device |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201051080Y (en) * | 2007-06-14 | 2008-04-23 | 南京航空航天大学 | A microscopical image real time measurement and collection device for pollution and abrasion particle in oil |
| CN201608779U (en) * | 2010-01-29 | 2010-10-13 | 北京航天自动控制研究所 | Portable visible light CCD imaging system |
| CN101957496A (en) * | 2009-07-17 | 2011-01-26 | 通用电气检查技术有限合伙人公司 | System and method for projecting fringes suitable for phase shift analysis by utilizing probe |
| CN102638649A (en) * | 2012-03-06 | 2012-08-15 | 浙江大学 | USB3.0 high-speed high-definition industrial camera |
| CN103636193A (en) * | 2011-07-08 | 2014-03-12 | 索尼公司 | Imaging device and protection device for solid imaging device |
| CN104333681A (en) * | 2014-08-15 | 2015-02-04 | 徐云鹏 | FPGA-based microminiature CCD image collecting and processing system |
| CN104427218A (en) * | 2013-09-02 | 2015-03-18 | 北京计算机技术及应用研究所 | Ultra high definition CCD (charge coupled device) multichannel acquisition and real-time transmission system and method |
| CN105245798A (en) * | 2015-09-21 | 2016-01-13 | 西安文理学院 | CCD video compression measurement imaging system based on block-oriented compression sensing, and control method |
| CN105744263A (en) * | 2015-12-18 | 2016-07-06 | 北京伽略电子股份有限公司 | CCD driving time sequence and system testing integrated circuit and use method thereof |
-
2018
- 2018-06-05 CN CN201810583178.1A patent/CN108737704A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201051080Y (en) * | 2007-06-14 | 2008-04-23 | 南京航空航天大学 | A microscopical image real time measurement and collection device for pollution and abrasion particle in oil |
| CN101957496A (en) * | 2009-07-17 | 2011-01-26 | 通用电气检查技术有限合伙人公司 | System and method for projecting fringes suitable for phase shift analysis by utilizing probe |
| CN201608779U (en) * | 2010-01-29 | 2010-10-13 | 北京航天自动控制研究所 | Portable visible light CCD imaging system |
| CN103636193A (en) * | 2011-07-08 | 2014-03-12 | 索尼公司 | Imaging device and protection device for solid imaging device |
| CN102638649A (en) * | 2012-03-06 | 2012-08-15 | 浙江大学 | USB3.0 high-speed high-definition industrial camera |
| CN104427218A (en) * | 2013-09-02 | 2015-03-18 | 北京计算机技术及应用研究所 | Ultra high definition CCD (charge coupled device) multichannel acquisition and real-time transmission system and method |
| CN104333681A (en) * | 2014-08-15 | 2015-02-04 | 徐云鹏 | FPGA-based microminiature CCD image collecting and processing system |
| CN105245798A (en) * | 2015-09-21 | 2016-01-13 | 西安文理学院 | CCD video compression measurement imaging system based on block-oriented compression sensing, and control method |
| CN105744263A (en) * | 2015-12-18 | 2016-07-06 | 北京伽略电子股份有限公司 | CCD driving time sequence and system testing integrated circuit and use method thereof |
Non-Patent Citations (1)
| Title |
|---|
| 李博: "在线图像可视铁谱成像系统的像面照度均匀性", 《光学精密工程》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112969019A (en) * | 2021-02-26 | 2021-06-15 | 深圳荆虹科技有限公司 | TOF module and electronic device |
| CN112969019B (en) * | 2021-02-26 | 2023-08-08 | 深圳荆虹科技有限公司 | TOF module and electronic device |
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