CN108664410A

CN108664410A - A kind of integrated circuit CP test Pass Flag are preserved, refresh, are read comparative approach and its circuit

Info

Publication number: CN108664410A
Application number: CN201810258822.8A
Authority: CN
Inventors: 颜河
Original assignee: Beijing CEC Huada Electronic Design Co Ltd
Current assignee: Beijing CEC Huada Electronic Design Co Ltd
Priority date: 2018-03-27
Filing date: 2018-03-27
Publication date: 2018-10-16
Anticipated expiration: 2038-03-27
Also published as: CN108664410B

Abstract

The invention discloses a kind of integrated circuit CP test Pass Flag to preserve, refresh, reading comparison method and on-chip test circuit, the circuit include that CP test Pass Flag registers read-writes logic, chip are powered on to logic, the NVM memory for storing CP Pass Flag, NVM memory read-write logic, CP Pass Flag register values and NVM reading data comparisons logic, CP Pass Flag registers etc. that CP Pass Flag are read in by NVM to related register automatically.The method of the invention provides a kind of CP Pass Flag automations store method, and is monitored to chip product CP tests performance, effectively improves testing efficiency and control chip testing quality.

Description

A kind of integrated circuit CP test Pass Flag preserve, refresh, read comparative approach and Its circuit

Technical field

The invention belongs to the test design fields of IC chip, and in particular to a kind of test data of chip access method And corresponding on-chip test circuit, by the automatically saving of CP Pass Flag, refresh and read-around ratio pair, realize and chip produced The retrospect of product CP test process is effectively prevented chip leakage sieve and happens, to realize the quality to chip product CP tests Control.

Background technology

Wafer test plays a very important role in the manufacturing process of semiconductor product, is processed and produces from chip Come, to being sent in End-Customer hand, needs, by multiple tracks testing process, to screen layer by layer.It, can in complicated test production journey Leakage sieve situation caused by capable of occurring due to various reasons.To solve the problems, such as this, industry would generally preserve all CP testing engineerings CP Pass Flag are conducive to control and the retrospect of product test quality.But due to having high temperature long in NVM testing process The Bake testing engineerings of time, therefore the previously stored CP Pass Flag of Bake are likely to occur situation easy to be lost, influence core Piece normal function, thus Bake test after need to preceding road CP testing engineering Pass Flag carry out read compare and refresh behaviour Make, and old Pass Flag method for refreshing needs test program to read preservation, seriously affects testing efficiency.

Invention content

The purpose of the present invention, the preservation for being to provide a kind of CP Pass Flag and CP Pass Flag after Bake tests Reading is compared and method for refreshing.

CP tests Pass Flag and preserves, refreshes, reads comparison method, using the implementation of devices at full hardware, detailed technology Scheme is described as follows：

The present invention hardware circuit include：SFR reads and writes logic (101), NVM read-write logics (103), CP Pass Flag certainly Dynamic logic (102), a NVM memory (105), a CL Compare Logic (106), the several groups of reading are for loading CP Pass The CP Pass Flag registers (104) of Flag information are constituted.

Read-write control signal of the SFR read-write logics (101), NVM read-write logics (103) for generating SFR and NVM And address signal.

The NVM memory (105) receives the address signal and read-write control signal that NVM read-write logics (103) generate, The CP Pass Flag of write-in or output appropriate address storage.

The CP Pass Flag registers (104) are used to preserve the CP Pass Flag letters read by NVM after the power is turned on Breath, can directly be accessed by test command, reads or be written CP Pass Flag data.

The CP Pass Flag read logic (102) after electrification reset automatically, the CP for automatically storing NVM Pass Flag data read and store in CP Pass Flag registers.

The CL Compare Logic (106) is by NVM memory (103) output data and CP Pass Flag registers (104) Middle data are compared, and it is 1 that fail signals are exported if equal, if unequal, fail signals are 0.

The working method of the present invention is as follows：

1) logic is read and write by SFR and NVM reads and writes the read-write of logic generation CP Pass Flag registers and NVM memory Control signal simultaneously generates CP Pass Flag registers and NVM memory address, and hardware is automatically by CP Pass Flag registers Data automatically write the preservation of NVM memory appropriate address.

2) after electrification reset, the CP Pass that logic will store in NVM memory are read by CP Pass Flag automatically Flag data read and store in CP Pass Flag registers, then read and write logic by SFR and generate control signal, by surveying IO output CP Pass Flag are tried to confirm.

3) the CP Pass that will be stored in CP Pass Flag register datas and NVM memory by digital CL Compare Logic Flag data are compared, and it is 1 that fail signals are exported if equal, if unequal, fail signals are 0.

If 4) CP Pass Flag register datas are identical as the CP Pass Flag data stored in NVM memory, In not lower electricity, after carrying out Erase to NVM CP Pass Flag storage regions, repetitive operation 1) CP Pass can be achieved The refresh operation of Flag.

CP test Pass Flag of the present invention are preserved, refresh, are read comparative approach, can be by the CP of each CP engineerings Pass Flag are saved in NVM, and can read CP Pass Flag data at any time by software is compared, and contributes to chip Test result traces and test quality ensures.

CP test Pass Flag of the present invention are preserved, refresh, are read comparative approach, only configuration register and startup It is controlled by software, follow-up all operations are automatically performed by hardware, realize preservation, refreshing and the read-around ratio pair of CP Pass Flag It is increasingly automated, improve testing efficiency.The method of the invention is not limited only to IC chip CP tests, the selection result chases after It traces back, the quality monitoring traced by the method during every chip manufacture operates in the right of the invention It is interior.

Description of the drawings

Fig. 1 hardware circuit principle figures

Fig. 2 CP test Pass Flag preservations refresh, the test flow chart of read-around ratio pair

Specific implementation mode

The specific implementation mode of the present invention is described in detail below in conjunction with Figure of description.

As shown in Fig. 1 hardware circuit principle figures of the present invention, 101 represent register read-write logic, and 102 represent CP Pass Flag reads logic automatically, and 103 represent NVM read-write logics, and 104 represent CP Pass Flag data registers, and 105 representatives are deposited The NVM memory of information is stored up, 106 represent CL Compare Logic.

101 in Fig. 1 registers represented read and write logic, and register read-write is will produce when receiving register read write command Control information and register address information.

102 in Fig. 1 represent CP Pass Flag reads logic automatically, after chip electrification reset, passes through CP Pass Flag reads logic and generates SFR, NVM reading writing information and address information automatically, and corresponding CP Pass Flag is corresponding by NVM Address is read into corresponding CP Pass Flag registers.

103 in Fig. 1 represent NVM read-write logic, will produce when receiving NVM read write commands NVM Read-write Catrols information and NVM address informations.

104 in Fig. 1 represent CP Pass Flag data registers, for storing CP Pass Flag numerical value.

105 in Fig. 1 represent the NVM memory of storage information, receive read-write control signal and address signal, and the output phase The CP Pass Flag data for answering address to store.

106 in Fig. 1 represent CL Compare Logic, read the corresponding CP of CP Pass Flag data registers and NVM storages Pass Flag values are compared, and it is 1 that fail signals are exported if equal, if unequal, fail signals are 0.

Illustrated in Fig. 2 in CP the flows preservation, refreshing of CP Pass Flag, read-around ratio pair work flow diagram, such as Shown in figure, it is only necessary to which corresponding CP Pass Flag are read into corresponding CP by the related test command of input by NVM appropriate address In Pass Flag registers, the write-in that can both complete CP0/CP1Pass Flag preserves (the wherein workflow of CP1 and CP0 Equally).

The refreshing of CP0/CP1Pass Flag after high temperature BAKE engineerings and CP0/CP1Pass Flag are read from comparison Work, realization is increasingly automated, as shown in Fig. 2, starting CP0/CP1Pass Flag read-out commands, reads CP Pass Flag numbers It is compared according to register and the NVM corresponding CP Pass Flag values stored, it is 1 that fail signals are exported if equal, and test is logical It crosses；If unequal, fail signals are 0, and test does not pass through.If in CP Pass Flag register datas and NVM memory The CP Pass Flag data of storage are identical, in not lower electricity, carried out to NVM CP Pass Flag storage regions Erase, then related test command is inputted, corresponding CP Pass Flag are read into corresponding CP Pass by NVM appropriate address , it can be achieved that the refresh operation of CP Pass Flag in Flag registers.Due to being without surveying in CP Pass Flag refresh operations Test-run a machine carries out reading preservation, can substantially save the testing time.

Claims

1. a kind of integrated circuit CP test Pass Flag are preserved, refresh, are read Comparison Circuit, it is characterised in that：Chip hardware by SFR read-write logics (101), NVM read-write logics (103), CP Pass Flag read logic (102), a NVM memory automatically (105), the CP Pass Flag registers of a CL Compare Logic (106), several groups for loading CP Pass Flag information (104) and other relevant combinational logics are constituted, wherein：

SFR read-write logics (101), NVM read-write logics (103) are used to generate the read-write control signal and address letter of SFR and NVM Number；

NVM memory (105) receives the address signal and read-write control signal that NVM read-write logics (103) generate, write-in or reading The CP Pass Flag data of appropriate address storage；

CP Pass Flag data registers (104), can be with for preserving the CP Pass Flag information read by NVM after the power is turned on It is directly accessed by test command, reads or be written CP Pass Flag data；

CP Pass Flag read logic (102) after electrification reset automatically, the CP Pass Flag data for automatically storing NVM It reads and stores in CP Pass Flag registers；

CL Compare Logic (106) is used for data in NVM memory (103) output data and CP Pass Flag registers (104) It is compared.

2. a kind of integrated circuit CP test Pass Flag are preserved, refresh, read comparison method, it is based on electricity described in claim 1 Road carries out preservation and read-around ratio pair before Bake tests to CP Pass Flag, after Bake tests, before testing automatically Bake The CP Pass Flag data of preservation are refreshed, which is characterized in that key step includes：

1) logic is read and write by SFR and NVM reads and writes the Read-write Catrol of logic generation CP Pass Flag registers and NVM memory Signal simultaneously generates CP Pass Flag registers and NVM memory address date, and hardware is automatically by CP Pass Flag registers Data automatically write the preservation of NVM memory appropriate address；

2) after electrification reset, the CP Pass Flag that logic will store in NVM memory are read by CP Pass Flag automatically Data read and store in CP Pass Flag registers, then read and write logic by SFR and generate control signal, defeated by test I/O Go out CP Pass Flag to confirm；

3) the CP Pass Flag that will be stored in CP Pass Flag register datas and NVM memory by digital CL Compare Logic Data are compared, and it is 1 that fail signals are exported if equal, if unequal, fail signals are 0；

4) if CP Pass Flag register datas are identical as the CP Pass Flag data stored in NVM memory, not In the case of lower electricity, after carrying out Erase to NVM CP Pass Flag storage regions, repetitive operation 1) realize CP Pass Flag's Refresh operation.

3. a kind of integrated circuit CP test Pass Flag as claimed in claim 2 are preserved, refresh, read comparison method, it is not limited only to IC chip CP tests, the selection result retrospect, suitable for what is traced by the method during every chip manufacture Quality monitoring operates.