Invention content
Problems solved by the invention is to provide a kind of thermal-shutdown circuit with temperature hysteresis function.
The technical scheme is that:A kind of thermal-shutdown circuit with temperature hysteresis function, circuit include:Start
Circuit, PTAT current generation circuit and thermal-shutdown circuit.Start-up circuit make circuit allowed when supply voltage is relatively low circuit just
Often work, prevents it to be absorbed in degeneracy point;Appropriate ratio is arranged to generate the electric current of positive temperature coefficient in PTAT current generation circuit
Example coefficient ensures that circuit can be overturn when more than the temperature threshold of setting;It is right when thermal-shutdown circuit is according to temperature change
In the pull-up ability of output voltage and being compared for pull-down capability, when reaching temperature threshold output voltage is overturn,
And then protect circuit.
The start-up circuit includes:5 NMOS tubes, 2 PMOS tube, 1 transistor, 2 resistance, 1 capacitance.Transistor
The base stage of QP1 is connected with supply voltage VDD with collector, and emitter is connected with the source electrode of PMOS tube MP2;PMOS pipes MP2's
Grid end is connected with the drain terminal of the bottom crown of capacitance C1, the drain terminal of NMOS tube MN7, PMOS tube MP4 with the drain terminal of NMOS tube MN8, note
For node V2, the drain terminal for the NMOS tube MN1 that the drain terminal of PMOS tube MP2 is connected with grid leak is connected;The NMOS tube MN1's that grid leak connects
Grid end is connected with the grid end of NMOS tube MN2, MN5, MN8, and the drain terminal for the NMOS tube MN3 that source and the grid leak of MN1 connect is connected;
The grid end of MN3 pipes is connected with the grid end of NMOS tube MN4, MN6, MN9, and MN3 is managed to be grounded with the source of MN4 pipes;The leakage of MN4 pipes
End is connected with the source of MN2 pipes, and the drain terminal of MN2 pipes is connected with the lower end of the grid end of MN7 pipes, resistance R1, is denoted as node V1;Resistance
The upper end of R1 is connected with the drain terminal of PMOS tube MP1;The source of grid terminating logic the offset signal Vbias, MP1 of PMOS tube MP1 connect
Supply voltage VDD;The upper end of resistance R3 is connected with supply voltage VDD, and lower end is connected with the upper step of capacitance C1;Capacitance C1's
Subordinate's version is connected with the drain terminal of NMOS tube MN7;The source of NMOS tube MN7 is grounded.
The PTAT current generation circuit includes:10 transistors, 2 PMOS tube, 4 NMOS tubes.9 crystal in parallel
The base stage of pipe QP2 connects supply voltage VDD, the upper end of emitter connecting resistance R2 with collector;The lower termination PMOS tube of resistance R2
The source of MP3 is denoted as node V3;The grid end for the PMOS tube MP3 that grid leak connects is connected with the grid end of PMOS tube MP4, the drain terminal of MP3
It is connected with the drain terminal of NMOS tube MN5;The source of MN5 is connected with the drain terminal of MN6;The source of MN6 and the source of MN9 pipes are grounded;
The drain terminal of NMOS tube MN9 is connected with the source of MN8 pipes, and the drain terminal of MN8 pipes is connected with the drain terminal of PMOS tube MP4;The source of MP4
It is connected with the emitter of transistor QP3, is denoted as node V4;The base stage of transistor QP3 meets supply voltage VDD with collector.
The thermal-shutdown circuit includes:3 PMOS tube, 4 NMOS tubes, 2 phase inverters, 2 resistance, 1 transistor.
The upper end of resistance R4 is connected with supply voltage VDD, and lower end is connected with the drain terminal of the upper end of resistance R5, PMOS tube MP5;The lower end of R5
It is connected with the source of the drain terminal of NMOS tube MN12, PMOS tube MP6, is denoted as node V5;The grid end of NMOS tube MN12 and the grid of MN13
End is connected, and is connected with the grid end of MN5, and MN12 sources are connected with the drain terminal of MN13, and with the drain terminal of MP6, the grid of MP7 pipes
End is connected, and is denoted as node V6;The grid end of PMOS tube MP6 is connected with the grid end of PMOS tube MP3, MP4;The source and MN10 of MN13
Drain terminal be connected;NMOS tube MN10 is connected with the grid end of NMOS pipes MN6 with the grid end of MN11, and the source of MN10 and MN11 are equal
Ground connection;The drain terminal of MN11 is connected with the anode of the drain terminal of PMOS tube MP7, phase inverter INV1, is denoted as node Vout1;MP7 pipes MP7
Source be connected with the emitter of transistor QP4, be denoted as node V7;The base stage of transistor QP4 with collector and supply voltage
VDD is connected;The negative terminal of phase inverter INV1 is connected with the anode of phase inverter INV2;The negative terminal of INV2 pairs of phase inverter and PMOS tube MP5
Grid end be connected, be denoted as node Vout2.
Specific implementation mode
Below in conjunction with the accompanying drawings, highly preferred embodiment of the present invention is provided, and gives detailed description.
Fig. 1 is a kind of structural schematic diagram of the thermal-shutdown circuit with temperature hysteresis work, start-up circuit in the present invention
Have for PTAT current generation circuit and thermal-shutdown circuit and bias current and circuit start function, thermal-shutdown circuit are provided
When output voltage is overturn, temperature hysteresis function is realized by the electric current controlled in PTAT circuit.
Fig. 2 is the circuit diagram of the start-up circuit and PTAT current generation circuit in the present invention.Vbias is metal-oxide-semiconductor
The bias voltage of MP1 is digital signal, is low level when circuit works normally, so MP1 is connected at this time, and left side is bipolar
Junction transistor QP1 and metal-oxide-semiconductor MP2, MN1 and MN3 also do not have electric current to flow through at this time, under current mirror effect, the metal-oxide-semiconductor on right side
MN2 and MN4 are also not turned on, and the drain electrode of MP1 is connected to the grid of metal-oxide-semiconductor MN7 after a resistance, because MP1 is connected, institute
Can draw grid voltage V1 for high level, then metal-oxide-semiconductor MN7 is connected.The drain electrode of metal-oxide-semiconductor MN7 is connected to the grid of MP2, because of MN7
Conducting, so it is low level that can draw the grid voltage V2 of metal-oxide-semiconductor MP2, pipe MP2 is connected at this time, and dipole above is brilliant
Body pipe QP1 plays the role of current offset, and metal-oxide-semiconductor MP2, MN1 and MN3 have electric current to flow through, and electric current is acted on by current mirror, transmission
To subsequent metal-oxide-semiconductor, PTAT current is full of in final circuit, circuit start is completed.
Metal-oxide-semiconductor MN5, MN8, MN6 and MN9 breadth length ratio having the same in Fig. 2, so flowing through the electric current of these metal-oxide-semiconductors
Equal, the breadth length ratio of same MP3 and MP4 are also identical, by the voltage and current formula of metal-oxide-semiconductor:
On the basis of electric current and identical metal-oxide-semiconductor breadth length ratio, metal-oxide-semiconductor gate source voltage is identical, so the source voltage of MP3 and MP4
It is identical, i.e. V3=V4.If the electric current for flowing through metal-oxide-semiconductor MP3 is I1, the electric current for flowing through metal-oxide-semiconductor MP4 is I2, equal by two voltages
It can obtain
IC2×R2+VBE2=VBE3 (2)
And 9 times that the transmitting junction area of bipolar junction transistor QP2 is QP3, so by formula
IC=ISexp(VBE/VT) (3)
It can obtain, formula (3) is derived as:
Because VT is directly proportional to temperature, it is possible to it obtains, the electric current for flowing through QP2 is PTAT current, because of I1=IC2,
It is PTAT current to flow through the electric current of metal-oxide-semiconductor MP3 and MP4 also, can be obtained by the effect of current mirror flow through metal-oxide-semiconductor MN1~
The electric current of MN9 is all PTAT current.Wherein metal-oxide-semiconductor MP2 and MN1~MN7 constitutes a complete circuit, in order to improve entirety
The stability of circuit, resistance R3 and capacitance C1 generate a zero pole point pair here, play the role of frequency compensation.
It is PTAT current generation circuit in Fig. 2 on the left of dotted line in Fig. 3, is acted on by the mirror image of current mirror, metal-oxide-semiconductor MN10~
Electric current in MN13 is all PTAT current.Because the base-emitter voltage VBE of bipolar junction transistor is negative temperature coefficient, institute
Increased with the rising of temperature with the source voltage V4 of metal-oxide-semiconductor, because of the clamping action of current mirror, the source electrode of metal-oxide-semiconductor MP3
Voltage V3 increases also with temperature rise, and the electric current in MP3 increases with temperature and increased.Because in metal-oxide-semiconductor MN10~MN13
Electric current be all PTAT current, and the grid voltage Vout2 of metal-oxide-semiconductor MP5 is low level when working normally, will so MP5 is connected
Resistance R4 short circuits, therefore the source voltage V5 expression formulas of metal-oxide-semiconductor MP6 are:
V5=VDD-IPTAT×R5 (5)
The grid of metal-oxide-semiconductor MP6 is connected with MP3 grids, and the electric current for flowing through the two is equal, when temperature is relatively low, the source electrode of MP6
Voltage is larger compared with the source voltage of MP3, at this point for 2 (V for MP6SG6-VTH) > > VSD6, therefore metal-oxide-semiconductor MP6 is operated in
Deep linear zone, with the rising of temperature, PTAT current increases, so the source voltage V5 of MP6 is reduced, MP6 leaks MP6 at this time
The pull-up ability of pole tension is more and more weaker.And with the raising of temperature, the PTAT current flowed through in metal-oxide-semiconductor MN10 and MN13 is got over
Come bigger, therefore downside metal-oxide-semiconductor gradually increases the pull-down capability of MP6 drain voltages, when this drop-down of the metal-oxide-semiconductor to voltage V6 all the way
When ability is more than that it pulls up ability, voltage V6 sports low level by high level.
For the switching process of metal-oxide-semiconductor drain voltage as shown in figure 4, when normal temperature, MP3 source voltages V3 is less than MP6 source electrode electricity
V5 is pressed, with temperature rise, voltage V3 increases, and voltage V5 reduces, while flowing through the PTAT current of MP3 and MP6 with temperature
Rising also increases, and when temperature rise is to certain value, voltage V3 is more than V5, at this time pull-up abilities of the metal-oxide-semiconductor MP6 to voltage V6
Less than downside current mirror to the pull-down capability of V6, it may also be said to which metal-oxide-semiconductor MP3 is better than the pull-down capability of V6 the pull-up of MP6 at this time
Ability, therefore the overturning point of voltage V6 is voltage V3=V6, expression formula is:
IS3×R2+VBE2=IS6×R5 (6)
Electric current IS3=IS6 can find out the overturning point of voltage V6 by calculating.I.e. with the rising of temperature, PTAT current increases
Greatly, when PTAT current reaches
At this point, the output voltage of overheat protector module is overturn.To sum up, when voltage V3 is more than V5, V6 is low level, voltage
When V3 is less than V5, V6 is high level.
When temperature is excessively high to lead to voltage V6 saltus steps be low level after, metal-oxide-semiconductor MP6 conducting, so output voltage Vout1 at this time
Become high level, entire circuit is turned off as output voltage after phase inverter shaping, until temperature drops to hysteresis threshold value.Wherein
Output voltage Vout2 is also coupled to the grid of metal-oxide-semiconductor MP5, because Vout2 is high level at this time, MP5 is turned off, then metal-oxide-semiconductor
Resistance on source electrode becomes R4+R5, and formula (6) variation is:
IS3×R2+VBE2=IS6×(R5+R4) (8)
Then the PTAT current in current mirror becomes:
It can be obtained compared with formula (7), PTAT current becomes smaller, therefore when temperature is less than 170 DEG C, the voltage of overheat protector module will not be stood
It overturns, with the decline of temperature, PTAT current reduces, and when temperature drops to 150 DEG C, PTAT current just reaches overturning
Point, metal-oxide-semiconductor MP6 drain voltages are high level by low transition at this time, metal-oxide-semiconductor MP6 shutdown, output voltage Vout1 and
Vout2 becomes low level, and chip temperature restores normal at this time, the modules such as output voltage control driving circuit normal work.At this time
Under the action of output voltage Vout2, metal-oxide-semiconductor MP5 conductings, by resistance R4 short circuits, so temperature needs to reach again next time
At 170 DEG C, thermal-shutdown circuit output voltage can just be overturn.To sum up, this circuit is realized by controlling MP5 conducting shutdowns
The sluggishness that temperature from low to high changes and temperature changes from high to low.
As shown in figure 5, being emulated to overheat protector modular circuit.It can be seen from the figure that when temperature becomes from low to high
When change, when temperature reaches 170 DEG C, output voltage Vout2 is high level by low level overturning;When temperature changes from high to low
When, when temperature is reduced to 150 DEG C, output voltage Vout2 is low level by high level overturning, intermediate slow there are 20 DEG C or so
It is stagnant, prevent output voltage from overturning back and forth.
Fig. 6 is the emulation of the voltage jump process of key point in overheat protector module, this is emulated as temperature from high to low, therefore
When temperature is 150 DEG C, voltage is overturn.Wherein the first column is the source voltage V3 and metal-oxide-semiconductor MP6 source electrodes of metal-oxide-semiconductor MP3
The change procedure of voltage V5, with the decline of temperature, PTAT current reduces, and voltage V3 reduces, and voltage V5 increases, when two voltages
When equal, output voltage is overturn.Second column is the grid voltage V6 of metal-oxide-semiconductor MP6, when V6 is high level, output voltage
For low level, when V6 is low level, output voltage is high level.Third column is the source voltage V7 of metal-oxide-semiconductor MP7, although meeting
It is influenced, when temperature is relatively low, is increased with the rising of temperature, but reache a certain level by bipolar junction transistor QP4
When keep stablize.When metal-oxide-semiconductor grid voltage V6 is by being low level by high level saltus step, MP6 conductings, voltage V7 is turned at this time
Turn, is low level by high level saltus step.4th column and the 5th column are respectively overheat protector module output voltage Vout1 and Vout2,
Voltage Vout2 directly closes entire circuit system through driving circuit.
The above described is only a preferred embodiment of the present invention, being not intended to limit the present invention in any form.Appoint
What those skilled in the art, without departing from the scope of the technical proposal of the invention, all using the side of the disclosure above
Method and technology contents make many possible changes and modifications to technical solution of the present invention, or are revised as the equivalent reality of equivalent variations
Apply example.Therefore, every content without departing from technical solution of the present invention, according to the technical essence of the invention does above example
Any simple modifications, equivalents, and modifications, still fall within technical solution of the present invention protection in the range of.