CN108572887A - Data detection bearing calibration - Google Patents
Data detection bearing calibration Download PDFInfo
- Publication number
- CN108572887A CN108572887A CN201710149624.3A CN201710149624A CN108572887A CN 108572887 A CN108572887 A CN 108572887A CN 201710149624 A CN201710149624 A CN 201710149624A CN 108572887 A CN108572887 A CN 108572887A
- Authority
- CN
- China
- Prior art keywords
- data
- check code
- memory block
- storage unit
- predetermined value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/14—Error detection or correction of the data by redundancy in operation
- G06F11/1402—Saving, restoring, recovering or retrying
- G06F11/1446—Point-in-time backing up or restoration of persistent data
- G06F11/1458—Management of the backup or restore process
- G06F11/1469—Backup restoration techniques
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
- G06F11/1004—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's to protect a block of data words, e.g. CRC or checksum
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Security & Cryptography (AREA)
- Error Detection And Correction (AREA)
Abstract
A kind of data detection bearing calibration is implemented by the processing unit of one first storage unit of electrical connection, which stores the first data and its corresponding first check code, and with the second data and its corresponding second check code, the method includes the steps of：When determining first data invalid according to first check code and determining second data invalid according to second check code, judge whether first check code is identical to second check code；When it is to be to judge result, the first repair data is generated with first data according to a reparation vector that is default and including an amendment bit；Judge whether first repair data is effective according to first check code；And when determine first repair data it is effective when, judge whether first repair data correct according to second data and first repair data.
Description
Technical field
The present invention relates to a kind of inspection bearing calibrations, more particularly to a kind of data detection bearing calibration.
Background technology
Solid state flash memory (Flash Memory) is used for general data and stores, and is produced in computer and other numbers
Transmission data, such as memory card and portable disk storage device are exchanged between product.It erases formula memory compared to previous electronics
(EEPROM), flash memory read and write rate is faster, power consumption is lower and cost is lower.
However, the erasable number of existing solid state flash memory is 10,000 times, substantially erase less than previous electronics
100,000 times of formula memory.It is used for solving the problems, such as that the too short method of solid state flash memory service life includes following two at present
Kind：First way prolongs the service life for service life longer external memory, and the second way is with wear leveling
Algorithm prolongs the service life.However, both methods cannot tackle the problem at its root, if because some in memory
Permanent fault occurs for anti-and lock (NAND gate), and in the case where not detecting above-mentioned failure, there is the danger of misuse wrong data
Danger still can not restore the data of damage even if storage failure is learnt in detection in the case where detecting above-mentioned failure, because
And it is extremely inconvenient to the use of data and have the doubt of safety.
Invention content
The purpose of the present invention is to provide it is a kind of can detection data and restore damage data data detection bearing calibration.
The data detection bearing calibration of the present invention, implements by a processing unit, processing unit electrical connection one first
Storage unit, first storage unit include the first of the first check code of the first data of storage first data corresponding with one
Second check code of the second data second data corresponding with one for the backup that memory block, a storage are relevant to first data
Second memory block and other multiple not used memory blocks, first storage unit also store one and are relevant to first memory block
Address and second memory block address address book, which comprises the steps of：
(A) first data for first memory block for being stored in first storage unit are obtained according to the address book and be somebody's turn to do
First check code, and it is stored in second data and second check code of second memory block of first storage unit；
(B) judge whether first data are effective according to first check code；
(C) when determining first data invalid, judge whether second data are effective according to second check code；
(D) when determining second data invalid, judge whether first check code is identical to second check code；
(E) default and include an amendment position according to one when determining first check code and being identical to second check code
The reparation vector of member and first data, generate the first repair data；
(F) judge whether first repair data is effective according to first check code；And
(G) when determine first repair data it is effective when, according to second data and first repair data judgement should
Whether the first repair data is correct.
Preferably, the data detection bearing calibration of the present invention, step (G) includes following sub-step：
(G-1) third data are generated according to first repair data and second data；And
(G-2) according to the third data judging, whether first repair data is correct.
Preferably, the present invention data detection bearing calibration, in step (G-2), by judge the third data whether
For 2 power to judge whether first repair data correct, when the third data be 2 power when, first repair data is correct.
Preferably, the data detection bearing calibration of the present invention, in step (E), by the reparation vector and first data
Carry out logic exclusive or, to generate first repair data, and in sub-step (G-1), by first repair data and this second
Data carry out logic exclusive or, to generate the third data.
Preferably, the data detection bearing calibration of the present invention, also comprises the steps of after step (G)：
(H) when determine first repair data it is incorrect when, generate and one indicate the error messages that data can not be restored.
Preferably, the data detection bearing calibration of the present invention, also comprises the steps of after step (F)：
(I) when determine first repair data it is invalid when, judge reparation vector the amendment bit whether be located at should
Repair the leftmost bit member of vector；
(J) it when determining the amendment bit and being located at the leftmost bit member, generates one and indicates the mistake that data can not be restored
Message；And
(K) when determining that the amendment bit is non-to be located at the leftmost bit member, amendment bit in the reparation vector is left
A bit is moved, and repeats step (E)~step (F).
Preferably, the data detection bearing calibration of the present invention, which is also electrically connected one second storage unit, in step
Suddenly it is also comprised the steps of after (B)：
(L) when determine first data it is effective when, which is stored to second storage unit；And
It is also comprised the steps of after step (C)：
(M) when determine second data it is effective when, which is stored to second storage unit.
Preferably, the data detection bearing calibration of the present invention, which is also electrically connected one second storage unit, in step
Suddenly it is also comprised the steps of after (D)：
(N) when determining first check code different from second check code, according to second check code judge this
Whether one data are effective；
(O) when determine first data it is effective when, which is stored to second storage unit；
(P) when determining first data invalid, judge whether second data are effective according to first check code；
(Q) when determine second data it is effective when, which is stored to second storage unit；And
(R) it when determining second data invalid, generates one and indicates the error messages that data can not be restored.
Preferably, the data detection bearing calibration of the present invention, the processing unit are also electrically connected one second storage unit, step
(G) it is also comprised the steps of after：
(S) when determine first repair data it is correct when, which is stored to second storage unit.
Preferably, the data detection bearing calibration of the present invention, which also stores one and corresponds to first storage
Second state flags of the first state flag in area and correspondence second memory block, one first flag of the first state flag
Scale value is one to indicate the not abnormal first predetermined value in first memory block and one different from the first predetermined value and indicate this
There is the one of which of abnormal second predetermined value in first memory block, and one second flag value of second state flags is one to indicate
The not abnormal third predetermined value in second memory block and one different from the third predetermined value and to indicate that second memory block has different
The one of which of the 4th normal predetermined value, the first flag value initial value are the first predetermined value, the second flag value initial value
For the third predetermined value, first flag value is also updated to the second predetermined value in step (C), will also in step (D)
Second flag value is updated to the 4th predetermined value.
Preferably, the data detection bearing calibration of the present invention, also comprises the steps of after step (S)：
(T) judge whether first flag value is the second predetermined value；
(U) when it is the second predetermined value to determine first flag value, by the position of first memory block of the address book
Location is changed to the address of one of other not used described memory blocks；
(V) judge whether second flag value is the 4th predetermined value；
(W) when it is four predetermined values to determine second flag value, by the position of second memory block of the address book
Location is changed to the address of one of other not used described memory blocks；
(X) the of the data that one corresponds to second storage unit storage is generated according to the data of second storage unit storage
Three check codes；And
(Y) data that second storage unit stores and the third check code are stored to this according to the address book and first is deposited
Storage area and second memory block.
The beneficial effects of the present invention are：Judge whether first data and second data have by the processing unit
Whether effect, damaged with detection data.In addition, when determining first data and second data invalid, by the processing list
Effectively and just whether member generates the first repair data according to the reparation vector and first data, and judge first repair data
Really, the data of damage are restored whereby.
Description of the drawings
The other features and effect of the present invention, will clearly be presented in the embodiment with reference to schema, wherein：
Fig. 1 is a block diagram, is illustratively painted the embodiment that one is used for implementing data detection bearing calibration of the present invention
System；
Fig. 2 is a flow chart, illustrates the check problem of the embodiment；
Fig. 3 is a flow chart, illustrates the first correction program of the embodiment；
Fig. 4 is a flow chart, illustrates the second correction program of the embodiment；And
Fig. 5 is a flow chart, illustrates the storage program of the embodiment.
Specific implementation mode
Refering to fig. 1, illustrate a system 100 of the embodiment for implementing data detection bearing calibration of the present invention, this is
System 100 comprising one first storage unit 11, one second storage unit 12 and one be electrically connected first storage unit 11 and this second
The processing unit 13 of storage unit 12.In the present embodiment, which is, for example, solid state flash memory
(Flash Memory), second storage unit 12 for example, random access memory (Random Access Memory,
RAM)。
First storage unit 11 includes the of the first check code of storage the first data first data corresponding with one
Second inspection of the second data second data corresponding with one for the backup that the storage of one memory block 111, one is relevant to first data
The second memory block 112 of code and other multiple not used memory blocks 113 are tested, which also stores a correlation
Address in first memory block 111 and the address book of the address of second memory block 112, corresponding first memory block 111
First state flag and one correspond to second memory block 112 the second state flags.One first flag of the first state flag
Scale value is one to indicate the not abnormal first predetermined value in first memory block 111 and one different from the first predetermined value and indicate
Going out first memory block 111 has the one of which of abnormal second predetermined value, one second flag value of second state flags to be
One indicate the not abnormal third predetermined value in second memory block 112 and one different from the third predetermined value and indicate this
There are the one of which of the 4th abnormal predetermined value in two memory blocks 112, and the initial value of first flag value is the first predetermined value, should
The initial value of second flag value is the third predetermined value.It is noted that in the present embodiment, the first predetermined value and this
Three predetermined values are for example all 0, and the second predetermined value and the 4th predetermined value are for example all 1.
The embodiment of data detection bearing calibration of the present invention is relevant to the inspection journey whether inspection data is damaged comprising one
Sequence, one be relevant to repair damage data the first correction program, one be relevant to repair damage data the second correction program
And one be relevant to again store correct data storage program.
Refering to fig. 1 and Fig. 2, the check problem comprise the steps of.
In step 201, the processing unit 13 obtained according to the address book be stored in first storage unit 11 this
First data of one memory block 111 and first check code, and it is stored in second memory block of first storage unit 11
112 second data and second check code.
In step 202, which judges whether first data are effective according to first check code.If this is sentenced
It is affirmative to determine result, then flow carries out step 203.Otherwise, flow carries out step 204.
In step 203, when the processing unit 13 determine first data it is effective when, the processing unit 13 by this first
Data are stored to second storage unit 12.
In step 204, when the processing unit 13 determines first data invalid, the processing unit 13 by this first
Flag value is updated to the second predetermined value.It is specifically intended that being to utilize existing any type error correction in the present embodiment
The technology of (Error Correction) coding judges whether first data and second data are effective, due to the present invention's
Feature and the technology for not lying in the error correction coding known to this known those skilled in the art, therefore do not add to repeat.
It follows in step 205 after step 204, which judges second data according to second check code
Whether effectively.If the judgement result is certainly, flow carries out step 206.Otherwise, flow carries out step 207.
In step 206, when the processing unit 13 determine second data it is effective when, the processing unit 13 by this second
Data are stored to second storage unit 12.
In step 207, when the processing unit 13 determines second data invalid, the processing unit 13 by this second
Flag value is updated to the 4th predetermined value.
Follow in the step 208 after step 207, the processing unit 13 judge first check code whether be identical to this
Two check codes.If the judgement result is affirmative, first correction program is carried out (also that is, flow progress step 301 should to enter
First step of the first correction program).Otherwise, second correction program is carried out (also that is, flow carries out step 401 to enter
First step of second correction program).
Refering to fig. 1 and Fig. 3, first correction program comprise the steps of.
In step 301, when the processing unit 13, which determines first check code, is identical to second check code, at this
Reason unit 13 generates the first repair data according to a reparation vector that is default and including an amendment bit and first data.
In step 302, which judges whether first repair data is effective according to first check code.If
The judgement result is certainly, then flow carries out step 303.Otherwise, flow carries out step 304.
In step 303, when the processing unit 13 determine first repair data it is effective when, 13 basis of processing unit
First repair data generates third data with second data.It is noted that in the present embodiment, in step 301,
The processing unit 13 carries out logic exclusive or by by the reparation vector and first data, to generate first repair data, and
In step 303, which carries out logic exclusive or by by first repair data and second data, is somebody's turn to do with generating
Third data.
In step 304, when the processing unit 13 determine first repair data it is invalid when, the processing unit 13 judgement
Whether the amendment bit of reparation vector is located at the leftmost bit member of reparation vector.If the judgement result is affirmative, flow
Cheng Jinhang steps 305.Otherwise, flow carries out step 306.
In step 305, when the processing unit 13, which determines the amendment bit, is located at the leftmost bit member, the processing unit
13, which generate one, indicates the error messages that data can not be restored.
Within step 306, when the processing unit 13 determine the amendment bit it is non-be located at the leftmost bit member when, the processing list
The amendment bit in the reparation vector is moved to left a bit by member 13, and repeats step 301~step 302.
It follows in step 307 after step 303, the processing unit 13 is according to the third data judging the first reparation number
According to whether correct.If the judgement result is certainly, flow carries out step 308.Otherwise, flow carries out step 309.It is worth mentioning
, in the present embodiment, judge whether the power for being 2 is to judge the first reparation number for the third data by the processing unit 13
Correctly whether according to, when the third data are 2 power, first repair data is correct.
In step 308, when the processing unit 13 determine first repair data it is correct when, which should
First repair data is stored to second storage unit 12.
In a step 309, when determine first repair data it is incorrect when, generate the error messages.
It is worth illustrating, in the present embodiment, first correction program is in first data and second data
Each mistake for having 1 bit by oneself, and when first check code and no wrong second check code, the number of damage can be restored
According to and if each mistake for having identical 1 bit by oneself of first check code and second check code or first data and should
When second data share the mistake of 3 bits or more, then it can not restore the data of damage.
For example, correct data are 00110011, and first check code and second check code are all without damage, this
First data of each mistake for having 1 bit by oneself of one data and second data, damage are 00111011, and damage this
Two data are 00100011.In step 301, which is 00000001, the bit that bit value is 1 in the reparation vector
The as amendment bit, first repair data which generates are 00111010, then in step 302, should
Processing unit 13 judges whether first repair data effective, and in step 304, when the processing unit 13 determine this first
When repair data (00111010) is invalid, which judges whether the amendment bit of reparation vector is located at the reparation
The leftmost bit member of vector, finally within step 306, when the processing unit 13 determines, the amendment bit is non-to be located at the leftmost bit
When first, which moves to left a bit by the amendment bit in the reparation vector.Repeat step 301,302,304,306
When the reparation vector is 00001000, in step 301, first repair data which generates is
00110011, then in step 302, which judges whether first repair data has according to first check code
Effect, and in step 303, when the processing unit 13 determine first repair data it is effective when, what which generated
Third data are 00010000, and in step 307, according to the third data judging, first repair data is the processing unit 13
It is no it is correct (also namely it is decided that the third data 00010000 whether the power for being 2, to judge whether first repair data correct),
In this citing, the power which is 2, therefore, flow proceeds to step 308, in step 308, when this
Processing unit 13 determine first repair data it is correct when, the processing unit 13 by first repair data store to this second
Storage unit 12.
Refering to fig. 1 and Fig. 4, second correction program comprise the steps of.
In step 401, when the processing unit 13 determines first check code different from second check code, at this
Reason unit 13 judges whether first data are effective according to second check code.If the judgement result is certainly, flow carries out
Step 402.Otherwise, flow carries out step 403.
In step 402, when the processing unit 13 determine first data it is effective when, the processing unit 13 by this first
Data are stored to second storage unit 12.
In step 403, when the processing unit 13 determines first data invalid, the processing unit 13 according to this
One check code judges whether second data are effective.If the judgement result is certainly, flow carries out step 404.Otherwise, flow
Carry out step 405.
In step 404, when the processing unit 13 determine second data it is effective when, the processing unit 13 by this second
Data are stored to second storage unit 12.
In step 405, when the processing unit 13 determines second data invalid, which generates the mistake
Accidentally message.
It is worth illustrating, in the present embodiment, when first check code and second check code share 1 bit
Mistake then can be extensive by second correction program and when first data and second data share the mistake of 1 bit
The data damaged again, and when first check code and each mistake for having 1 bit by oneself of second check code, if or first number
According to and second data it is each have by oneself 1 bit mistake when, then second correction program can not restore damage data.
Refering to fig. 1 and Fig. 5, behind step 206,308,402 and 404, which carries out the storage program, will
Effective and correct data are stored to first memory block 111 and second memory block 112, which includes following step
Suddenly.
In step 501, which judges whether first flag value is the second predetermined value.If the judgement knot
Fruit is affirmative, then flow carries out step 502.Otherwise, flow carries out step 503.
In step 502, when it is the second predetermined value that the processing unit 13, which determines first flag value, the processing list
The address of first memory block 111 of the address book is changed to one of other not used described memory blocks 113 by member 13
Address, and after first flag value is updated to the first predetermined value, carry out step 503.
In step 503, which judges whether second flag value is the 4th predetermined value.If the judgement knot
Fruit is affirmative, then flow carries out step 504.Otherwise, flow carries out step 505.
In step 504, when it is four predetermined values that the processing unit 13, which determines second flag value, the processing list
The address of second memory block 112 of the address book is changed to one of other not used described memory blocks 113 by member 13
Address and after second flag value is updated to the third predetermined value, carries out step 505.
In step 505, the data which stores according to second storage unit 12 generate one correspond to this
The third check code of the data of two storage units 12 storage.
In step 506, the data and be somebody's turn to do which stores second storage unit 12 according to the address book
Third check code is stored to first memory block 111 and second memory block 112.
It is noted that in the present embodiment, step 505,506 are executed after step 504 or 503, but in other realities
It applies step 505 in example, 506 can be executed after step 501 or 502 and 503 or 504.
In conclusion data detection bearing calibration of the present invention, by the processing unit 13 judge first data and this
Whether whether two data are effective, damaged with detection data.In addition, when determining first data and second data invalid,
First repair data is generated according to the reparation vector and first data by the processing unit 13, and judges the first reparation number
According to whether effectively and correct, the data of damage are restored whereby, therefore the purpose of the present invention can be reached really.
Claims (11)
1. a kind of data detection bearing calibration is implemented by a processing unit, which is electrically connected one first and deposits
Storage unit, first storage unit include the of the first check code of storage the first data first data corresponding with one
Second inspection of the second data second data corresponding with one for the backup that one memory block, a storage are relevant to first data
Test the second memory block of code and other multiple not used memory blocks, first storage unit also store one be relevant to this
The address book of the address of one memory block and the address of second memory block, it is characterised in that：The data detection bearing calibration includes
Following steps
(A) according to the address book obtain be stored in first storage unit first memory block first data with this first
Check code, and it is stored in second data and second check code of second memory block of first storage unit；
(B) judge whether first data are effective according to first check code；
(C) when determining first data invalid, judge whether second data are effective according to second check code；
(D) when determining second data invalid, judge whether first check code is identical to second check code；
(E) default and include an amendment position according to one when determining first check code and being identical to second check code
The reparation vector of member and first data, generate first repair data；
(F) judge whether first repair data is effective according to first check code；And
(G) when determine first repair data it is effective when, according to second data and first repair data judge this first
Whether repair data is correct.
2. data detection bearing calibration according to claim 1, it is characterised in that：Step (G) includes following sub-step
(G-1) a third data are generated according to first repair data and second data；And
(G-2) according to the third data judging, whether first repair data is correct.
3. data detection bearing calibration according to claim 2, it is characterised in that：It, should by judgement in step (G-2)
Whether the power for being 2 is to judge whether first repair data is correct for third data, and when the third data are 2 power, this first
Repair data is correct.
4. data detection bearing calibration according to claim 2, it is characterised in that：In step (E), by reparation vector
Logic exclusive or is carried out with first data, to generate first repair data, and in sub-step (G-1), this first is repaired
Data carry out logic exclusive or with second data, to generate the third data.
5. data detection bearing calibration according to claim 1, it is characterised in that：Also include following step after step (G)
Suddenly
(H) when determine first repair data it is incorrect when, generate one indicate the error messages that data can not be restored.
6. data detection bearing calibration according to claim 1, it is characterised in that：Also include following step after step (F)
Suddenly
(I) when determine first repair data it is invalid when, judge reparation vector the amendment bit whether be located at the reparation
One leftmost bit member of vector；
(J) it when determining the amendment bit and being located at the leftmost bit member, generates one and indicates the mistake news that data can not be restored
Breath；And
(K) when determine the amendment bit it is non-be located at the leftmost bit member when, the amendment bit in the reparation vector is moved to left one
A bit, and repeat step (E)~step (F).
7. data detection bearing calibration according to claim 1, it is characterised in that：The processing unit is also electrically connected one
Two storage units also comprise the steps of after step (B)
(L) when determine first data it is effective when, which is stored to second storage unit；And
It is also comprised the steps of after step (C)
(M) when determine second data it is effective when, which is stored to second storage unit.
8. data detection bearing calibration according to claim 1, it is characterised in that：The processing unit is also electrically connected one
Two storage units also comprise the steps of after step (D)
(N) when determining first check code different from second check code, which is judged according to second check code
According to whether effectively；
(O) when determine first data it is effective when, which is stored to second storage unit；
(P) when determining first data invalid, judge whether second data are effective according to first check code；
(Q) when determine second data it is effective when, which is stored to second storage unit；And
(R) it when determining second data invalid, generates one and indicates the error messages that data can not be restored.
9. data detection bearing calibration according to claim 1, it is characterised in that：The processing unit is also electrically connected one
Two storage units also comprise the steps of after step (G)
(S) when determine first repair data it is correct when, which is stored to second storage unit.
10. data detection bearing calibration according to claim 9, it is characterised in that：First storage unit also stores one
Second state flags of the first state flag of a correspondence first memory block and correspondence second memory block, this first
One the first flag value of state flags be one indicate the not abnormal first predetermined value in first memory block and one it is different
In the first predetermined value and indicate that there is the one of which of abnormal second predetermined value in first memory block, second state flags
Second flag value be one and indicate the not abnormal third predetermined value in second memory block and one different from the third
Predetermined value simultaneously indicates that there is the one of which of the 4th abnormal predetermined value in second memory block, which is should
First predetermined value, the second flag value initial value are the third predetermined value, wherein also by first flag value in step (C)
It is updated to the second predetermined value, second flag value is also updated to the 4th predetermined value in step (D).
11. data detection bearing calibration according to claim 10, it is characterised in that：Also include following after step (S)
Step
(T) judge whether first flag value is the second predetermined value；
(U) when it is the second predetermined value to determine first flag value, the address of first memory block of the address book is become
The more address of one of other not used described memory blocks；
(V) judge whether second flag value is the 4th predetermined value；
(W) when it is four predetermined values to determine second flag value, the address of second memory block of the address book is become
The more address of one of other not used described memory blocks；
(X) third of the data of correspondence second storage unit storage is generated according to the data of second storage unit storage
Check code；And
(Y) data that second storage unit stores are stored with the third check code to first memory block according to the address book
With second memory block.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710149624.3A CN108572887A (en) | 2017-03-14 | 2017-03-14 | Data detection bearing calibration |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201710149624.3A CN108572887A (en) | 2017-03-14 | 2017-03-14 | Data detection bearing calibration |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108572887A true CN108572887A (en) | 2018-09-25 |
Family
ID=63578494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201710149624.3A Pending CN108572887A (en) | 2017-03-14 | 2017-03-14 | Data detection bearing calibration |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108572887A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112181713A (en) * | 2020-10-10 | 2021-01-05 | 上海威固信息技术股份有限公司 | Data recovery method and system of computer storage system |
Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008077810A (en) * | 2006-09-25 | 2008-04-03 | Toshiba Corp | Nonvolatile semiconductor storage device |
| CN101233498A (en) * | 2005-08-03 | 2008-07-30 | 桑迪士克股份有限公司 | Data operations in flash memories utilizing direct data file stroage |
| CN101809673A (en) * | 2007-09-25 | 2010-08-18 | 桑迪士克股份有限公司 | Nonvolatile memory with self recovery |
| CN101944386A (en) * | 2009-07-03 | 2011-01-12 | 群联电子股份有限公司 | Control circuit and storage system and method for identifying error data in flash memory |
| CN102227779A (en) * | 2008-10-28 | 2011-10-26 | 美光科技公司 | Error correction in multiple semiconductor memory units |
| CN103177770A (en) * | 2007-05-11 | 2013-06-26 | 旺宏电子股份有限公司 | Memory structure, repair system and method for testing the same |
| CN103365739A (en) * | 2013-08-02 | 2013-10-23 | 深圳市瑞耐斯技术有限公司 | NAND flash memory equipment and data recovery method thereof |
| CN103578566A (en) * | 2012-07-23 | 2014-02-12 | 群联电子股份有限公司 | Memory storage apparatus and restoration method thereof |
| CN103975309A (en) * | 2012-11-28 | 2014-08-06 | 华为技术有限公司 | Data recovery method, data recovery apparatus, storage and storage system |
| CN103995784A (en) * | 2014-04-23 | 2014-08-20 | 威盛电子股份有限公司 | Flash memory controller, storage device and flash memory control method |
| US20140245100A1 (en) * | 2010-03-24 | 2014-08-28 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| CN104040504A (en) * | 2011-11-07 | 2014-09-10 | 桑迪士克企业知识产权有限责任公司 | Soft information generation for memory systems |
| CN104919434A (en) * | 2012-12-07 | 2015-09-16 | 西部数据技术公司 | System and method for lower page data recovery in a solid state drive |
-
2017
- 2017-03-14 CN CN201710149624.3A patent/CN108572887A/en active Pending
Patent Citations (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101233498A (en) * | 2005-08-03 | 2008-07-30 | 桑迪士克股份有限公司 | Data operations in flash memories utilizing direct data file stroage |
| JP2008077810A (en) * | 2006-09-25 | 2008-04-03 | Toshiba Corp | Nonvolatile semiconductor storage device |
| CN103177770A (en) * | 2007-05-11 | 2013-06-26 | 旺宏电子股份有限公司 | Memory structure, repair system and method for testing the same |
| CN101809673A (en) * | 2007-09-25 | 2010-08-18 | 桑迪士克股份有限公司 | Nonvolatile memory with self recovery |
| CN102227779A (en) * | 2008-10-28 | 2011-10-26 | 美光科技公司 | Error correction in multiple semiconductor memory units |
| CN101944386A (en) * | 2009-07-03 | 2011-01-12 | 群联电子股份有限公司 | Control circuit and storage system and method for identifying error data in flash memory |
| US20140245100A1 (en) * | 2010-03-24 | 2014-08-28 | Kabushiki Kaisha Toshiba | Semiconductor memory device |
| CN104040504A (en) * | 2011-11-07 | 2014-09-10 | 桑迪士克企业知识产权有限责任公司 | Soft information generation for memory systems |
| CN103578566A (en) * | 2012-07-23 | 2014-02-12 | 群联电子股份有限公司 | Memory storage apparatus and restoration method thereof |
| CN103975309A (en) * | 2012-11-28 | 2014-08-06 | 华为技术有限公司 | Data recovery method, data recovery apparatus, storage and storage system |
| CN104919434A (en) * | 2012-12-07 | 2015-09-16 | 西部数据技术公司 | System and method for lower page data recovery in a solid state drive |
| CN103365739A (en) * | 2013-08-02 | 2013-10-23 | 深圳市瑞耐斯技术有限公司 | NAND flash memory equipment and data recovery method thereof |
| CN103995784A (en) * | 2014-04-23 | 2014-08-20 | 威盛电子股份有限公司 | Flash memory controller, storage device and flash memory control method |
Non-Patent Citations (3)
| Title |
|---|
| HYUN-SEOB LEE等: "RMSS: an efficient recovery management scheme on NAND flash memory based solid state disk", 《IEEE》 * |
| 苏建华: "嵌入式存储器内建自测试与内建自修复技术研究", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
| 谭龙生: "一种基于FPGA的低开销可重构容错系统设计", 《中国优秀硕士学位论文全文数据库 信息科技辑》 * |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112181713A (en) * | 2020-10-10 | 2021-01-05 | 上海威固信息技术股份有限公司 | Data recovery method and system of computer storage system |
| CN112181713B (en) * | 2020-10-10 | 2021-06-04 | 上海威固信息技术股份有限公司 | Data recovery method and system of computer storage system |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN105843699B (en) | Dynamic random access memory device and method for error monitoring and correction | |
| CN101427323B (en) | System and method for reading non-volatile computer memory | |
| CN104376877B (en) | The circuit device and method of wrong identification are carried out to the permanent error in memory | |
| CN205881469U (en) | Fault detection equipment of electronic equipment and memory that is used for having a plurality of memory locations of standing transient fault and permanent fault | |
| US20120144272A1 (en) | Probabilistic multi-tier error correction in not-and (nand) flash memory | |
| CN101558385B (en) | Method and apparatus of cache assisted error detection and correction in memory | |
| US8572444B2 (en) | Memory apparatus and testing method thereof | |
| CN101937373A (en) | Bit error threshold and remapping a memory device | |
| CN105723344A (en) | Method and apparatus for non-volatile ram error re-mapping | |
| CN110286853B (en) | Data writing method and device and computer readable storage medium | |
| CN104282342A (en) | Flash memory device, memory controller and control method of flash memory | |
| CN101739306A (en) | Method for processing data errors, and device and system for checking and correcting data errors | |
| CN103049354A (en) | Data restoration method, data restoration device and storage system | |
| US10545824B2 (en) | Selective error coding | |
| CN106802837B (en) | Method and device for updating error detection and correcting ECC code | |
| CN111459708B (en) | Bad block processing method and device | |
| CN108572887A (en) | Data detection bearing calibration | |
| CN103825649A (en) | Optical module information restoration method and apparatus | |
| JP5869649B2 (en) | Method, apparatus and apparatus for data processing | |
| CN110444243A (en) | Store test method, system and the storage medium of equipment read error error correcting capability | |
| CN113470723A (en) | Read retry test method and device, readable storage medium and electronic equipment | |
| CN108572882B (en) | Data storage method and storage device | |
| US20180373648A1 (en) | Method for writing in a non-volatile memory of an electronic entity, and related electronic entity | |
| CN109979519A (en) | The method of inspection, nonvolatile memory and the electronic device of memory integrity | |
| JP2014056381A (en) | Electronic control device for vehicle |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20180925 |
|
| WD01 | Invention patent application deemed withdrawn after publication |