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CN108399116A - A kind of server power-up state monitoring system and method - Google Patents

A kind of server power-up state monitoring system and method Download PDF

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Publication number
CN108399116A
CN108399116A CN201810174705.3A CN201810174705A CN108399116A CN 108399116 A CN108399116 A CN 108399116A CN 201810174705 A CN201810174705 A CN 201810174705A CN 108399116 A CN108399116 A CN 108399116A
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CN
China
Prior art keywords
condition information
portions
server
expander
power
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201810174705.3A
Other languages
Chinese (zh)
Inventor
王兴隆
乔英良
班华堂
刘宝阳
宿燕鸣
姬飞飞
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Zhengzhou Yunhai Information Technology Co Ltd
Original Assignee
Zhengzhou Yunhai Information Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Zhengzhou Yunhai Information Technology Co Ltd filed Critical Zhengzhou Yunhai Information Technology Co Ltd
Priority to CN201810174705.3A priority Critical patent/CN108399116A/en
Publication of CN108399116A publication Critical patent/CN108399116A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3055Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/28Supervision thereof, e.g. detecting power-supply failure by out of limits supervision

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Quality & Reliability (AREA)
  • Power Sources (AREA)

Abstract

The present invention provides a kind of server power-up state monitoring system, including:The portions FPGA, the portions Expander;The portions FPGA start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to memory;The Expander described powers on condition information for obtaining;It is powered on described in judgement and whether there is unusual condition information in condition information;If it is, recording the unusual condition information.Server power-up state provided by the invention monitors system, when in the portions FPGA, control server powers on, can monitor that FPGA records in memory powers on condition information, and judge wherein wrong unusual condition information, to be recorded to unusual condition information, to facilitate the later use record, the state of working on power of server is analyzed, can low cost, it is simple, accurately the unusual condition that powers on of server is detected.The present invention provides a kind of server power-up state monitoring method, is applied to above-mentioned server power-up state and monitors system.

Description

A kind of server power-up state monitoring system and method
Technical field
The present invention relates to field of computer technology, more particularly to a kind of server power-up state monitors system and method.
Background technology
Server is as a kind of computer equipment, and on startup, the electrifying timing sequence of computer all parts is on mainboard Power supply, the voltage adapter control source since most, the generation of CPU power supplies to the end have strictly opening sequence control System.Upper electrical anomaly before BIOS (Basic Input Output System, basic input output system) startups is in storage system Field is the problem for being extremely difficult to positioning, and probability of occurrence is relatively small, but analyzing and positioning cost is very high, difficult, example Such as parts damages, power supply overvoltage, it is under-voltage can result in, if very time-consuming can only take by Hardware Engineer's measurement signal Power, FPGA (Field-Programmable Gate Array, i.e. field programmable gate array) are controlled as electrifying timing sequence Critical component precisely defines the sequencing of each Vital Voltage signal, if some voltage signal can not start, the voltage Electric signal after signal also will be unable to start, to which storage system can not start.
It powers on abnormity detecting and compares and be difficult to analyze, in the epoch that storage system ownership continues to increase, how to provide A kind of low cost, simple, accurately storage system abnormality detection mechanism, are that those skilled in the art's technology urgently to be resolved hurrily is asked Topic.
Invention content
In view of this, the purpose of the present invention is to provide a kind of server power-up state monitoring system and method, low cost, Simply, accurately the unusual condition that powers on of server is detected.Its concrete scheme is as follows:
On the one hand, the present invention provides a kind of server power-up state monitoring system, including:The portions FPGA, the portions Expander;
The portions FPGA start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to storage Device;
The Expander described powers on condition information for obtaining;It powers in condition information and whether there is described in judgement Unusual condition information;If it is, recording the unusual condition information.
Preferably, the Expander, is additionally operable to:
It repeats acquisition n times and powers on condition information;
Judge to power on described in n times and whether there is consistent unusual condition information in condition information;
If it is, recording the unusual condition information;The N is the positive integer more than 1.
Preferably, further include:
I2C buses power on condition information for connecting the portions FPGA and the portions Expander described in transmission.
Preferably, the memory is register.
Preferably, the portions FPGA are additionally operable to power on situation there are when unusual condition when server is recorded, control service Device electrifying timing sequence stops.
Preferably, further include:Communication device is used for transmission the unusual condition information to predeterminated position.
On the other hand, the present invention provides a kind of server power-up state monitoring method, is applied to any of the above-described kind of server Power-up state monitors system, including:
The portions FPGA, control server electrifying timing sequence starts, and records the corresponding condition information that powers on to memory;
The Expander powers on condition information described in obtaining;
The Expander is powered in condition information described in judging with the presence or absence of unusual condition information;
If it is, the Expander records the unusual condition information.
Preferably, further include:
The Expander repeats acquisition n times and powers on condition information;
The Expander, which judges to power on described in n times, whether there is consistent unusual condition information in condition information;
If it is, the Expander records the unusual condition information;The N is the positive integer more than 1.
Preferably, further include:
The portions FPGA power on situation there are when unusual condition when server is recorded, and control server electrifying timing sequence stops Only.
Preferably, further include:The Expander transmits the unusual condition information to predeterminated position.
The present invention provides a kind of server power-up state monitoring system, including:The portions FPGA, the portions Expander;The FPGA Portion starts for controlling server electrifying timing sequence, and records the corresponding condition information that powers on to memory;The Expander, Described condition information is powered on for obtaining;It is powered on described in judgement and whether there is unusual condition information in condition information;If it is, Record the unusual condition information.Server power-up state provided by the invention monitors system, on the portions FPGA control server When electric, the condition information that powers on that FPGA records in memory can be monitored, and judge wherein wrong unusual condition information, to Unusual condition information is recorded, to facilitate the later use record, the state of working on power of server is analyzed, energy Enough low costs, it is simple, accurately the unusual condition that powers on of server is detected.
The present invention provides a kind of server power-up state monitoring method, is applied to above-mentioned server power-up state monitoring system System, it may have above-mentioned advantageous effect, details are not described herein.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this The embodiment of invention for those of ordinary skill in the art without creative efforts, can also basis The attached drawing of offer obtains other attached drawings.
Fig. 1 is the composition schematic diagram that the server power-up state that the specific embodiment of the invention provides monitors system;
Fig. 2 is the expansion composition schematic diagram that the server power-up state that the specific embodiment of the invention provides monitors system;
Fig. 3 is a kind of a kind of flow chart for server power-up state monitoring method that specific implementation mode provides of the present invention;
Fig. 4 is that a kind of a kind of repetition for server power-up state monitoring method that specific implementation mode provides of the present invention determines Flow chart.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.
Referring to FIG. 1, the composition that the server power-up state that Fig. 1, which is the specific embodiment of the invention, to be provided monitors system shows It is intended to.
In a kind of specific implementation mode of the present invention, the embodiment of the present invention provides a kind of server power-up state monitoring system System 100, including:The portions FPGA 110, the portions Expander 120;
The portions FPGA 110 start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to depositing Reservoir 111111;
The portions Expander 120 described power on condition information for obtaining;Powered on described in judgement in condition information whether There are unusual condition information;If it is, recording the unusual condition information.
Usually, on the server in electric control, the parallel processing degree in the portions FPGA 110 is high, is suitble to abundant with trigger Structure, therefore be suitable for completing sequential logic.Therefore, in the server, it is each using the portions FPGA 110 to control server for design Partial electrifying condition.The portions FPGA 110 record the electrifying condition of various pieces to memory 111, the electrifying condition of each part The space of 1 Bit is occupied, the portions FPGA 110 will store corresponding Bit and be set as 1 after which normally starts, and not actuated be set as The electrifying condition of server various pieces is learnt by reading 111 device information of memory in 0, Expander portion 120.Server is just After normally opened machine, good memory 111 each Bit defined in the portions FPGA 110 is that 1 (electric signal each defined opens It is dynamic to complete), if some part of server can not start, it is 0 that the portions Expander 120, which will read corresponding Bit, is sentenced with this The Bit corresponding server that break powers on part and does not power on normally.
It is well known that the power supply in the portions Expander 120 is (spare) electricity of Standby, so the portions Expander 120 are servicing Device first starts before starting, and therefore, the portions Expander 120 are able to access that the portions FPGA 110 obtain and power on condition information, judge wherein With the presence or absence of unusual condition information, and recording exceptional condition information, it can then facilitate and upload the unusual condition information of record To host computer, checked for user or technician, the specific abnormal position of Analysis server.
In a kind of specific implementation mode of the present invention, the portions Expander 120 periodically send to the portions FPGA 110 and ask The 110 register memory storage of the portions order acquisition FPGA powers on condition information, for example, if server electric sequence is followed successively by:S4、 P12V, P5V, P3.3V, VPP ... correspondingly set corresponding storage location title and are followed successively by:Bit1、Bit2、Bit3、Bit4、 Bit5 ..., if that the portions Expander 120 will learn that Bit3 and the positions later Bit are 0 by the rule of agreement, also It is that P3.3V (the 4th powers on position) and later electric signal do not start, it is abnormal that the portions Expander 120 will record P3.3V The event of startup, user or technical staff have found to obtain by the portions network access Expander 120 after server does not start normally This anomalous event pushes away to learn that the reason of causing upper electrical anomaly is that P3.3V is not actuated in conjunction with the relevant components of P3.3V Break and which suspicious component has exception, to search out the basic reason of failure.
Further, in order to reduce the erroneous judgement in the portions Expander 120, the portions Expander 120 can be set, also used In:It repeats acquisition n times and powers on condition information;Judge to power on described in n times and whether there is consistent unusual condition in condition information Information;If it is, recording the unusual condition information;The N is the positive integer more than 1.
Because the portions Expander 120 obtain 110 register data of the portions FPGA by the way of periodical poll, exists and accidentally accuse The portions FPGA 110 are normally carried out power up when alert risk, the i.e. portions Expander 120 read data, are not yet in time for update and post Storage (signal Bit after nearest power on signal is 0), and the portions Expander 120 get the register count before not updating According to, it takes for Bit and is not set as 1 and thinks that the signal does not power on, in order to avoid such mistake alerts, the need of the portions Expander 120 Data are obtained to the portions FPGA 110 to retry, i.e., it is obtain several times when the portions Expander 120 have detected not actuated signal more Whether really 110 data of the portions FPGA can be taken turns with confirming abnormal generation according to electrifying timing sequence overall time and the portions Expander 120 Suitable number of retries is arranged in the time that instruction obtains the portions FPGA 110.Such as number of retries is that the portions 3, Expander 120 continue to send 110 register of the portions I2C acquisition request FPGA is said if the register data of 3 acquisitions all shows that the signal does not start normally The bright signal does not start really, and the portions Expander 120 record the not actuated event of the signal.
It further, can be therebetween in order to transmit information between the portions FPGA 110 and the portions Expander 120 Setting I2C buses power on condition information for connecting the portions FPGA 110 and the portions Expander 120 described in transmission.I2C Bus is a kind of simple, the bidirectional two-line synchronous serial bus developed by Philips companies.It only needs both threads can be It is connected between the device in bus and transmits information.Storage system hard disk controller is connected as managing apparatus by I2C To the portions FPGA 110, the portions FPGA 110 provide I2C modules, Master equipment of the portions Expander 120 as I2C, and the portions FPGA 110 make For the Slave equipment of I2C;The portions Expander 120 are by giving the portions FPGA 110 to send 110 register count of the portions I2C acquisition request FPGA According to.
The portions Expander 120 and the portions FPGA 110 appoint that the portions FPGA 110 store electrifying timing sequence signal condition memory 111 Position, the i.e. position in 110 global storage of the place portions FPGA, 111 space, refer to when sending I2C requests so as to the portions Expander 120 The position acquisition is determined to corresponding register data;The portions EXPANDER 120 and 110 both ends of the portions FPGA are arranged each electric signal and are corresponded to The positions Bit.
It is worth noting that in order to facilitate the portions FPGA 110 power on the storage of condition information, the memory 111 is Register.Register possesses very high read or write speed, so the data transmission between register is very fast.The portions FPGA 110 Configuration register opens up a segment register region for electrifying timing sequence detecting, and each electric signal setting one Bit is general general The electrifying timing sequence signal of server has 20 or so, for example, Power Button be pressed after S4, P12V, P5V, P3.3V, VPP ... waits electric signals to start priority, so the register of 3 bytes is needed, 1 byte, 8 Bit, 3 bytes, 24 Bit, The corresponding positions Bit are distributed to each electric signal according to the electric sequence of electric signal, Bit represent the Bit corresponding telecommunications for 1 Number start, for 0, to represent corresponding electric signal not actuated;The portions FPGA 110 write logical program, all registers of acquiescence before powering on Bit are 0, according to the logical process of the scheme, the phase of setting agreement before next signal starts after each signal enabling It is 1 to answer Bit.The portions Expander 120 and the portions FPGA 110 appoint the register position in the portions FPGA 110;The portions EXPANDER 120 After getting entire sequential detecting register data by I2C orders, check that corresponding Bit of each electric signal can learn Which electric signal starts, which electric signal is not actuated.
Before server booting, i.e., before 110 electrifying timing sequence of the portions FPGA starts, give tacit consent in 110 register of the portions FPGA Bit all It is 0, for each electric signal after starting before next electric signal startup, it is 1 that the portions FPGA 110, which are arranged corresponding Bit, is illustrated Bright, Power Button press rear electrifying timing sequence and start, and first signal is S4, the positions setting Bit0 1 after S4 starts, then P12V The positions Bit1 1 are set, the positions setting Bit2 1 after P5V starts, it is assumed that next P3.3V is not actuated, then P3.3V is corresponded to after startup Bit3 be 0, all electric signals behind will be unable to start, corresponding Bit all be 0;It can from the distribution of entire register It arrives, Bit0-2 is 1, and Bit3 and the positions later Bit are all 0.
It should further be noted that the portions FPGA 110 power on shape during control server powers on when server is recorded There are when unusual condition, control server electrifying timing sequence stops condition.The portions FPGA 110 when powering on each electric signal be according to default The electrifying startup of good sequence one by one, the input that next signal powers on when the startup of previous signal, if some Signal can not normally start, behind all signals will not be activated.
The present invention provides a kind of server power-up state monitoring system, including:The portions FPGA 110, the portions Expander 120;Institute The portions FPGA 110 are stated, are started for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to memory 111;Institute The portions Expander 120 are stated, described condition information is powered on for obtaining;It is powered on described in judgement in condition information with the presence or absence of abnormal shape Condition information;If it is, recording the unusual condition information.Server power-up state provided by the invention monitors system, The portions FPGA 110 control server when powering on, and can monitor the condition information that powers on that the portions FPGA 110 record in memory 111, and Wherein wrong unusual condition information is judged, to be recorded to unusual condition information, to facilitate the later use record, to clothes The state of working on power of business device is analyzed, can low cost, it is simple, accurately the unusual condition that powers on of server is examined It surveys.
Referring to FIG. 2, the server power-up state that Fig. 2, which is the specific embodiment of the invention, to be provided monitors the expansion group of system At schematic diagram.
On the basis of above-mentioned specific implementation mode, in present embodiment, in order to which unusual condition information is transmitted to It is easy in the equipment checked, can also communication device 121 be set in the portions FPGA 110, be used for transmission the unusual condition information and arrive Predeterminated position.The portions Expander 120 be used as simple microcontroller, supported control protocol is fairly simple, need develop with it is upper The serve end program of machine communication;It is different from the BMC monitoring management chips of server profession, 120 outband management branch of the portions Expander Hold weaker, when being communicated with the portions Expander 120 using serial mode, user or technical staff need to pass through serial ports to storage room Line is connected to the portions Expander 120 of storage system.Network communication device, such as 4G, WiFi may be used in the communication device 121 Equal communication modes, can also use line interface communication mode.
The portions Expander 120 report anomalous event to host computer, and the portions Expander 120 write embedded code, start base In serial ports or the feedback of status service routine of network interface, the portions Expander 120 and host computer agreement serial ports or network interface lead to Believe agreement, arrange the data format of the order sent and return, host computer connects the portions Expander by serial ports or network interface 120, the event that the order appointed obtains upper electrical anomaly is sent, is checked for user or technician.Technician learns It, can in conjunction with which is inferred to the relevant component of the electric signal when the reason of causing electrical anomaly is that some electric signal is not actuated It doubts component and there is exception, to search out the basic reason of failure, replace component and solve the problems, such as.
Referring to FIG. 3, Fig. 3 is a kind of a kind of server power-up state monitoring method that specific implementation mode provides of the present invention Flow chart.
In a kind of specific implementation mode of the present invention, the embodiment of the present invention provides a kind of server power-up state monitoring side Method is applied to the server power-up state in any of the above-described kind of specific implementation mode and monitors system, including:
S11:The portions FPGA 110, control server electrifying timing sequence starts, and records the corresponding condition information that powers on to memory 111;
S12:The portions Expander 120 power on condition information described in obtaining;
S13:The portions Expander 120 judge that described power on whether there is unusual condition information in condition information;
S14:If it is, the portions Expander 120 record the unusual condition information.
Referring to FIG. 4, Fig. 4 is a kind of a kind of server power-up state monitoring method that specific implementation mode provides of the present invention Repetition determine flow chart.
In order to avoid the portions Expander 120 judge by accident, the mode for being repeated several times and determining and powering on unusual condition may be used:
S21:The portions Expander 120 repeat acquisition n times and power on condition information;
S22:The portions Expander 120, which judge to power on described in n times, whether there is consistent abnormal shape in condition information Condition information;
S23:If it is, the portions Expander 120 record the unusual condition information;The N is just whole more than 1 Number.
In order to save flow, when unusual condition is recorded in the portions FPGA 110, that is, certain part of server is recorded When not powering on normally, the portions FPGA 110 power on situation there are when unusual condition when server is recorded, control server Electrifying timing sequence stops.Because if the portions FPGA 110 control server and continue to power on, server can not finally work normally.
Unusual condition information is checked for convenience, the unusual condition letter can be transmitted in the portions Expander 120 Cease predeterminated position.Such as unusual condition information can be transmitted in host computer or other equipment conveniently checked. The portions Expander 120 can be communicated by serial ports with host computer, and host computer is by preset serial port command from Expander Know abnormality in portion 120;Can be that the portions Expander 120 are equipped with network controller if cost can be received on a small quantity to increase, By sending networking command unusual condition information is obtained to the portions Expander 120.
Finally, it is to be noted that, herein, relational terms such as first and second and the like be used merely to by One entity or operation are distinguished with another entity or operation, without necessarily requiring or implying these entities or operation Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant meaning Covering non-exclusive inclusion, so that the process, method, article or equipment including a series of elements includes not only that A little elements, but also include other elements that are not explicitly listed, or further include for this process, method, article or The intrinsic element of equipment.In the absence of more restrictions, the element limited by sentence "including a ...", is not arranged Except there is also other identical elements in the process, method, article or apparatus that includes the element.
A kind of server power-up state monitoring system and method provided by the present invention is described in detail above, this Specific case is applied in text, and principle and implementation of the present invention are described, the explanation of above example is only intended to It facilitates the understanding of the method and its core concept of the invention;Meanwhile for those of ordinary skill in the art, think of according to the present invention Think, there will be changes in the specific implementation manner and application range, in conclusion the content of the present specification should not be construed as pair The limitation of the present invention.

Claims (10)

1. a kind of server power-up state monitors system, which is characterized in that including:The portions FPGA, the portions Expander;
The portions FPGA start for controlling server electrifying timing sequence, and record the corresponding condition information that powers on to memory;
The Expander described powers on condition information for obtaining;It is powered on described in judgement in condition information with the presence or absence of abnormal Condition information;If it is, recording the unusual condition information.
2. server power-up state according to claim 1 monitors system, which is characterized in that the Expander is also used In:
It repeats acquisition n times and powers on condition information;
Judge to power on described in n times and whether there is consistent unusual condition information in condition information;
If it is, recording the unusual condition information;The N is the positive integer more than 1.
3. server power-up state according to claim 1 monitors system, which is characterized in that further include:
I2C buses power on condition information for connecting the portions FPGA and the portions Expander described in transmission.
4. server power-up state according to claim 1 monitors system, which is characterized in that the memory is deposit Device.
5. server power-up state according to claim 1 monitors system, which is characterized in that the portions FPGA are additionally operable to Situation is powered on there are when unusual condition when server is recorded, and control server electrifying timing sequence stops.
6. server power-up state according to any one of claims 1 to 5 monitors system, which is characterized in that further include:It is logical T unit is used for transmission the unusual condition information to predeterminated position.
7. a kind of server power-up state monitoring method is applied to claim 1 to 6 any one of them server power-up state Monitoring system, which is characterized in that including:
The portions FPGA, control server electrifying timing sequence starts, and records the corresponding condition information that powers on to memory;
The Expander powers on condition information described in obtaining;
The Expander is powered in condition information described in judging with the presence or absence of unusual condition information;
If it is, the Expander records the unusual condition information.
8. server power-up state monitoring method according to claim 7, which is characterized in that further include:
The Expander repeats acquisition n times and powers on condition information;
The Expander, which judges to power on described in n times, whether there is consistent unusual condition information in condition information;
If it is, the Expander records the unusual condition information;The N is the positive integer more than 1.
9. server power-up state monitoring method according to claim 7, which is characterized in that further include:
The portions FPGA power on situation there are when unusual condition when server is recorded, and control server electrifying timing sequence stops.
10. server power-up state detection method according to any one of claims 7 to 9, which is characterized in that further include: The Expander transmits the unusual condition information to predeterminated position.
CN201810174705.3A 2018-03-02 2018-03-02 A kind of server power-up state monitoring system and method Pending CN108399116A (en)

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CN109635016A (en) * 2018-10-16 2019-04-16 深圳壹账通智能科技有限公司 Data transfer device, device, equipment and computer readable storage medium
CN110336274A (en) * 2019-07-01 2019-10-15 上海电力学院 Add the virtual plant operation method of virtual plant adjuster
CN111488050A (en) * 2020-04-16 2020-08-04 苏州浪潮智能科技有限公司 Power supply monitoring method, system and server

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CN101430658A (en) * 2008-12-11 2009-05-13 华为技术有限公司 Exceptional reset information saving method and device
CN104375915A (en) * 2014-12-16 2015-02-25 浪潮电子信息产业股份有限公司 Method for interactively and quickly diagnosing mainboard time sequence by utilizing BMC (baseboard management controller) and CPLD (complex programmable logic device)
CN106021066A (en) * 2016-05-23 2016-10-12 联想(北京)有限公司 Fault information detection method and electronic device

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Publication number Priority date Publication date Assignee Title
CN101430658A (en) * 2008-12-11 2009-05-13 华为技术有限公司 Exceptional reset information saving method and device
CN104375915A (en) * 2014-12-16 2015-02-25 浪潮电子信息产业股份有限公司 Method for interactively and quickly diagnosing mainboard time sequence by utilizing BMC (baseboard management controller) and CPLD (complex programmable logic device)
CN106021066A (en) * 2016-05-23 2016-10-12 联想(北京)有限公司 Fault information detection method and electronic device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109635016A (en) * 2018-10-16 2019-04-16 深圳壹账通智能科技有限公司 Data transfer device, device, equipment and computer readable storage medium
CN110336274A (en) * 2019-07-01 2019-10-15 上海电力学院 Add the virtual plant operation method of virtual plant adjuster
CN110336274B (en) * 2019-07-01 2022-12-09 上海电力学院 Virtual power plant operation method with additional virtual power plant regulator
CN111488050A (en) * 2020-04-16 2020-08-04 苏州浪潮智能科技有限公司 Power supply monitoring method, system and server
CN111488050B (en) * 2020-04-16 2022-04-22 苏州浪潮智能科技有限公司 Power supply monitoring method, system and server

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