CN108276008B - 氮化硅基板及使用其的氮化硅电路基板 - Google Patents
氮化硅基板及使用其的氮化硅电路基板 Download PDFInfo
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- CN108276008B CN108276008B CN201810154404.4A CN201810154404A CN108276008B CN 108276008 B CN108276008 B CN 108276008B CN 201810154404 A CN201810154404 A CN 201810154404A CN 108276008 B CN108276008 B CN 108276008B
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Abstract
本发明涉及氮化硅基板及使用其的氮化硅电路基板。本发明提供氮化硅基板,具备氮化硅晶粒和晶界相且导热率为50W/m·k以上,其特征在于,氮化硅基板的剖面组织中,厚度方向的晶界相的合计长度T2相对氮化硅基板的厚度T1的比(T2/T1)为0.01~0.30,从绝缘强度的相对平均值的偏差为15%以下,所述绝缘强度的平均值是使电极与基板的表背面接触而用四端法测量时的绝缘强度的平均值。另外,绝缘强度的平均值优选为15kv/mm以上。根据上述构成能够得到绝缘强度的偏差小的氮化硅基板及使用其的氮化硅电路基板。
Description
本申请是申请号为201480058070.0、申请日为2014年10月21日,发明名称为“氮化硅基板及使用其的氮化硅电路基板”的中国专利申请的分案申请。
技术领域
后述的实施方式大致涉及氮化硅基板及使用其的氮化硅电路基板。
背景技术
近年来,一直尝试将氮化硅(Si3N4)基板适用于半导体电路基板。半导体电路基板使用着氧化铝(Al2O3)基板、氮化铝(AlN)基板。氧化铝基板的导热率为30W/m·k左右,但降低成本是可能的。另外,氮化铝基板的导热率成为160W/m·k以上的高导热化是可能的。另一方面,作为氮化硅基板开发了导热率为50W/m·k以上的基板。
氮化硅基板与氮化铝基板相比导热率低,但三点抗弯强度为500MPa以上,优异。氮化铝基板的三点抗弯强度通常为300~400MPa左右,存在导热率越高强度越下降的倾向。通过利用高强度的优点,使氮化硅基板薄型化是可能的。通过基板的薄型化,降低热阻成为可能,因而散热性提高。
利用这样的特性,氮化硅基板设置金属板等电路部而作为电路基板广泛使用。另外,还有作为国际公开号WO2011/010597号小册子(专利文献1)所示的压接结构用电路基板而使用的方法。
在实施上述那样的各种用法时,氮化硅基板所需的特性可举出导热率、强度、还有绝缘性。
关于绝缘性好的氮化硅基板,在特开2002-201075号公报(专利文献2)中提出。专利文献2公开了在温度25℃、湿度70%的条件下向氮化硅基板的表背之间施加1.5kV-100Hz的交流电压时的泄漏电流值为1000nA以下的氮化硅基板。该泄漏电流值越小表示表背之间的绝缘性越高。
现有技术文献
专利文献
专利文献1:国际公开号WO2011/010597号小册子
专利文献2:日本特开2002-201075号公报
发明内容
发明所要解决的课题
但是,如专利文献2那样即使泄漏电流值为一定值以下,有时绝缘性也不充分。追究其原因,结果表明,基板的厚度方向的氮化硅晶粒与晶界相的丰度比有大的关系。氮化硅基板由具备氮化硅晶粒和晶界相的氮化硅烧结体构成。在比较氮化硅晶粒和晶界相时,氮化硅晶粒的绝缘性高。因此,在氮化硅基板内根据晶界相的丰度比形成有绝缘性不同的部分。因此,即使泄漏电流值为一定值以下,绝缘性也产生不充分的现象。
用于解决课题的手段
根据实施方式涉及的氮化硅基板,是具备氮化硅晶粒和晶界相且导热率为50W/m·k以上的氮化硅基板,其特征在于,氮化硅基板的剖面组织中,晶界相的合计长度T2相对氮化硅基板的厚度T1的比(T2/T1)为0.01~0.30,从绝缘强度的平均值的偏差为20%以下,所述绝缘强度的平均值是使电极与基板的表背面接触而用四端法测量时的绝缘强度的平均值。
发明效果
根据实施方式涉及的氮化硅基板,由于将晶界相的合计长度T2相对氮化硅基板的厚度T1的比(T2/T1)规定为规定的范围,所以厚度方向的绝缘性的偏差小。因此,在用于电路基板等的情况下,能够得到绝缘性优异且可靠性高的电路基板。
附图说明
图1是表示实施方式涉及的氮化硅基板的剖面组织的一个例子的剖面图;
图2是用于说明在实施方式涉及的氮化硅基板中,晶界相的合计长度T2相对基板厚度T1的比(T2/T1)的剖面图;
图3是表示在氮化硅基板中,通过四端法测量绝缘强度的方法的一个例子的剖面图;
图4是表示绝缘强度的测量部位的一个例子的平面图;
图5是表示测量氮化硅基板的体积电阻率值的方法的一个例子的侧面图。
具体实施方式
本实施方式涉及的氮化硅基板,其是具备氮化硅晶粒和晶界相且导热率为50W/m·k以上的氮化硅基板,其特征在于,氮化硅基板的剖面组织中,晶界相的合计长度T2相对氮化硅基板的厚度T1的比(T2/T1)为0.01~0.30,从绝缘强度的平均值的偏差为20%以下,所述绝缘强度的平均值是使电极与基板的表背面接触而用四端法测量时的绝缘强度的平均值。
首先,氮化硅基板由具备氮化硅晶粒和晶界相且导热率为50W/m·k以上的氮化硅烧结体构成。另外,导热率优选为50W/m·k以上,更优选为90W/m·k以上。导热率不足50W/m·k时,散热性降低。
图1表示根据实施方式涉及的氮化硅基板的剖面组织的一个例子。图中,符号1为氮化硅基板,2为氮化硅晶粒,3为晶界相,T1为氮化硅基板的厚度。另外,图2为用于说明在实施方式涉及的氮化硅基板中,晶界相的合计长度T2相对基板厚度T1的比(T2/T1)的剖面图。图中,2为氮化硅晶粒,3为晶界相,T2-1~4为厚度方向的晶界相的长度。
氮化硅基板由具备氮化硅晶粒和晶界相的氮化硅烧结体构成。氮化硅晶粒优选β-Si3N4晶粒的以个数比例为95%以上100%以下。通过使β-Si3N4晶粒成为95%以上,氮化硅晶粒成为随机存在的组织,强度提高。
另外,晶界相主要由烧结助剂构成。另外,作为烧结助剂,优选为选自稀土元素、镁、钛、铪的一种以上。另外,优选的是,烧结助剂分别按氧化物换算合计含有2~14质量%。若烧结助剂按氧化物换算不足2质量%,则可能产生晶界相的丰度比小的部分。另外,若烧结助剂按氧化物换算超过14质量%而过量的话,则晶界相的丰度比可能变得过大。因此,烧结助剂按氧化物换算优选含有4.0~12.0质量%。
实施方式的氮化硅基板的剖面组织的特征在于,晶界相的合计长度T2相对氮化硅基板的厚度T1的比(T2/T1)为0.01~0.30。如图1所示,氮化硅基板的厚度T1为基板的厚度。基板的厚度T1由游标卡尺测量。
另外,关于说明晶界相的合计长度T2的测量方法,参照图2进行说明。图2是用于说明在氮化硅基板中,晶界相的合计长度T2相对基板厚度T1的比(T2/T1)的剖面图。图中,符号2为氮化硅晶粒,3为晶界相。首先,将氮化硅基板的厚度方向的任意剖面组织放大进行拍摄。在一个视野下无法观察厚度方向的剖面组织时,分多次摄影也可以。
另外,放大照片优选为扫描式电子显微镜(SEM)照片。如果为SEM照片,则具有氮化硅晶粒和晶界相存在对比度差而容易区分的优点。
另外,关于倍率,如果为2000倍以上则容易进行氮化硅晶粒和晶界相的区分。求晶界相的合计长度T2就是对剖面组织的放大照片在基板厚度方向引直线,求出该直线上存在的晶界相的长度。
在图2的情况下,T2-1、T2-2、T2-3、T2-4的合计成为T2(T2=(T2-1)+(T2-2)+(T2-3)+(T2-4))。在分开放大照片而摄影的情况下,重复该作业直至达到基板厚度T1。此外,在进行放大照片的摄影时,对任意剖面进行镜面抛光以使表面粗度Ra为0.05μm以下,并进行蚀刻处理后再实施摄影。此外,作为蚀刻处理,化学蚀刻、等离子体蚀刻的任一种都有效。另外,基板中存在的孔隙不计入晶界相的长度。
实施方式涉及的氮化硅基板的剖面组织,其特征在于,晶界相的合计长度T2相对氮化硅基板的厚度T1的比(T2/T1)为0.01~0.30。若上述比(T2/T1)不足0.01,则会部分产生晶界相少的区域,因而绝缘性降低。另一方面,若上述比(T2/T1)超过0.30,则部分形成晶界相多的区域,因而产生绝缘性的偏差。为了确保绝缘性,减小其偏差,上述比(T2/T1)优选为0.10~0.25的范围。
通过将上述比(T2/T1)规定在0.01~0.30的范围,能够将相对使电极与基板的表背面接触而用四端法测量时的绝缘强度的平均值的偏差控制在20%以下,进一步为15%以下。
图3表示使用四端法的绝缘强度的测量方法的一个例子。图中,符号1为氮化硅基板,4为表面侧测量端子,5为背面侧测量端子,6为测量仪。表面侧测量端子4及背面侧测量端子5的前端形状为球体。通过将测量端子的前端形状设为球体,可使对氮化硅基板1的面压固定,能够消除测量误差。
另外,表面侧测量端子4和背面侧测量端子5以夹住氮化硅基板1的方式对置配置。实施方式的氮化硅基板1中,无论将表面侧测量端子4和背面侧测量端子5配置在氮化硅基板1的哪个位置进行测量,相对平均值的偏差均为20%以下。
上述绝缘强度的平均值为通过前述的测量方法在氮化硅基板1上测量至少5处,并求其平均值而得。图4表示绝缘强度的测量部位的一个例子。例如,对一块基板测量5处时的测量部位,如图4所示,以S1、S2、S3、S4、S5的5处为测量对象。即,基板1的对角线彼此的交点(中心)为S1,自S1至各自角部的中点的4点为S2~S5。
将这样5处的测量点的绝缘强度的平均值作为氮化硅基板1的绝缘强度的平均值。即,将S1处的绝缘强度作为ES1,S2处的绝缘强度作为ES2,S3处的绝缘强度作为ES3,S4处的绝缘强度作为ES4,S5处的绝缘强度作为ES5时,绝缘强度的平均值ESA由下述算式求得。另外,测量点至少为5点,也可以将测量点设为6处以上。
ESA=(ES1+ES2+ES3+ES4+ES5)/5
另外,绝缘强度的偏差(%)为通过(|平均值ESA-ESn|/ESA)×100(%),n=整数(测量点的编号)以绝对值求出相对平均值的偏差的比例(%)。此外,除上述所示的测量条件以外以JIS-C-2141为基准进行测量。此外,绝缘强度的测量在氟化液中进行。氟化液为全氟化碳(PFC)系的绝缘性溶剂。
实施方式的氮化硅基板的绝缘强度的偏差低至20%以下。氮化硅基板为由氮化硅晶粒和晶界相形成的氮化硅烧结体。另外,作为基板使用时,作为板厚为1.0mm以下,进一步为0.4mm以下的薄型基板使用。这是由于通过将基板薄型化而减小基板的热阻而提高散热性。
在上述基板的厚度T1为1.0mm以下的薄型基板中,若部分绝缘强度的偏差大则在绝缘强度低的部分容易引起电场集中。结果,绝缘强度低的部分可能容易引起绝缘击穿。实施方式的氮化硅基板中,由于减小了绝缘强度的偏差,所以能够有效防止电场在绝缘强度低的部分集中。因此,可将基板厚度T1减薄至0.1mm。换言之,根据实施方式的氮化硅基板的厚度T1为0.1~1.0mm,进一步为0.1~0.4mm时对薄基板有效。
另外,绝缘强度的平均值ESA优选为15kV/mm以上。若平均值不足15kV/mm则基板的绝缘性不足。绝缘强度的平均值ESA优选为15kV/mm以上,更优选为20kV/mm以上。若使所述比(T2/T1)为0.15以下,则绝缘强度的平均值容易成为20kV/mm以上。
另外,在室温(25℃)施加1000V时的体积电阻率值优选为60×1012Ωm以上。另外,在室温(25℃)施加1000V时的体积电阻率值ρv1与在250℃施加1000V时的体积电阻率值ρv2的比(ρv2/ρv1)优选为0.20以上。
图5表示体积电阻率值的测量方法。图中,符号1为氮化硅基板,7为表面侧碳电极,8为背面侧碳电极,9为测量装置。此外,在体积电阻率值的测量时,用表面侧碳电极7和背面侧碳电极8按压并固定氮化硅基板1。另外,施加电压为直流1000V,对施加60秒后体积电阻Rv进行测量。体积电阻率值通过ρv=Rv·πd2/4t求得。其中,π为圆周率(=3.14),d为表面侧碳电极的直径,t为氮化硅基板的厚度。这样的体积电阻率值的测量,将在室温(25℃)进行的设为ρv1,在250℃的气氛中进行的设为ρv2。另外,上述以外的测量条件以JIS-K-6911为基准。
在室温(25℃)施加1000V时的体积电阻率值优选为60×1012Ωm以上。在氮化硅基板上,设置金属电路基板的氮化硅电路基板可搭载各种半导体元件。
半导体元件中还存在工作电压为500~800V高电压的元件。ρv1优选为60×1012Ωm以上,更优选为高至90×1012Ωm以上。如前所述,在减小绝缘强度的偏差的基础上提高体积电阻率值,由此,能够得到及时安装工作电压高的半导体元件也不会引起绝缘击穿的优异的可靠性。
另外,通过使比(ρv2/ρv1)为0.20以上,进一步为0.40以上,即使使用环境为200~300℃的高温下也能够维持优异的绝缘性。近年来,开发了如SiC元件那样工作温度为150~250℃的半导体元件。安装这样的半导体元件的绝缘基板通过使用实施方式涉及的氮化硅基板,即使作为半导体装置也能得到优异的可靠性。
另外,在将氮化硅基板的厚度方向的剖面通过放大照片进行观察时,晶界相的最大长度优选为50μm以下。另外,氮化硅晶粒的长径的平均粒径优选为1.5~10μm。为了提高绝缘强度的平均值,且使其偏差为20%以下,将厚度方向上的氮化硅晶粒与晶界相的丰度比(T2/T1)设在规定的范围内是有效的。
另外,为了使体积电阻率值ρv1为规定的值以上,比(ρv2/ρv1)为规定的值以上,控制晶界相的尺寸是有效的。在将氮化硅基板的厚度方向的剖面通过放大照片进行观察时,晶界相的最大长度优选为50μm以下,更优选为20μm以下,进一步优选为10μm以下。厚度方向的晶界相的最大长度表示前述的T2-1、T2-2、T2-3、T2-4均为50μm以下。
另外,为了使晶界相的最大长度为50μm以下,氮化硅晶粒的长径的平均粒径优选为1.5~10μm。氮化硅晶粒的长径为在任意剖面组织的放大照片中,测量在单位面积100μm×100μm内拍照的每个氮化硅晶粒的最大直径,并通过其平均值求得。最大直径的测量是以在放大照片中拍照的氮化硅晶粒的最长对角线为长径进行求取。该作业在单位面积为100μm×100μm的不同3处进行,其平均值为氮化硅晶粒的长径的平均粒径。
若上述氮化硅晶粒的长径的平均粒径小至不足1.5μm,则由于氮化硅晶粒彼此的晶界增多,所以可能会形成比(T2/T1)超过0.30的部分。若氮化硅晶粒的长径的平均粒径大至超过10μm,则虽然氮化硅晶粒间的晶界的数量减少,但氮化硅晶粒间的晶界的长度变大而可能形成不能使晶界相的最大长度为50μm以下的部分。因此,氮化硅晶粒的长径的平均粒径优选为1.5~10μm,更优选为2~7μm的范围。此外,放大照片使用2000倍以上的放大照片。另外,在难以判断晶粒及晶界时使用5000倍的放大照片。
另外,氮化硅基板的孔隙率优选为3%以下。另外,气孔(孔隙)的最大直径优选为20μm以下。实施方式涉及的氮化硅基板由于控制基板厚度方向的氮化硅晶粒与晶界相的比(T2/T1),所以,即使孔隙率为3%也能够使绝缘强度的偏差为20%以下,进一步为15%以下。
此外,气孔(孔隙)优选为尽量少,孔隙率优选为1%以下,更优选为0.5%以下。另外,气孔的最大直径优选为20μm以下,更优选为10μm以下,进一步优选为3μm以下(含0)。另外,气孔的最大直径从任意剖面的放大照片求得。
另外,如前所述,为了使体积电阻率值ρv1为60×1012Ωm以上,比(ρv2/ρv1)为0.20以上,优选的是,在将氮化硅基板的任意表面或剖面通过放大照片(2000倍以上)进行观察时,孔隙率为1%以下(含0)且气孔的最大直径为10μm以下(含0)。
上述放大照片为SEM照片。在SEM照片中,孔隙由于氮化硅晶粒及晶界相产生不同的对比度差而可被区分。通过减小由使倍率放大2000倍以上,进一步放大5000倍的SEM照片观察的孔隙的比例或尺寸,即使在高温环境下(250℃气氛下)也能得到优异的体积电阻率值。
另外,在将任意剖面通过放大照片进行观察时存在孔隙的情况下,优选的是,在孔隙周长的10%以上存在晶界相。成为孔隙的部分存在空气。氮化硅粒子为绝缘物。另外,晶界相成分为由金属氧化物构成的烧结助剂反应形成。因此,晶界相成分为氧化物因而绝缘性高。
另一方面,空气容易成为电力通道。特别是在施加600V以上的大电压时容易成为电力通道。孔隙为由烧结工序进行的致密化过程的残留缺陷,其致密化经由晶界相推进。
另外,β-氮化硅晶粒具有细长的形状。通过β-氮化硅晶粒复杂地交织且随机取向,来提高氮化硅基板的强度。另一方面,若随机取向则容易形成氮化硅晶粒彼此的间隙。通过用晶界相成分填补氮化硅晶粒彼此的间隙而使孔隙不易形成。另外,即使形成有孔隙,也不易包含由其周边的致密化障碍产生的结构缺陷。因此,孔隙的周围由晶界相成分覆盖显示良好的致密化过程而优选。
因此,优选的是,在使孔隙的最大直径为20μm以下的基础上,孔隙的外周长的10%以上存在晶界相成分。在孔隙的外周长上晶界相成分存在的比例越大越好,优选为50%以上100%以下。通过使孔隙的外周长上存在50%以上,能够提高绝缘强度,并且减小其偏差。换言之,即使存在孔隙,通过用晶界相成分覆盖其外周也能够提高绝缘强度。
另外,在将50Hz下的相对介电常数设为εr50,1kHz下的相对介电常数设为εr1000时,优选为(εr50-εr1000)/εr50≤0.1。相对介电常数表示填充有电极间的媒质时的电容器的电容除以真空时的电容所得的值。这次的媒质为氮化硅基板。(εr50-εr1000)/εr50≤0.1表示即使频率变高氮化硅基板的相对介电常数也不会变大。这表示成为难于引起氮化硅基板的极化的结构。作为难于引起极化的状态,可举出孔隙小、孔隙少等。另外,如前所述,控制晶界相的尺寸、使孔隙的周围存在晶界相成分也是有效的。另外,减小后述的偏析区域也是有效的。
另外,在观察氮化硅基板的任意剖面时,晶界相中的偏析区域的最大长度优选为5μm以下(含0)。晶界相为以烧结助剂为主要成分的反应相。作为烧结助剂,如前所述,优选为选自稀土元素、镁、钛、铪中的一种以上。
在此,所谓偏析区域,是表示通过EPMA(电子探针显微分析仪)对单位面积20μm×20μm进行色彩映射时,相对特定元素的平均浓度产生30%以上偏移的区域。特定元素表示烧结助剂成分。例如,在使用氧化钇(Y2O3)作为烧结助剂成分的情况下,进行Y元素的映射求出相对平均浓度30%以上浓度偏移的区域。
另外,在使用多种烧结助剂成分的情况下,对各自成分的金属元素进行映射。例如,作为烧结助剂成分使用Y2O3、MgO、HfO2三种的情况下,对“Y”“Mg”“Hf”求出相对平均浓度偏移30%以上的区域。此外,若相对平均浓度偏移30%以上则或多时或少时都符合偏析区域。
上述偏析区域优选为小,偏析区域的最大长度优选为5μm以下,更优选为1μm以下(含0)。通过减小偏析区域,能够使体积电阻率值ρv1为90×1012Ωm以上,所述比(ρv2/ρv1)为0.40以上。另外,通过使偏析区域的最大长度为5μm以下,进一步为1μm以下(含0)的状态,还能够使绝缘强度的偏差为5%以下。板厚越薄的基板影响越大。因此,在板厚T1为0.1~0.4mm的基板的情况下,偏析区域优选为小至1μm以下的状态或者不存在的状态。
通过成为以上的构成,即使将氮化硅基板的板厚T1薄型化为0.1~1.0mm,进一步为0.1~0.4mm,也能够在减小绝缘强度的偏差的基础上,提高绝缘强度的平均值。
另外,通过控制晶界相的最大长度、氮化硅晶粒的尺寸,不仅能够提高绝缘强度,还能够在使氮化硅基板的导热率为50W/m·k以上的基础上,使强度为600MPa以上。
另外,通过控制孔隙率、孔隙尺寸及偏析区域尺寸(烧结助剂的偏析部尺寸),能够进一步提高绝缘强度,提高体积电阻率值。
另外,如专利文献2所示,通过以面积比计使晶界相中的结晶化合物相为20%以上,容易使导热率为80W/m·k以上,进一步为90W/m·k以上。
实施方式涉及的氮化硅基板适于氮化硅电路基板。电路基板设置金属板、金属层作为电路部。金属板可例示铜板、Al板等导电性好的金属板。另外,金属板的接合可应用活性金属接合法、直接接合法等各种接合法。另外,根据需要,在背面也设置金属板。另外,金属层可举出加热金属浆料而形成的金属化膜,及使用镀膜法、溅射法、喷镀法等薄膜形成技术的金属薄膜等。
另外,也可作为专利文献1所示的压接结构用基板使用。特别是实施方式涉及的氮化硅基板由于改善了绝缘强度,因此作为压接结构用基板也是有效的。
下面,对实施方式涉及的氮化硅基板的制造方法进行说明。实施方式涉及的氮化硅基板只要具有前述的结构,其制造方法不作特别限定,但作为高效制造的方法,列举如下。
首先,作为原料粉末准备氮化硅粉末、烧结助剂粉末。氮化硅粉末优选为α化率为80质量%以上,平均粒径为0.4~2.5μm,杂质氧含量为2质量%以下。另外,杂质氧含量优选为2质量%以下、更优选为1.0质量%以下、进一步优选为0.1~0.8质量%。若杂质氧含量多至超过2质量%,则会引起杂质氧和烧结助剂的反应,可能会不必要地形成晶界相。
另外,烧结助剂优选为平均粒径为0.5~3.0μm的金属氧化物粉末。作为金属氧化物粉末,可举出稀土元素、镁、钛、铪等氧化物。通过添加烧结助剂作为金属氧化物,在烧结工序中容易形成液相成分。
另外,烧结助剂按氧化物换算添加合计2~14质量%的选自稀土元素、镁、钛、铪的一种或两种以上。若偏离该范围则在烧结工序中的氮化硅晶粒的晶粒生长及晶界相的比例就会偏离,难以落入目的的比(T2/T1)的范围内。
接着,混合规定量的氮化硅粉末及烧结助剂粉末,再添加有机粘结剂调制原料混合体。这时,根据需要,也可以添加无定形碳、增塑剂等。无定形碳作为脱氧剂起作用。即,无定形碳与氧气反应作为CO2及CO释放到外部,因此容易促进烧结工序的液相反应。
接着,进行形成原料混合体的成型工序。作为原料混合体的成型法,可应用通用的模压法、冷等静压成型(CIP)法、或者刮刀法、辊压成型法等的片材成型法等。另外,根据需要,将原料混合体与甲苯、乙醇、丁醇等溶媒混合。
接着,在上述成型工序后,进行成型体的脱脂工序。脱脂工序是在非氧化性气氛中,在温度500~800℃下加热1~4小时,对预先添加的大部分有机粘结剂进行脱脂。作为非氧化性气氛,可举出氮气气氛中、氩气气氛中等。
另外,作为有机粘结剂,可举出甲基丙烯酸丁酯、聚乙烯醇缩丁醛、聚甲基丙烯酸甲酯等。另外,在以氮化硅粉末和烧结助剂粉末的合计量为100质量份时,有机粘结剂的添加量优选为3~17质量份。
若有机粘结剂的添加量不足3质量份,则粘结剂量过少而难以维持成型体的形状。在样的情况下,难以进行多层化提高量产性。另一方面,若粘结剂量多至超过17质量份,则在脱脂工序后成型体(脱脂处理后的成型体)的空隙变大且氮化硅基板的孔隙变大。
接着,对脱脂处理后的成型体实施热处理工序,将其收容在烧成容器内,在烧成炉内非氧化性气氛中加热至温度1400~1650℃,保持1~8小时。通过该处理,促进烧结助剂粉末的液相反应。通过液相反应的促进,促进液相成分向氮化硅晶粒的晶界的扩散,减小气孔。
若保持温度不足1400℃,则不易引起液相反应,若保持温度高至超过1650℃,则氮化硅晶粒的晶粒生长加速,因而不能充分获得由液相成分的扩散带来的气孔减小效果。另外,作为非氧化性气氛,可举出氮气(N2)和氩气(Ar)等。另外,将成型体多段层叠提高量产性也是有效的。另外,通过设为多段,炉内的温度变得均匀,能够使液相反应均匀。
接着,进行烧结工序。烧结工序如下实施:在非氧化性气氛中将成型体在温度1800~1950℃加热8~18小时。作为非氧化性气氛,优选为氮气气氛、或包含氮气的还原性气氛。另外,烧成炉内压力优选为加压气氛。
若在烧结温度不足1800℃的低温状态进行烧成,则氮化硅晶粒的晶粒生长不充分,难以得到致密的烧结体。另一方面,若在烧结温度比1950℃高的温度进行烧成,则在炉内气氛压力低的情况下可能分解成Si和N2,因此,烧结温度优选控制在上述范围。
如前所述,在将成型体设为多段的情况下,可能会产生炉内的压力偏差,因此,烧结温度优选为1950℃以下。另外,若烧结温度比1950℃高,则氮化硅晶粒会超过需要地晶粒生长,可能难以实现目的的比(T2/T1)。
另外,优选的是,使烧结工序后的烧结体的冷却速度为100℃/h以下。通过使冷却速度为100℃/h以下,进一步为50℃/h以下缓慢冷却,能够使晶界相结晶化。能够使晶界相中的结晶化合物的比例变大。通过所述热处理工序,促进晶界相的液相反应。
因此,在进行晶界相的结晶化时,烧结体上生成的液相的凝固偏析少,得到微细的结晶组织均匀分散的晶界相。另外,也能够微细化的同时减少形成于结晶组织的气孔。
另外,通过使烧结工序后的冷却速度为100℃/h以下,而能够使晶界相中的结晶化合物相的比例以面积率计为20%以上,进一步为50%以上。通过使晶界相结晶,能够使氮化硅基板的导热率为80W/m·k以上。
此外,若使烧结工序后的冷却速度为炉冷(关闭炉的开关的自然冷却),则通常为600℃/h左右。即使在这样的情况下,如果进行前述的热处理工序,也能实现晶界相的均匀化,能够在使导热率为50W/m·k以上的基础上,使所述比(T2/T1)及绝缘强度的偏差落入规定的范围。
另外,在烧结工序后,再次进行追加的热处理也是有效的。追加的热处理优选为液相生成温度以上且比烧结工序的处理温度低。另外,优选为在加压条件下进行。在烧结工序中,从晶粒生长的表面活性状态冷却的液相成分在晶界变为恒定状态且固定化。但是,活性区域的稳定化容易不均匀地推进。因此,通过进行热处理直至再次生成液相并流动的状态,另一方面晶粒生长不推进的状态,而能够更均匀地改善由之后的冷却产生的晶界的稳定化。
另外,在进行追加的热处理时,按压、将烧结体的表背面颠倒等是有效的。通过进行追加的热处理,能够消除氮化硅基板中的孔隙,或减小孔隙,或成为孔隙的周长存在晶界相成分的状态。上述热处理的温度优选为1000℃以上1700℃以下。
通过在上述1000℃以上1700℃以下进行热处理,能够在抑制氮化硅晶粒的晶粒生长的基础上,使晶界相成分稍微移动。这时,通过按压及将表背面颠倒,而容易得到消除孔隙,或减小孔隙,或成为在孔隙的周长存在晶界相成分的状态的效果。
只要是如以上的制造方法,就能够得到实施方式涉及的氮化硅基板。
(实施例)
(实施例1~20及比较例1)
作为氮化硅粉末,准备平均粒径为1.0μm、杂质氧含量为1质量%、α化率为98%的粉末。另外,作为烧结助剂粉末,准备如表1及表2所示的粉末。此外,烧结助剂粉末准备平均粒径为0.8~1.6μm的粉末。
将氮化硅粉末和烧结助剂粉末混合,调制原料混合体。另外,在原料混合体中混合分散剂、有机溶媒并进行球磨混合。然后,相对原料混合粉100质量份,混合10质量份的作为有机粘结剂的甲基丙烯酸丁酯、4质量份的作为增塑剂的邻苯二甲酸二丁酯,追加添加有机溶媒,再充分实施球磨混合以调制浆料状的原料混合体。将浆料的粘度调整至5000~15000cps后,通过片材成型法(刮刀法)进行片材成型并干燥,调制成型体(生片材)。
对成型体,在氮气气氛中温度500~800℃加热1~4小时进行脱脂工序。
接着,对脱脂处理后的成型体,实施如表1及表2所示的热处理工序及烧结工序。在实施该工序后,在表1及表2所示的条件下制作实施例及比较例的氮化硅基板。另外,热处理工序及烧结工序分多段(10段)实施。
[表1]
[表2]
在各实施例及比较例涉及的氮化硅基板中,观察了导热率、三点抗弯强度、基板厚度方向的剖面组织,并研究了比(T2/T1)、厚度方向的晶界相的最大直径、氮化硅晶粒的长径的平均粒径、孔隙率。另外,对孔隙尺寸、晶界相中的偏析区域也进行了研究。
此外,上述导热率通过激光闪光法求得。另外,三点抗弯强度以JIS-R-1601(2008)为基准进行测量。另外,基板厚度T1用游标卡尺测量。另外,孔隙率通过水银压入法求得。另外,相对基板厚度方向,对任意剖面组织拍摄SEM照片(2000倍),对厚度方向的晶界相的最大直径、氮化硅晶粒的长径的平均粒径进行研究。
另外,在基板厚度方向的任意剖面上拍摄10处单位面积20μm×20μm的放大照片(5000倍的SEM照片),并求出孔隙尺寸(最大直径)。另外,通过EPMA对单位面积20μm×20μm进行关于烧结助剂成分的金属元素的色彩映射。测量5处单位面积20μm×20μm,求出平均浓度,进一步求出偏析区域(金属元素的浓度偏离30%以上的区域)的尺寸。结果如下述表3及表4所示。
[表3]
[表4]
(实施例11~20)
以下,对实施例1~10的氮化硅基板进行表5所示的追加热处理。
[表5]
试料No. | 氮化硅基板 | 追加热处理 |
实施例11 | 实施例1 | 按压,1600℃×1小时 |
实施例12 | 实施例2 | 按压,1000℃×2小时 |
实施例13 | 实施例3 | 颠倒,1100℃×5小时 |
实施例14 | 实施例4 | 颠倒,1000℃×3小时 |
实施例15 | 实施例5 | 按压,1050℃×3小时 |
实施例16 | 实施例6 | 按压,1300℃×2小时 |
实施例17 | 实施例7 | 颠倒,1400℃×3小时 |
实施例18 | 实施例8 | 颠倒,1350℃×2小时 |
实施例19 | 实施例9 | 按压,1000℃×5小时 |
实施例20 | 实施例10 | 按压,1100℃×2小时 |
在实施例1~20及比较例1涉及的氮化硅基板中,求出孔隙尺寸(最大直径)和在孔隙的周长存在晶界相成分的比例。孔隙尺寸(最大直径)通过SEM照片(5000倍)求得。另外,孔隙的周长的晶界相成分的存在比例由EPMA求得。结果如下述表6所示。
[表6]
试料No. | 孔隙尺寸(最大直径)(μm) | 孔隙的周长的晶界相成分的存在比例(%) |
实施例1 | 3.0 | 47 |
实施例2 | 1.0 | 77 |
实施例3 | 0.2 | 73 |
实施例4 | 0.5 | 55 |
实施例5 | 0.2 | 79 |
实施例6 | 0.2 | 63 |
实施例7 | 0.2 | 82 |
实施例8 | 0.4 | 85 |
实施例9 | 0.2 | 87 |
实施例10 | 0.2 | 84 |
实施例11 | 1.9 | 66 |
实施例12 | 0.2 | 98 |
实施例13 | 无 | — |
实施例14 | 0.1 | 75 |
实施例15 | 无 | — |
实施例16 | 无 | — |
实施例17 | 无 | — |
实施例18 | 0.1 | 100 |
实施例19 | 无 | — |
实施例20 | 无 | — |
从上述表6所示的结果可知,各实施例涉及的氮化硅基板中孔隙小,在孔隙的周长存在10%以上的晶界相成分。另外,通过进行追加热处理,能够减小孔隙(包括不存在孔隙的情况)。
对以上实施例及比较例涉及的氮化硅基板,测量绝缘强度、体积电阻率值。此外,上述绝缘强度以JIS-C-2141为基准用四端法测量。测量端子使用前端为直径20mm的球形电极的部件。另外,绝缘强度的测量在氟化液中进行。另外,求出图4所示的5处(S1~5)测量部位的平均值、偏差。
另外,体积电阻率值以JIS-K-6911为基准进行测量。设表面侧碳电极为直径20mm的圆盘状,背面碳电极为直径28mm的圆盘状,施加电压为1000V,求出室温(25℃)的体积电阻率值ρv1和250℃的体积电阻率值ρv2。
另外,研究相对介电常数的频率依赖性。相对介电常数的频率依赖性当将在50Hz的相对介电常数设为εr50,将在1kHz的相对介电常数设为εr1000时,由(εr50-εr1000)/εr50求得。结果如表7、表8所示。
[表7]
[表8]
如上所述,各实施例涉及的氮化硅基板在绝缘强度及体积电阻率值方面表现了优异的特性。另外,相对介电常数的频率依赖性也表现了优异的特性。
只要是这样的氮化硅基板,即使薄型化也具有优异的绝缘性。因此,应用于氮化硅电路基板和压接结构用基板也能够确保优异的可靠性。
以上,例示了本发明的若干实施方式,但这些实施方式仅作为例子进行提示,并不限定发明的范围。这些新型的实施方式可以其他各种形态实施,在不脱离发明的要旨的范围内,可进行各种省略、替换、变更等。这些实施方式及其变形例包含于发明的范围和要旨中,并且包含于权利要求书记载的发明和其等同范围。另外,前述各实施方式可以相互组合实施。
符号说明
1…氮化硅基板
2…氮化硅晶粒
3…晶界相
4,5…根据四端法的测量端子
6…绝缘强度测量仪
7,8…碳电极
9…体积电阻率值测量仪
Claims (18)
1.压接结构用氮化硅基板,具备氮化硅晶粒和晶界相且导热率为50W/m·k以上,其特征在于,所述晶界相含有稀土元素、镁、钛和铪中的一种以上,压接结构用氮化硅基板的剖面组织中,氮化硅晶粒的长径的平均粒径为1.5~10μm,厚度方向的晶界相的合计长度T2相对于氮化硅基板的厚度T1的比(T2/T1)为0.01~0.30,与绝缘强度的平均值的偏差为20%以下,所述绝缘强度的平均值是使电极与基板的表背面接触而用四端法对基板的对角线彼此的交点以及成为自交点至各自角部的中点的4个部位的合计5个部位测量时的绝缘强度的平均值。
2.根据权利要求1所述的压接结构用氮化硅基板,其特征在于,绝缘强度的偏差为15%以下。
3.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,绝缘强度的平均值为15kv/mm以上。
4.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,在室温25℃施加1000V时的体积电阻率值为60×1012Ωm以上。
5.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,在250℃施加1000V时的体积电阻率值ρv2与在室温25℃施加1000V时的体积电阻率值ρv1的比(ρv2/ρv1)为0.20以上。
6.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,当将在50Hz的相对介电常数设为εr50,将在1kHz的相对介电常数设为εr1000时,(εr50-εr1000)/εr50≤0.1。
7.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,在将压接结构用氮化硅基板的厚度方向的剖面通过放大照片进行观察时,晶界相的最大长度为50μm以下。
8.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,压接结构用氮化硅基板的孔隙率为3%以下。
9.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,在将压接结构用氮化硅基板的任意的表面或剖面通过放大照片进行观察时,孔隙的最大直径为20μm以下。
10.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,在将压接结构用氮化硅基板的任意剖面通过放大照片进行观察时,孔隙的最大直径为20μm以下,在孔隙周长的10%以上存在晶界相成分。
11.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,在观察压接结构用氮化硅基板的任意剖面时,晶界相中的偏析区域的最大长度为5μm以下。
12.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,压接结构用氮化硅基板的厚度T1为0.1~1.0mm。
13.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,晶界相的面积率20%以上为结晶化合物相。
14.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,压接结构用氮化硅基板的厚度T1为0.15~0.25mm。
15.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,压接结构用氮化硅基板的导热率为80W/m·k以上。
16.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,压接结构用氮化硅基板的导热率为80W/m·k以上,在250℃施加1000V时的体积电阻率值ρv2与在室温25℃施加1000V时的体积电阻率值ρv1的比(ρv2/ρv1)为0.20以上。
17.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,压接结构用氮化硅基板的导热率为80W/m·k以上,当将在50Hz的相对介电常数设为εr50,将在1kHz的相对介电常数设为εr1000时,(εr50-εr1000)/εr50≤0.1。
18.根据权利要求1或2所述的压接结构用氮化硅基板,其特征在于,压接结构用氮化硅基板的导热率为80W/m·k以上,压接结构用氮化硅基板的厚度T1为0.15~0.25mm。
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