CN108233935A - A kind of wide band digital analog converter for wideband wireless local area network - Google Patents

Abstract

The invention discloses a kind of wide band digital analog converters for wideband wireless local area network, including digital circuits section and artificial circuit part, digital circuits section includes clock circuit, clock circuit is connected with input register, input register is connected with delay unit and thermometer decoder, artificial circuit part includes the low crosspoint driving circuit being connect with clock circuit, low crosspoint driving circuit is connected with band-gap reference circuit, logic control element and current source, band-gap reference circuit is also associated with voltage-current converter circuit, logic control element is connected with biasing circuit, logic control element is also connect with delay unit and thermometer decoder respectively.A kind of wide band digital analog converter for wideband wireless local area network of the present invention, non-linear behaviour is good and the gross area of circuit is small.

Description

A broadband digital-to-analog converter for broadband wireless local area network

technical field

The invention belongs to the technical field of digital-to-analog converters, and relates to a wide-band digital-to-analog converter used in broadband wireless local area networks.

Background technique

The main function of the digital-to-analog converter used in the LTE communication system is to convert the digital signal from the baseband into a continuous analog signal, and then transmit the signal through the radio frequency circuit. The digital-to-analog converter on the radio frequency transmission link mostly adopts a segmented current steering structure, and the circuit is mainly composed of the following modules: input register, decoder array, switch drive circuit, and current source array. In addition, in order to ensure the accuracy of the digital-to-analog converter, it is usually necessary to design a bandgap reference circuit with a better temperature coefficient.

Contents of the invention

The object of the present invention is to provide a broadband digital-to-analog converter for broadband wireless local area network, which has good nonlinear performance and small total area of the circuit.

The technical solution adopted by the present invention is a broadband digital-to-analog converter for broadband wireless local area network, including a digital circuit part and an analog circuit part, the digital circuit part includes a clock circuit, the clock circuit is connected with an input register, and the input register A delay unit and a thermometer decoder are connected, and the analog circuit part includes a low-crosspoint driving circuit connected to a clock circuit. The low-crosspoint driving circuit is connected with a bandgap reference circuit, a logic control unit and a current source, and the bandgap reference circuit also The voltage and current conversion circuit is connected, the logic control unit is connected with a bias circuit, and the logic control unit is also respectively connected with the delay unit and the thermometer decoder.

The input register includes 10 D flip-flops, respectively D1-D10, a CLK clock signal input terminal connected to the clock circuit, an R reset signal terminal, and 10 signal output terminals, respectively Q ₁ -Q ₁₀ .

The 10 D flip-flops are respectively 10bit input signals, and the 10 signal output terminals are respectively 10bit output signals.

The thermometer decoder includes 5 signal input terminals and 31 signal output terminals, the 5 signal input terminals are respectively connected to the Q ₁ -Q ₅ output terminals of the input register, and the 31 signal output terminals are connected to the logic control unit.

The thermometer decoder is composed of a row decoder and a column decoder. The input of the row decoder is connected to the Q ₁ and Q ₂ output terminals of the input register, and the input of the column decoder is connected to the Q ₃ and Q of the input register. ₄ , Q ₅ output terminal.

The _Q6 - _Q10 output terminals of the input register are connected to the input terminals of the delay unit.

The beneficial effects of the present invention are:

(1) The present invention adopts the subsection mode of 5-5, namely the high 5 bits of the input register are output to the thermometer decoder, adopt the thermometer coding mode, the low 5 bits of the input register are output to the delay unit, adopt the binary coding mode, This can not only ensure better nonlinear performance of the digital-to-analog converter, but also reduce the total area of the circuit relatively.

(2) In order to reduce the burr of the circuit output, the present invention adopts a low cross point driving circuit, effectively controls the cross point of the switch control signal, reduces the delay time of the control signal, thereby improving the dynamic performance of the digital-to-analog converter.

Description of drawings

Fig. 1 is a kind of structural representation of the digital-to-analog converter of a kind of broadband that is used for broadband wireless local area network of the present invention;

Fig. 2 is a schematic structural diagram of an input register in a digital-to-analog converter of the present invention;

Fig. 3 is a schematic structural diagram of a thermometer decoder in a digital-to-analog converter of the present invention;

Fig. 4 is a schematic structural diagram of a column decoder in a digital-to-analog converter of the present invention;

Fig. 5 is a structural schematic diagram of a row decoder in a digital-to-analog converter of the present invention;

Fig. 6 is a circuit connection diagram of the logic control unit in the digital-to-analog converter of the present invention;

Fig. 7 is the circuit connection diagram of the bandgap reference circuit in the digital-to-analog converter of the present invention;

Fig. 8 is a circuit connection diagram of the voltage-current conversion circuit in the digital-to-analog converter of the present invention;

FIG. 9 is a circuit connection diagram of the bias circuit in the digital-to-analog converter of the present invention.

In the figure, 1. Clock circuit, 2. Input register, 3. Thermometer decoder, 4. Delay unit, 5. Bandgap reference circuit, 6. Voltage-current conversion circuit, 7. Logic control unit, 8. Low crossover Point drive circuit, 9. Current source, 10. Bias circuit.

Detailed ways

The present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

A kind of broadband digital-to-analog converter for broadband wireless local area network of the present invention, as shown in Figure 1, comprises digital circuit part and analog circuit part, and digital circuit part comprises clock circuit 1, and clock circuit 1 is connected with input register 2, The input register 2 is connected with a delay unit 4 and a thermometer decoder 3, and the analog circuit part includes a low crosspoint driving circuit 8 connected with the clock circuit 1, and the low crosspoint driving circuit 8 is connected with a bandgap reference circuit 5 and a logic control unit 7 and the current source 9, the bandgap reference circuit 5 is also connected to the voltage-current conversion circuit 6, the logic control unit 7 is connected to the bias circuit 10, and the logic control unit 7 is also connected to the delay unit 4 and the thermometer decoder 3 respectively.

As shown in Figure 2, the input register 2 includes 10 D flip-flops, respectively D1-D10, a CLK clock signal input terminal connected to the clock circuit 1, an R reset signal terminal, and 10 signal output terminals, respectively Q ₁ —Q ₁₀ .

The 10 D flip-flops are respectively 10bit input signals, and the 10 signal output terminals are respectively 10bit output signals.

The thermometer decoder 3 includes 5 signal input terminals and 31 signal output terminals. The 5 signal input terminals are respectively connected to the Q ₁ -Q ₅ output terminals of the input register 2 , and the 31 signal output terminals are connected to the logic control unit 7 .

The thermometer decoder 3 is composed of a row decoder and a column decoder. The input of the row decoder is connected to the _Q1 and _Q2 output terminals of the input register, and the input of the column decoder is connected to the Q3 and _Q2 of the input register. Q ₄ , Q ₅ output terminals.

The Q ₆ -Q ₁₀ output terminals of the input register are connected to the input terminal of the delay unit 4 .

As shown in Figure 3, the input signals of the row decoder are Q ₁ and Q ₂ of the input register 2, and its output signals are ROW1, ROW2, ROW3, GND; the input signal of the column decoder is the Q of the input register 2. ₃ , Q ₄ , Q ₅ , the output signals are VDD, COL1, COL2, COL3, COL4, COL5, COL6, COL7, GND. Each row of the array is controlled by ROW1, ROW2, ROW3, GND respectively. The first column of the array is jointly controlled by VDD and COL1, the second column is jointly controlled by COL1 and COL2, the first column is jointly controlled by COL2 and COL3, the third column is jointly controlled by COL3 and COL4, and the fourth column is jointly controlled by COL4 and COL5 Control, the fifth column is jointly controlled by COL5 and COL6, the sixth column is jointly controlled by COL6 and COL7, and the seventh column is jointly controlled by COL7 and GND.

As shown in Figure 4, the circuit of the column decoder is composed of inverters, NOR gates, and NAND gates; as shown in Figure 5, the circuit of the row decoder is composed of inverters, NOR gates, and NAND gates composition.

As shown in FIG. 6 , it is a logic control unit 7 , a low-crosspoint switch driving circuit 8 and a current source 9 connected in sequence. Logic control unit 7 is composed of two AND gates, one NOR gate and one inverter. The control signals COL1-COL7, ROW1-ROW3 of the decoding array circuit are the input of one AND gate circuit, the signals of COL and VDD are the input of another AND gate, and the output result of the two AND gate signals is Y and crossed with low The drain of M8 of the point switch drive circuit is connected, and Y passes through the inverter to the drain of M7 of the low cross point switch drive circuit. The low-crosspoint switch drive circuit consists of M1-M8 and two inverters, where M1-M4 are NMOS transistors, and M5-M8 are PMOS transistors. The drain of M5 is connected to the drain of M1, the gate of M3, and the current S_N, the source is connected to the power supply voltage, and the gate is connected to the source of M7; the drain of M6 is connected to the gate of M2, the drain of M4, and the current source S, and the source The pole is connected to the power supply voltage, the gate is connected to the source of M8; the drain of M8 is connected to VIN_B; two inverters are connected between the gates of M1 and M4. The current source is composed of M _S , M ₁ , M _SW1 and M _SW2 . The source of M _S is connected to the power supply voltage, and the drain is connected to the source of M1; the sources of M _{SW1 and} M _SW2 are connected to the drain of M1, the drains are respectively connected to 50Ω resistors, and the gates are respectively connected to the drains of M4 and M1. It is connected to two bias voltages VB1 and VB2 of the bias circuit 10 .

As shown in FIG. 7 , it is a bandgap reference circuit 5 , and MOS transistors M0 , M3 , M4 , and M5 constitute a start-up circuit. The source of M0 is connected to the power supply voltage, the gate is connected to the control signal EN, and the drain is connected to the drain of M3; the source of M3 is connected to the drain of M4 in a diode structure; the drain of M5 is connected to the source of M4. The input terminals are connected; the sources of M1 and M2 are connected to the power supply voltage, the gates are connected to the output terminal of the operational amplifier, and the drains are respectively the forward input of the operational amplifier (point a) to the emission of the bipolar transistor Q0 through the resistor R1 Pole, the inverting input (point b) of the operational amplifier is connected to the emitter of the bipolar transistor Q1 through resistors R2 and R3; the bases and collectors of Q0, Q1, and Q2 are connected to the ground; the source of M6 is connected to the power supply voltage Connected, the drain is connected to the bipolar transistor through R4; the emitter of Q2 is used as the output terminal of the reference voltage.

As shown in Figure 8, it is a voltage-current conversion circuit 6, the reference voltage Vref is used as the inverting input of the operational amplifier, the gate of M11 is connected to the gate of M12 as the output terminal of the operational amplifier, the source is connected to the power supply voltage, and the drain As the non-inverting input of the op amp, connect to ground through resistor R5. The source of M12 is connected to the power supply voltage, and the drain is used as the output terminal of the reference current.

As shown in Figure 9, it is a bias circuit 10, the reference current is input from the drain of M6, the gate of M6 is connected to the gates of M5 and M3, and the sources of M6, M5 and M3 are connected to the ground; the diode-structured M4 The source of M2 is connected to the power supply voltage, the drain is connected to the drain of M5, the gate of M1 is connected to the drain of M2, the gate of M7 is connected, the drain is connected to the source of M2, and the source is connected to the power supply voltage; the drain of M2 The pole is connected to the drain of M3, and the gate is connected to the gate of M8. M7 and M8 are current sources 9 of the digital-to-analog converter.

The operating principle of a broadband digital-to-analog converter for broadband wireless local area network of the present invention is: the clock circuit 1 provides timing for the input register 2 and the logic control unit 7; the input digital signal and the reset signal are stored in the input register according to the signal type 2. The addressing register of the thermometer decoder 3 decodes the 5-way temperature signal and outputs 31-way signals and the signal after the delay unit 4 to the logic control unit 7; the logic control unit 7 automatically controls the low crossover according to the Col and Row signals The electric switch drive circuit 8 and the bias circuit 10; the low-crossover electric switch drive circuit 8 guarantees the low current drive output to achieve low noise and low power consumption, and multiplexes the LSB and MSB two ways to drive the current source 9; the band gap reference The circuit 5 provides a reference voltage for the voltage-current conversion circuit 6 and the low-cross electric switch drive circuit 8 to ensure accuracy and stability; the voltage-current conversion circuit 6 converts the input voltage signal into a current signal, and the converted current is equivalent to an output An adjustable constant current source, whose output current can be kept stable without changing with the change of the load, provides energy for the current source 6 .

Claims (6)

1. a kind of wide band digital analog converter for wideband wireless local area network, which is characterized in that including digital circuits section And artificial circuit part, the digital circuits section include clock circuit (1), the clock circuit (1) is connected with input deposit Device (2), input register (2) are connected with delay unit (4) and thermometer decoder (3), the artificial circuit part include with The low crosspoint driving circuit (8) of clock circuit (1) connection, the low crosspoint driving circuit (8) are connected with band-gap reference electricity Road (5), logic control element (7) and current source (9), the band-gap reference circuit (5) are also associated with voltage-current converter circuit (6), the logic control element (7) is connected with biasing circuit (10), the logic control element (7) also respectively with delay unit (4) it is connected with thermometer decoder (3).

2. a kind of wide band digital analog converter for wideband wireless local area network according to claim 1, feature exist In, the input register (2) include 10 d type flip flops, respectively D1-D10, one connect with clock circuit (1) CLK clock signal input terminals, a R reset signals end and 10 signal output ends, respectively Q₁—Q₁₀。

3. a kind of wide band digital analog converter for wideband wireless local area network according to claim 2, feature exist In the input signal of 10 d type flip flops difference 10bit, 10 signal output ends are respectively the output signal of 10bit.

4. a kind of wide band digital analog converter for wideband wireless local area network according to claim 2, feature exist In the thermometer decoder (3) includes 5 road signal input parts and 31 road signal output ends, and 5 road signal input parts connect respectively The Q of input register (2)₁—Q₅Output terminal, 31 road signal output end connection logic control elements (7).

5. a kind of wide band digital analog converter for wideband wireless local area network according to claim 4, feature exist In the thermometer decoder (3) is made of line decoder and column decoder, the input terminal connection input register of line decoder (2) Q₁And Q₂Output terminal, the Q of the input terminal connection input register (2) of column decoder₃、Q₄、Q₅Output terminal.

6. a kind of wide band digital analog converter for wideband wireless local area network according to claim 5, feature exist In the Q of the input register (2)₆—Q₁₀Output terminal connects the input terminal of the delay unit (4).