CN108234147A - DMA broadcast data transmission method based on host counting in GPDSP - Google Patents

Abstract

The invention discloses a DMA broadcast data transmission method based on host counting in GPDSP, which comprises the following steps: starting DMA broadcast data transmission by a host DMA, generating a broadcast read request and then sending the broadcast read request to the outside of a core through an on-chip network; the host DMA receives the read return data of each slave DMA, counts to confirm whether the data transmission is finished, when the data transmission is confirmed to be finished, the host DMA sends out a buffer emptying command to all the slave DMAs, and each slave DMA receives the buffer emptying command and executes the buffer emptying operation to finish the broadcast transmission. The invention can start one DMA transmission transaction to realize DMA broadcast data transmission, and has the advantages of simple realization principle, low cost, low DMA transmission power consumption and starting overhead, high data transmission efficiency and DDR reading efficiency, large transmission bandwidth and the like.

Description

DMA broadcast data transmission method based on host count in GPDSP

technical field

The invention relates to the technical field of GPDSP (General Purpose Digital Signal Processor, general purpose digital signal processor), in particular to a DMA (Director Memory Access, direct storage access) broadcast data transmission method based on host counting in GPDSP.

Background technique

GPDSP is a new architecture that not only maintains the basic characteristics of embedded DSP and the advantages of high performance and low power consumption, but also can efficiently support general scientific computing. Efficient support for 64-bit high-performance computers and embedded high-precision signal processing. The structure has the following characteristics: ①It has direct representation of double-precision floating point and 64-bit vertex data, general-purpose registers, data buses, and instruction bits are more than 64 bits wide, and the address bus is more than 40 bits; ②CPU and DSP heterogeneous multi-core are tightly coupled, CPU The core supports a complete operating system, and the scalar unit of the DSP core supports the micro-kernel of the operating system; ③Consider the unified programming mode of the CPU core, DSP core, and the vector array structure in the DSP core; ④Maintain cross-simulation debugging of other machines, and provide local CPU host debugging at the same time mode; ⑤ retain the basic characteristics of ordinary DSP except the number of bits.

GPDSP usually consists of multiple homogeneous 64-bit processing units to form a processing array to obtain higher floating-point computing capabilities. However, due to the huge amount of data that GPDSP needs to process, a large number of exchanges between GPDSP internal storage components and external storage components are required. The data. The data stored in the out-of-core storage space first needs to be moved to the in-core storage space to facilitate the calculation by the kernel, and the results obtained by the kernel calculation need to be moved to the out-of-core storage space for storage. The data transfer rate becomes the key factor limiting the processing speed of GPDSP. Same as general-purpose processors, GPDSP also faces the problem of "storage wall".

DMA can move data at high speed in the background while the processing core is performing data calculation. The moving process does not require the participation of the processing core. DMA can better alleviate the "storage wall" problem. Since the DMA technology overlaps the calculation operation of the kernel and the data movement operation of the storage unit, the impact of the data transmission speed between the internal storage unit and the external storage unit on the GPDSP processing performance is reduced to a certain extent. However, as the number of processing cores integrated in GPDSP continues to increase, the existing DMA data transmission methods can no longer meet the data volume requirements of multi-core parallel processing. Efficient multi-core DMA involves the memory access requirements of applications and the hardware structure of multi-core GPDSP. characteristic.

When common algorithms and applications such as matrix multiplication, fast Fourier transform, and HPL (High Performance Linpack) are implemented in parallel on multi-core GPDSP, all cores may access the same storage space for a period of time, such as GEMM matrix multiplication operations (C+=AB), the A matrix is a shared matrix, and all DSP cores need matrix A; if the traditional DMA transmission method is used, each DSP core initiates a point-to-point transmission to read the data block on the same position of the DDR. Because the distance between each core and DDR is different, the data read by different cores may be on different DDR pages, which will lead to the loss of DDR page hits, increase the number of DDR page changes, and increase the memory access delay. , which greatly reduces the read efficiency of DDR; if there are multiple or all cores to start DMA transfer transactions, it will not only cause a lot of power consumption, but also cause pressure on the network, and there will be competition or hits when accessing the DDR storage space outside the core loss etc.

Contents of the invention

The technical problem to be solved by the present invention is that: aiming at the technical problems existing in the prior art, the present invention provides a simple implementation principle, low cost, low DMA transmission power consumption and start-up overhead, high data transmission efficiency and DDR read efficiency, and transmission DMA broadcast data transmission method based on host count in GPDSP with large bandwidth.

In order to solve the problems of the technologies described above, the technical solution proposed by the present invention is:

A kind of DMA broadcast data transmission method based on host computer counting in a kind of GPDSP, the method comprises: start DMA broadcast data transmission by host DMA, generate broadcast read request and send to the storage space outside the core through the network on chip; The read request sends the read return data to the on-chip network. Each core in GPDSP receives the read return data from the on-chip network and writes it into the core storage space. The host DMA receives the read return data and counts to confirm whether the data transmission is completed.

As a further improvement of the present invention, the confirmation of whether the transmission is completed specifically includes: respectively setting broadcast transmission parameters including the source frame number SrcArrCnt, the source frame remaining unit number SrcEleCnt, the destination frame number DstArrCnt and the destination frame remaining unit number DstEleCnt in advance, the The number of source frames SrcArrCnt is used to configure the number of frames of data moved outside the core, the number of remaining units of the source frame SrcEleCnt is used to count the number of data units that have not been read in the current source frame, and the number of destination frames DstArrCnt is used to configure write The number of data frames in the kernel storage space, the number of remaining units of the target frame DstEleCnt is used to count the number of unfinished data units in the current target frame, and confirm whether the data transmission is completed according to the value of the broadcast transmission parameter.

As a further improvement of the present invention, the source frame number SrcArrCnt, the source frame remaining unit number SrcEleCnt, the destination frame number DstArrCnt and the destination frame remaining unit number DstEleCnt satisfy the following formula:

(SrcArrCnt+1)*SrcEleCnt==(DstArrCnt+1)*DstEleCnt;

Among them, SrcArrCnt+1 is the number of frames of data to be moved outside the core, SrcEleCnt is the number of data units that have not been read in the current source frame, DstArrCnt+1 is the number of data frames that need to be written into the internal storage space, and DstEleCnt is the current The number of unwritten data units in the destination frame.

As a further improvement of the present invention, the method further includes a transmission mode parameter TMODE for configuring the DMA transmission mode, and when the transmission mode parameter TMODE is valid, DMA broadcast data transmission is started.

As a further improvement of the present invention, the broadcast read request includes a read return selection vector RetVec for identifying data return core information, and the target core to be returned for read return data is determined according to the read return selection vector RetVec.

As a further improvement of the present invention, the read return selection vector RetVec specifically has multiple bits, and each bit corresponds to indicating whether a participating core participating in the transmission needs to return the status of the read return data.

As a further improvement of the present invention: the broadcast read request further includes one or more information of a read address, a read mask, and a read return address.

As a further improvement of the present invention, when it is confirmed that the data transmission is completed, the step of clearing the buffer is also included, and the specific steps are: the master DMA sends an empty buffer command to all slave DMAs, and each slave DMA receives the empty buffer command and executes a clear buffer Action to end the broadcast transmission.

As a further improvement of the present invention, the specific steps of the method are:

S1. Preset the broadcast transmission parameters including source frame number SrcArrCnt, source frame remaining unit number SrcEleCnt, destination frame number DstArrCnt and destination frame remaining unit number DstEleCnt;

S2. After the broadcast transmission parameters are configured, the host DMA starts DMA broadcast data transmission, and generates a broadcast read request according to the broadcast transmission parameters, and then sends it to the off-core storage space via the on-chip network;

S3. The storage space outside the core sends the read return data to the on-chip network according to the broadcast read request, and each core in the GPDSP receives the read return data from the on-chip network and writes it into the core storage space, and the host DMA receives the read return data and updates all the above broadcast transmission parameters for counting;

S4. When the host DMA receives the last piece of data, the counting is completed, the host DMA sends a command to clear the buffer to all DSP cores, and the slave DMA executes the clear operation after receiving the clear command, and sends an interrupt according to the interrupt enable bit after clearing is completed Request; when the slave DMA buffer is cleared, set the value of the internal preset broadcast end register BOR, and the broadcast transmission transaction ends.

As a further improvement of the present invention, when the host DMA receives the read return data in the step S3, it also includes a step of judging whether the data is valid, and the specific steps are: judging whether the data is valid, if it is valid, forwarding the data to the storage space in the kernel, Start the host DMA to count, if it is invalid, directly start the host DMA to count.

Compared with the prior art, the present invention has the advantages of:

1) In the DMA broadcast data transmission method based on host counting in the GPDSP of the present invention, the same data block in the external storage space is moved to the internal storage space of all DSP cores on the chip through a DMA transfer transaction, which is generated by the host DMA Read the request and count the transmission data blocks to confirm the completion of the transmission, so that only one DSP core DMA broadcast transmission transaction needs to be started, and the same data block in the GPDSP’s external storage space can be transmitted to all on the chip in the form of broadcast The DSP core is a transmission method that meets the needs of all DSPs to check data, avoids all cores from starting DMA transmission at the same time, can effectively reduce DMA transmission power consumption and startup overhead, and reduce network congestion on a chip.

2) The DMA broadcast data transmission method based on host counting in the GPDSP of the present invention can realize the broadcast transmission similar to (C+=AB) A matrix in the GEMM matrix multiplication operation, and can satisfy all DSPs because only one DMA transmission transaction needs to be started Checking the demand for out-of-core data can greatly reduce the number of page changes of DDR in the out-of-core storage space, and reduce the number of DDR accesses, thereby greatly improving the read efficiency of DDR and the line hit rate of DDR, and effectively improving the transmission bandwidth.

3) The DMA broadcast data transmission method based on host counting in the GPDSP of the present invention, further by setting the broadcast transmission parameters of the source frame number SrcArrCnt, the source frame remaining unit number SrcEleCnt, the destination frame number DstArrCnt and the destination frame remaining unit number DstEleCnt, so that by configuring Broadcast transmission parameters can easily implement DMA broadcast data transmission control, so as to simply and efficiently start a DMA broadcast transmission transaction of a DSP core, and transmit the same block of data in the GPDSP core storage space to the chip in the form of broadcast All DSP cores on the system can be flexibly configured based on broadcast transmission parameters.

Description of drawings

FIG. 1 is a schematic diagram of the principle of the GPDSP architecture adopted in this embodiment.

FIG. 2 is a schematic diagram of the position and working principle of the DMA in the GPDSP in this embodiment.

Fig. 3 is a schematic diagram of the principle of implementing DMA broadcast data transmission in a specific embodiment of the present invention.

Fig. 4 is a schematic diagram of the principle of DMA broadcast data transmission transmission parameter words in a specific embodiment of the present invention.

FIG. 5 is a schematic diagram of an implementation process of implementing DMA broadcast data transmission in this embodiment.

Detailed ways

The present invention will be further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

As shown in Figures 1 to 5, the DMA broadcast data transmission method based on host counting in the GPDSP of this embodiment includes: starting DMA broadcast data transmission by the host DMA, generating a broadcast read request and sending it to the storage space outside the core through the network on chip; The storage space sends the read return data to the on-chip network according to the broadcast read request. Each core in the GPDSP receives the read return data from the on-chip network and writes it into the core storage space. The host DMA receives the read return data and counts to confirm whether the data transmission is completed. , that is, the DSP core that initiates the DMA transfer transaction is responsible for generating a read request in the broadcast transfer as the host, and at the same time counts the transfer data of all other cores to confirm the completion of the data transfer.

In the method described above in this embodiment, the same data block in the external storage space is moved to the internal storage space of all DSP cores on the chip through a DMA transfer transaction, and the host DMA generates a read request and counts the transmission data blocks. Confirm the completion of the transmission, so that only one DSP core needs to start the DMA broadcast transmission transaction, and the same block of data in the GPDSP's external storage space can be transmitted to all DSP cores on the chip in the form of broadcast to meet the data verification requirements of all DSPs. The transmission method prevents all cores from starting DMA transmission at the same time, which can effectively reduce the power consumption and startup overhead of DMA transmission, and reduce the congestion of the network on chip.

The above method of the present embodiment can realize the broadcast transmission similar to the (C+=AB) A matrix in the GEMM matrix multiplication operation, and because only one DMA transfer transaction needs to be started to meet the needs of all DSPs to check the data outside the core, it can greatly reduce the number of cores. The number of page changes of DDR in the external storage space reduces the number of DDR accesses, thereby greatly improving the read efficiency of DDR and the line hit rate of DDR, and effectively improving the transmission bandwidth.

The GPDSP architecture adopted in this embodiment is shown in Figure 1. This multi-core GPDSP is made up of kernel nodes, IO nodes, on-chip networks, DDR controllers, and external storage components DDR, wherein each kernel node includes two DSP cores, and the DDR The controller controls the movement of DDR data, and the network on chip realizes the data communication between each DSP and between DSP and the storage space outside the core.

As shown in Figure 2, in the present embodiment, DMA is connected with SPU by configuring bus PBUS in the DSP core, is connected with storage space (vector storage part AM and scalar storage part SM) in the core by data bus, and is connected with outside bus interface by core The external storage space DDR is connected; the SPU scalar processing unit is responsible for generating transmission parameter words for the DMA, so that the DMA can actively move from the internal storage space to the external storage space or from the external storage space to the internal storage space, and the DMA can also Passively accepts read and write requests from the on-chip network.

In this embodiment, confirming whether the transmission is completed specifically includes: respectively setting broadcast transmission parameters including the source frame number SrcArrCnt, the source frame remaining unit number SrcEleCnt, the destination frame number DstArrCnt, and the destination frame remaining unit number DstEleCnt in advance, and the source frame number SrcArrCnt is used for Configure the number of data frames moved out of the core, indicating that the number of data frames to be moved from the out-of-core storage space is SrcArrCnt+1, and the number of remaining units in the source frame SrcEleCnt is used to count the number of data units that have not been read in the current source frame. Data units It is the minimum granularity of DMA transmission in GPDSP; the destination frame number DstArrCnt is used to configure the number of data frames written into the in-kernel storage space, indicating that the number of data frames written into the in-kernel storage space is DstArrCnt+1, and the number of remaining units of the destination frame is used for DstEleCnt To count the number of unwritten data units in the current destination frame, and confirm whether the data transmission is completed according to the value of the broadcast transmission parameter.

In this embodiment, by setting the broadcast transmission parameters of the source frame number SrcArrCnt, the source frame remaining unit number SrcEleCnt, the destination frame number DstArrCnt, and the destination frame remaining unit number DstEleCnt, the DMA broadcast data transmission control can be conveniently realized by configuring the broadcast transmission parameters. Therefore, it is simple and efficient to realize the DMA broadcast transmission transaction of starting a DSP core, and the same data block in the external storage space of the GPDSP can be transmitted to all DSP cores on the chip in the form of broadcast.

In this embodiment, the source frame number SrcArrCnt, the source frame remaining unit number SrcEleCnt, the destination frame number DstArrCnt and the destination frame remaining unit number DstEleCnt satisfy the following formula:

(SrcArrCnt+1)*SrcEleCnt==(DstArrCnt+1)*DstEleCnt;

Among them, SrcArrCnt+1 is the number of frames of data to be moved outside the core, SrcEleCnt is the number of data units that have not been read in the current source frame, DstArrCnt+1 is the number of data frames that need to be written into the internal storage space, and DstEleCnt is the current The number of unwritten data units in the destination frame.

When the DMA in this embodiment performs broadcast data transmission, the specific host DMA will initiate a broadcast read request to a block of data in the DDR storage space outside the core, and the returned data will be sent to all DSP cores; the source frame number SrcArrCnt represents the data moved outside the core The number of frames, its value is SrcArrCnt+1, SrcEleCnt indicates the number of remaining units of the current source frame, the data unit is the smallest unit of DMA transmission, the broadcast transmission data size is (SrcArrCnt+1)*SrcEleCnt, when SrcEleCnt is 0, the current frame After the calculation of the read request is completed, the value of SrcArrCnt is decremented by 1; when SrcArrCnt is 0 and SrcEleCnt is also 0, the calculation of the read request is completed; DstArrCnt indicates the number of destination frames, and DstEleCnt indicates the number of remaining units of the current destination frame, where (SrcArrCnt+1)*SrcEleCnt ==(DstArrCnt+1)*DstEleCnt.

In this embodiment, the transmission mode parameter TMODE for configuring the DMA transmission mode is also included. When the transmission mode parameter TMODE is valid, the DMA broadcast data transmission is started. When the specific configuration is TMODE="2'b11", the transmission mode is broadcast Data transmission, that is, when TMODE = "2'b11", the broadcast data transmission is started by the host DMA.

In this embodiment, the broadcast read request includes the read return selection vector RetVec used to identify the data return core information, according to the read return selection vector RetVec to determine the destination core that needs to be returned for the read return data, that is, the flag is carried in the sent broadcast read request For data return information, each DSP core determines whether to return read return data according to the value of the read return selection vector RetVec. The read return selection vector RetVecc has n bits in total, and each bit corresponds to whether a DSP core needs to return the state of reading and returning data, that is, each bit corresponds to a DSP core, indicating whether it needs to return data to the corresponding core. The broadcast read request also includes a read address, a read mask, and a read return address, that is, the read request carries information such as the read address, the read mask, the read return address, and the read return selection vector RetVec.

In a specific embodiment, when TMODE="2'b11" (that is, DMA performs broadcast data transmission), after broadcast transmission parameters are configured, DMA initiates broadcast data transmission, and DMA generates broadcast read data according to broadcast parameters SrcArrCnt, SrcEleCnt, DstArrCnt, and DstEleCnt. The request is transmitted to the on-chip network. The read request includes the read address, read mask, read return address and parameter read return selection vector RetVec. The read return selection vector RetVec has n bits. In broadcast transmission, the n bits of the signal RetVec are all 1 , indicating that the read return data is returned to all DSP cores; the external storage space returns data to the on-chip network according to the read request, and all slave DMA passively receives data through the on-chip network and writes it into the core.

In this embodiment, based on the point-to-point DMA transmission mode, five parameters are configured: transmission mode TMODE, source frame number SrcArrCnt, source frame remaining unit number SrcEleCnt, destination frame number DstArrCnt, destination frame remaining unit number DstEleCnt to control transmission In the process, the host DMA generates a broadcast data transmission request according to the configured transmission parameters, and at the same time counts and counts the moved data until the broadcast transmission ends, and can start a DSP core DMA broadcast transmission transaction, that is, the GPDSP’s external storage space The same block of data is transmitted to all DSP cores on the chip in the form of broadcast.

In this embodiment, when it is confirmed that the data transmission is completed, the step of clearing the buffer is also included. The specific steps are: after the master DMA count is completed, the master DMA sends an empty buffer command to all slave DMAs, and each slave DMA receives the empty buffer command and Execute the operation of clearing the buffer. After clearing, the transfer transaction ends.

Realize DMA broadcast data transmission data in the specific embodiment of the present invention as shown in Figure 3, wherein chip has 12 DSP cores, has independent DMA and LM in each core, and LM is the storage space (comprising vector memory part) in the core AM and scalar storage part SM); Array represents the moved frame, and C0-C11 represent each row of data blocks, the size of which is 512bits or 8words. The data block size of this broadcast transmission is 4x96words; DMA initiates broadcast data transmission, and a total of 4 frames of data are transmitted, and the data size of each frame is 96words. DDR moves data in the direction shown by the arrow in the figure. DMA first moves one page of DDR data each time, and then flips the page to move the next page of data; DDR sends data to the on-chip network according to the read request, and the slave DSP passes through the network. Receive data passively. From the above, it can be known that adopting the broadcast data transmission method of this embodiment can greatly reduce the number of DDR page changes, reduce the transmission delay, effectively reduce the number of DDR accesses, and improve the transmission bandwidth and DDR read efficiency at the same time.

In the specific embodiment of the present invention, the DMA broadcast data transmission transmission parameter word is as shown in Figure 4, which specifically includes the transmission mode TMODE, the source frame number SrcArrCnt, the source frame remaining unit number SrcEleCnt, the destination frame number DstArrCnt, and the destination frame remaining unit number DstEleCnt, wherein The TMODE bit width is 2. When the TMODE value is 2'b11, the DMA starts broadcast data transmission, and moves the same data block from the external storage space DDR to 12 DSP cores; SrcArrCnt is the number of source frame units, and the bit width is 32 , the maximum number of frames is 2 to the 32nd power; SrcEleCnt is the number of remaining units of the current source frame, the bit width is 32, and the maximum value is 2 to the 32th power minus 1; DstArrCnt is the number of destination frame units, the bit width is 32, the maximum value is 2 to the 32nd power; DstEleCnt is the number of remaining units in the current destination frame, and the maximum value is 2 to the 32th power minus 1.

As shown in Figure 5, the concrete steps that the present embodiment realizes DMA broadcast data transmission among the GPDSP are:

S1. Preset the broadcast transmission parameters including source frame number SrcArrCnt, source frame remaining unit number SrcEleCnt, destination frame number DstArrCnt and destination frame remaining unit number DstEleCnt;

S2. After configuring the broadcast transmission parameters, the host DMA starts the DMA broadcast data transmission, and generates a broadcast read request according to the broadcast transmission parameters SrcArrCnt, SrcEleCnt, DstArrCnt, and DstEleCnt. The read request includes the read address, read mask, read return address and parameter read return Select the vector RetVec, and the generated broadcast read request is sent to the off-core storage space through the on-chip network;

S3. The extra-core storage space sends the read return data to the on-chip network according to the broadcast read request. Each core in the GPDSP receives the read return data from the on-chip network and writes it into the core storage space. The host DMA receives the read return data and updates the broadcast transmission parameters. To count the data transmitted by the core;

S4. When the host DMA receives the last piece of data, the counting is completed, the host DMA sends a command to clear the buffer to all DSP cores, and the slave DMA executes the clear operation after receiving the clear command, and sends an interrupt according to the interrupt enable bit after clearing is completed Request; when the slave DMA buffer is cleared, set the value of the internal preset broadcast end register BOR, and the broadcast transmission transaction ends.

In this embodiment, when the host DMA receives the read return data in step S3, it also includes a step of judging whether the data is valid. Counting, if invalid, directly start the host DMA to count.

As shown in Figure 5, after the broadcast data transmission parameter word is specifically configured in this embodiment, the host DMA initiates broadcast data transmission, and the host DMA sends a broadcast read request to the external storage space DDR; DDR returns the read data to the network on chip, and the host DMA Receive the read return data of each core from the on-chip network, and all other cores passively receive the read return data from the on-chip network; if the host DMA detects that the data is valid, it will be written into the core storage space of the core, and if it is invalid, the data will be counted; When the master counts, it will issue a command to clear the buffer to other cores, and the slave will set the value of the broadcast end flag register to 1. After the clearing operation is completed, if the interrupt enable bit is 1, an interrupt will be issued.

The above are only preferred embodiments of the present invention, and do not limit the present invention in any form. Although the present invention has been disclosed above with preferred embodiments, it is not intended to limit the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments according to the technical essence of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims (10)

1. the DMA broadcast data transmission method based on host counting in a kind of GPDSP, it is characterized in that, the method comprises: start DMA broadcast data transmission by host DMA, generate the broadcast read request and send to the storage space outside the core through the network on chip; The storage space sends the read return data to the on-chip network according to the broadcast read request, each core in the GPDSP receives the read return data from the on-chip network and writes it into the core storage space, and the host DMA receives the read return data and counts to confirm the data transmission Is it done. 2. in the GPDSP according to claim 1, based on the DMA broadcast data transmission method counted by the host, it is characterized in that, whether the confirmation transmission is completed specifically includes: setting respectively in advance comprising source frame number SrcArrCnt, source frame remaining unit number SrcEleCnt, The broadcast transmission parameters of the destination frame number DstArrCnt and the destination frame remaining unit number DstEleCnt, the source frame number SrcArrCnt is used to configure the frame number of the data moved outside the core, and the source frame remaining unit number SrcEleCnt is used to count the current source frame. The number of data units read, the destination frame number DstArrCnt is used to configure the number of data frames written into the kernel storage space, and the number of remaining units of the destination frame DstEleCnt is used to count the number of unwritten data units in the current destination frame , confirming whether the data transmission is completed according to the value of the broadcast transmission parameter. 3. in the GPDSP according to claim 2, based on the DMA broadcast data transmission method of host counting, it is characterized in that, said source frame number SrcArrCnt, source frame remaining unit number SrcEleCnt, destination frame number DstArrCnt and destination frame remaining unit number DstEleCnt Satisfies the following formula: (SrcArrCnt+1)*SrcEleCnt==(DstArrCnt+1)*DstEleCnt; Among them, SrcArrCnt+1 is the number of frames of data to be moved outside the core, SrcEleCnt is the number of data units that have not been read in the current source frame, DstArrCnt+1 is the number of data frames that need to be written into the internal storage space, and DstEleCnt is the current The number of unwritten data units in the destination frame. 4. according to claim 1 or 2 or 3 described GPDSP based on the DMA broadcast data transmission method of host counting, it is characterized in that, the method also comprises the transmission mode parameter TMODE that is used to configure DMA transmission mode, when described transmission mode When the parameter TMODE is valid, start to execute DMA broadcast data transmission. 5. according to claim 1 or 2 or 3 described GPDSP based on the DMA broadcast data transmission method of mainframe counting, it is characterized in that, described broadcast read request comprises the read that is used to mark data and returns core information and returns selection vector RetVec, according to The read return selection vector RetVec determines the target core to which the read return data needs to be returned. 6. in the GPDSP according to claim 5, based on the DMA broadcast data transmission method of host counting, it is characterized in that, said read returns selection vector RetVec to have many bits specifically, and whether each bit corresponds to identifying a participating core that participates in transmission needs Returns the status of the read returned data. 7. the DMA broadcast data transmission method based on master counting in the GPDSP according to claim 6 is characterized in that, described broadcast read request also comprises one or more information in read address, read mask, read return address. 8. according to claim 1 or 2 or 3 described GPDSP based on the DMA broadcast data transmission method of host computer counting, it is characterized in that, when confirming that data transmission is completed, also comprise empty buffer step, concrete steps are: host computer DMA to all The slave DMA sends out an empty buffer command, and each slave DMA receives the empty buffer command and performs an empty buffer operation to end the broadcast transmission. 9. according to claim 1 or 2 or 3 described GPDSP based on the DMA broadcast data transmission method of master counting, it is characterized in that, the concrete steps of this method are: S1. Preset the broadcast transmission parameters including source frame number SrcArrCnt, source frame remaining unit number SrcEleCnt, destination frame number DstArrCnt and destination frame remaining unit number DstEleCnt; S2. After the broadcast transmission parameters are configured, the host DMA starts DMA broadcast data transmission, and generates a broadcast read request according to the broadcast transmission parameters, and then sends it to the off-core storage space via the on-chip network; S3. The storage space outside the core sends the read return data to the on-chip network according to the broadcast read request, and each core in the GPDSP receives the read return data from the on-chip network and writes it into the core storage space, and the host DMA receives the read return data and updates all the above broadcast transmission parameters for counting; S4. When the host DMA receives the last piece of data, the counting is completed, the host DMA sends a command to clear the buffer to all DSP cores, and the slave DMA executes the clear operation after receiving the clear command, and sends an interrupt according to the interrupt enable bit after clearing is completed Request; when the slave DMA buffer is cleared, set the value of the internal preset broadcast end register BOR, and the broadcast transmission transaction ends. 10. the DMA broadcast data transmission method based on host counting in the GPDSP according to claim 9, it is characterized in that, when host DMA receives read and return data among the described steps S3, also comprise data valid judging step, concrete steps are: Determine whether the data is valid, if it is valid, forward the data to the storage space in the kernel, start the host DMA to count, if it is invalid, directly start the host DMA to count.