CN108183131A - A kind of unilateral MOS type device preparation method of integrated SBD structures - Google Patents
A kind of unilateral MOS type device preparation method of integrated SBD structures Download PDFInfo
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- CN108183131A CN108183131A CN201711266056.1A CN201711266056A CN108183131A CN 108183131 A CN108183131 A CN 108183131A CN 201711266056 A CN201711266056 A CN 201711266056A CN 108183131 A CN108183131 A CN 108183131A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 18
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims abstract description 27
- 229910010271 silicon carbide Inorganic materials 0.000 claims abstract description 27
- 239000002184 metal Substances 0.000 claims abstract description 19
- 229910052751 metal Inorganic materials 0.000 claims abstract description 19
- 238000000034 method Methods 0.000 claims abstract description 14
- 238000005516 engineering process Methods 0.000 claims abstract description 11
- 238000005530 etching Methods 0.000 claims abstract description 11
- 238000005468 ion implantation Methods 0.000 claims abstract description 5
- 150000002500 ions Chemical class 0.000 claims description 22
- 238000002347 injection Methods 0.000 claims description 16
- 239000007924 injection Substances 0.000 claims description 16
- 238000001259 photo etching Methods 0.000 claims description 15
- 238000000137 annealing Methods 0.000 claims description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 8
- 229910052760 oxygen Inorganic materials 0.000 claims description 8
- 239000001301 oxygen Substances 0.000 claims description 8
- 238000002513 implantation Methods 0.000 claims description 6
- 239000010410 layer Substances 0.000 claims description 6
- 238000001465 metallisation Methods 0.000 claims description 6
- 230000003647 oxidation Effects 0.000 claims description 6
- 238000007254 oxidation reaction Methods 0.000 claims description 6
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 6
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910052719 titanium Inorganic materials 0.000 claims description 4
- 108090000723 Insulin-Like Growth Factor I Proteins 0.000 claims description 3
- 102000013275 Somatomedins Human genes 0.000 claims description 3
- 230000004913 activation Effects 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 3
- 238000011065 in-situ storage Methods 0.000 claims description 3
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 3
- 239000011241 protective layer Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- 238000010301 surface-oxidation reaction Methods 0.000 claims description 3
- 238000001039 wet etching Methods 0.000 claims description 3
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 2
- 229910001069 Ti alloy Inorganic materials 0.000 claims description 2
- 238000005260 corrosion Methods 0.000 claims description 2
- 230000007797 corrosion Effects 0.000 claims description 2
- 230000001590 oxidative effect Effects 0.000 claims description 2
- 238000001459 lithography Methods 0.000 claims 1
- 239000013078 crystal Substances 0.000 abstract description 4
- 230000000712 assembly Effects 0.000 abstract description 2
- 238000000429 assembly Methods 0.000 abstract description 2
- 238000011084 recovery Methods 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 3
- 229920005591 polysilicon Polymers 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000010953 base metal Substances 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000002019 doping agent Substances 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7813—Vertical DMOS transistors, i.e. VDMOS transistors with trench gate electrode, e.g. UMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/66068—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/7803—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
- H01L29/7806—Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a Schottky barrier diode
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
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Abstract
The invention discloses a kind of unilateral MOS type device preparation methods of integrated SBD structures, by introducing special angle groove preparation process, angle of inclination unilateral side ion implantation technology, the schottky metal technique with ohm process compatible realize the preparation of the SiC groove MOSFET devices of integrated SBD structures.Silicon carbide SBD structure assemblies in silicon carbide trench MOSFET device, can be very good to realize reversed afterflow function, reduce MOSFET element reverse recovery time, can effectively reduce the application cost of silicon carbide power electronic device by the present invention.The present invention has also combined the unilateral high mobility groove structure of special crystal face etching simultaneously, can reduce primitive unit cell size while channel mobility is improved, improve break-over of device ability.
Description
Technical field
The present invention relates to field of semiconductor devices more particularly to a kind of unilateral MOS type device preparation sides of integrated SBD structures
Method.
Background technology
Carbofrax material is wide with forbidden band relatively with traditional silicon and GaAs material as third generation semi-conducting material
Degree is big, breakdown field strength field is high, saturation drift velocity is big and a series of superior functions such as thermal conductivity is big.Based on carbofrax material
Unique material property, it is excellent with huge application in high frequency, high-power, high pressure and high temperature resistant power electronic devices field
Gesture.In terms of the Switching Power Supply of high end performance, new energy power vehicle and rail traffic, silicon carbide-based field-effect transistor
(MOSFET) device has huge application advantage, can effectively reduce system dimension, weight and to high temperature and pressure work
The demand of work.
In silicon carbide MOSFET device application, it usually needs one silicon carbide SBD of matching realizes afterflow effect, the program
So that device application cost raising.Therefore it realizes and SBD structures is integrated in silicon carbide MOSFET device, realized using a chip former
It is functional, it can effectively reduce device application cost.In silicon carbide MOSFET device structure, groove structure can effectively improve
Device current density reduces chip area, therefore the SiC groove MOSFET devices for preparing integrated SBD structures have important application
Meaning.
Invention content
Goal of the invention：In view of the above problems, the present invention proposes a kind of unilateral MOS type device preparation side of integrated SBD structures
Method.
Technical solution：Purpose to realize the present invention, the technical solution adopted in the present invention are：A kind of integrated SBD structures
Unilateral MOS type device preparation method, include the following steps：
(1) on epitaxial layer, by somatomedin mask, photoetching, etching and ion implantation technology, multiple P-Well are formed
Ion implanted region, N+ ion implanted regions and P+ ion implanted regions；
(2) by growing mask medium, photoetching, dry etching, surface oxidation and selective corrosion technique on epitaxial layer,
Form inclination angle groove；
(3) the mask medium based on step S2 by angle of inclination ion implanting, forms P+ injection regions；
(4) by silicon carbide protective layer, high annealing is ion-activated, sacrifice oxidation, wet etching, gate medium oxidation
And annealing process, grow grid oxygen medium；
(5) DOPOS doped polycrystalline silicon in situ is grown by LPCVD and fills groove, then by activation of annealing, planarizing, photoetching and
Etching technics forms polygate electrodes；
(6) by photoetching, metallization and stripping technology, the ohmic metal of front and back is formed, and passes through high annealing
Ohmic contact is formed with silicon carbide；
(7) by photoetching, metallization and stripping technology, front schottky metal is formed, and pass through Schottky and anneal to be formed
It is prepared by Schottky contacts, the MOS type device for completing integrated SBD structures and SiC grooves.
Advantageous effect：Silicon carbide SBD structure assemblies in silicon carbide MOSFET device, can be very good to realize by the present invention
Reversed afterflow function, reduces MOSFET element reverse recovery time, can effectively reduce the application of silicon carbide power electronic device
Cost.The present invention has also combined the unilateral high mobility groove structure of special crystal face etching simultaneously, can improve channel mobility
While rate, primitive unit cell size is reduced, improves break-over of device ability.
Description of the drawings
Fig. 1 is the schematic diagram of step 1 in the specific embodiment of the invention；
Fig. 2 is the schematic diagram of step 2 in the specific embodiment of the invention；
Fig. 3 is the schematic diagram of step 3 in the specific embodiment of the invention；
Fig. 4 is the schematic diagram of step 4 in the specific embodiment of the invention；
Fig. 5 is the schematic diagram of step 5 in the specific embodiment of the invention；
Fig. 6 is the schematic diagram of step 6 in the specific embodiment of the invention；
Fig. 7 is the schematic diagram of step 7 in the specific embodiment of the invention.
Specific embodiment
Technical scheme of the present invention is further described with reference to the accompanying drawings and examples.
The present invention provides a kind of novel by etching groove, angle of inclination injection, front ohmic metal and Schottky gold
Belong to compatible technology, realize the preparation method of the silicon carbide unilateral side groove MOS type device of integrated SBD structures, specifically include following step
Suddenly：
(1) on silicon carbide epitaxial layers 1, pass through the techniques such as multiple somatomedin mask, photoetching, etching, ion implanting, shape
Into multiple P-Well ion implanted regions 2, N+ ion implanted regions 3 and P+ ion implanted regions 4, as shown in Figure 1, can accurately control
Doped region processed, doping concentration and dopant profiles realize single-chip integration silicon carbide MOSFET and the substrate material of SBD structures.
The injection depth bounds of P-Well ion implanted regions 2 are 0.5um-1.0um, p-type implantation concentration ranging from 1E16cm-3-5E17cm-3；The injection depth bounds 0.2um-0.4um of N+ ion implanted regions 3, N-type implantation concentration range 2E19cm-3-
1E21cm-3；The injection depth bounds 0.2um-0.5um of P+ ion implanted regions 4, p-type implantation concentration range 2E19cm-3-1E21cm-3。
(2) by growing mask medium, photoetching, dry etching, surface oxidation, selectivity corruption on silicon carbide epitaxial layers 1
The techniques such as erosion, form the SiC grooves 5 based on high mobility crystal face, as shown in Figure 2.
By ICP and RIE etching technics, by specific etching condition and subsequent treatment process, realization is cut partially with substrate
The consistent inclination angle groove 5 of angle etches, 2 ° -8 ° of angle of inclination a ranges；It can realize the system of high mobility crystal face in groove
It is standby, as further conducting channel.
(3) it based on the mask medium 6 in step 2, is injected by angle of inclination, 30 ° of tilted ion implantation angle b ranges-
60 °, realize P+ injection regions 7, as shown in Figure 3.The injection depth bounds 0.2um-0.5um of P+ ion implanted regions 7, p-type injection are dense
Spend range 2E19cm-3-1E21cm-3。
The unilateral P+ areas 7 of the low mobility side of groove are injected, and the mask medium 6 by the use of in step 2 is kept away as injection mask
The registration problems in secondary photoetching are exempted from so that technique is simplified, while 7 structure of P+ injection regions effectively inhibits trench area
Electric field concentration effect can promote device voltage endurance capability.
(4) by silicon carbide protective layer, high annealing is ion-activated, sacrifice oxidation, wet etching, gate medium oxidation
With annealing etc., the growth of interface state density high mobility grid oxygen medium 8 is realized, as shown in figure 4, device can be effectively improved
Ducting capacity and grid oxygen reliability.1000 DEG C -1500 DEG C of the oxidizing temperature range of grid oxygen medium 8, grid oxygen dielectric thickness range 20-
70nm。
(5) filling of polygate electrodes 9 in DOPOS doped polycrystalline silicon realization groove in situ, polysilicon life are grown by LPCVD
Long thickness 0.3um-1.5um, doping concentration range 2E19cm-3-1E21cm-3；It avoids and re-injects, simplify processing step,
And prepared by the polysilicon gate that good appearance structure is completed based on techniques such as annealing activation, planarizing, photoetching, etchings, effectively carry
High gate reliability, as shown in Figure 5.
(6) by photoetching, metallization, stripping technology, front and back ohmic metal 10 is formed, and pass through high annealing,
Ohmic contact is formed with silicon carbide, as shown in Figure 6.Ohmic metal be Ni, Ti or Ti/Ni alloy, sheet metal thickness ranges 50nm-
200nm, the metal system can be mutually compatible with subsequent schottky metal system.
(7) by photoetching, metallization, stripping technology, front schottky metal 11 is formed, and anneal by Schottky, shape
Into required Schottky contacts, the preparation of the SiC groove MOSFET devices of integrated SBD structures is finally completed, as shown in Figure 7.Xiao
Special Base Metal is Ni or Ti, sheet metal thickness ranges 50nm-200nm, and the metal system is mutually compatible with the ohmic metal system of front.
Claims (8)
1. a kind of unilateral MOS type device preparation method of integrated SBD structures, it is characterised in that：Include the following steps：
(1) on epitaxial layer (1), by somatomedin mask, photoetching, etching and ion implantation technology, multiple P-Well are formed
Ion implanted region (2), N+ ion implanted regions (3) and P+ ion implanted regions (4)；
(2) by growing mask medium, photoetching, dry etching, surface oxidation and selective corrosion technique on epitaxial layer (1),
Form inclination angle groove (5)；
(3) the mask medium (6) based on step S2 by angle of inclination ion implanting, is formed P+ injection regions (7)；
(4) by silicon carbide protective layer, high annealing is ion-activated, sacrifice oxidation, wet etching, gate medium oxidation and moves back
Ignition technique, growth grid oxygen medium (8)；
(5) DOPOS doped polycrystalline silicon in situ is grown by LPCVD and fills groove, then pass through activation of annealing, planarizing, lithography and etching
Technique forms polygate electrodes (9)；
(6) by photoetching, metallization and stripping technology, the ohmic metal (10) of front and back is formed, and passes through high annealing
Ohmic contact is formed with silicon carbide；
(7) by photoetching, metallization and stripping technology, front schottky metal (11) is formed, and pass through Schottky and anneal to be formed
It is prepared by Schottky contacts, the unilateral MOS type device for completing integrated SBD structures and SiC grooves.
2. the unilateral MOS type device preparation method of integrated SBD structures according to claim 1, it is characterised in that：The step
In rapid 1, the injection depth bounds 0.5um-1.0um of P-Well ion implanted regions (2), p-type implantation concentration range 1E16cm-3-
5E17cm-3；The injection depth bounds 0.2um-0.4um of N+ ion implanted regions (3), N-type implantation concentration range 2E19cm-3-
1E21cm-3；The injection depth bounds 0.2um-0.5um of P+ ion implanted regions (4), p-type implantation concentration range 2E19cm-3-
1E21cm-3。
3. the unilateral MOS type device preparation method of integrated SBD structures according to claim 1, it is characterised in that：The step
In rapid 2, groove angle of inclination is consistent with the inclined corner cut degree of substrate, 2 ° -8 ° of angle of inclination a ranges.
4. the unilateral MOS type device preparation method of integrated SBD structures according to claim 1, it is characterised in that：The step
In rapid 3,30 ° -60 ° of tilted ion implantation angle b ranges, the injection depth bounds 0.2um-0.5um of P+ injection regions (7), p-type note
Enter concentration range 2E19cm-3-1E21cm-3。
5. the unilateral MOS type device preparation method of integrated SBD structures according to claim 1, it is characterised in that：The step
In rapid 4,1000 DEG C -1500 DEG C of grid oxygen medium (8) oxidizing temperature range, grid oxygen medium (8) thickness range 20-70nm.
6. the unilateral MOS type device preparation method of integrated SBD structures according to claim 1, it is characterised in that：The step
In rapid 5, polycrystalline silicon growth thickness 0.3um-1.5um, doping concentration range 2E19cm-3-1E21cm-3。
7. the unilateral MOS type device preparation method of integrated SBD structures according to claim 1, it is characterised in that：The step
In rapid 6, ohmic metal Ni, Ti or Ti/Ni alloy, sheet metal thickness ranges 50nm-200nm.
8. the unilateral MOS type device preparation method of integrated SBD structures according to claim 1, it is characterised in that：The step
In rapid 7, schottky metal is Ni or Ti, sheet metal thickness ranges 50nm-200nm.
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Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108807505A (en) * | 2018-08-28 | 2018-11-13 | 电子科技大学 | A kind of silicon carbide MOSFET device and its manufacturing method |
| CN109148566A (en) * | 2018-08-28 | 2019-01-04 | 电子科技大学 | Silicon carbide MOSFET device and its manufacturing method |
| CN109244137A (en) * | 2018-09-19 | 2019-01-18 | 电子科技大学 | A kind of high reliability SiC MOSFET element |
| CN109390336A (en) * | 2018-12-10 | 2019-02-26 | 西安电子科技大学 | A kind of novel broad stopband power semiconductor and preparation method thereof |
| CN109860171A (en) * | 2019-01-31 | 2019-06-07 | 电子科技大学 | The ambipolar SiC semiconductor power device of the reversed freewheeling diode of integrated high-speed |
| CN109904155A (en) * | 2019-01-31 | 2019-06-18 | 电子科技大学 | A kind of silicon carbide MOSFET device of the reversed freewheeling diode of integrated high-speed |
| CN109920839A (en) * | 2019-03-18 | 2019-06-21 | 电子科技大学 | P+ shielded layer current potential is adjustable silicon carbide MOSFET device and preparation method |
| CN109920838A (en) * | 2019-03-18 | 2019-06-21 | 电子科技大学 | A kind of groove-shaped silicon carbide MOSFET device and preparation method thereof |
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| CN113628973A (en) * | 2021-08-05 | 2021-11-09 | 杭州芯迈半导体技术有限公司 | Silicon carbide MOSFET device and method of manufacturing the same |
| CN114038908A (en) * | 2021-11-30 | 2022-02-11 | 电子科技大学 | Diode-integrated trench gate silicon carbide MOSFET device and manufacturing method thereof |
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| WO2022193357A1 (en) * | 2021-03-19 | 2022-09-22 | 光华临港工程应用技术研发(上海)有限公司 | Schottky diode structure and method for manufacturing same |
| CN115101405A (en) * | 2022-05-30 | 2022-09-23 | 深圳芯能半导体技术有限公司 | Preparation method of silicon carbide MOSFET device with self-aligned channel |
| CN118136681A (en) * | 2024-05-08 | 2024-06-04 | 南京第三代半导体技术创新中心有限公司 | Asymmetric groove type silicon carbide MOSFET power device and preparation method thereof |
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Cited By (22)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109148566B (en) * | 2018-08-28 | 2020-11-13 | 电子科技大学 | Silicon carbide MOSFET device and method of manufacturing the same |
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| CN108807505A (en) * | 2018-08-28 | 2018-11-13 | 电子科技大学 | A kind of silicon carbide MOSFET device and its manufacturing method |
| CN108807505B (en) * | 2018-08-28 | 2021-01-08 | 电子科技大学 | Silicon carbide MOSFET device and manufacturing method thereof |
| CN109244137A (en) * | 2018-09-19 | 2019-01-18 | 电子科技大学 | A kind of high reliability SiC MOSFET element |
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