CN108074864A - Array substrate and preparation method thereof, flexible OLED display part - Google Patents
Array substrate and preparation method thereof, flexible OLED display part Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 68
- 238000002360 preparation method Methods 0.000 title claims abstract description 16
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 46
- 239000004411 aluminium Substances 0.000 claims abstract description 39
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 39
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 39
- 238000000034 method Methods 0.000 claims abstract description 30
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 24
- 239000012528 membrane Substances 0.000 claims abstract description 20
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 claims abstract description 16
- 230000008569 process Effects 0.000 claims abstract description 16
- 238000000151 deposition Methods 0.000 claims abstract description 14
- 229920005591 polysilicon Polymers 0.000 claims abstract description 10
- 230000008021 deposition Effects 0.000 claims abstract description 9
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 8
- 238000006356 dehydrogenation reaction Methods 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 161
- 238000005240 physical vapour deposition Methods 0.000 claims description 14
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 13
- 239000012212 insulator Substances 0.000 claims description 11
- 238000002425 crystallisation Methods 0.000 claims description 10
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 8
- 239000011229 interlayer Substances 0.000 claims description 8
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 8
- 239000000463 material Substances 0.000 claims description 7
- 229910052751 metal Inorganic materials 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 5
- 239000007790 solid phase Substances 0.000 claims description 4
- 238000004519 manufacturing process Methods 0.000 claims description 2
- 230000035939 shock Effects 0.000 abstract description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 abstract 1
- 239000010408 film Substances 0.000 description 48
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 5
- 230000008025 crystallization Effects 0.000 description 5
- 239000011368 organic material Substances 0.000 description 5
- 239000001301 oxygen Substances 0.000 description 5
- 229910052760 oxygen Inorganic materials 0.000 description 5
- 229910004205 SiNX Inorganic materials 0.000 description 4
- 239000005416 organic matter Substances 0.000 description 4
- 229920000139 polyethylene terephthalate Polymers 0.000 description 4
- 239000005020 polyethylene terephthalate Substances 0.000 description 4
- 239000000243 solution Substances 0.000 description 4
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000000576 coating method Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000007715 excimer laser crystallization Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 238000007733 ion plating Methods 0.000 description 3
- 238000004806 packaging method and process Methods 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 238000007747 plating Methods 0.000 description 3
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 3
- 239000004926 polymethyl methacrylate Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 3
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 2
- KKEYFWRCBNTPAC-UHFFFAOYSA-N Terephthalic acid Chemical compound OC(=O)C1=CC=C(C(O)=O)C=C1 KKEYFWRCBNTPAC-UHFFFAOYSA-N 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000010276 construction Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004050 hot filament vapor deposition Methods 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000004417 polycarbonate Substances 0.000 description 2
- -1 polyethylene terephthalate Polymers 0.000 description 2
- 229920001721 polyimide Polymers 0.000 description 2
- 238000004151 rapid thermal annealing Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005401 electroluminescence Methods 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 150000002148 esters Chemical class 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000004744 fabric Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 150000003949 imides Chemical class 0.000 description 1
- MRNHPUHPBOKKQT-UHFFFAOYSA-N indium;tin;hydrate Chemical compound O.[In].[Sn] MRNHPUHPBOKKQT-UHFFFAOYSA-N 0.000 description 1
- 230000001939 inductive effect Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 150000002500 ions Chemical class 0.000 description 1
- 238000005224 laser annealing Methods 0.000 description 1
- 238000005499 laser crystallization Methods 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000003607 modifier Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000012994 photoredox catalyst Substances 0.000 description 1
- 229920000515 polycarbonate Polymers 0.000 description 1
- 125000006239 protecting group Chemical group 0.000 description 1
- 230000027756 respiratory electron transport chain Effects 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 230000002000 scavenging effect Effects 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002344 surface layer Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000007738 vacuum evaporation Methods 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N zinc oxide Inorganic materials [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1262—Multistep manufacturing methods with a particular formation, treatment or coating of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/127—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
- H01L27/1274—Multistep manufacturing methods with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement using crystallisation of amorphous semiconductor or recrystallisation of crystalline semiconductor
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/80—Constructional details
- H10K59/875—Arrangements for extracting light from the devices
- H10K59/878—Arrangements for extracting light from the devices comprising reflective means
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K2102/00—Constructional details relating to the organic devices covered by this subclass
- H10K2102/301—Details of OLEDs
- H10K2102/311—Flexible OLED
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Electroluminescent Light Sources (AREA)
- Thin Film Transistor (AREA)
- Recrystallisation Techniques (AREA)
Abstract
The present invention provides a kind of preparation method of array substrate, including:Aluminium film, buffer layer, deposition of amorphous silicon films are sequentially depositing on flexible substrates;After carrying out dehydrogenation and hydrofluoric acid clean successively to amorphous silicon membrane, then Crystallizing treatment is carried out to it, amorphous silicon membrane is made to be transformed into low-temperature polysilicon film;Patterned process is carried out to the low-temperature polysilicon film again, forms low-temperature polycrystalline silicon layer.The presence of the aluminium film so that the plasma reinforced chemical vapour deposition method that higher temperature can be used forms the high buffer layer of compactness, alleviates the shock to flexible substrate, the organic pollution brought without cavity, the pipeline to PECVD device.The present invention also provides a kind of array substrates and flexible OLED display part.
Description
Technical field
The present invention relates to OLED display technology fields more particularly to a kind of array substrate and preparation method thereof, flexibility OLED
Display device.
Background technology
Organic electroluminescence device (Organic Light-Emitting Diodes, abbreviation OLED) is selfluminous element,
It has many advantages, such as that frivolous quality, low in energy consumption, fast response time, luminous efficiency are high and can realize Flexible Displays, becomes in recent years
Using one of wider display device.Wherein, flexible OLED display part becomes the main product of current display field.It is flexible
OLED display device makes TFT (Thin on this basis mainly using organic material (such as acid imide) as flexible substrate
Film Transistor, thin film transistor (TFT)) structure and OLED element layer etc..
When making TFT structure, it usually needs low-temperature polycrystalline silicon layer is prepared on flexible substrates, to improve TFT devices
Balancing performance, but the formation of low-temperature polycrystalline silicon layer needs to undergo the high temperature process such as laser crystallization, and this is just also needed in flexible liner
Thicker silicon nitride etc. is made on bottom and is used as buffer layer, the barrier water of flexible substrates is damaged and improved to avoid flexible substrate
The ability of oxygen, but buffer layer is typically to be obtained using high-temperature plasma enhancing chemical vapour deposition technique (PECVD), and high temperature
PECVD processes plasma can directly bombard the flexible substrate of organic material, and the organic matter of generation can pollute PECVD device
Cavity, pipeline etc..
The content of the invention
In consideration of it, the present invention provides a kind of array substrate available for flexible OLED display part and preparation method thereof,
For solving during directly making buffer layer using pecvd process on a flexible substrate in the prior art, to PECVD device
Cavity, pipeline etc. organic pollution.
Specifically, first aspect present invention provides a kind of preparation method of array substrate, including:
Flexible substrate, the deposited metal aluminium film in the flexible substrate are provided;
Using plasma reinforced chemical vapour deposition method (PECVD) on the aluminium film buffer layer;
The deposition of amorphous silicon films on the buffer layer;
Crystallizing treatment is carried out to the amorphous silicon membrane, the amorphous silicon membrane is made to be transformed into low-temperature polysilicon film;
Patterned process is carried out to the low-temperature polysilicon film, forms the low-temperature polycrystalline silicon layer of definite shape.
Wherein, the thickness of the aluminium film is 0.05-1 μm.
Wherein, the aluminium film is formed by the way of physical vapour deposition (PVD);The depositing temperature of the aluminium film
For 100-350 DEG C.
Wherein, the material of the buffer layer includes at least one of silicon nitride (SiNx) and silica (SiOx).Into one
Optionally, buffer layer can be the membranous layer of silicon oxide of individual layer or silicon nitride film layer or be silica (SiOx) and silicon nitride to step
(SiNx) laminated construction.
Wherein, the thickness of the buffer layer is 0.05-1 μm.
Wherein, further included before Crystallizing treatment is carried out to the amorphous silicon membrane:To the amorphous silicon membrane successively into
Row dehydrogenation and hydrofluoric acid clean.
Wherein, the mode of the Crystallizing treatment includes excimer laser crystallization method or solid phase crystallization method.
Wherein, the thickness of the low-temperature polycrystalline silicon layer is 0.02-0.5 μm.
In the preparation method for the array substrate that first aspect present invention provides, one is set between flexible substrate and buffer layer
Aluminium film, the fusing point height of the aluminium film, stress is small, reflecting rate is high, and can be vapor-deposited by common low-temperature physics be
It can generate.The presence of the aluminium film so that the PECVD that higher temperature can be used deposits to form the high buffer layer of compactness,
The shock to flexible substrate is alleviated, the organic pollution brought without cavity, the pipeline to PECVD device.In addition, in shape
Into in the high temperature crystallization processing procedure of low temperature polycrystalline silicon, which can also reduce heat and be conducted to flexible substrate, play protecting group
The effect of plate.Moreover, the aluminium film also has excellent electric conductivity, certain electrostatic screen can be played the role of.
Second aspect of the present invention additionally provides a kind of array substrate, and the array substrate is using described in first aspect present invention
Preparation method be made.
Wherein, the array substrate include flexible substrate and be successively set in the flexible substrate aluminium film,
Buffer layer and low-temperature polycrystalline silicon layer.
In the array substrate that second aspect of the present invention provides, the aluminium film can form the high buffer layer of consistency
During, reduce the directly bad flexible substrate of bombardment heat-resisting quantity and cavity, pipeline to PECVD device bring it is organic
Object pollutes, and can also reduce heat in low-temperature polycrystalline silicon layer and be conducted to flexible substrate;The electrostatic screen of the array substrate can also be improved
Ability, when the array substrate is in OLED display fields, which can also improve due to having higher reflecting rate
Absorption and reflection of the OLED device to light, without carrying out special processing, such as one layer of silver of plating to the anode in OLED device
Film.
Third aspect present invention additionally provides a kind of flexible OLED display part, including the battle array described in first aspect present invention
Row substrate and the tft array layer being successively set on array substrate, OLED element layer.That is, described flexible OLED display part
Including the flexible substrate and aluminium film being successively set in the flexible substrate, buffer layer and low-temperature polycrystalline silicon layer;Institute
It states and tft array layer is additionally provided on low-temperature polycrystalline silicon layer, OLED element layer is provided on the tft array layer.
Wherein, the tft array layer includes the gate insulator, the grid that are successively set on the low-temperature polycrystalline silicon layer
Layer, interlayer dielectric layer, source electrode, drain electrode and flatness layer;The OLED element layer includes anode, organic luminous layer, cathode;The sun
Pole is located on the flatness layer in the tft array layer.
In the flexible OLED display part that third aspect present invention provides, the aluminium film is higher reflective due to having
Rate can improve absorption and reflection of the OLED device to light, without carrying out special processing, example to the anode in OLED device
Such as plate one layer of silverskin.
Description of the drawings
Fig. 1 is the flow chart of the preparation method of array substrate in the present invention;
Fig. 2 is that the flexible liner with aluminium film 2, buffer layer 3 and low-temperature polysilicon film 4b is formed in step S40 of the present invention
The process signal at bottom 1;
Fig. 3 is the structure diagram that the array substrate with low-temperature polycrystalline silicon layer 4 is formed on the basis of Fig. 2;
Fig. 4 is the structure diagram of flexible OLED display part in the present invention.
Main Reference Numerals:1 is flexible substrate, aluminium film 2, buffer layer 3, low-temperature polycrystalline silicon layer 4.
Specific embodiment
With reference to the accompanying drawings and embodiments, the technical solution in the embodiment of the present invention is clearly and completely described, shown
So, described embodiment is only part of the embodiment of the present invention, instead of all the embodiments.It should be pointed out that this place
The specific embodiment of description is only used to explain the present invention, is not intended to limit the present invention.
Please also refer to Fig. 1-Fig. 3, an embodiment of the present invention provides a kind of preparation method of array substrate, including:
S10 provides flexible substrate 1, the deposited metal aluminium film 2 in the flexible substrate 1,
S20, using plasma reinforced chemical vapour deposition method (PECVD) on the aluminium film 2 buffer layer 3;
S30, the deposition of amorphous silicon films 4a on the buffer layer 3;
S40 carries out Crystallizing treatment to the amorphous silicon membrane 4a, the amorphous silicon membrane 4a is made to be transformed into low temperature polycrystalline silicon
Film 4b;
S50 carries out patterned process to the low-temperature polysilicon film 4b, forms the low-temperature polycrystalline silicon layer 4 of definite shape.
In step S10, the material of flexible substrate 1 is usually organic material, such as polyimides (polyimide, PI), poly-
Carbonic ester (Polycarbonate, PC), polyethylene terephthalate (Polyethylene terephthalate, PET),
Polymethyl methacrylate (Polymethyl methacrylate, PMMA) and its modifier etc..The barrier water oxygen of organic material
Ability, heat-resisting ability are poor, it is necessary to prepare aluminium film 2 in flexible substrate 1, buffer layer 3 protects it.
Wherein, aluminium film 2 is the whole face for covering flexible substrate 1.Optionally, the thickness of the aluminium film 2 is
0.05-1μm.Such as it can be 0.06,0.1,0.2,0.3,0.4,0.6 or 0.9 μm.Further it is chosen as 0.1-0.8 μm.
The aluminium film 2 forms the film layer of appearance uniform densification by the way of common physical vapour deposition (PVD) (PVD).
Wherein, PVD modes include but not limited to magnetron sputtering, vacuum evaporation, ion plating (such as arc ion plating, RF ion plating)
Deng.Optionally, the depositing temperature of the aluminium film 2 is 100-350 DEG C.Such as can be 100,150,200,220,250,
300 or 320 DEG C.Further it is chosen as 100-250 DEG C.The temperature that PVD deposition forms aluminium film 2 is relatively low, hardly to soft
Property substrate 1 impacts.
In step S20, the buffer layer 3 of one layer of entire aluminium film 2 of covering is formed on aluminium film 2 by PECVD.
The material of the buffer layer 3 includes at least one of silicon nitride (SiNx) and silica (SiOx).So buffer layer 3 of material
It generally to be formed by the PECVD of high temperature, so just can guarantee that the consistency of buffer layer 3 is higher, also could to flexible substrate 1
There is preferable barrier water oxygen effect.
Buffer layer 3 can be the membranous layer of silicon oxide either silicon nitride film layer of individual layer or be silica (SiOx) of individual layer
With the laminated construction of silicon nitride (SiNx).Optionally, the thickness of the buffer layer is 0.05-1 μm.Such as can be 0.06,
0.08th, 0.1,0.2,0.3,0.4,0.6 or 0.9 μm.Further it is chosen as 0.1-0.8 μm.
In step S30, amorphous silicon membrane 4a is generally using chemical vapour deposition technique (CVD) formation, such as hot-wire chemical gas
Mutually deposition (Hot Filament Chemical Vapor Deposition, HFCVD), PECVD.Optionally, amorphous silicon membrane
The thickness of 4a is 0.02-0.5 μm.For example, 0.03,0.05,0.06,0.08,0.1,0.2,0.3,0.4 or 0.5 μm.Further
It is chosen as 0.05-0.3 μm.
In step S40, the mode of the Crystallizing treatment includes excimer laser crystallization method or solid phase crystallization method.Further
Ground, the excimer laser crystallization method (ELC) include quasi-molecule laser annealing (ELA), gradualness side crystallization (SLS), choosing
Selecting property expansion of laser light crystallizes (SELAC).It is horizontal that the solid phase crystallization method (SPC) includes crystallization inducing metal MIC, metal inducement
To crystallization MILC etc..
Preferably, the Crystallizing treatment is carried out using ELA techniques.In this process, the energy of excimer laser used is close
It spends for 350-440W/cm2。
In the step S40 of the present invention, amorphous silicon membrane 4a is being carried out before Crystallizing treatment is transformed into (p-Si), it is necessary to right
Amorphous silicon membrane 4a carries out dehydrogenation and hydrofluoric acid clean successively.Wherein, the dehydrogenation includes:It will be with the non-crystalline silicon
The flexible substrate of film is placed at 200-700 DEG C and is toasted.The dehydrogenation is primarily to remove in amorphous silicon membrane
Hydrogen, avoid in crystallization process generate hydrogen it is quick-fried.The purpose of the hydrofluoric acid clean is to remove the natural oxygen on amorphous silicon membrane surface layer
Change film and some organic matter spots.
In the other embodiment of the present invention, after the hydrofluoric acid clean, further include:Pass through the side of chemical oxidation
Method aoxidizes the surface of the amorphous silicon membrane 4a after hydrofluoric acid clean to form uniform silicon oxide layer.Such as it can lead to
Oxygen-containing solution is crossed, such as hydrogen peroxide or soak with ozone solution.It so can be convenient for the purity in follow-up Crystallizing treatment during polysilicon crystal more
It is high.
Wherein, the concentration of the HF solution used during the hydrofluoric acid clean is 0.5-2%, scavenging period 20-40s.
Optionally, the thickness of the low-temperature polycrystalline silicon layer 4 is 0.02-0.5 μm.With the thickness phase of above-mentioned amorphous silicon membrane 4a
Together.
In step S50, photoetching process specifically may be employed, patterned process, shape are carried out to the low-temperature polysilicon film 4b
Into the low-temperature polycrystalline silicon layer 4 (as shown in Figure 3) of certain pattern.
By the processing of above-mentioned steps S10-S50, obtained array substrate including flexible substrate 1 and is successively set on
Aluminium film 2, buffer layer 3 and low-temperature polycrystalline silicon layer 4 in the flexible substrate 1.
Wherein, flexible substrate 1, aluminium film 2, buffer layer 3 and low-temperature polycrystalline silicon layer 4 material and thickness as described above,
Here no longer it is introduced one by one.Subsequently other coatings can be prepared on the basis of the low-temperature polycrystalline silicon layer 4 of the array substrate,
The processing procedure of flexible OLED display part is completed, can be described further below.
In addition, the embodiment of the present invention additionally provides a kind of flexible OLED display part, including array substrate obtained above,
And it is successively set on tft array layer, OLED element layer on array substrate.That is, described flexible OLED display part includes soft
Property substrate 1 and aluminium film 2, buffer layer 3 and the low-temperature polycrystalline silicon layer 4 being successively set in the flexible substrate 1;Institute
It states and tft array layer is additionally provided on low-temperature polycrystalline silicon layer 4, OLED element layer is provided on the tft array layer.
Here there is no go the calculation of low-temperature polycrystalline silicon layer 4 for tft array layer.Specifically, the tft array layer includes
Gate insulator 5 on the low-temperature polycrystalline silicon layer 4, grid layer 6, interlayer dielectric layer 7, the drain electrode of source electrode 8/ 9 are successively set on, with
And flatness layer 10 etc..Wherein, source electrode 8, drain electrode 9 are arranged on layer on interlayer dielectric layer 7, and source electrode 8, drain electrode 9 also pass through respectively
Two vias through the interlayer dielectric layer 7 and gate insulator 5 connect with the opposite end of the low-temperature polycrystalline silicon layer 4
It touches.
Wherein, the OLED element layer includes anode 11, organic luminous layer 12, cathode 13.The anode 11 is located at described
On flatness layer 10 in tft array layer.
It, can be by coating process (such as CVD or PVD) on the low-temperature polycrystalline silicon layer 4 from the point of view of preparation process
Gate insulator 5 (Gate Insulator, GI) is deposited, 4 He of low-temperature polycrystalline silicon layer is completely covered in the gate insulator 5
The region that buffer layer 3 is not covered by the low-temperature polycrystalline silicon layer 4.
It can depositing layers 6, the grid layer 6 cover on the gate insulator 5 by physical vapour deposition (PVD) (PVD)
Cover gate insulator 5.Then can ion doping be carried out to the low-temperature polycrystalline silicon layer 4 for shade with grid layer 6, so as to
Source contact area and drain contact region (not shown label) are formed at the both ends of the low-temperature polycrystalline silicon layer 4, wherein, source electrode connects
It tactile area subsequently can subsequently can be with drain contact with source contact, drain contact region.
By coating process such as PECVD on the grid layer 6 and the gate insulator 5 is not covered by grid layer 6
Region upper caldding layer between dielectric layer 7, then by rapid thermal annealing (RTA) technique short annealing to be activated.
Then it is respectively formed by etching technics (such as dry etching) through the interlayer dielectric layer 7 and gate insulator 5
The first via 71 and the second via 72, the source contact area and the drain contact region to be exposed respectively.
The source electrode 8 to connect by first via 71 with the source contact area is formed on the interlayer dielectric layer 7,
And form the drain electrode 9 to connect by second via 72 with the drain contact region.Source electrode 8, drain electrode 9 can utilize physics
Vapor deposition (PVD) process deposits obtain.
Then by deposition and patterning process, the source electrode 8/ drain electrode 9 on and the interlayer dielectric layer 7 on not by
Flatness layer 10 is covered on the region of 9 covering of the drain electrode of source electrode 8/.
The 3rd via is opened up in the flatness layer 10 to expose drain electrode 9 (i.e. described 3rd via corresponds to drain electrode 9 and sets), this
Sample forms anode 11 at the via by deposition and patterning process, and the anode 11 in so described OLED element layer passes through this
Via is electrically connected with the drain electrode 9 in tft array layer.
Pixel defining layer 14 is formed on the flatness layer 10 and the anode 11, is formed in the pixel defining layer 14
Organic Light Emitting Diode (OLED) luminous organic material finally is deposited in opening to expose the part anode 11 in opening,
The organic luminous layer 12 to connect with the anode 11 is formed, cathode 13 is then formed by deposition and patterning process again, substantially
Complete the making of flexible OLED devices.
In the prior art, special processing is also carried out on the anode generally in OLED element layer, such as is applied on anode
One layer of silverskin of cloth nano gold spherical or plating, to reflect oled light.And anode 11 provided in an embodiment of the present invention is using general
Tin indium oxide (ITO), indium zinc oxide (IZO), Al-Doped ZnO (AZO), fluorine-doped tin dioxide (FTO) or p-doped stannic oxide
(PTO), without carrying out specially treated again, the cost of manufacture of OLED display device can be reduced.This is primarily due to flexibility
The presence of aluminium film 2 on substrate 1, reflecting rate will be higher, and light can be reflected, can play substitute nano gold spherical or
The effect of silverskin, without being coated the specially treateds such as one layer of silverskin of nano gold spherical or plating on anode.
In Fig. 4, the OLED element layer includes anode 11, organic luminous layer 12, cathode 13.Optionally, the present invention its
In his embodiment, the OLED element layer includes the anode, hole transmission layer, organic luminous layer, the electronics that are cascading
Transport layer, cathode.Optionally, in other embodiment of the present invention, the OLED element layer includes being cascading
Anode, hole injection layer, hole transmission layer, organic luminous layer, electron transfer layer, electron injecting layer, cathode etc..
Optionally, packaging protection layer, flexible rear cover, the flexibility can be also disposed on the OLED element layer
Substrate 1 and flexible rear cover form enclosure space, can by the flexible substrate 1 low-temperature polycrystalline silicon layer 4, tft array layer,
OLED element layer, packaging protection layer 4 etc. are contained in the enclosure space.
Further, the packaging protection layer 4 is replaced by organic matter film with inorganic matter film, the organic matter film of use with
Inorganic matter film is respectively provided with certain aqueous vapor obstructing capacity.PET (poly terephthalic acid resinoid) material etc. can be used in flexible rear cover.
It should be noted that according to the above description the announcement of book and with illustrate, those skilled in the art in the invention also
The above embodiment can be changed and changed.Therefore, the invention is not limited in specific realities disclosed and described above
Mode is applied, some equivalent modifications and change to the present invention should also be as within the scope of the claims of the present invention.This
Outside, although having used some specific terms in this specification, these terms merely for convenience of description, not to the present invention
Form any restrictions.
Claims (10)
1. a kind of preparation method of array substrate, which is characterized in that including:
Flexible substrate, the deposited metal aluminium film in the flexible substrate are provided;
Using plasma reinforced chemical vapour deposition method on the aluminium film buffer layer;
The deposition of amorphous silicon films on the buffer layer;
Crystallizing treatment is carried out to the amorphous silicon membrane, the amorphous silicon membrane is made to be transformed into low-temperature polysilicon film;
Patterned process is carried out to the low-temperature polysilicon film, forms the low-temperature polycrystalline silicon layer of definite shape.
2. preparation method as described in claim 1, which is characterized in that the thickness of the aluminium film is 0.05-1 μm.
3. preparation method as described in claim 1, which is characterized in that the aluminium film is the side using physical vapour deposition (PVD)
Formula is formed;The depositing temperature of the aluminium film is 100-350 DEG C.
4. preparation method as described in claim 1, which is characterized in that the material of the buffer layer includes silicon nitride and silica
At least one of;The thickness of the buffer layer is 0.05-1 μm.
5. preparation method as described in claim 1, which is characterized in that before Crystallizing treatment is carried out to the amorphous silicon membrane
It further includes:Dehydrogenation and hydrofluoric acid clean are carried out successively to the amorphous silicon membrane.
6. production method as claimed in claim 5, which is characterized in that the mode of the Crystallizing treatment includes excimer laser knot
Crystallization method or solid phase crystallization method.
7. a kind of array substrate, which is characterized in that including flexible substrate and the metal being successively set in the flexible substrate
Aluminium film, buffer layer and low-temperature polycrystalline silicon layer.
8. array substrate as claimed in claim 7, which is characterized in that the thickness of the aluminium film is 0.05-1 μm;It is described
The thickness of buffer layer is 0.05-1 μm.
9. a kind of flexible OLED display part, which is characterized in that including flexible substrate and be successively set on the flexible substrate
On aluminium film, buffer layer and low-temperature polycrystalline silicon layer;
Tft array layer is additionally provided on the low-temperature polycrystalline silicon layer;
OLED element layer is provided on the tft array layer.
10. flexible OLED display part as claimed in claim 9, which is characterized in that the tft array layer includes setting gradually
Gate insulator, grid layer, interlayer dielectric layer, source electrode, drain electrode and flatness layer on the low-temperature polycrystalline silicon layer;
The OLED element layer includes anode, organic luminous layer and cathode;The anode is located at flat in the tft array layer
On layer.
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CN112086469A (en) * | 2020-09-09 | 2020-12-15 | 武汉华星光电半导体显示技术有限公司 | Array substrate, preparation method thereof and display device |
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CN112103401A (en) * | 2020-09-27 | 2020-12-18 | 福建华佳彩有限公司 | Flexible display screen packaging structure and preparation method thereof |
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