CN107910343A - Cmos image sensor and its manufacture method - Google Patents
Cmos image sensor and its manufacture method Download PDFInfo
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- CN107910343A CN107910343A CN201711306699.4A CN201711306699A CN107910343A CN 107910343 A CN107910343 A CN 107910343A CN 201711306699 A CN201711306699 A CN 201711306699A CN 107910343 A CN107910343 A CN 107910343A
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- 238000000034 method Methods 0.000 title claims abstract description 44
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 238000002347 injection Methods 0.000 claims abstract description 55
- 239000007924 injection Substances 0.000 claims abstract description 55
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 47
- 239000001301 oxygen Substances 0.000 claims abstract description 47
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 43
- 239000004065 semiconductor Substances 0.000 claims abstract description 39
- 230000008569 process Effects 0.000 claims abstract description 17
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 4
- 239000000203 mixture Substances 0.000 claims abstract description 4
- 238000006396 nitration reaction Methods 0.000 claims description 10
- 229910015900 BF3 Inorganic materials 0.000 claims description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 6
- 230000004888 barrier function Effects 0.000 claims description 6
- WTEOIRVLGSZEPR-UHFFFAOYSA-N boron trifluoride Chemical compound FB(F)F WTEOIRVLGSZEPR-UHFFFAOYSA-N 0.000 claims description 6
- 239000002019 doping agent Substances 0.000 claims description 6
- 229910052710 silicon Inorganic materials 0.000 claims description 6
- 239000010703 silicon Substances 0.000 claims description 6
- 238000005530 etching Methods 0.000 claims description 3
- 238000001259 photo etching Methods 0.000 claims description 3
- 238000002955 isolation Methods 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 93
- 150000002500 ions Chemical class 0.000 description 67
- 230000006872 improvement Effects 0.000 description 9
- BKLWQDSDJBFRDF-ZPUQHVIOSA-N (2e,4e)-5-(4-nitrophenyl)penta-2,4-dienal Chemical compound [O-][N+](=O)C1=CC=C(\C=C\C=C\C=O)C=C1 BKLWQDSDJBFRDF-ZPUQHVIOSA-N 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 238000000137 annealing Methods 0.000 description 2
- 210000000746 body region Anatomy 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1463—Pixel isolation structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
The invention discloses a kind of cmos image sensor, the corresponding active area of each pixel unit is isolated by shallow trench field oxygen, in shallow trench field, formed with a p-type ion implanted layer, p-type ion implanted layer is formed after shallow trench formation, before oxide layer filling by p-type ion implanting for the side of the shallow trench of oxygen and lower surface；The oxide layer of shallow trench field oxygen uses HDP process fillings, to reduce the junction depth of p-type ion implanted layer.Light sensitive diode is formed from the PN junction diode composition formed between the N-type injection region of the P-type semiconductor substrate surface of active area and the P-type semiconductor substrate of N-type injection region bottom；P-type ion implanted layer prevents N-type injection region directly in the side of shallow trench field oxygen and the dark current of the contact of shallow trench field oxygen and the reduction light sensitive diode of the PN junction by being formed between p-type ion implanted layer and N-type injection region.The invention also discloses a kind of manufacture method of cmos image sensor.The present invention can reduce dark current.
Description
Technical field
The present invention relates to semiconductor integrated circuit manufacturing field, more particularly to a kind of cmos image sensor；The present invention is also
It is related to a kind of manufacture method of cmos image sensor.
Background technology
Existing cmos image sensor (CMOS Image Sensor, CIS) is by pixel (Pixel) element circuit and CMOS
Circuit is formed, and relative to ccd image sensor, cmos image sensor is because use CMOS standard manufacture crafts, therefore have
Preferably can integrated level, can be integrated in other digital-to-analogue computings and control circuit on same chip, more adapt to future hair
Exhibition.
According to transistor size contained by the pixel unit circuit of existing cmos image sensor, it is broadly divided into 3T type structures
With 4T type structures.
As shown in Figure 1, it is the schematic equivalent circuit of the pixel unit circuit of existing 3T types cmos image sensor；It is existing
The pixel unit circuit of 3T type cmos image sensors includes light sensitive diode D1 and cmos pixel reading circuit.The CMOS pictures
Plain reading circuit is 3T type image element circuits, including reset transistor M1, amplifier tube M2, selecting pipe M3, three are NMOS tube.
The N-type region of the light sensitive diode D1 is connected with the source electrode of the reset transistor M1.
It is a potential pulse that the grid of the reset transistor M1, which meets reset signal Reset, the reset signal Reset, works as institute
When to state reset signal Reset be high level, reset transistor M1 conductings and by the Electron absorption of the light sensitive diode D1 to reading
Go out and reset is realized in the power supply Vdd of circuit.The light sensitive diode D1 produces light induced electron, potential rise when light irradiates
Height, spreads out of electric signal by amplifying circuit.The grid of the selecting pipe M3 meets row selection signal Rs, for selecting after amplifying
Electric signal output export signal Vout.
As shown in Fig. 2, it is the schematic equivalent circuit of the pixel unit circuit of existing 4T types cmos image sensor；And figure
It is more transfering transistors or be transfer tube M4 in structure shown in Fig. 2 in place of the difference of structure shown in 1, the transfer
For the source region of transistor 4 to connect the N-type region of the light sensitive diode D1, the drain region of the transfering transistor 4 is floating active area
(Floating Diffusion, FD), the grid connection transmission of control signals Tx of the transfering transistor 4.Photosensitive two pole
After pipe D1 produces light induced electron, it is transferred in floating active area by the transfering transistor 4, is then connected by floating active area
The grid for being connected to amplifier tube M2 realizes the amplification of signal.
In general, light sensitive diode D1 uses N-type pin bundle type photodiode (Pinned Photo Diode, PPD) i.e.
The main PN junction diode group by being formed between the P-type semiconductor substrate of N-type injection region and N-type injection region bottom of NPPD, NPPD
Into, while P+ layers are also formed with the surface of N-type injection region, realize pin bundle type photoelectric diode structure；N-type injection region is photosensitive
Storage light induced electron after diode is photosensitive.
In existing most of CIS techniques, light sensitive diode is formed in active area, and active area has the oxygen isolation of shallow trench field,
Namely in the side of active area formed with shallow trench field oxygen.In the shallow trench field oxygen fill process of existing CIS techniques, in shallow trench
Without any pre-doping before the oxygen of field；In addition, shallow trench field oxygen generally use high-aspect-ratio (HARP) technique in existing CIS techniques
Filling, HARP techniques react to form oxide layer by ozone and TEOS, need progress high annealing to realize the seamless of groove afterwards
Gap is filled.The region that existing light sensitive diode easily forms the N-type injection region of light sensitive diode and shallow trench field oxygen directly contacts,
This easily produces electric leakage, forms dark current.
The content of the invention
The technical problems to be solved by the invention are to provide a kind of cmos image sensor, can reduce dark current.For this reason, this
Invention also provides a kind of manufacture method of cmos image sensor.
In order to solve the above technical problems, the corresponding active area of each pixel unit of cmos image sensor provided by the invention
Isolated by shallow trench field oxygen, in shallow trench field, the side of the shallow trench of oxygen and lower surface are formed with a p-type ion implanted layer, institute
State p-type ion implanted layer be shallow trench field oxygen shallow trench formed after, oxide layer filling before by p-type ion implanting
Formed；The oxide layer of shallow trench field oxygen uses HDP process fillings, to reduce the thermal process of the p-type ion implanted layer simultaneously
And then reduce the junction depth of the p-type ion implanted layer.
The corresponding light sensitive diode of each pixel unit is formed from the P-type semiconductor substrate surface of the active area
The PN junction diode composition formed between N-type injection region and the P-type semiconductor substrate of N-type injection region bottom；The N
Type injection region storage light induced electron after the light sensitive diode is photosensitive.
The p-type ion implanted layer prevents that the N-type injection region is directly and described shallow in the side of shallow trench field oxygen
The oxygen contact of groove field and the PN junction by being formed between the p-type ion implanted layer and the N-type injection region reduce described photosensitive
The dark current of diode.
A further improvement is that p-type epitaxial layer is also formed with the surface of the P-type semiconductor substrate, the N-type injection
Area is formed in the p-type epitaxial layer.
A further improvement is that the P-type semiconductor substrate is P-type silicon substrate.
A further improvement is that the implanted dopant of the p-type ion implanted layer is boron fluoride.
A further improvement is that the etch areas of the shallow trench is defined using hard mask layer, the hard mask layer is by the
One oxide layer and the second nitration case are formed by stacking, and the forming region of the shallow trench is opened and by institute by the hard mask layer
State and covered outside the forming region of shallow trench, the hard mask layer retains during the p-type ion implanting of the p-type ion implanted layer；Institute
The barrier layer of the p-type ion implanting of the hard mask layer p-type ion implanted layer overseas as the shallow trench region is stated, to prevent
The p-type ion implanting of the p-type ion implanted layer is to the surface outside the shallow trench.
In order to solve the above technical problems, the manufacture method of cmos image sensor provided by the invention includes the following steps：
Step 1: a P-type semiconductor substrate is provided, using lithographic etch process in the P-type semiconductor substrate surface shape
Into shallow trench, it is active area that the shallow trench, which encloses region,.
Step 2: carry out p-type ion implanting forms a p-type ion implanting in the side of the shallow trench and lower surface
Layer.
Step 3: the shallow trench is filled using HDP techniques deposited oxide layer and forms shallow trench field oxygen, by described
HDP techniques reduce the thermal process of the p-type ion implanted layer and and then reduce the junction depth of the p-type ion implanted layer.
Step 4: shape of the N-type ion implanting in the P-type semiconductor substrate surface of the active area is carried out in selection area
Into N-type injection region, by the PN junction diode that is formed between the N-type injection region and the P-type semiconductor substrate as corresponding
The light sensitive diode of pixel unit；N-type injection region storage light induced electron after the light sensitive diode is photosensitive.
The p-type ion implanted layer prevents that the N-type injection region is directly and described shallow in the side of shallow trench field oxygen
The oxygen contact of groove field and the PN junction by being formed between the p-type ion implanted layer and the N-type injection region reduce described photosensitive
The dark current of diode.
A further improvement is that p-type epitaxial layer is also formed with the surface of the P-type semiconductor substrate, the N-type injection
Area is formed in the p-type epitaxial layer.
A further improvement is that the P-type semiconductor substrate is P-type silicon substrate.
A further improvement is that the implanted dopant of p-type ion implanted layer described in step 2 is boron fluoride.
A further improvement is that the step of shallow trench is formed in step 1 is included as follows step by step：
Sequentially form the first oxide layer and the second nitration case in the P-type semiconductor substrate surface, by the first oxide layer and
The superposition of second nitration case forms the hard mask layer.
The forming region of the shallow trench is opened in photoetching, by second nitration case of the shallow trench forming region and institute
State the removal of the first oxide layer.
The Semiconductor substrate is performed etching to form the shallow trench using the hard mask layer as mask.
Afterwards, the hard mask layer during p-type ion implanting of the p-type ion implanted layer is carried out in step 2 to retain；Institute
The barrier layer of the p-type ion implanting of the hard mask layer p-type ion implanted layer overseas as the shallow trench region is stated, to prevent
The p-type ion implanting of the p-type ion implanted layer is to the surface outside the shallow trench.
The present invention has done special setting, the mainly shallow ridges in active area side to CIS to the periphery result of active area
The side of the shallow trench of groove field oxygen and lower surface form a p-type ion implanted layer, at the same shallow trench field oxygen using heat budget compared with
Few HDP process fillings, in such manner, it is possible to the shallower p-type ion implanted layer of a junction depth is formed in the side of active area, and active area
It is mainly used for being formed the N-type injection region of light sensitive diode in body region, so p-type ion implanted layer can not influence photosensitive two
Under conditions of the doping of the N-type injection region of pole pipe and N-type injection region formed a PN junction, can prevent N-type injection region directly and shallow ridges
Groove field oxygen is contacted and reduced due to the electric leakage that N-type injection region is direct and shallow trench field oxygen is contacted and produced, so the present invention can subtract
Few dark current.
Brief description of the drawings
The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments：
Fig. 1 is the schematic equivalent circuit of the pixel unit circuit of existing 3T types cmos image sensor；
Fig. 2 is the schematic equivalent circuit of the pixel unit circuit of existing 4T types cmos image sensor；
Fig. 3 A- Fig. 3 D are the device architecture signals in each step of manufacture method of cmos image sensor of the embodiment of the present invention
Figure.
Embodiment
Cmos image sensor of the embodiment of the present invention：
As shown in Figure 3D, the corresponding active area of each pixel unit of cmos image sensor of the embodiment of the present invention is by shallow trench
Field oxygen 3 is isolated, and in shallow trench field, the side of the shallow trench of oxygen 3 and lower surface are formed with a p-type ion implanted layer 2, the p-type
Ion implanted layer 2 be shallow trench field oxygen 3 shallow trench formed after, oxide layer filling before by p-type ion implanting shape
Into；The oxide layer of shallow trench field oxygen 3 uses HDP process fillings, to reduce the thermal process of the p-type ion implanted layer 2 simultaneously
And then reduce the junction depth of the p-type ion implanted layer 2.
The corresponding light sensitive diode of each pixel unit is formed from 1 surface of P-type semiconductor substrate of the active area
N-type injection region 4 and 4 bottom of N-type injection region the P-type semiconductor substrate 1 between formed PN junction diode composition；
The N-type injection region 4 storage light induced electron after the light sensitive diode is photosensitive.
The p-type ion implanted layer 2 prevents that the N-type injection region 4 is directly and described in the side of shallow trench field oxygen 3
Shallow trench field oxygen 3 contact and the PN junction by being formed between the p-type ion implanted layer 2 and the N-type injection region 4 reduce described in
The dark current of light sensitive diode.
In the embodiment of the present invention, p-type epitaxial layer, the N-type note are also formed with the surface of the P-type semiconductor substrate 1
Enter area 4 to be formed in the p-type epitaxial layer.Preferably, the P-type semiconductor substrate 1 is P-type silicon substrate.The p-type ion note
The implanted dopant for entering layer 2 is boron fluoride.
The etch areas of the shallow trench is defined using hard mask layer, and the hard mask layer is by the first oxide layer and the second nitrogen
Change being formed by stacking for layer, the hard mask layer opens the forming region of the shallow trench and the formation area by the shallow trench
Overseas covering, when p-type ion implanting of the p-type ion implanted layer 2, the hard mask layer retained；The hard mask layer is as institute
The barrier layer of the p-type ion implanting of the overseas p-type ion implanted layer 2 in shallow trench region is stated, to prevent the p-type ion implanting
The p-type ion implanting of layer 2 is to the surface outside the shallow trench.
The embodiment of the present invention has done special setting to CIS to the periphery result of active area, mainly in active area side
Shallow trench field oxygen 3 shallow trench side and lower surface form a p-type ion implanted layer 2, while shallow trench field oxygen 3 uses
The less HDP process fillings of heat budget, in such manner, it is possible to the shallower p-type ion implanted layer 2 of a junction depth is formed in the side of active area,
And it is mainly used for being formed the N-type injection region 4 of light sensitive diode in the body region of active area, so p-type ion implanted layer 2 can be
Do not influence under conditions of the doping of the N-type injection region 4 of light sensitive diode and N-type injection region 4 forms a PN junction, can prevent N-type from noting
Enter area 4 directly to contact and reduce due to the leakage that N-type injection region 4 is direct and shallow trench field oxygen 3 is contacted and produced with shallow trench field oxygen 3
Electricity, so the present invention can reduce dark current.In addition, experiment surface, the injection depth of p-type ion implanted layer 2 is more shallow, implantation dosage
Bigger, dark current is smaller；Realize that dark current is reduced to the value of needs by the embodiment of the present invention, then the present invention must will be used real
The ion implanting for applying example adds HDP process fillings shallow trench to realize, if shallow trench still uses HARP techniques, HARP techniques
High temperature can carry out annealing diffusion to p-type ion implanted layer 2 so that device still has larger dark current, can't resolve
The technical problem of the present invention.
Present invention method：
As shown in Fig. 3 A to Fig. 3 D, be cmos image sensor of the embodiment of the present invention each step of manufacture method in device
Structure diagram, the manufacture method of cmos image sensor of the embodiment of the present invention include the following steps：
Step 1: as shown in Figure 3A, there is provided a P-type semiconductor substrate 1, is partly led using lithographic etch process in the p-type
1 surface of body substrate forms shallow trench 103, and it is active area that the shallow trench 103, which encloses region,.
P-type epitaxial layer is also formed with the surface of the P-type semiconductor substrate 1, the N-type injection region 4 is formed at the P
In type epitaxial layer.Preferably, the P-type semiconductor substrate 1 is P-type silicon substrate.
The step of forming shallow trench 103 is included as follows step by step：
The first oxide layer 101 and the second nitration case 102 are sequentially formed on 1 surface of P-type semiconductor substrate, by the first oxygen
The superposition for changing 101 and second nitration case 102 of layer forms the hard mask layer.
The forming region of the shallow trench 103 is opened in photoetching, by second nitridation of 103 forming region of shallow trench
Layer 102 and first oxide layer 101 remove.
The Semiconductor substrate 1 is performed etching to form the shallow trench 103 using the hard mask layer as mask.
Step 2: as shown in Figure 3A, carrying out p-type ion implanting, p-type ion implanting is marked with mark 104 in figure 3 a.Such as
Shown in Fig. 3 B, p-type ion implanting forms a p-type ion implanted layer 2 in the side of the shallow trench 103 and lower surface.
The hard mask layer during p-type ion implanting of the p-type ion implanted layer 2 is carried out to retain；The hard mask layer is made
For the barrier layer of the p-type ion implanting of the p-type ion implanted layer 2 outside 103 region of shallow trench, to prevent the p-type
The p-type ion implanting of ion implanted layer 2 is to the surface outside the shallow trench 103.
The implanted dopant of the p-type ion implanted layer 2 is boron fluoride.
Step 3: as shown in Figure 3 C, the shallow trench 103 is filled using HDP techniques deposited oxide layer and forms shallow trench
Field oxygen 3, the thermal process of the p-type ion implanted layer 2 is reduced by the HDP techniques and is noted to reduce the p-type ion
Enter the junction depth of layer 2.
Step 4: as shown in Figure 3D, P-type semiconductor of the N-type ion implanting in the active area is carried out in selection area
The formation N-type injection region 4 on 1 surface of substrate, by the PN junction formed between the N-type injection region 4 and the P-type semiconductor substrate 1
Light sensitive diode of the diode as corresponding pixel unit；The N-type injection region 4 storage after the light sensitive diode is photosensitive
Light induced electron.
The p-type ion implanted layer 2 prevents that the N-type injection region 4 is directly and described in the side of shallow trench field oxygen 3
Shallow trench field oxygen 3 contact and the PN junction by being formed between the p-type ion implanted layer 2 and the N-type injection region 4 reduce described in
The dark current of light sensitive diode.
The present invention is described in detail above by specific embodiment, but these not form the limit to the present invention
System.Without departing from the principles of the present invention, those skilled in the art can also make many modification and improvement, these also should
It is considered as protection scope of the present invention.
Claims (10)
- A kind of 1. cmos image sensor, it is characterised in that the corresponding active area of each pixel unit of cmos image sensor by The oxygen isolation of shallow trench field, in shallow trench field, the side of the shallow trench of oxygen and lower surface are described formed with a p-type ion implanted layer P-type ion implanted layer be shallow trench field oxygen shallow trench formed after, oxide layer filling before by p-type ion implanting shape Into；The oxide layer of shallow trench field oxygen uses HDP process fillings, is gone forward side by side with reducing the thermal process of the p-type ion implanted layer And reduce the junction depth of the p-type ion implanted layer；The corresponding light sensitive diode of each pixel unit is formed from the N-type of the P-type semiconductor substrate surface of the active area The PN junction diode composition formed between injection region and the P-type semiconductor substrate of N-type injection region bottom；The N-type Injection region storage light induced electron after the light sensitive diode is photosensitive；The p-type ion implanted layer prevents the N-type injection region directly in the side of shallow trench field oxygen and the shallow trench Field oxygen contact and the reduction of the PN junction by being formed between the p-type ion implanted layer and the N-type injection region photosensitive two pole The dark current of pipe.
- 2. cmos image sensor as claimed in claim 1, it is characterised in that：On the surface of the P-type semiconductor substrate also Formed with p-type epitaxial layer, the N-type injection region is formed in the p-type epitaxial layer.
- 3. cmos image sensor as claimed in claim 1 or 2, it is characterised in that：The P-type semiconductor substrate is P-type silicon Substrate.
- 4. cmos image sensor as claimed in claim 1, it is characterised in that：The implanted dopant of the p-type ion implanted layer For boron fluoride.
- 5. cmos image sensor as claimed in claim 1, it is characterised in that：The etch areas of the shallow trench is used and covered firmly Mold layer defines, and the hard mask layer is formed by stacking by the first oxide layer and the second nitration case, and the hard mask layer will be described shallow The forming region of groove is opened and will covered outside the forming region of the shallow trench, the p-type ion of the p-type ion implanted layer The hard mask layer retains during injection；The P of the hard mask layer p-type ion implanted layer overseas as the shallow trench region The barrier layer of type ion implanting, to prevent the p-type ion implanting of the p-type ion implanted layer to the surface outside the shallow trench.
- 6. a kind of manufacture method of cmos image sensor, it is characterised in that include the following steps：Step 1: providing a P-type semiconductor substrate, formed using lithographic etch process in the P-type semiconductor substrate surface shallow Groove, it is active area that the shallow trench, which encloses region,；Step 2: carry out p-type ion implanting forms a p-type ion implanted layer in the side of the shallow trench and lower surface；Step 3: filling the shallow trench using HDP techniques deposited oxide layer and forming shallow trench field oxygen, pass through the HDP works Skill reduces the thermal process of the p-type ion implanted layer and and then reduces the junction depth of the p-type ion implanted layer；Step 4: formation N of the N-type ion implanting in the P-type semiconductor substrate surface of the active area is carried out in selection area Type injection region, by the PN junction diode that is formed between the N-type injection region and the P-type semiconductor substrate as corresponding pixel The light sensitive diode of unit；N-type injection region storage light induced electron after the light sensitive diode is photosensitive；The p-type ion implanted layer prevents the N-type injection region directly in the side of shallow trench field oxygen and the shallow trench Field oxygen contact and the reduction of the PN junction by being formed between the p-type ion implanted layer and the N-type injection region photosensitive two pole The dark current of pipe.
- 7. the manufacture method of cmos image sensor as claimed in claim 6, it is characterised in that：Served as a contrast in the P-type semiconductor The surface at bottom is also formed with p-type epitaxial layer, and the N-type injection region is formed in the p-type epitaxial layer.
- 8. the manufacture method of cmos image sensor as claimed in claims 6 or 7, it is characterised in that：The P-type semiconductor lining Bottom is P-type silicon substrate.
- 9. the manufacture method of cmos image sensor as claimed in claim 6, it is characterised in that：P-type described in step 2 from The implanted dopant of sub- implanted layer is boron fluoride.
- 10. the manufacture method of cmos image sensor as claimed in claim 6, it is characterised in that：Described in being formed in step 1 The step of shallow trench, is included as follows step by step：The first oxide layer and the second nitration case are sequentially formed in the P-type semiconductor substrate surface, by the first oxide layer and second The superposition of nitration case forms the hard mask layer；The forming region of the shallow trench is opened in photoetching, by second nitration case of the shallow trench forming region and described the One oxide layer removes；The Semiconductor substrate is performed etching to form the shallow trench using the hard mask layer as mask；Afterwards, the hard mask layer during p-type ion implanting of the p-type ion implanted layer is carried out in step 2 to retain；It is described hard The barrier layer of the p-type ion implanting of the mask layer p-type ion implanted layer overseas as the shallow trench region, it is described to prevent The p-type ion implanting of p-type ion implanted layer is to the surface outside the shallow trench.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711306699.4A CN107910343A (en) | 2017-12-11 | 2017-12-11 | Cmos image sensor and its manufacture method |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201711306699.4A CN107910343A (en) | 2017-12-11 | 2017-12-11 | Cmos image sensor and its manufacture method |
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