CN107733442A - The processing method and processing device of structured LDPC code - Google Patents

Abstract

The invention provides a kind of processing method and processing device of structured LDPC code, wherein, this method includes：Basic check matrix and the spreading factor Z of M rows N row is determined, the second dvielement includes h_cjAnd h_dj, the h_cjAnd h_djMeet relational expression mod (h_dj‑h_cj, A) and≤B, h_cjAnd h_djIt is the element value that column index all distinguishes c and d for j and line index, d=mod (c+1, M), c are less than or equal to M 1 any nonnegative integer, and j is less than or equal to N 1 any nonnegative integer；Structured low density parity check LDPC codings or structured LDPC decoding are carried out according to the basic check matrix and the spreading factor Z.By the present invention, solving the hierarchical decoder of structured LDPC code in correlation technique needs the stand-by period and then can reduce the throughput problem of decoder.

Description

The processing method and processing device of structured LDPC code

Technical field

The present invention relates to the communications field, in particular to a kind of processing method and processing device of structured LDPC code.

Background technology

Digital communication system in correlation technique generally comprises three parts：Transmitting terminal, channel and receiving terminal.Transmitting terminal can Channel coding is carried out to information sequence so as to obtain coding codeword, coding codeword is interleaved, and the bit after intertexture is reflected Modulation symbol is penetrated into, then can handle and send modulation symbol according to communication channel information.In the channel, due to multipath, The factor such as mobile causes specific channel response, and these can all make data transfer distortion, simultaneously because noise and interference can also enter One step deteriorates data transfer.Receiving terminal receives the modulation symbol data after passing through channel, and modulation symbol data now has been lost Very, it is necessary to which original information sequence could be recovered by carrying out particular procedure.

According to coding method of the transmitting terminal to information sequence, receiving terminal can to receive data carry out respective handling so as to Recover original information sequence by ground.Described coding method must be that transmitting-receiving two-end is all visible.Usually, at the coding Reason method is encoded based on forward error correction (Forward Error Correction, FEC), wherein, forward error correction coding is being believed Some redundancies are added in breath sequence.Receiving terminal can reliably recover original information sequence using the redundancy.

FEC codings in correlation technique include：Convolutional code, Turbo code and low-density checksum (Low Density Parity Check, LDPC) code.In FEC cataloged procedures, FEC codings are carried out to the information sequence that bit number is k and obtain n ratios Special FEC coding codewords (redundant bit n-k), FEC encoder bit rates are k/n.Convolutional encoding can be easily to arbitrary size Packet encoded, and Turbo coding in, by using to information sequence carry out operate processing two encoded components with And different size of code interleaving method can be supported, different information sequence sizes can be supported.LDPC code is that one kind can be with non- The linear block codes that often sparse parity matrix or bipartite graph define, exactly using the openness of its check matrix, The coding and decoding of low complex degree could be realized, so that LDPC moves towards practical.By various practices and theoretical proof, LDPC code It is the letter that performance is the most excellent under additive white Gaussian noise (Additive White Gaussian Noise, AWGN) channel Road encodes, and performance is very close to shannon limit.Particularly, structured LDPC code is due to structured features, being increasingly becoming master Stream application, such as IEEE802.11ac, IEEE802.11ad, IEEE802.11aj, IEEE802.16e, IEEE802.11n, Widely applied in DVB, microwave communication and fiber optic communication etc..All it is one per a line in the parity matrix of LDPC code Individual parity check code, often illustrate that the bit participates in the even-odd check if a certain index position element value is equal to 1 in a line In code, if equal to 0, then illustrate that the position bit is not involved in the parity check code.The even-odd check of this structured LDPC code Matrix H is the matrix that M × Z rows and N × Z are arranged, and it is made up of M × N number of submatrix, and each submatrix is that size is Z × Z The different powers of basic permutation matrix, if that is, the matrix that is obtained by the cyclic shift dry values of Z × Z unit matrix of size.That , each submatrix can represented using these cyclic shift values, i.e. the basic check matrix of structured LDPC code, also may be used To be called basis matrix.And then basic check matrix and submatrix size Z can be directly used come for determination structured LDPC code Construction, the submatrix size Z can also be called spreading factor or lifting values (lift size), in the present invention mainly It is described as spreading factor, the meaning is all consistent.The parity matrix of structured LDPC code has following form：

If hb_ij==- 1, then haveIt is the full null matrix that size is Z × Z；It is single in order to mathematically be easier to describe The cyclic shift of position battle array, in the check matrix of structures described above LDPC code basis, define size Z × Z's herein Standard replacement matrix P, i.e., correspondingly sized power, described mark are carried out to standard replacement matrix P to the cyclic shift of unit matrix Quasi- permutation matrix P is as follows：

Pass through such power hb_ijEach matrix in block form of can unique mark, if a certain matrix in block form is full 0 square Battle array, matrix are typically represented or null value represents with -1；And if the cyclic shift s of unit matrix is obtained, then equal to s, so All hb_ijA basic check matrix H b is may be constructed, and then the basic check matrix H b of LDPC code can represent as follows：

So structured LDPC code can be uniquely determined by basic check matrix H b and spreading factor Z completely.The basis Check matrix H b is also the titles such as basis matrix (Base Matrix) or protograph (basegraph).Basic check matrix bag Include multiple parameters：M, N and K, wherein, M is basic check matrix line number (the verification columns that can be described as basic check matrix), N The basic total columns of check matrix, and K=N-M is the system columns of basic check matrix.

For example, basic check matrix H b (2 rows 4 arrange) is following and spreading factor z is equal to 4：

Then parity matrix is：

From the point of view of above-described LDPC code parity matrix, it is recognised that the 1st row of parity matrix is equal to 1 Element index be [1 6 9], illustrate in the structured LDPC code, the 1st bit, the 6th bit and the 9th bit form one it is strange Even parity check code；Similarly, the index in the 2nd row equal to 1 is [2 7 10], then the 2nd bit, the 7th bit and the 10th bit form one Individual parity check code；The rest may be inferred, it is known that LDPC code is exactly the code word that many song parity check code heaps come in fact.And Structured LDPC code, basic check matrix H b and spreading factor Z being stored as long as being advantageous in that, storage is very simple, and Its block characteristic can be utilized in coding/decoding algorithm, algorithm can be simplified, such as uses hierarchical decoder, and often row Nepit section Point position does not conflict, and can use pile line operation, it is possible to reduce decoding delay and decoding complexity, realizes very simple.

LDPC code typically using hierarchical decoder, i.e., using row parallel decoding method, decodes in decoding compared to full parellel Iterations (as long as about general iterations) can be substantially reduced.The parity matrix of structured LDPC code as described above There are 8 rows (spreading factor Z=4, there is 2 rows and 4 row), illustrate there are 8 parity check codes, 8 check equations in other words, in decoding, Need each parity check code to decode respectively, be an iteration if all 8 parity check codes have all updated the data.And If using in the row or part parallel of hierarchical decoder, in each iterative process, if degree of parallelism is p, that is, there is p even-odd check Code updates simultaneously, then current and next p parity check code operation is all to use same update module (odd even school in iteration Test a yard update module), then the complexity of decoder is much lower, and next layer of data renewal can use in hierarchical decoder The current data being updated over, so the iterations needed is lower, decoding handling capacity is higher.H as shown above, If degree of parallelism is 2, every 4 row of parity matrix (a line for corresponding to basic check matrix) has the strange of 2 degree of parallelisms Even parity check code updates simultaneously.

Although can be greatly lowered decoding iteration number using hierarchical decoder and improve decoding speed, still there is one A little bottlenecks, that is, need to reserve the stand-by period between the row of basic check matrix and row renewal.It can specifically be described as follows：According to In above-described hierarchical decoder structure, it is recognised that (corresponding to the every of parity matrix in a line of basic check matrix Z=4 parity check code), due to being nonoverlapping between each bit node of reading, so being not in address punching It is prominent, you can to reduce decoding delay to add pile line operation, but address just occurs between the row and row of basis matrix Collision problem, the 1st row renewal of basic check matrix must update when the 0th row, because the number of next line reading may be Do not updated in lastrow, so needing the stand-by period；Similarly next iteration, the 0th row must also update when the 1st row Data renewal can be just read out.That is, it is to need the stand-by period in so-called hierarchical decoder, the described stand-by period can limit significantly The decoding speed and decoding handling capacity of LDPC code.

The stand-by period is needed for the hierarchical decoder of structured LDPC code in correlation technique and then can reduce decoder Throughput problem, there is presently no effective solution.

The content of the invention

The embodiments of the invention provide a kind of processing method and processing device of structured LDPC code, at least to solve correlation technique The hierarchical decoder of middle structured LDPC code needs the stand-by period and then can reduce the throughput problem of decoder.

According to one embodiment of present invention, there is provided a kind of processing method of structured LDPC code, including：Determine M rows N Basic check matrix and the spreading factor Z of row, the basic check matrix include K0 the first dvielements and K1 the second class members Element, first dvielement correspond to Z × Z full null matrix, and second dvielement corresponds to Z × Z unit matrix ring shift rights pair The matrix for answering the value of second dvielement to be obtained, wherein, second dvielement includes h_cjAnd h_dj, the h_cjAnd h_djIt is full Sufficient relational expression mod (h_dj-h_cj, A) and≤B, h_cjAnd h_djIt is that column index is all j and line index difference c and d element value, d=mod (c+1, M), c are less than or equal to M-1 any nonnegative integer, and j is less than or equal to N-1 any nonnegative integer, the ginseng Number A is a Z positive integer factor, and the parameter B is greater than or equal to 0 and the integer less than A；

According to the basic check matrix and the spreading factor Z carry out structured low density parity check LDPC codings or Structured LDPC decodes, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, K0+K1 be less than or Equal to M × N.

Alternatively, the occurrence of first dvielement is represented using null value or use -1 represents, the second class member The value of element is greater than or equal to 0 and the integer less than Z.

Alternatively, the parameter A is equal to the integer value that spreading factor Z divided by parameter P are obtained, wherein, the parameter P is Decoding degree of parallelism in the structured LDPC decoding, the decoding degree of parallelism are to have P in the structured LDPC decoding of P signs Individual parity check code updates simultaneously, and the parameter P is positive integer.

Alternatively, the parameter P chooses one of in the following manner：

Chosen according to coding side and making an appointment for end of decoding；

The instruction of the signaling sent according to coding side to decoding end is chosen；

The instruction of the signaling sent according to decoding end to coding side is chosen；

Setting is pre-defined according to system to be chosen.

Alternatively, the parameter B is equal to the value that the parameter A subtracts parameter C acquisitions, wherein, the parameter C is less than In A positive integer.

Alternatively, the parameter C is the execution clock number of any check equations in the structured LDPC decoding, its In, the parameter C is less than the positive integer of the parameter A, and the parameter C is pre-defined by system configuration or system.

Alternatively, the c is one below：

Element in the set be made up of all even numbers in 0 to M-1；

The element for the set being made up of all odd numbers in 0 to M-1；

By all elements at intervals of the set formed more than all integers of the E0 less than E1 in 0 to M-1, wherein E0 is It is less than M arbitrary integer more than or equal to 0, E1 is greater than the arbitrary integer that E0 is less than M.

Alternatively, the parameter A is greater than 1 integer for being less than 30.

Alternatively, the parameter B is equal to 0.

Optionally it is determined that the basic check matrix of M rows N row includes：Row weight is performed to the source basis check matrix of M rows N row Row or element value amendment determine the basic check matrix of the M rows N row.

Alternatively, the rearrangement is to be rearranged all line index of source basis check matrix, and/ Or, the element value amendment is that first numerical value of source basis check matrix is modified.

Alternatively, structured LDPC coding or structuring are carried out according to the basic check matrix and the spreading factor Z LDPC decodings include：Information source to be encoded according to the basic check matrix and spreading factor Z to length for (N-M) × Z bit Sequence carries out coding and obtains the LDPC code word sequence that length is N × Z bit；According to the basic check matrix and spreading factor Z Enter row decoding to the data to decode sequence that length is N × Z and obtain the decoding bit sequence that length is (N-M) × Z bit.

Alternatively, the basic check matrix has two kinds of code check threshold values：R0 and R1, wherein, R0 is greater than 0 reality for being less than 1 Number, and R1 is greater than the real number that R0 is less than 1；Wherein, the code check be R0 correspond to the basic check matrix in all rows and The code check that the basic check matrix that all row are formed is supported, wherein, R0=(N-M)/N；The code check is described in R1 corresponds to 0- (M2-1) rows and 0- (N2-1) arrange the code check that formed first foundation check matrix is supported in basic check matrix, Wherein, R1=(N2-M2)/N2；Wherein, M2 is greater than 0 integer, and N2 is greater than M2 integer.

Alternatively, structured LDPC coding is carried out according to the basic check matrix and the spreading factor Z, obtains structure Change LDPC code sequence, including one of in the following manner：

Use the basic check matrix to carry out code check and obtain the second structured LDPC code for R0 structured LDPC coding Bit sequence, the structured LDPC code sequence is obtained by extended method to the second structured LDPC code bit sequence；

Using 0- (M3-1) rows in the basic check matrix and 0- (N3-1) row institute composition subbase plinth verification square Battle array carries out coding and obtains the structured LDPC code sequence, wherein, M3 and N3 are greater than 0 integer, and M3<N3；

Structured LDPC coding is carried out using the first foundation check matrix and obtains first structure LDPC code bit sequence Row, the structured LDPC code sequence is a subset sequence of the first structure LDPC code bit sequence.

Alternatively, it is described that the structuring is obtained by extended method to the second structured LDPC code bit sequence LDPC code sequence, including one of in the following manner：

The second structured LDPC code bit sequence is divided into more one's share of expenses for a joint undertaking sequences, and F groups are selected from more one's share of expenses for a joint undertaking sequences Subsequence, every group of subsequence comprises at least 2 one's share of expenses for a joint undertaking sequences, to the bit on the correspondence position of all subsequences in every group of subsequence Binary system addition is carried out respectively, obtains the first extended bit sequence being made up of F part bit sequences, second structured LDPC Structuring described in the code a subset sequence of bit sequence and a subset Sequence composition of the first extended bit sequence LDPC code sequence, wherein, F is greater than 0 integer；

G times is repeated to the second structured LDPC code bit sequence and obtains the second extended bit sequence, second ratio Structured LDPC code sequence described in a subset Sequence composition of special sequence, wherein, G is greater than 1 integer；

Alternatively, the parameter M3 and N3 meet, (N3-M3)/N3≤R, wherein, R is the structured LDPC code sequence Code check, R be greater than 0 and less than 1 real number.

According to another embodiment of the invention, there is provided a kind of processing unit of structured LDPC code, including：Determine mould Block, for determining basic check matrix and the spreading factor Z of M rows N row, the basic check matrix includes K0 the first dvielements With K1 the second dvielements, first dvielement corresponds to Z × Z full null matrix, and it is mono- that second dvielement corresponds to Z × Z Position battle array ring shift right corresponds to the matrix that the value of second dvielement is obtained, wherein, second dvielement includes h_cjWith h_dj, the h_cjAnd h_djMeet relational expression mod (h_dj-h_cj, A) and≤B, h_cjAnd h_djBe column index all for j and line index distinguish c and D element value, d=mod (c+1, M), c are less than or equal to M-1 non-any negative integer, and j is less than or equal to any of N-1 Nonnegative integer, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and the integer less than A；Place Module is managed, for carrying out structured low density parity check LDPC volumes according to the basic check matrix and the spreading factor Z Code or structured LDPC decoding, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, and K0+K1 is small In or equal to M × N.

Alternatively, the occurrence of first dvielement is represented using null value or use -1 represents, the second class member The value of element is greater than or equal to 0 and the integer less than Z.

Alternatively, the parameter A is equal to the integer value that spreading factor Z divided by parameter P are obtained, wherein, the parameter P is Decoding degree of parallelism in the structured LDPC decoding, the decoding degree of parallelism are to have P in the structured LDPC decoding of P signs Individual parity check code updates simultaneously, and the parameter P is positive integer.

Alternatively, the parameter B is equal to the value that the parameter A subtracts parameter C acquisitions, wherein, the parameter C is less than In A positive integer.

Alternatively, the parameter C is the execution clock number of any check equations in the structured LDPC decoding, its In, the parameter C is less than the positive integer of the parameter A, and the parameter C is pre-defined by system configuration or system.

Optionally it is determined that the basic check matrix of M rows N row includes：Row weight is performed to the source basis check matrix of M rows N row Row or element value amendment determine the basic check matrix of the M rows N row.

Alternatively, the rearrangement is to be rearranged all line index of source basis check matrix, and/ Or, the element value amendment is that first numerical value of source basis check matrix is modified.

Alternatively, the processing module includes：Coding unit, for according to the basic check matrix and spreading factor Z Coding is carried out for the source sequence to be encoded of (N-M) × Z bit to length and obtains the LDPC code word sequence that length is N × Z bit； Decoding unit, for being carried out according to the basic check matrix and spreading factor Z to the data to decode sequence that length is N × Z Decoding obtains the decoding bit sequence that length is (N-M) × Z bit.

Alternatively, the parameter P chooses one of in the following manner：

Chosen according to coding side and making an appointment for end of decoding；

The instruction of the signaling sent according to coding side to decoding end is chosen；

The instruction of the signaling sent according to decoding end to coding side is chosen；

Setting is pre-defined according to system to be chosen.

Alternatively, the c is one below：

Element in the set be made up of all even numbers in 0 to M-1；

The element for the set being made up of all odd numbers in 0 to M-1；

By all elements at intervals of the set formed more than all integers of the E0 less than E1 in 0 to M-1, wherein E0 is It is less than M arbitrary integer more than or equal to 0, E1 is greater than the arbitrary integer that E0 is less than M.

Alternatively, the parameter A is greater than 1 integer for being less than 30.

Alternatively, the parameter B is equal to 0.

According to still another embodiment of the invention, a kind of storage medium is additionally provided.The storage medium is arranged to storage and used In the program code for performing following steps：

Basic check matrix and the spreading factor Z of M rows N row is determined, the basic check matrix includes K0 first kind member Element and K1 the second dvielements, first dvielement correspond to Z × Z full null matrix, and second dvielement corresponds to Z × Z Unit matrix ring shift right corresponds to the matrix that the value of second dvielement is obtained, wherein, second dvielement includes h_cjWith h_dj, the h_cjAnd h_djMeet relational expression mod (h_dj-h_cj, A) and≤B, h_cjAnd h_djBe column index all for j and line index distinguish c and D element value, d=mod (c+1, M), c are less than or equal to M-1 any nonnegative integer, and j is less than or equal to any of N-1 Nonnegative integer, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and the integer less than A；

According to the basic check matrix and the spreading factor Z carry out structured low density parity check LDPC codings or Structured LDPC decodes, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, K0+K1 be less than or Equal to M × N.

By the present invention, because certain pass be present in non-zero square formation element value adjacent in either rank in basic check matrix System, so that when LDPC code uses hierarchical decoder, without waiting for the time or the stand-by period is reduced, and then can carry The speed and handling capacity of high decoder, the hierarchical decoder for solving structured LDPC code in correlation technique need the stand-by period to enter And the throughput problem of decoder can be reduced.

Brief description of the drawings

Accompanying drawing described herein is used for providing a further understanding of the present invention, forms the part of the application, this hair Bright schematic description and description is used to explain the present invention, does not form inappropriate limitation of the present invention.In the accompanying drawings：

Fig. 1 is the flow chart of the processing method of structured LDPC code according to embodiments of the present invention；

Fig. 2 is the structured flowchart of the processing unit of structured LDPC code according to embodiments of the present invention；

Fig. 3 is the alternative construction block diagram of the processing unit of structured LDPC code according to embodiments of the present invention；

Fig. 4 is the coding flow chart of the LDPC code in present example 1；

Fig. 5 is the LDPC code pipeline decoding datas renewal structural representation in present example 1；

Fig. 6 is the storage Soft Inform ation schematic diagram in the ldpc code decoder in present example 1；

Fig. 7 is the data updating process schematic diagram in the structured LDPC decoding algorithm in present example 1；

Fig. 8 is the data updating process schematic diagram in the structured LDPC decoding algorithm in present example 3.

Embodiment

Describe the present invention in detail below with reference to accompanying drawing and in conjunction with the embodiments.It should be noted that do not conflicting In the case of, the feature in embodiment and embodiment in the application can be mutually combined.

It should be noted that term " first " in description and claims of this specification and above-mentioned accompanying drawing, " Two " etc. be for distinguishing similar object, without for describing specific order or precedence.

Embodiment 1

A kind of processing method of structured LDPC code is provided in the present embodiment, and Fig. 1 is according to embodiments of the present invention The flow chart of the processing method of structured LDPC code, as shown in figure 1, the flow comprises the following steps：

Step S102, determines basic check matrix and the spreading factor Z of M rows N row, and basic check matrix includes K0 first Dvielement and K1 the second dvielements, the first dvielement correspond to Z × Z full null matrix, and the second dvielement corresponds to Z × Z units The matrix that the value of corresponding second dvielement of battle array ring shift right is obtained, wherein, second dvielement includes h_cjAnd h_dj, it is described h_cjAnd h_djMeet relational expression mod (h_dj-h_cj, A) and≤B, h_cjAnd h_djIt is the element that column index all distinguishes c and d for j and line index Value, d=mod (c+1, M), c are less than or equal to M-1 any nonnegative integer, and j is less than or equal to any non-negative whole of N-1 Number, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and the integer less than A；h_cjAnd h_djCan To be any two element in the second dvielement；

Step S104, structured low density parity check LDPC codings are carried out according to basic check matrix and spreading factor Z Or structured LDPC decoding, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, and K0+K1 is less than Or equal to M × N.

By above-mentioned steps, in basic check matrix there is certain pass in non-zero square formation element value adjacent in either rank System, so that when LDPC code uses hierarchical decoder, without waiting for the time or the stand-by period is reduced, and then can carry The speed and handling capacity of high decoder, the hierarchical decoder for solving structured LDPC code in correlation technique need the stand-by period to enter And the throughput problem of decoder can be reduced.

Alternatively, the executive agent of above-mentioned steps can be the equipment of transmitting terminal or receiving terminal, such as base station, terminal, but Not limited to this.

Optionally, the occurrence of first dvielement is represented using null value or use -1 represents, the second dvielement Value is greater than or equal to 0 and the integer less than Z.

Optionally, parameter A is equal to the integer value that spreading factor Z divided by parameter P are obtained, wherein, parameter P is structuring Decoding degree of parallelism in LDPC decodings, the decoding degree of parallelism is to have P odd even school in the structured LDPC decoding of P signs Test code while update, and the parameter P is positive integer or coding degree of parallelism.

The parameter P can choose in the following manner：Chosen according to coding side and making an appointment for end of decoding；Root The instruction of the signaling sent according to coding side to decoding end is chosen；The instruction of the signaling sent according to decoding end to coding side is entered Row is chosen；Setting is pre-defined according to system to be chosen.

Optionally, parameter B is equal to the value that parameter A subtracts parameter C acquisitions, wherein, parameter C is less than the positive integer equal to A.

Optionally, parameter C is the execution clock number of any check equations in structured LDPC decoding, wherein, parameter C is Less than parameter A positive integer, parameter C is pre-defined by system configuration or system.

C value set is including a variety of, such as：

Element in the set be made up of all even numbers in 0 to M-1；

The element for the set being made up of all odd numbers in 0 to M-1；

By all elements at intervals of the set formed more than all integers of the E0 less than E1 in 0 to M-1, wherein E0 is It is less than M arbitrary integer more than or equal to 0, E1 is greater than the arbitrary integer that E0 is less than M.

Optionally, the parameter A is greater than 1 integer for being less than 30；The parameter B is equal to 0.

Optionally, determining the basic check matrix of M rows N row includes following two specific modes：To the source base of M rows N row Plinth check matrix performs rearrangement or element value amendment determines the basic check matrix of M rows N row.Rearrangement is by source basis school All line index for testing matrix are rearranged, and element value amendment is that first numerical value of source basis check matrix is modified.

Optionally, structured LDPC coding is carried out according to basic check matrix and spreading factor Z or structured LDPC decodes Specifically include：

Length is compiled for the source sequence to be encoded of (N-M) × Z bit according to basic check matrix and spreading factor Z Code obtains the LDPC code word sequence that length is N × Z bit；

Enter row decoding to the data to decode sequence that length is N × Z according to basic check matrix and spreading factor Z to be grown Spend the decoding bit sequence for (N-M) × Z bit.

Optionally, the basic check matrix has two kinds of code check threshold values：R0 and R1, wherein, R0 is greater than 0 reality for being less than 1 Number, and R1 is greater than the real number that R0 is less than 1；Wherein, the code check be R0 correspond to the basic check matrix in all rows and The code check that the basic check matrix that all row are formed is supported, wherein, R0=(N-M)/N；The code check is described in R1 corresponds to 0- (M2-1) rows and 0- (N2-1) arrange the code check that formed first foundation check matrix is supported in basic check matrix, Wherein, R1=(N2-M2)/N2；Wherein, M2 is greater than 0 integer, and N2 is greater than M2 integer.

Optionally, structured LDPC coding is carried out according to the basic check matrix and the spreading factor Z, obtains structure Change LDPC code sequence, be specifically as follows following several ways：

Use the basic check matrix to carry out code check and obtain the second structured LDPC code for R0 structured LDPC coding Bit sequence, the structured LDPC code sequence is obtained by extended method to the second structured LDPC code bit sequence；

Using 0- (M3-1) rows in the basic check matrix and 0- (N3-1) row institute composition subbase plinth verification square Battle array carries out coding and obtains the structured LDPC code sequence, wherein, M3 and N3 are greater than 0 integer, and M3<N3；

Structured LDPC coding is carried out using the first foundation check matrix and obtains first structure LDPC code bit sequence Row, the structured LDPC code sequence is a subset sequence of the first structure LDPC code bit sequence.

Optionally, it is described that the structuring is obtained by extended method to the second structured LDPC code bit sequence LDPC code sequence, it is specifically as follows following several ways：

The second structured LDPC code bit sequence is divided into more one's share of expenses for a joint undertaking sequences, and F groups are selected from more one's share of expenses for a joint undertaking sequences Subsequence, every group of subsequence comprises at least 2 one's share of expenses for a joint undertaking sequences, to the bit on the correspondence position of all subsequences in every group of subsequence Binary system addition is carried out respectively, obtains the first extended bit sequence being made up of F part bit sequences, second structured LDPC Structuring described in the code a subset sequence of bit sequence and a subset Sequence composition of the first extended bit sequence LDPC code sequence, wherein, F is greater than 0 integer；

G times is repeated to the second structured LDPC code bit sequence and obtains the second extended bit sequence, second ratio Structured LDPC code sequence described in a subset Sequence composition of special sequence, wherein, G is greater than 1 integer；

Optionally, the parameter M3 and N3 meet, (N3-M3)/N3≤R, wherein, R is the structured LDPC code sequence Code check, R be greater than 0 and less than 1 real number.

Through the above description of the embodiments, those skilled in the art can be understood that according to above-mentioned implementation The method of example can add the mode of required general hardware platform to realize by software, naturally it is also possible to by hardware, but a lot In the case of the former be more preferably embodiment.Based on such understanding, technical scheme is substantially in other words to existing The part that technology contributes can be embodied in the form of software product, and the computer software product is stored in a storage In medium (such as ROM/RAM, magnetic disc, CD), including some instructions to cause a station terminal equipment (can be mobile phone, calculate Machine, server, or network equipment etc.) method that performs each embodiment of the present invention.

Embodiment 2

A kind of processing unit of structured LDPC code is additionally provided in the present embodiment, and the device is used to realize above-mentioned implementation Example and preferred embodiment, repeating no more for explanation was carried out.As used below, term " module " can be realized pre- Determine the combination of the software and/or hardware of function.Although device described by following examples is preferably realized with software, Hardware, or the realization of the combination of software and hardware is also what may and be contemplated.

Fig. 2 is the structured flowchart of the processing unit of structured LDPC code according to embodiments of the present invention, as shown in Fig. 2 should Device includes：

Determining module 20, for determining basic check matrix and the spreading factor Z of M rows N row, basic check matrix includes K0 Individual first dvielement and K1 the second dvielement, the first dvielement correspond to Z × Z full null matrix, the second dvielement corresponding to Z × The matrix that the value of corresponding second dvielement of Z unit matrix ring shift right is obtained, wherein, second dvielement includes h_cjAnd h_dj, The h_cjAnd h_djMeet relational expression mod (h_dj-h_cj, A) and≤B, h_cjAnd h_djIt is that column index all distinguishes c and d for j and line index Element value, d=mod (c+1, M), c are less than or equal to M-1 any nonnegative integer, and j is less than or equal to any non-of N-1 Negative integer, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and the integer less than A；

Processing module 22, for carrying out structured low density parity check according to basic check matrix and spreading factor Z LDPC is encoded or structured LDPC decoding, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, K0 + K1 is less than or equal to M × N.

Optionally, the occurrence of the first dvielement is represented using null value or use -1 represents；The value of second dvielement is Integer more than or equal to 0 and less than Z.

Optionally, parameter A is equal to the integer value that spreading factor Z divided by parameter P are obtained, wherein, parameter P is structuring Decoding degree of parallelism in LDPC decodings, the decoding degree of parallelism are to have P even-odd check in the structured LDPC decoding of P signs Code updates simultaneously, and parameter P is pre-defined by system configuration or system or coding degree of parallelism.

Optionally, parameter B is equal to the value that parameter A subtracts parameter C acquisitions, wherein, parameter C is less than the positive integer equal to A.

Optionally, parameter C is the execution clock number of any check equations in structured LDPC decoding, wherein, parameter C is Less than parameter A positive integer, parameter C is pre-defined by system configuration or system.

Optionally, the parameter P in the present embodiment chooses one of in the following manner：

Chosen according to coding side and making an appointment for end of decoding；

The instruction of the signaling sent according to coding side to decoding end is chosen；

The instruction of the signaling sent according to decoding end to coding side is chosen；

Setting is pre-defined according to system to be chosen.

Optionally, the value of the c can be one below：

Element in the set be made up of all even numbers in 0 to M-1；

The element for the set being made up of all odd numbers in 0 to M-1；

By all elements at intervals of the set formed more than all integers of the E0 less than E1 in 0 to M-1, wherein E0 is It is less than M arbitrary integer more than or equal to 0, E1 is greater than the arbitrary integer that E0 is less than M.

Optionally, the parameter A is greater than 1 integer for being less than 30.The parameter B is equal to 0.

Optionally, the basic check matrix has two kinds of code check threshold values：R0 and R1, wherein, R0 is greater than 0 reality for being less than 1 Number, and R1 is greater than the real number that R0 is less than 1；Wherein, the code check be R0 correspond to the basic check matrix in all rows and The code check that the basic check matrix that all row are formed is supported, wherein, R0=(N-M)/N；The code check is described in R1 corresponds to 0- (M2-1) rows and 0- (N2-1) arrange the code check that formed first foundation check matrix is supported in basic check matrix, Wherein, R1=(N2-M2)/N2；Wherein, M2 is greater than 0 integer, and N2 is greater than M2 integer.

Optionally, structured LDPC coding is carried out according to the basic check matrix and the spreading factor Z, obtains structure Change LDPC code sequence, be specifically as follows following several ways：

Use the basic check matrix to carry out code check and obtain the second structured LDPC code for R0 structured LDPC coding Bit sequence, the structured LDPC code sequence is obtained by extended method to the second structured LDPC code bit sequence；

Using 0- (M3-1) rows in the basic check matrix and 0- (N3-1) row institute composition subbase plinth verification square Battle array carries out coding and obtains the structured LDPC code sequence, wherein, M3 and N3 are greater than 0 integer, and M3<N3；

Structured LDPC coding is carried out using the first foundation check matrix and obtains first structure LDPC code bit sequence Row, the structured LDPC code sequence is a subset sequence of the first structure LDPC code bit sequence.

Optionally, it is described that the structuring is obtained by extended method to the second structured LDPC code bit sequence LDPC code sequence, it is specifically as follows following several ways：

The second structured LDPC code bit sequence is divided into more one's share of expenses for a joint undertaking sequences, and F groups are selected from more one's share of expenses for a joint undertaking sequences Subsequence, every group of subsequence comprises at least 2 one's share of expenses for a joint undertaking sequences, to the bit on the correspondence position of all subsequences in every group of subsequence Binary system addition is carried out respectively, obtains the first extended bit sequence being made up of F part bit sequences, second structured LDPC Structuring described in the code a subset sequence of bit sequence and a subset Sequence composition of the first extended bit sequence LDPC code sequence, wherein, F is greater than 0 integer；

G times is repeated to the second structured LDPC code bit sequence and obtains the second extended bit sequence, second ratio Structured LDPC code sequence described in a subset Sequence composition of special sequence, wherein, G is greater than 1 integer；

Optionally, the parameter M3 and N3 meet, (N3-M3)/N3≤R, wherein, R is the structured LDPC code sequence Code check, R be greater than 0 and less than 1 real number.

Optionally, determining the basic check matrix of M rows N row includes following two specific modes：To the source base of M rows N row Plinth check matrix performs rearrangement or element value amendment determines the basic check matrix of M rows N row.Rearrangement is by source basis school All line index for testing matrix are rearranged, and element value amendment is that first numerical value of source basis check matrix is modified.

Fig. 3 is the alternative construction block diagram of the processing unit of structured LDPC code according to embodiments of the present invention, such as Fig. 3 institutes Show, in addition to including all modules shown in Fig. 2, processing module 22 also includes the device：

Coding unit 30, for waiting to compile for (N-M) × Z bit to length according to basic check matrix and spreading factor Z Code source sequence carries out coding and obtains the LDPC code word sequence that length is N × Z bit；

Decoding unit 32, for the data to decode sequence according to basic check matrix and spreading factor Z to length for N × Z Arrange into row decoding and obtain the decoding bit sequence that length is (N-M) × Z bit.

It should be noted that above-mentioned modules can be realized by software or hardware, for the latter, Ke Yitong Cross in the following manner realization, but not limited to this：Above-mentioned module is respectively positioned in same processor；Or above-mentioned modules are with any The form of combination is located in different processors respectively.

Embodiment 3

The present embodiment is that according to an alternative embodiment of the invention, the application is carried out specifically for combining specific scene Bright, the present embodiment includes multiple examples：

Example 1

The method proposed in the optional example of the present invention can be used for LTE mobile communication system or following 5th generation movement Communication system or other Wireless-wire communication systems, data transfer direction are that base station sends data (descending biography to mobile subscriber Defeated business datum), or data transfer direction is that mobile subscriber sends data (uplink business datum) to base station.The shifting Employing family includes：Mobile device, it is access terminal, user terminal, subscriber station, subscriber unit, movement station, distant station, long-range end End, user agent, user's set, user equipment or some other terms.The base station includes access point (AP) or can claimed For node B (node B), radio network controller (RNC), evolved Node B (Evolved Node B, eNB), base station control Device (BSC) processed, base transceiver station (BTS), base station (BS), transceiver function (TF), Radio Router, transceiving Machine, basic service unit (BSS), expansion service unit (ESS), radio base station (RBS), or some other terms.

According to the one side of the optional example of the present invention, this optional example provides a kind of structured LDPC code constructing method, Applied to the eMBB (enhanced in new RAT (New Radio Access Technology, new wireless access technology) Mobile Broadband, strengthen mobile broadband) scene, URLLC (Ultra-Reliable and Low Latency Communications, super reliable low time delay communication) scene or mMTC (massive Machine Type Communications, a large amount of Internet of Things) in scene.Wherein descending maximum throughput can reach 20Gbps in eMBB scenes, Upstream data maximum throughput can reach 10Gbps；And in URLLC, it can support reliability is minimum to reach 10e-5's BLER (Block Error Rate) and up-downgoing reach most short time-delay and reach 0.5 millisecond；And mMTC can make device battery It can use and not power off for many years.

Transmitting terminal needs the information bit sequence that conveying length is 1800 bits, and channel coding code check is 3/4, channel coding Using structured LDPC code.Fig. 4 is the coding flow chart of the LDPC code in present example 1, as shown in figure 4, specifically include with Lower step：

S300, information bit sequence is obtained, such as obtain the information bit sequence that length is 1800 bits；

S301, basic check matrix and the spreading factor Z for determining M rows N row used in structured LDPC coding, the base Plinth check matrix includes K0 the first dvielements and K1 the second dvielements, and first dvielement corresponds to the full zero moments of Z × Z Battle array, second dvielement correspond to the matrix that the second dvielement value is obtained corresponding to Z × Z unit matrix ring shift rights；Its It is characterised by, the basic check matrix meets：If h_cjAnd h_djAll be the second dvielement, then mod (h_dj-h_cj, A) and≤B, wherein, h_cjAnd h_djBe respectively in c rows and d rows index for j element value, d=mod (c+1, M), c=0,1 ..., M-1, j=0, 1 ..., N-1, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and the integer less than A, letter Number mod (x1, x2) represents the remainder that integer x1 divided by integer x2 is obtained；M=3, N=12, Z=200, A=10, B=6, K0 =3, K1=33.

The basic check matrix of M rows N row is as follows used in structured LDPC coding, spreading factor Z=200.

Spreading factor is Z=200, parameter A=10, parameter B=6.The basis of described structured LDPC code more than As can be seen that meeting in check matrix：If h_cjAnd h_djAll be the second dvielement, then mod (h_dj-h_cj, A) and≤B, wherein, h_cjWith h_djBe respectively in c rows and d rows index for j element value, d=mod (c+1, M), c=0,1 ..., M-1, j=0,1 ..., N-1, the 2nd element that can also be described as 2 adjacent second dvielements in any row subtract the difference that the 1st element is obtained The remainder obtained to parameter A=10 complementations is less than or equal to parameter B=6.In basic check matrix as described above, the 0 is classified as [0 144 179], and 2 adjacent non-zero square formation elements are [0 144], [144 179] and [179 0], wherein the 2nd It is respectively 144,35 and -179 that element, which subtracts the difference that the 1st element is obtained, and the remainder obtained to parameter A=10 complementations is 4th, 5 and 1, that is, the remainder values obtained are calculated both less than or equal to parameter B=6.The parameter A=10 is spreading factor z= A 200 positive integer factor, it is that the parameter A=10 is equal to the spreading factor z=200 divided by LDPC more specifically The integer value that decoding degree of parallelism P=20 is obtained, the LDPC decoding degree of parallelisms P=20.So relative to basis described above For check matrix, degree of parallelism P=20 is decoded, then basic check matrix a line needs to be divided into 10 group check equations and (or retouched State as parity check code) while renewal is performed, every group of check equations have P=20 check equations.The parameter B=6, you can with The numerical value that parameter C calculates acquisition is subtracted by the parameter A=10, wherein, in general if parameter C is less than being equal to A =10 positive integer, the check equations that the parameter C is defined as to ldpc decoder here perform required clock number, that is, existed Clock number in actual ldpc code decoder practiced by each check equations, in this example, C are equal to 4.It is above-described Ldpc code decoder is all to use hierarchical decoder structure, i.e., the latest result of the previous row renewal of basic check matrix is for next In capable renewal.During the decoding of structured LDPC code, it is between the variable node of a line in basic check matrix It is orthogonal, i.e., do not influence between each other, it is possible to decoded using pipeline system, and not necessarily can be between row and row.

And if the LDPC bases check matrix that method obtains as described above, beneficial effect is：Base can be caused Partial orthogonality relation between the adjacent lines of plinth check matrix be present, so that the basic check matrix of ldpc code decoder Row and row between can use pipeline decoding or pipeline decoding mode, so as to improve decoding speed and improve The handling capacity of decoder.Fig. 5 is that the LDPC code pipeline decoding datas in present example 1 update structural representation, such as Fig. 5 Shown LDPC code pipeline system decoding data renewal structure chart, using basic check matrix as described above and spreading factor Z=200, and (degree of parallelism P=20, the clock number required for each check equations perform is C=to described decoder parameter 4, check equations can be divided into 3 steps and read data R, processing data P and write-in data W, and as shown in Fig. 5 (a), 404 be to have P =20 check equations update simultaneously, and 400 is read data R, and 401 be processing data P, and 402 be write-in data W)；Fig. 5 (b) is 10 group check equations required in the 0th row 406 renewal of basic check matrix run timing diagram, and 1 is differed between every group Clock, i.e., it is updated using pipeline decoding mode, shares same RPW processing modules, the 1st row of basic check matrix is more New 407 processing starts, now it can be seen that what is updated in the 0th row is 0-6 groups check equations 405.If in next line 407 The data read during renewal are the 6th group of lastrow and former updated the data, then address is just not present between two row and rushes Prominent problem, you can decoded using pipeline system (or pipeline duct types), it is not necessary to when all 10 groups of lastrow Check equations have updated entirely to be started.

According to basic check matrix and the spreading factor z=200 of structured LDPC code presented above, degree of parallelism is decoded For p=20, in decoder, Fig. 6 is the storage Soft Inform ation schematic diagram in the ldpc code decoder in present example 1, such as Fig. 6 institutes Show, preserve LDPC code word Soft Inform ation in, including N=12 groups it is long spend be spreading factor Z=200 Soft Inform ations 500, each extend because The Soft Inform ation of sub- Z=200 length can all be divided into 10 groups of Soft Inform ations 501, and every group of Soft Inform ation has 20 Soft Inform ations 502, and this 20 soft Information is exactly the data that P=20 check equations are read, because it is to enter row decoding parallel, so 20 Soft Inform ations need Merge into a bit sequence and the data being stored on same address.So data are once read, it is described 20 Soft Inform ations can once be read simultaneously completely.

According to the structured LDPC code basis check matrix of this patent conceptual design, data renewal corresponding with Fig. 5 (b) is suitable Sequence, Fig. 7 are the data updating process schematic diagrames in the structured LDPC decoding algorithm in present example 1, and shown in Fig. 7 is to deposit Reservoir reading order example, the memory for only drawing the 0th row of basic check matrix reads situation, and only draws the 0th row element With the change of the 1st row element.As shown in Figure 7, it can be seen that because the 0th element of the 0th row is 0, so the bit first updated Node is [0,10,20,30 ..., 190], next to that [1,11,21,31 ..., 191], behind the like.The 1st of 0th row Element is 144, and [144,154 ..., 4,14 ..., 134] updated at first when being updated to the 1st row, as 600 in figure, it is up In renewal be updated over complete, now can directly utilize, so even if lastrow and other degree of parallelisms are also decoding, still Now the data of the 1st row can also read and be updated processing, be not in address conflict issues；Then to the 2nd of the 0th row the Capable element value is 179, and the bit node updated first is [179,189 ..., 9,19 ... 169], as shown in Figure 7 603, and This group of bit node have updated 602 in the 1st row, so even if the 1st row basis check matrix has updated without whole Into, but the 2nd row of basic check matrix can also proceed by renewal, also be not in address conflict issues；Similarly, 2 rows are not in address conflict issues to that can also use identical decoding architecture between the 0th row.Meanwhile in other row also one Sample can use pipeline system as described above to carry out, and repeat no more here.As can be seen that decoded in whole an iteration Cheng Zhong, the time is all withouted waiting for, so as to greatly save decoding time, so as to improve decoding handling capacity.

S302, according to basic check matrix and the spreading factor Z=200 of the structured LDPC code to information to be encoded Sequence is encoded.Encoded by the source sequence to be encoded of above-described 1800 bits to acquisition, code check 3/ 4, the LDPC code word that length is 2400 bits can be obtained.

S303, send the encoding block after the LDPC codings.Length is modulated into for the LDPC code word of 2400 bits Respective constellation modulation symbol, and send described constellation modulation symbol.

Example 2

This example is the coding/decoding method of the corresponding code length of reception in corresponding instance 1.Itd is proposed in the optional example of the present invention Method can be used for LTE mobile communication system either following 5th Generation Mobile Communication System or other Wireless-wire communication systems System, data transfer direction is that base station sends data (downlink transfer business datum) to mobile subscriber, or data transfer direction is Mobile subscriber sends data (uplink business datum) to base station.The mobile subscriber includes：Mobile device, it is that access is whole End, user terminal, subscriber station, subscriber unit, movement station, distant station, remote terminal, user agent, user's set, Yong Hushe Standby or some other terms.The base station includes access point (AP) or is properly termed as node B (node B), radio net control Device (RNC) processed, evolved Node B (Evolved Node B, eNB), base station controller (BSC), base transceiver station (BTS), base Stand (BS), transceiver function (TF), Radio Router, wireless set, basic service unit (BSS), expansion service Unit (ESS), radio base station (RBS), or some other terms.

Receive and decode such as the structured LDPC code of example 1, specifically include following steps：

S400, receive simultaneously demodulated signal.Reception signal is demodulated, obtains each ratio of counter structure LDPC code word Special Soft Inform ation, that is, obtain the data sequence to be decoded that length is 2400.

S401, basic check matrix and the spreading factor Z for determining M rows N row used in structured LDPC coding, the base Plinth check matrix includes K0 the first dvielements and K1 the second dvielements, and first dvielement corresponds to the full zero moments of Z × Z Battle array, second dvielement correspond to the matrix that the second dvielement value is obtained corresponding to Z × Z unit matrix ring shift rights；Its It is characterised by, the basic check matrix meets：If h_cjAnd h_djAll be the second dvielement, then mod (h_dj-h_cj, A) and≤B, wherein, h_cjAnd h_djBe respectively in c rows and d rows index for j element value, d=mod (c+1, M), c=0,1 ..., M-1, j=0, 1 ..., N-1, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and the integer less than A, letter Number mod (x1, x2) represents the remainder that integer x1 divided by integer x2 is obtained；M=3, N=12, Z=200, A=10, B=6, K0 =3, K1=33.

The basic check matrix of M rows N row is as follows used in structured LDPC coding, spreading factor Z=200.

S402, the number to be decoded according to the basic check matrix and spreading factor Z=200 to length for N × Z=2400 Enter row decoding according to sequence and obtain the decoding bit sequence that length is (N-M) × Z=1800 bits.According to the decoding described in example 1 Device structure, because basic check matrix has more special element relation, the decoding flow introduced using such as example 1 and flowing water Line mode enters row decoding, can greatly improve decoding speed and save decoding time, for requiring low time delay and high-throughput System requirements is highly beneficial.

S403, the result decoded according to structured LDPC code, obtain the information bit that length is 1800 bits.

In example 1 and example 2, basic check matrix and spreading factor size is all known in transmitting-receiving two-end.

Example 3

The method proposed in the optional example of the present invention can be used for the 5th Generation Mobile Communication System or other it is wireless and Wired communication system, data transfer direction are that base station sends data (downlink transfer business datum), or data to mobile subscriber Transmission direction is that mobile subscriber sends data (uplink business datum) to base station.This example is mainly used for receiving terminal, connects It is 2/3 to receive code check, and the bit number of source sequence be 120 bits, structured LDPC code word bit length for 60/ (2/3)= 180 bits.

The step of receiving terminal decoding, including：

S600, reception demodulate 180 Soft Inform ations of structured LDPC code word；

S601, basic check matrix and the spreading factor Z for determining M rows N row used in structured LDPC coding.If coding Spreading factor Z=20, M=3, the N=9 that transmitting terminal uses, basic check matrix are as follows：

As can be seen that basic check matrix includes K0=8 the first dvielements used by the structured LDPC coding With K1=19 the second dvielements.First dvielement corresponds to the full null matrix of Z × Z=20 × 20, and use -1 herein represents, The expression of other null values or other negative number representations can also be used；Second dvielement corresponds to the unit matrix of Z × Z=20 × 20 Ring shift right corresponds to the matrix that the second dvielement value is obtained, and the occurrence of second dvielement is greater than or equal to 0 And the integer less than Z, the element value of the 0th row the 0th row of basic check matrix as described above are equal to 0, illustrate to correspond to 20 × 20 unit matrix, the element value of the 1st row the 0th row are equal to 5, then it is corresponding be 20 × 20 the acquisition of unit matrix ring shift right 5 Matrix, other the second dvielements；K0+K1=8+19=27 is exactly equal to M × N=3 × 9=27.

And according to the basic check matrix of structures described above LDPC code, the basic check matrix meets：If h_cjAnd h_djAll be the second dvielement, then mod (h_dj-h_cj, A) and≤B, wherein, h_cjAnd h_djIt is to be indexed in c rows and d rows respectively For j element value, d=mod (c+1, M), c=0,1 ..., M-1, j=0,1 ..., N-1, the parameter A is one of Z just whole The number factor, A=5, the parameter B are greater than or equal to 0 and the integer less than A, and B=2, function mod (x1, x2) represent integer x1 Divided by the remainder that integer x2 is obtained；During column index j=0, c=[0 1 2], d=mod (c+1, M)=[1 2 0], h_dj-h_cj =[- 5-10-15], it can be seen that fully meet mod (h_dj-h_cj,5)≤2；And in j=1, only 2 the second class members Element, now only c=2, d=0, mod (h_dj-h_cj, 5) and=mod (0-8,5)=2≤2, also meet condition；Other are arranged also still Meet the condition, will not be repeated here.

S602, according to the basic check matrix and spreading factor Z=20 it is that N × Z=9 × 20=180 treats to length Decoding data sequence (i.e. above-described 180 Soft Inform ations) enters row decoding and obtains length translating for (N-M) × Z=120 bits Code bit sequence.The basic check matrix characteristic of structured LDPC coding in accordance with the above, can use hierarchical decoder to grasp Make, and the decoding stand-by period can be reduced and pipeline system can be used to carry out, under identical decoding degree of parallelism, decoding speed Degree can about lift 30%.Assuming that in structured LDPC code decoder, when each parity check code updates required decoding Between be 3 clock numbers, i.e. C=3, the parameter C=3 are any check equations or odd even in the structured LDPC decoding The execution clock number of check code, including 3 processes：Read the Soft Inform ation of bit soft information, processing Soft Inform ation and write-in renewal. Now as can be seen that above-described parameter B=2 is equal to the value that the parameter A=5 subtracts parameter C=3 acquisitions, so operate Have the beneficial effect that：Decoder can be allowed to fully achieve pipeline system and enter row decoding, often the row time is not in decoding iteration process The stand-by period is needed to can be carried out the renewal of next line, handling capacity is high.

Fig. 8 is the data updating process schematic diagram in the structured LDPC decoding algorithm in present example 3, such as Fig. 8 institutes The example shown, degree of parallelism P=4 is decoded, that is, in decoding, 4 parity check codes or check equations can be updated simultaneously every time, had P=4 parity check code more new algorithm or module are being run simultaneously；In Fig. 8 examples, basic execution unit 700, including 3 Process：Read bit soft information R, processing Soft Inform ation P and the Soft Inform ation W of write-in renewal.Because degree of parallelism is P=4, so basic Every a line of check matrix includes 5 basic execution units 700, as illustrated in the drawing institute in numbering 0,1,2,3 and 4, Fig. 8 example What is shown is the operating process of the 0th row and the 1st row element in the 0th row, the 0th row element is arranged as 0 due to the 0th, so the 0th basis The bit node Soft Inform ation that execution unit is read is [0 5 10 15], such as 701 in Fig. 8, and the 1st basic execution unit Bit node Soft Inform ation just increase by 1 successively, be [1 6 11 16] that basic execution unit below increases successively.In order to It is convenient to understand, the address that described 5 basic execution units are read can be named as word0, word1, word2, word3, There is same address space in word4, described all word, and be to access simultaneously.After clock T=5, such as scheme In 703, finished because the data of all parity check codes of the 0th row of basic check matrix have been read, now if base The bit node address that the next line of plinth check matrix needs to read must be that lastrow has been updated over, and otherwise just need Treat the time；And in this example, arrange the 1st row element as 5 due to the 0th, it is corresponding now in figure 701 in T=4 clocks Place's renewal is completed, then illustrates that next line can directly reads data and is updated, it is not necessary to the stand-by period.From Fig. 8 examples In, it can be seen that a rule, as long as the bit node Soft Inform ation that the next line of basic check matrix is read is in word0, word1 In word2, then just should not the stand-by period, the rule can be described as：Next line element value subtracts lastrow element value pair The complementation of element 5 is less than or equal to 2, it is possible to meets requirement described above.Similarly, other row in described basic check matrix In, belong to the second dvielement simply by the presence of 2 adjacent elements, then can all have the rule, i.e., whole decoding need not Stand-by period, the example according to Fig. 8, often row renewal can at least save 2 clocks, when can about lift 29% decoding Between, i.e., decoding speed can lift 29%.

By this rule can be enlarged for：In the basic check matrix that the M rows N of structured LDPC code is arranged, meet：If h_cjAnd h_djAll be the second dvielement, then mod (h_dj-h_cj, A) and≤B, wherein, h_cjAnd h_djIt is to be indexed in c rows and d rows respectively For j element value, d=mod (c+1, M), c=0,1 ..., M-1, j=0,1 ..., N-1, and the parameter A be equal to extension because The integer value that sub- Z divided by parameter P are obtained, the parameter B are equal to the value that the parameter A subtracts parameter C acquisitions, wherein, it is described Parameter P is the decoding degree of parallelism in the structured LDPC decoding, and the parameter C is any school in the structured LDPC decoding The proved recipe journey either execution clock number of parity check code or basic execution unit.So structured LDPC code can uses Pipeline system as described above enters row decoding, if the execution clock number of basic execution unit is more and spreading factor Z It is larger, then it is just higher to obtain decoding speed lifting.

Using above-described decoding algorithm structure and pipeline system, 180 Soft Inform ations received are carried out Decoding, the decoding bit sequence that length is (N-M) × Z=120 bits can be obtained.

Example 4

The method proposed in the optional example of the present invention can be used for the 5th Generation Mobile Communication System or other it is wireless and Wired communication system, data transfer direction are that base station sends data (downlink transfer business datum), or data to mobile subscriber Transmission direction is that mobile subscriber sends data (uplink business datum) to base station.Pre-defined by system configuration or system Parameter P, spreading factor Z and parameter C, then parameter A is equal to the integer value, parameter B etc. that spreading factor Z divided by parameter P are obtained The value of the parameter C acquisitions is subtracted in the parameter A.In this reality, the bit length that transmitting terminal needs to send source sequence is 4000 bits, code check 2/3, then receiving terminal receive 6000 length Soft Inform ation carry out decoding output 4000 bits decoding information Sequence.Parameter P=25, spreading factor Z=500 and parameter C=8 are pre-defined by system configuration or system, then it is recognised that Parameter A=Z/P=20, parameter B=A-C=12.The line number of the basic check matrix of structured LDPC code is M=4, columns N =12, so systematic bits length is (N-M) × Z=(12-4) × 500=4000, code length is N × Z=12 × 500=6000.

Need to meet according to the basic check matrix of structured LDPC：If h_cjAnd h_djAll be the second dvielement, then mod (h_dj-h_cj, A) and≤B, wherein, h_cjAnd h_djIt is that index is j element value, d=mod (c+1, M), c in c rows and d rows respectively =0,1 ..., M-1, j=0,1 ..., N-1, the parameter A is a Z positive integer factor, and the parameter B is greater than or equal to 0 and the integer less than A, function mod (x1, x2) represent the remainders that are obtained of integer x1 divided by integer x2.Structuring can be obtained The basic check matrix of LDPC code is as follows：

As can be seen that described basic check matrix meets conditions above.For encoding transmitting terminal, according to the basic school Test matrix and spreading factor Z=500, can to length as described above be (N-M) × Z=4000 bits information source sequence to be encoded Row carry out structured LDPC coding and obtain the LDPC code word sequence that length is N × Z=6000 bits；Or decoded for receiving End, can be according to the basic check matrix and spreading factor Z=500 to data to decode sequence that length is N × Z=6000 Enter row decoding and obtain the decoding bit sequence that length is (N-M) × Z=4000 bits, using the streamline described in similar example 4 Decoding architecture, due between often the going of basic check matrix without waiting for the time, when the stand-by period is C-1=8-1=7 Clock, it is possible to lift decoding speed and then decoding handling capacity can be improved.

Example 5

The method proposed in the optional example of the present invention can be used for the 5th Generation Mobile Communication System or other it is wireless and Wired communication system, data transfer direction are that base station sends data (downlink transfer business datum), or data to mobile subscriber Transmission direction is that mobile subscriber sends data (uplink business datum) to base station.Pre-defined by system configuration or system Parameter P, spreading factor Z and parameter C, then parameter A is equal to the integer value, parameter B etc. that spreading factor Z divided by parameter P are obtained The value of the parameter C acquisitions is subtracted in the parameter A.In this example, the bit length that transmitting terminal needs to send source sequence is 3000 bits, code check 3/4, the LDPC code word for obtaining that length is 4000 bits is encoded by structured LDPC；Then receive termination The Soft Inform ation for receiving 2000 length carries out the decoding information sequence of decoding 1500 bits of output.

Determine basic check matrix and the spreading factor Z=of M=4 rows N=16 row used in structured LDPC coding 250, the basic check matrix includes K0=6 the first dvielements and K1=58 the second dvielements, first dvielement Corresponding to the full null matrix of Z × Z=250 × 250, second dvielement corresponds to the unit matrix ring shift right of Z × Z=250 × 250 The matrix that the corresponding second dvielement value is obtained；Also include：The source basis check matrix of M=4 rows N=16 row row is performed Rearrangement obtains the basic check matrix of M=4 rows N=16 row used in the structured LDPC coding, is obtained after the rearrangement The basic check matrix obtained meets：If h_cjAnd h_djAll be the second dvielement, then mod (h_dj-h_cj, A) and≤B, wherein, h_cjAnd h_djPoint Be not in c rows and d rows index for j element value, d=mod (c+1, M), c=0,1 ..., M-1, j=0,1 ..., N-1, The parameter A is a Z positive integer factor, and the parameter B is greater than or equal to 0 and is less than A integer, function mod (x1, X2 the remainder that integer x1 divided by integer x2 is obtained) is represented；Wherein, the parameter A=25 described in this example, i.e. structured LDPC Code decoding degree of parallelism is P=10；Parameter B=17, the clock number of basic execution unit is C=8.Source basis check matrix is as follows It is described：

By carrying out rearrangement to source basis check matrix, wherein rearrangement vector is [0 23 1], i.e., by source basis school The 0th row for testing matrix is placed on the 0th row, and the 2nd row is placed on the 1st row, and the 3rd row is placed on the 2nd row, and the 1st row is placed on the 3rd row, so as to obtain Basic check matrix after rearrangement as described below：

For sending coding side, encoded using above-described source basis check matrix, there is described basis verification The check part of matrix is strict lower triangular structure, and coding is simple.End is decoded for receiving, as described above reset can be used Basic check matrix afterwards enters row decoding, can be from basic check matrix due to during the decoding of structured LDPC code Any row starts to decode and enters row decoding with random order to be influenceed less for decoding performance, it is possible to using the base reset Plinth check matrix enters row decoding, and the basic check matrix after rearrangement meets above-described condition, then can use such as Pipeline system decoding described in example 4, can improve decoding speed and decoding handling capacity.

Embodiment 4

Embodiments of the invention additionally provide a kind of storage medium.Alternatively, in the present embodiment, above-mentioned storage medium can The program code for performing following steps to be arranged to storage to be used for：

S1, determines basic check matrix and the spreading factor Z of M rows N row, and basic check matrix includes K0 the first dvielements With K1 the second dvielements, the first dvielement corresponds to Z × Z full null matrix, and the second dvielement circulates corresponding to Z × Z unit matrix The matrix that the value of corresponding second dvielement is obtained is moved to right, wherein, the second dvielement includes hcj and hdj, mod (hdj-hcj, A) ≤ B, hcj and hdj are that index is j element value in c rows and d rows respectively, and d=mod (c+1, M), c are less than or equal to M- 1 any nonnegative integer, j are any nonnegative integer less than or equal to N-1, and parameter A is a Z positive integer factor, parameter B It is greater than or equal to 0 and the integer less than A；

S2, structured low density parity check LDPC codings or structure are carried out according to basic check matrix and spreading factor Z Change LDPC decodings, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, and K0+K1 is equal to M × N.

Alternatively, in the present embodiment, above-mentioned storage medium can include but is not limited to：USB flash disk, read-only storage (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, magnetic disc or CD etc. is various can be with the medium of store program codes.

Alternatively, in the present embodiment, processor performs according to the program code stored in storage medium and determines M rows N Basic check matrix and the spreading factor Z of row, basic check matrix include K0 the first dvielements and K1 the second dvielements, the One dvielement corresponds to Z × Z full null matrix, and the second dvielement corresponds to corresponding second dvielement of Z × Z unit matrix ring shift right The matrix that value is obtained, wherein, it is the respectively that the second dvielement, which includes hcj and hdj, mod (hdj-hcj, A)≤B, hcj and hdj, Index is j element value in c rows and d rows, and d=mod (c+1, M), c are any nonnegative integer less than or equal to M-1, and j is Any nonnegative integer less than or equal to N-1, parameter A are a Z positive integer factors, and parameter B is greater than or equal to 0 and is less than A integer；

Alternatively, in the present embodiment, processor is performed according to basis according to the program code stored in storage medium Check matrix and spreading factor Z carry out structured low density parity check LDPC codings or structured LDPC decoding, wherein, M is Integer more than 0, N are greater than M integer, and Z is greater than 0 integer, and K0+K1 is equal to M × N.

Alternatively, the specific example in the present embodiment may be referred to described in above-described embodiment and optional embodiment Example, the present embodiment will not be repeated here.

Obviously, those skilled in the art should be understood that above-mentioned each module of the invention or each step can be with general Computing device realize that they can be concentrated on single computing device, or be distributed in multiple computing devices and formed Network on, alternatively, they can be realized with the program code that computing device can perform, it is thus possible to they are stored Performed in the storage device by computing device, and in some cases, can be with different from shown in order execution herein The step of going out or describing, they are either fabricated to each integrated circuit modules respectively or by multiple modules in them or Step is fabricated to single integrated circuit module to realize.So, the present invention is not restricted to any specific hardware and software combination.

The preferred embodiments of the present invention are the foregoing is only, are not intended to limit the invention, for the skill of this area For art personnel, the present invention can have various modifications and variations.Within the spirit and principles of the invention, that is made any repaiies Change, equivalent substitution, improvement etc., should be included in the scope of the protection.

Claims (28)

1. A kind of 1. processing method of structured LDPC code, it is characterised in that including：

   Determine basic check matrix and the spreading factor Z of M rows N row, the basic check matrix include K0 the first dvielements and K1 the second dvielements, first dvielement correspond to Z × Z full null matrix, and second dvielement corresponds to Z × Z units Battle array ring shift right corresponds to the matrix that the value of second dvielement is obtained, wherein, second dvielement includes h_cjAnd h_dj, The h_cjAnd h_djMeet relational expression mod (h_dj-h_cj, A) and≤B, h_cjAnd h_djIt is that column index all distinguishes c and d for j and line index Element value, d=mod (c+1, M), c are less than or equal to M-1 any nonnegative integer, and j is less than or equal to any non-of N-1 Negative integer, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and the integer less than A；

   Structured low density parity check LDPC codings or structure are carried out according to the basic check matrix and the spreading factor Z Change LDPC decodings, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, and K0+K1 is less than or equal to M ×N。
2. 2. according to the method for claim 1, it is characterised in that the occurrence of first dvielement using null value represent or Person's use -1 represents that the value of second dvielement is greater than or equal to 0 and the integer less than Z.
3. 3. according to the method for claim 1, it is characterised in that the parameter A is obtained equal to spreading factor Z divided by parameter P The integer value obtained, wherein, the parameter P is the decoding degree of parallelism in the structured LDPC decoding, and the decoding degree of parallelism is P Characterizing has P parity check code in the structured LDPC decoding while updates, and the parameter P is positive integer.
4. 4. according to the method for claim 3, it is characterised in that the parameter P chooses one of in the following manner：

   Chosen according to coding side and making an appointment for end of decoding；

   The instruction of the signaling sent according to coding side to decoding end is chosen；

   The instruction of the signaling sent according to decoding end to coding side is chosen；

   Setting is pre-defined according to system to be chosen.
5. 5. according to the method for claim 1, it is characterised in that the parameter B subtracts parameter C equal to the parameter A and obtained Value, wherein, the parameter C is less than the positive integer equal to A.
6. 6. according to the method for claim 5, it is characterised in that the parameter C is any in the structured LDPC decoding The execution clock number of check equations, wherein, the parameter C is less than the positive integer of the parameter A, and the parameter C is by system Configuration or system pre-define.
7. 7. according to the method for claim 1, it is characterised in that the c is one below：

   Element in the set be made up of all even numbers in 0 to M-1；

   The element for the set being made up of all odd numbers in 0 to M-1；

   By all elements at intervals of the set formed more than all integers of the E0 less than E1 in 0 to M-1, wherein E0 is greater than Or it is less than M arbitrary integer equal to 0, E1 is greater than the arbitrary integer that E0 is less than M.
8. 8. according to the method for claim 1, it is characterised in that the parameter A is greater than 1 integer for being less than 30.
9. 9. according to the method for claim 1, it is characterised in that the parameter B is equal to 0.
10. 10. according to the method for claim 1, it is characterised in that determining the basic check matrix of M rows N row includes：

    Rearrangement is performed to the source basis check matrix of M rows N row or element value amendment determines that the basis of the M rows N row verifies Matrix.
11. 11. according to the method for claim 10, it is characterised in that the rearrangement is by source basis check matrix All line index are rearranged, and/or, the element value amendment is by first numerical value progress of source basis check matrix Modification.
12. 12. according to the method described in claim 1 to 11 any one, it is characterised in that according to the basic check matrix and The spreading factor Z, which carries out structured LDPC coding or structured LDPC decoding, to be included：

    Length is compiled for the source sequence to be encoded of (N-M) × Z bit according to the basic check matrix and spreading factor Z Code obtains the LDPC code word sequence that length is N × Z bit；

    Enter row decoding to the data to decode sequence that length is N × Z according to the basic check matrix and spreading factor Z to be grown Spend the decoding bit sequence for (N-M) × Z bit.
13. 13. according to the method described in claim 1 to 11 any one, it is characterised in that the basic check matrix has two kinds Code check threshold value：R0 and R1, wherein, R0 is greater than 0 real number for being less than 1, and R1 is greater than the real number that R0 is less than 1, wherein, the code Rate is corresponded to the code check that all rows and the basic check matrix of all row compositions are supported in the basic check matrix by R0, its In, R0=(N-M)/N；The code check is that R1 corresponds to the 0th~(M2-1) rows and the 0th~(N2-1) in the basic check matrix The code check that the formed first foundation check matrix of row is supported, wherein, R1=(N2-M2)/N2；Wherein, M2 be greater than 0 it is whole Number, N2 are greater than M2 integer.
14. 14. according to the method for claim 13, it is characterised in that according to the basic check matrix and the spreading factor Z carries out structured LDPC coding, obtains structured LDPC code sequence, including one of in the following manner：

    Use the basic check matrix to carry out code check and obtain the second structured LDPC code bit for R0 structured LDPC coding Sequence, the structured LDPC code sequence is obtained by extended method to the second structured LDPC code bit sequence；

    Using the 0th~(M3-1) rows in the basic check matrix and the 0th~(N3-1) row institute composition subbase plinth check matrix Carry out coding and obtain the structured LDPC code sequence, wherein, M3 and N3 are greater than 0 integer, and M3<N3；

    Structured LDPC coding is carried out using the first foundation check matrix and obtains first structure LDPC code bit sequence, institute State a subset sequence that structured LDPC code sequence is the first structure LDPC code bit sequence.
15. 15. according to the method for claim 14, it is characterised in that described to the second structured LDPC code bit sequence The structured LDPC code sequence, including one of in the following manner are obtained by extended method：

    The second structured LDPC code bit sequence is divided into more one's share of expenses for a joint undertaking sequences, and the sub- sequence of F groups is selected from more one's share of expenses for a joint undertaking sequences Row, every group of subsequence comprise at least 2 one's share of expenses for a joint undertaking sequences, and the bit on the correspondence position of all subsequences in every group of subsequence is distinguished Binary system addition is carried out, obtains the first extended bit sequence being made up of F part bit sequences, the second structured LDPC code ratio Structured LDPC code described in a subset Sequence composition of a subset sequence of special sequence and the first extended bit sequence Sequence, wherein, F is greater than 0 integer；

    G times is repeated to the second structured LDPC code bit sequence and obtains the second extended bit sequence, the second extended bit sequence Structured LDPC code sequence described in a subset Sequence composition of row, wherein, G is greater than 1 integer.
16. 16. according to the method for claim 14, it is characterised in that parameter M3 and the N3 satisfaction, (N3-M3)/N3≤R, Wherein, R is the code check of the structured LDPC code sequence, and R is greater than 0 and the real number less than 1.
17. A kind of 17. processing unit of structured LDPC code, it is characterised in that including：

    Determining module, for determining basic check matrix and the spreading factor Z of M rows N row, the basic check matrix includes K0 First dvielement and K1 the second dvielements, first dvielement correspond to Z × Z full null matrix, second dvielement pair The matrix that the value of second dvielement obtained should be corresponded in Z × Z unit matrix ring shift rights, wherein, second dvielement Including h_cjAnd h_dj, the h_cjAnd h_djMeet relational expression mod (h_dj-h_cj, A) and≤B, h_cjAnd h_djIt is that column index is all j and row rope Draw the element value of c and d respectively, d=mod (c+1, M), c are less than or equal to M-1 any nonnegative integer, and j is less than or equal to N-1 any nonnegative integer, the parameter A are a Z positive integer factors, and the parameter B is greater than or equal to 0 and is less than A Integer；

    Processing module, for carrying out structured low density parity check according to the basic check matrix and the spreading factor Z LDPC is encoded or structured LDPC decoding, wherein, M is greater than 0 integer, and N is greater than M integer, and Z is greater than 0 integer, K0 + K1 is less than or equal to M × N.
18. 18. device according to claim 17, it is characterised in that the occurrence of first dvielement is represented using null value Or use -1 represents, the value of second dvielement is greater than or equal to 0 and the integer less than Z.
19. 19. device according to claim 17, it is characterised in that the parameter A is equal to spreading factor Z divided by parameter P institutes The integer value of acquisition, wherein, the parameter P is the decoding degree of parallelism in structured LDPC decoding, the decoding degree of parallelism Being characterized for P has P parity check code in the structured LDPC decoding while updates, and the parameter P is positive integer.
20. 20. device according to claim 17, it is characterised in that the parameter B subtracts parameter C equal to the parameter A and obtained The value obtained, wherein, the parameter C is less than the positive integer equal to A.
21. 21. device according to claim 20, it is characterised in that the parameter C is appointed in the structured LDPC decoding The execution clock number of one check equations, wherein, the parameter C is less than the positive integer of the parameter A, and the parameter C is by being It is under unified central planning to put or system pre-defines.
22. 22. device according to claim 17, it is characterised in that determining the basic check matrix of M rows N row includes：

    Rearrangement is performed to the source basis check matrix of M rows N row or element value amendment determines that the basis of the M rows N row verifies Matrix.
23. 23. device according to claim 22, it is characterised in that the rearrangement is by source basis check matrix All line index are rearranged, and/or, the element value amendment is by first numerical value progress of source basis check matrix Modification.
24. 24. according to the device described in claim 17 to 23 any one, it is characterised in that the processing module includes：

    Coding unit, for being the to be encoded of (N-M) × Z bit to length according to the basic check matrix and spreading factor Z Source sequence carries out coding and obtains the LDPC code word sequence that length is N × Z bit；

    Decoding unit, for the data to decode sequence according to the basic check matrix and spreading factor Z to length for N × Z Enter row decoding and obtain the decoding bit sequence that length is (N-M) × Z bit.
25. 25. device according to claim 19, it is characterised in that the parameter P chooses one of in the following manner：

    Chosen according to coding side and making an appointment for end of decoding；

    The instruction of the signaling sent according to coding side to decoding end is chosen；

    The instruction of the signaling sent according to decoding end to coding side is chosen；

    Setting is pre-defined according to system to be chosen.
26. 26. device according to claim 17, it is characterised in that the c is one below：

    Element in the set be made up of all even numbers in 0 to M-1；

    The element for the set being made up of all odd numbers in 0 to M-1；

    By all elements at intervals of the set formed more than all integers of the E0 less than E1 in 0 to M-1, wherein E0 is greater than Or it is less than M arbitrary integer equal to 0, E1 is greater than the arbitrary integer that E0 is less than M.
27. 27. device according to claim 17, it is characterised in that the parameter A is greater than 1 integer for being less than 30.
28. 28. device according to claim 17, it is characterised in that the parameter B is equal to 0.