CN107680001A - Signal processing system and its double-core exchange method based on double-core embedded type processor - Google Patents
Signal processing system and its double-core exchange method based on double-core embedded type processor Download PDFInfo
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Abstract
The invention discloses the signal processing system based on double-core embedded type processor, it is characterised in that：Including double-core embedded type processor, the double-core embedded type processor includes the first kernel and the second kernel, first kernel uses uCOS operating systems, it is responsible for distribution network failure monitoring and Fault Isolation, second kernel uses (SuSE) Linux OS, is responsible for the solution of the distribution network end product platform with communication function.The present invention can be according to the different analog signal channel of the access different choice of external signal, power supply, independent JTAG debugging interfaces are provided with independent high efficiency switch power supply chip and carry the RTC clock circuit of lithium battery, abundant external communication interface, machine system isolated operation can be departed from, add the using flexible of this core signal process plate, can simultaneously compatible multiple product use.
Description
Technical field
The present invention relates to the application field of power distribution network terminal signal core processing platform, more particularly to based on double-core embedded type
The signal processing system and its double-core exchange method of processor.
Background technology
In the last few years, as the deep construction of intelligent distribution network, the intelligent grid coverage rate in China are gradually lifted, it is contemplated that arrive
The year two thousand twenty realizes all standing.Under the requirement of intelligent grid construction, especially State Grid Corporation of China " securely and reliably, is melted with making
Close efficient " it is technical goal, using demand as guiding, it is detected as ensureing, the increment equipment being mainly directed towards in distribution network construction transformation,
The thinking of flexibility is exchanged according to Overall Design Standards, functional module independent, equipment, preferentially solves Distribution Automation Construction
In the compatibility of a second interface that faces and autgmentability, terminal increase the pressing issues such as function of measuring, telesignalling dithering newly, stage by stage
Promote one or two fusion work of controller switching equipment.The fast development of intelligent grid, it is proposed that new feeder automation on the spot (FA), from
The complicated logic judgment such as reclosing, distributed FA is adapted to, single-phase earthing new algorithm judges that the various earthing modes of power distribution network are (neutral
Point is grounded through great-great-grandfather, neutral by arc extinction coil grounding, isolated neutral etc.) earth fault；All above new development bands
New function, the performance requirement come, it is necessary to have the core processor system platform of high-performance, arithmetic speed faster, highly reliable.
Conventional platform is often by the way of dual processors, and a CPU (DSP) realizes data acquisition process, another CPU
(ARM) communication, data storage are realized, is connected between two CPU by spi bus.The shortcomings that being primarily present be：
1) when using more complicated control function such as distributed intelligence function, network interface of the data by ARM chips is protected
Send out, add data transfer link；
2) support of 1588 accurate time adjustment functions is not fine that DSP sides are relatively difficult to achieve.
3) cost and development amount are larger, troublesome maintenance.
The content of the invention
Based on the deficiencies in the prior art, it is an object of the invention to provide the high speed number based on double-core embedded type processor
Word, analog signal processing, there is powerful disposal ability, high data throughput, height using new isomorphism dual core processor as core
Can work independently core signal processing system and its double-core exchange method of speed storage.
To achieve the above object, the technical scheme is that：
Based on the signal processing system of double-core embedded type processor, including double-core embedded type processor, the double-core insertion
Formula processor includes the first kernel and the second kernel, and first kernel uses uCOS operating systems, is responsible for distribution network failure prison
Control and Fault Isolation, the second kernel use (SuSE) Linux OS, are responsible for the distribution network end product with communication function and put down
The solution of platform.
Further, the double-core embedded type processor is connected with correspondence with foreign country serial ports, external Ethernet interface, USB and connect
Mouth, CAN interface, JAVA debugging interfaces, DRAM/NOR FLASH/SPI Flash memory modules, On-off signal/output module,
One or more of RTC block, house dog monitoring circuit module, temperature detecting module and ADC processing modules module, in addition to
Power module for each module for power supply and for monitoring electric quantity of power supply and the Power Monitoring Unit of warning message can be provided.
Further, two-wire I is used between the temperature detecting module and the double-core embedded type processor2C interface enters
Row data exchange, the temperature of the signal processing system can be detected in real time, be easy to the comprehensive operation conditions for grasping system.
Further, the ADC processing modules are the bit synchronization sampling ADC processing module of 16 tunnel 16, and the ADC processing modules have
There is bipolarity, synchronized sampling, 90dB signal to noise ratio can be achieved.
Further, the power module includes a DC-DC power module, and the DC-DC power module is used to carry outside
The DC5V Power converts of confession be each electricity consumption module needed at least one voltage gradation value, and the simulation of the power module with
Digitally it is provided separately, the mutually isolated setting of power supply of communication power supply and double-core embedded type processor.
The double-core exchange method of signal processing system based on double-core embedded type processor, including：First kernel opens first
It is dynamic, and notify the second startup using interrupt mode；First kernel starts time ＜ 0.2s；Second kernel starts time≤5s.
Further, the double-core embedded type processor uses model ADSP-BF606 double-core embedded type processor,
First kernel loads " configuration information type ", " filling information content ", " determining message length ", passes through function as transmitting terminal
" Push_msg () " gives the L2 SRAM memories that can be used interchangeably, and the second kernel is by function " Pop_msg () " from L2 SRAM
Memory gets " setting the information type to be received ", completes interaction.
Further, before first kernel and second kernel carry out mutual information exchange, need pair
System runs program is resetted, and reset routine is stored in the NOR FLASH memories, and reset routine, which performs, to be included：
1) hardware initialization, the pattern and state of preset I/O port；
2) start guiding, guide real time operating system first, reboot (SuSE) Linux OS；
3) operating system update and fault recovery.
Beneficial effects of the present invention are：The present invention can be according to the different analog signal of the access different choice of external signal
Passage, there is independent high efficiency switch power supply chip to provide power supply, independent JTAG debugging interfaces and carry lithium battery
RTC clock circuit, abundant external communication interface, can depart from machine system isolated operation, add this core signal process plate
Using flexible, can simultaneously compatible multiple product use.
Brief description of the drawings
Fig. 1 is the structured flowchart of the specific embodiment of the invention；
Fig. 2 is the double-core interaction mechanism schematic diagram of the specific embodiment of the invention.
Embodiment
Carried out clearly and completely below with reference to design of the accompanying drawing to the present invention, concrete structure and caused technique effect
Description, to be completely understood by the purpose of the present invention, feature and effect.Obviously, described embodiment is of the invention one
Divide embodiment, rather than whole embodiments, based on embodiments of the invention, those skilled in the art is not paying creative labor
The other embodiment obtained on the premise of dynamic, belongs to the scope of protection of the invention.
As shown in figure 1, the signal processing system based on double-core embedded type processor, including double-core embedded type processor, it is double
Core embeded processor uses uCOS operating systems including the first kernel CORE0 and the second kernel CORE1, the first kernel CORE0,
The task of real-time higher (being less than 0.3mS) is completed, mainly responsible distribution network failure monitoring and Fault Isolation, the second kernel CORE
1 uses (SuSE) Linux OS, completes the not high task of requirement of real-time, main to be responsible for the distribution network with communication function
The solution of end product platform, including complete network and serial data communication, history data store, realize various stipulations and
The functions such as stipulations conversion, terminal webmaster.First kernel CORE 0 and the second kernel CORE 1 uses the shared L2 of full speed in piece
SRAM (256K-BYTE ECC-PROTECTED SRAM) carries out mutual information and exchanged.
Double-core embedded type processor is connected with 4 road correspondence with foreign country serial ports, the external 100M Ethernet interfaces of two-way, 1 road USB and connect
Mouth, 1 road CAN interface, JAVA debugging interfaces, 128M-DRAM/16M-NOR FLASH/4M-SPI Flash memory modules, 32 tunnels
The way switch amount output module of switching input module/29, RTC block, house dog monitoring circuit module, temperature detecting module and 16
One or more of the modules such as the bit synchronization sampling ADC processing module of road 16 module, in addition to the power supply mould for each module for power supply
Block and for monitoring electric quantity of power supply and the Power Monitoring Unit of warning message can be provided.
Two-wire I is used between temperature detecting module and double-core embedded type processor2C interface carries out data exchange, can be real-time
The temperature of the signal processing system is detected, is easy to the comprehensive operation conditions for grasping system.
Power module includes DC-DC power module, and the DC-DC power module is used for the DC5V Power converts for providing outside
For three kinds of voltage gradation values needed for each electricity consumption module, DC5V, DC3.3V, DC2.5V, meet system multiple voltage demand, and
The simulation of the power module with being digitally provided separately, the power supply of communication power supply and double-core embedded type processor is mutually isolated to be set
Put, to reach more preferable signal acquisition, treatment effect.
Power Monitoring Unit, DC5V, DC3.3V, DC2.5V is monitored in real time, when three voltages have exception and off-rating
During scope, system will alert.
ADC processing modules are the bit synchronization sampling ADC processing module of 16 tunnel 16, and the ADC processing modules have bipolarity, synchronous
Sampling, 90dB signal to noise ratio can be achieved, there is optional over-sampling pattern further enhancing SNR performances, reduce code expansion
Exhibition, greatly enhances anti-aliasing ability.
Single JTAG debugging interfaces, using the teaching of the invention it is possible to provide the IEEE 1149.1JTAG test access ports (TAP) of standard, it is double
14Pin interface shapes are arranged, are easy to unified emulator interface to debug.
Double-core embedded type processor uses model ADSP-BF606 double-core embedded type processor, high per core working frequency
Up to 500MHz.There is sufficient memory space inside this processor：148kB L1SRAM memories are (in processor built in per core
Core may have access to), the processor has more parity functions；Up to 256KB L2 SRAM memories, the storage built in per core
Utensil has ECC defencive function dynamic memories controller to provide 16 interfaces, may be connected to single group DDR2 or LPDDRDRAM device,
16 bit macs, two 40 ALU and one 40 device position barrel shifters built in each core；RISC registers and demand model, simplify
Program and provide compiling related technology, support enhanced debugging, tracking and performance monitoring.Each MAC can be held in each cycle
Row one 16 multiplies 16 multiplication, is as a result added in 40 bit accumulators, supports tape symbol and without sign form, rounding-off and full
With.
The double-core exchange method of signal processing system based on double-core embedded type processor includes the first kernel CORE0 first
Start, and the second startup is notified using interrupt mode；CORE0 cores start time ＜ 0.2s in first；Second kernel CORE 1 is opened
Dynamic time≤5s.
As shown in Fig. 2 the first kernel CORE0 as transmitting terminal, load " configuration information type ", " filling information content ",
" determining message length ", the L2 SRAM memories that can be used interchangeably, the second kernel CORE are given by function " Push_msg () "
1 gets " setting the information type to be received " by function " Pop_msg () " from L2 SRAM memories, completes interaction.
Before the first kernel CORE0 and the second kernel CORE 1 carry out mutual information exchange, system need to be transported
Line program is resetted, and reset routine is stored in NOR FLASH memories, and reset routine, which performs, to be included：
1) hardware initialization, the pattern and state of preset I/O port；
2) start guiding, guide real time operating system first, reboot (SuSE) Linux OS；
3) operating system update and fault recovery.
It should be noted that simply presently preferred embodiments of the present invention described above, the invention is not limited in above-mentioned
Embodiment, as long as it reaches the technique effect of the present invention with identical means, it should all belong to protection scope of the present invention.
Claims (8)
1. the signal processing system based on double-core embedded type processor, it is characterised in that：It is described including double-core embedded type processor
Double-core embedded type processor includes the first kernel and the second kernel, and first kernel uses uCOS operating systems, is responsible for distribution
Net failure monitoring and Fault Isolation, the second kernel use (SuSE) Linux OS, and it is whole to be responsible for the distribution network with communication function
Hold the solution of product platform.
2. the signal processing system as claimed in claim 1 based on double-core embedded type processor, it is characterised in that：The double-core
Embeded processor be connected with correspondence with foreign country serial ports, external Ethernet interface, USB interface, CAN interface, JAVA debugging interfaces,
DRAM/NORFLASH/SPI Flash memory modules, On-off signal/output module, RTC block, house dog monitoring circuit mould
One or more of block, temperature detecting module and ADC processing modules module, in addition to for each module for power supply power module and
For monitoring electric quantity of power supply and the Power Monitoring Unit of warning message can be provided.
3. the signal processing system as claimed in claim 2 based on double-core embedded type processor, it is characterised in that：The temperature
Two-wire I is used between detection module and the double-core embedded type processor2C interface carries out data exchange, can detect the letter in real time
The temperature of number processing system, it is easy to the comprehensive operation conditions for grasping system.
4. the signal processing system as claimed in claim 2 based on double-core embedded type processor, it is characterised in that：The ADC
Processing module is the bit synchronization sampling ADC processing module of 16 tunnel 16, and the ADC processing modules have bipolarity, synchronized sampling, can be achieved
90dB signal to noise ratio.
5. the signal processing system as claimed in claim 2 based on double-core embedded type processor, it is characterised in that：The power supply
Module includes a DC-DC power module, and it is each electricity consumption mould that the DC-DC power module, which is used for the DC5V Power converts that outside provides,
At least one voltage gradation value needed for block, and the simulation of the power module with being digitally provided separately, communication power supply with
The mutually isolated setting of power supply of double-core embedded type processor.
6. the double-core exchange method of the signal processing system as claimed in claim 2 based on double-core embedded type processor, it is special
Sign is to include：First kernel starts first, and notifies the second startup using interrupt mode；First kernel starts time ＜
0.2s；Second kernel starts time≤5s.
7. the double-core exchange method of the signal processing system as claimed in claim 6 based on double-core embedded type processor, it is special
Sign is：The double-core embedded type processor uses model ADSP-BF606 double-core embedded type processor, and the first kernel is made
For transmitting terminal, " configuration information type ", " filling information content ", " determining message length " are loaded, passes through function " Push_msg
() " gives the L2SRAM memories that can be used interchangeably, and the second kernel is got by function " Pop_msg () " from L2SRAM memories
" setting the information type to be received ", completes interaction.
8. the double-core exchange method of the signal processing system as claimed in claim 7 based on double-core embedded type processor, it is special
Sign is：, need to be to system operation journey before first kernel and second kernel carry out mutual information exchange
Sequence is resetted, and reset routine is stored in the NOR FLASH memories, and reset routine, which performs, to be included：
1) hardware initialization, the pattern and state of preset I/O port；
2) start guiding, guide real time operating system first, reboot (SuSE) Linux OS；
3) operating system update and fault recovery.
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| CN201710648776.8A CN107680001A (en) | 2017-08-01 | 2017-08-01 | Signal processing system and its double-core exchange method based on double-core embedded type processor |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN109150924A (en) * | 2018-11-07 | 2019-01-04 | 国网辽宁省电力有限公司经济技术研究院 | A kind of portable power distribution net grid structure information inquiry terminal |
| CN111208388A (en) * | 2020-02-25 | 2020-05-29 | 江苏科技大学 | Ship insulation monitoring and fault positioning embedded device |
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| US20100153700A1 (en) * | 2008-12-16 | 2010-06-17 | International Business Machines Corporation | Multicore Processor And Method Of Use That Configures Core Functions Based On Executing Instructions |
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| CN109150924A (en) * | 2018-11-07 | 2019-01-04 | 国网辽宁省电力有限公司经济技术研究院 | A kind of portable power distribution net grid structure information inquiry terminal |
| CN109150924B (en) * | 2018-11-07 | 2023-12-05 | 国网辽宁省电力有限公司经济技术研究院 | Portable grid structure information query terminal for power distribution network |
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