CN107402346A - circuit board testing system - Google Patents
circuit board testing system Download PDFInfo
- Publication number
- CN107402346A CN107402346A CN201610339697.4A CN201610339697A CN107402346A CN 107402346 A CN107402346 A CN 107402346A CN 201610339697 A CN201610339697 A CN 201610339697A CN 107402346 A CN107402346 A CN 107402346A
- Authority
- CN
- China
- Prior art keywords
- test
- circuit board
- testing system
- ammeter
- point
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2832—Specific tests of electronic circuits not provided for elsewhere
- G01R31/2836—Fault-finding or characterising
- G01R31/2843—In-circuit-testing
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/90—Details of database functions independent of the retrieved data types
- G06F16/903—Querying
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F16/00—Information retrieval; Database structures therefor; File system structures therefor
- G06F16/90—Details of database functions independent of the retrieved data types
- G06F16/903—Querying
- G06F16/9038—Presentation of query results
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- Engineering & Computer Science (AREA)
- Databases & Information Systems (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computational Linguistics (AREA)
- Data Mining & Analysis (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
The present invention provides a kind of circuit board testing system, including a host computer and the ammeter for being electrically connected to the host computer.One test program is set in host computer and the test program is in the test interface of a screen display one of the host computer.When user inputs the circuit board numbering of a circuit board in the test interface, the test program in the test interface show to should circuit board an at least test point title, and when the ammeter transmits an electrical numerical value to host computer of the test point by the electrical records of values in a test result record sheet.The present invention do not need tool can writing circuit plate automatically test result.
Description
Technical field
The present invention relates to a kind of test system, more particularly to a kind of test system of circuit board.
Background technology
, it is necessary to test the circuit board in electronic product in the manufacturing process of electronic product.Survey
The project of examination is then depending on the requirement of foundation client.In general, client can be specified to several on circuit board
Individual region carries out the measurement of resistance value or magnitude of voltage.According to measured resistance value or magnitude of voltage whether position
In in predetermined specification limit, and decision circuitry plate whether normal operation.
In the prior art, factory can be first for the pre- location survey on the circuit board and circuit board to be measured
Pilot makes measurement jig.Circuit board is tested using tool and obtains the test result of circuit board
Data.
However, in the case of reality, in the case where having determined circuit board test point, still have
Possible temporary needs is further added by other test points.Now just need to make for newly-increased test point
New tool.However, the making of tool usually requires time of two to three days, cause to meet pre-
The problem of fixed test time-histories.Now just need to measure newly-increased survey with ammeter manually by operator
Resistance/magnitude of voltage of pilot, then manually record obtained numerical value and voluntarily judge whether up to specification.
Using manual measurement and record the mode of test result not only efficiency is bad, and easily because artificial
The careless mistake of operation and produce mistake record.Therefore a kind of test system of novel circuit board is needed
Solves problem of the prior art.
The content of the invention
The main object of the present invention provide it is a kind of do not need tool can writing circuit plate automatically test
As a result circuit board testing system.
A kind of circuit board testing system is provided in presently preferred embodiments of the present invention, including:One computer master
Machine, including a circuit board specification table and a survey formula program, wherein the circuit board specification table include an electricity
Road plate numbering, to should circuit board numbering an at least test point title and to should test point title
A specification limit;One screen, be electrically connected at the host computer, to show a test interface and
The test interface is produced by the test program, and wherein the test interface includes a circuit board numbering field;
One ammeter, the host computer is electrically connected at, to measure at least test point on a circuit board
Electrical numerical value;Wherein, when circuit board numbering is transfused to the circuit board numbering field, the test connects
Mouthful display to should circuit board numbering the test point title, and transmit the test point in the ammeter
During one electrical numerical value to the host computer, the test program is by the electrical records of values in a test result
Record sheet.
Brief description of the drawings
Fig. 1 is the schematic diagram of circuit board testing system of the present invention.
Fig. 2 is the embodiment schematic diagram using a circuit board of test system of the present invention.
Fig. 3 is an embodiment schematic diagram of test result record sheet of the present invention.
Fig. 4 A-4D are test interfaces of the present invention in an embodiment schematic diagram of the picture of test process.
Description of reference numerals:
The two-dimensional bar code field of 10 host computer 61
The circuit board of 20 screen 70
The two-dimensional bar code of 30 ammeter 71
The test result record sheet of 40 probe 80
50 test program TP1-TP6 test points
60 test interface A, B, C, D, E test result record sheet fields
Embodiment
It refer to Fig. 1 and Fig. 2.Fig. 1 is the preferred embodiment signal of circuit board testing system of the present invention
Figure.Fig. 2 is the embodiment schematic diagram using the circuit board of test system of the present invention.Fig. 1 displays are originally
Invention system includes a host computer 10, a screen 20 and an ammeter 30.Host computer 10 is set
There is a test program 50 and test program 50 shows a test interface 60 in screen 20.Probe 40 is then
It is connected to ammeter 30.Circuit board 70 has multiple electronic components and configuration.In Fig. 2 circuit boards
70 have preset 6 test point TP1-TP6.Fig. 2 also show circuit board 70 by attaching two-dimensional bar code
71 as the circuit board 70 Ref. No..
Ammeter 30 is measuring the electrical numerical value of each test point, such as resistance value or magnitude of voltage.It will visit
Pin 40 contacts resistance/magnitude of voltage that the test point can be shown in ammeter 30 with test point.Ammeter 30
Host computer 10 is electrically connected at so as to which the numerical value of the test point obtained is sent into host computer 10.
Test interface 60 has a circuit board numbering field 61.
It refer to Fig. 3 and Fig. 4 A-4D.Fig. 3 shows an embodiment of test result record sheet of the present invention
Schematic diagram.Fig. 3 test result record sheet 80 includes a numbering field A, test result field B,
Test point title field C, the testing time D of circuit board and test the time that the circuit board is spent
E.The two-dimensional bar code of numbering field A writing circuit plates.Test result field B have recorded each test
The specification limit of the magnitude of voltage of point, that is, the higher limit and lower limit of magnitude of voltage.The numerical value of test point falls
The person between higher limit and lower limit, test result are by testing (PASS).If numerical value is not in the upper limit
Person between value and lower limit, test result is by not testing (FAIL).Testing time, field D was then used
The time being tested with writing circuit plate, to inquire about in the future.And test and spend time field E then to remember
Record the tested speed completed the spent time, can be used to assessment test of circuit board.
Describe the operating method of this case circuit board testing system in detail below by way of Fig. 4 A-4D.First,
Test interface 60 shows a two-dimensional bar code field 61, as shown in Figure 4 A.Operator is by circuit board 70
Two-dimensional bar code input two-dimensional bar code field 61.Host computer 10 has a circuit board database, in this
The two-dimensional bar code of multiple circuit boards to be tested and the test point of corresponding each circuit board are stored in database
The circuit layout data of title and correlation.The program 50 of host computer 10 is according to the circuit board database
And operator input circuit board two-dimensional bar code and in the test of the display circuit board 70 of test interface 60
The title of point.In Fig. 4 B by taking test point TP1 as an example.Then, operator is aobvious to test interface 60
The test point TP1 shown is measured.That is, operator is by the probe 40 of ammeter 30 and circuit board 70
Test point TP1 contacts, therefore obtain test point TP1 electrical numerical value, such as magnitude of voltage.The electricity
Pressure value is sent to host computer 10 by ammeter 30.Test program 50 then judges that the numerical value of ammeter transmission is
It is no to fall into specification limit.In this deterministic process, test interface 60 is shown " test in " message,
There is provided operator current testing progress message.Special instruction, in a preferred embodiment, journey
Sequence 50 starts timing when the two-dimensional bar code of operator input circuit plate, if in a scheduled time length
The numerical value of the test point transmitted from ammeter 30 is not received, then program 50 will be shown " do not pass through test "
Message.When being set at the numerical value for preventing ammeter from can not measure test point of this timing, such as because survey
Pilot is not formed with the circuit of circuit board because of failure welding and and turned on, operator will not sky etc. always, and
It can pinpoint the problems immediately.
When test point TP1 magnitude of voltage is fallen within specification limit, test program 50 is in test interface
60 display test point TP1 magnitude of voltage and " passing through test " message, as shown in Figure 4 C.Certainly,
If test point TP1 magnitude of voltage is not fallen within specification limit, test program 50, which will be shown, " not to be passed through
Test " message, as shown in Figure 4 D.As discussed previously with respect to Fig. 3 explanation, during test, survey
The two-dimensional bar code of tested circuit board 70 is recorded in the column of test result record sheet 80 by examination program 50
Position A, the magnitude of voltage for surveying formula point TP1 is recorded in field C, and during the test of writing circuit plate 70
Between and this time test spent time.The testing process of remaining test point of circuit board 70 and test
Point TP1 is identical, is repeated no more in this.
In other words, during test, operator only need to be in the two dimension of test interface input circuit plate
Bar code, it can be learnt in test interface by tested test point title.Then only need to be by the spy of ammeter
Pin engaged test point, ammeter are the numerical value of measurable test point and are sent to host computer.Host computer
Test program can actively record the numerical value of test point and automatic decision tests whether to pass through.In addition, journey
Sequence also actively records the numerical value of each test point, the result of test, the time of test and spent when
Between.That is, in the case where not needing tool, operator only needs the two-dimensional bar code of input circuit plate
And the information shown according to test interface carries out the measurement of number of test points evidence, you can is actively produced by program
Test result record sheet, without by being manually made whether the numerical value by testing and recording correlation.
Therefore the efficiency of increase circuit board testing is improved.
Presently preferred embodiments of the present invention is the foregoing is only, is not limited to the claim of the present invention,
Therefore it is all other without departing from the lower equivalent change or modification completed of spirit disclosed in this invention, all should
It is contained in the claim of this case.
Claims (9)
1. a kind of circuit board testing system, including:
One host computer, including a circuit board specification table and a survey formula program, wherein the circuit plate gauge
Lattice table includes circuit board numbering, to should circuit board numbering an at least test point title and correspondingly
One specification limit of the test point title;
One screen, the host computer is electrically connected at, to show a test interface and the test interface
Produced by the test program, wherein the test interface includes a circuit board numbering field;And
One ammeter, the host computer is electrically connected at, to measure at least one test on a circuit board
The electrical numerical value of point;Wherein, when circuit board numbering is transfused to the circuit board numbering field, the survey
Mouth of trying show to should circuit board numbering the test point title, and transmit the test in the ammeter
During an electrical numerical value to host computer of point, the test program is by the electrical records of values in a test
As a result record sheet.
2. circuit board testing system as claimed in claim 1, the wherein electrical numerical value are resistance value or voltage
Value.
3. circuit board testing system as claimed in claim 1, wherein the survey formula program are in the reception circuit board
After numbering, the test point title is shown in the test interface.
4. circuit board testing system as claimed in claim 1, the wherein test program are numbered in the circuit board
Start one scheduled time of timing length when being transfused to the circuit board numbering field, when test program is pre- in this
When not receiving the ammeter in length of fixing time and transmitting the electrical numerical value of the test point, connect in the survey formula
Mouth display one is not by testing message.
5. circuit board testing system as claimed in claim 1, wherein the test result record sheet also include note
Record the circuit board numbering, an at least test point, this at least the test result of a test point and this extremely
One testing time of a few test point.
6. circuit board testing system as claimed in claim 5, the wherein test result be by test or not
Pass through test.
7. circuit board testing system as claimed in claim 6, the wherein test program transmit in the ammeter
When the electrical numerical value of the test point is located in the specification limit, show that one passes through survey in the test interface
Examination message is simultaneously recorded in the test result record sheet, and the electricity of the test point in ammeter transmission
When property value bit is not in the specification limit, one is shown not by testing message and remembering in the test interface
Record in the test result record sheet.
8. circuit board testing system as claimed in claim 1, the wherein test program are in reception, the ammeter passes
During the electrical numerical value for the test point sent, the electrical numerical value is shown in the test interface.
9. circuit board testing system as claimed in claim 1, the wherein circuit board numbering are a two-dimensional bar codes.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610339697.4A CN107402346A (en) | 2016-05-20 | 2016-05-20 | circuit board testing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201610339697.4A CN107402346A (en) | 2016-05-20 | 2016-05-20 | circuit board testing system |
Publications (1)
Publication Number | Publication Date |
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CN107402346A true CN107402346A (en) | 2017-11-28 |
Family
ID=60389214
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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CN201610339697.4A Pending CN107402346A (en) | 2016-05-20 | 2016-05-20 | circuit board testing system |
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CN (1) | CN107402346A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110473797A (en) * | 2019-07-08 | 2019-11-19 | 盐城华旭光电技术有限公司 | The inspection system and method for conductor integrated circuit device |
CN113030692A (en) * | 2019-12-09 | 2021-06-25 | 新唐科技股份有限公司 | Test system and test method |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101571569A (en) * | 2008-04-29 | 2009-11-04 | 光纤电脑科技股份有限公司 | Element detection system and method thereof |
CN101769986A (en) * | 2009-01-06 | 2010-07-07 | 名硕电脑(苏州)有限公司 | Test device and test method thereof |
US20110113298A1 (en) * | 2009-11-10 | 2011-05-12 | Van Den Eijnden Petrus Marinus Cornelis Maria | Method of and an arrangement for testing connections on a printed circuit board |
CN102590730A (en) * | 2012-01-16 | 2012-07-18 | 中冶南方(武汉)自动化有限公司 | Modularized open PCBA (Printed Circuit Board Assembly) functional circuit test platform, system and method |
CN203981835U (en) * | 2014-07-04 | 2014-12-03 | 深圳市普兰电子技术有限公司 | A kind of Portable Automatic testing apparatus that is applicable to PCBA test |
CN104730446A (en) * | 2013-12-19 | 2015-06-24 | 致伸科技股份有限公司 | Circuit board test system |
-
2016
- 2016-05-20 CN CN201610339697.4A patent/CN107402346A/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101571569A (en) * | 2008-04-29 | 2009-11-04 | 光纤电脑科技股份有限公司 | Element detection system and method thereof |
CN101769986A (en) * | 2009-01-06 | 2010-07-07 | 名硕电脑(苏州)有限公司 | Test device and test method thereof |
US20110113298A1 (en) * | 2009-11-10 | 2011-05-12 | Van Den Eijnden Petrus Marinus Cornelis Maria | Method of and an arrangement for testing connections on a printed circuit board |
CN102590730A (en) * | 2012-01-16 | 2012-07-18 | 中冶南方(武汉)自动化有限公司 | Modularized open PCBA (Printed Circuit Board Assembly) functional circuit test platform, system and method |
CN104730446A (en) * | 2013-12-19 | 2015-06-24 | 致伸科技股份有限公司 | Circuit board test system |
CN203981835U (en) * | 2014-07-04 | 2014-12-03 | 深圳市普兰电子技术有限公司 | A kind of Portable Automatic testing apparatus that is applicable to PCBA test |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110473797A (en) * | 2019-07-08 | 2019-11-19 | 盐城华旭光电技术有限公司 | The inspection system and method for conductor integrated circuit device |
CN113030692A (en) * | 2019-12-09 | 2021-06-25 | 新唐科技股份有限公司 | Test system and test method |
CN113030692B (en) * | 2019-12-09 | 2024-04-09 | 新唐科技股份有限公司 | Test system and test method |
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