CN106997910B - P-type crystal silicon back contacts double-side cell structure and production method without front gate line - Google Patents
P-type crystal silicon back contacts double-side cell structure and production method without front gate line Download PDFInfo
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 147
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 145
- 239000010703 silicon Substances 0.000 title claims abstract description 145
- 239000013078 crystal Substances 0.000 title claims abstract description 78
- 238000004519 manufacturing process Methods 0.000 title abstract description 28
- 238000000034 method Methods 0.000 claims abstract description 55
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- 229910052709 silver Inorganic materials 0.000 claims abstract description 32
- 239000004332 silver Substances 0.000 claims abstract description 32
- 239000011148 porous material Substances 0.000 claims abstract description 29
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 24
- PNEYBMLMFCGWSK-UHFFFAOYSA-N Alumina Chemical group [O-2].[O-2].[O-2].[Al+3].[Al+3] PNEYBMLMFCGWSK-UHFFFAOYSA-N 0.000 claims description 21
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical group N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 18
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- 238000001020 plasma etching Methods 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 5
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 4
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- 206010037660 Pyrexia Diseases 0.000 claims description 3
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 3
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- 229910010271 silicon carbide Inorganic materials 0.000 claims description 3
- OGIDPMRJRNCKJF-UHFFFAOYSA-N titanium oxide Inorganic materials [Ti]=O OGIDPMRJRNCKJF-UHFFFAOYSA-N 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910003978 SiClx Inorganic materials 0.000 claims description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 2
- 230000003197 catalytic effect Effects 0.000 claims description 2
- 239000006258 conductive agent Substances 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
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- 238000005245 sintering Methods 0.000 description 2
- 210000002268 wool Anatomy 0.000 description 2
- 229910019213 POCl3 Inorganic materials 0.000 description 1
- KMWBBMXGHHLDKL-UHFFFAOYSA-N [AlH3].[Si] Chemical compound [AlH3].[Si] KMWBBMXGHHLDKL-UHFFFAOYSA-N 0.000 description 1
- PKKAOXZTGMDCJV-UHFFFAOYSA-N [P].[Si].[P] Chemical group [P].[Si].[P] PKKAOXZTGMDCJV-UHFFFAOYSA-N 0.000 description 1
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- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical compound [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
- H01L31/02245—Electrode arrangements specially adapted for back-contact solar cells for metallisation wrap-through [MWT] type solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
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Abstract
The invention discloses the P-type crystal silicon back contacts double-side cell structures and production method of a kind of no front gate line, transparent conductive film is located on front passivating film and antireflective coating, the pore electrod excessively for connecting battery front side and back side cathode is provided in the through-hole of P-type crystal silicon on piece, the surface layer of N-type layer is equipped with the local heavy doping N+ areas by regular figure distribution, transparent conductive film penetrates antireflective coating and front passivating film and local heavy doping N+ areas and crosses the top electrical contact composition battery cathode of pore electrod, transparent conductive film is used for the back side for passing through pore electrod and be directed at battery the electronics that battery front side collects, the just superfine grid line in the back side penetrates the first backside passivation film and the second backside passivation film and forms local Ohmic contact with p-type matrix, and it links together with back side anode main gate line and forms anode.Light this method avoids anode blocks, and increases power output, reduces the consumption of silver paste in cell fabrication processes, reduces production cost.
Description
Technical field
The invention belongs to technical field of solar batteries, more particularly to a kind of P-type crystal silicon back contacts of no front gate line
Double-side cell structure and production method.
Background technology
From first piece of solar cell in 1954 since AT＆T Labs is born, crystal silicon solar energy battery has obtained extensively
General application, transfer efficiency are constantly promoted, and production cost continues to decline.At present, crystal silicon solar energy battery accounts for solar cell
More than 90% overall global market, the producing line transfer efficiency of crystalline silicon battery plate have broken through 21% at present, and global year is newly equipped with
Machine capacity about 70GW and speedup is apparent, constantly reduces with the degree electricity cost of thermal power generation, is expected to maintain an equal level therewith in the coming years.It is brilliant
Body silicon solar cell as a kind of clean energy resource environmental pressure etc. of restructuring the use of energy, alleviate important function increasingly
It highlights.
P-type crystal silicon battery due to mature production technology, manufacture it is at low cost, at present and from now on for quite a long time
Inside still occupy most market shares.P-type crystal silicon solar cell to continue keep competitiveness, obtain bigger development
With application, it is necessary to further improve transfer efficiency, while reduce production cost.
PERC technologies are conceived to the back side of battery, the recombination velocity at the back side are greatly reduced using passivation, the technology is in recent years
Large-scale application is gradually obtained in P-type crystal silicon battery, so that the efficiency of polycrystalline and single crystal battery is promoted 0.5% He respectively
More than 1%.As the improvement to P-type crystal silicon PERC batteries, have replace the full aluminium layer at the back side with thin alum gate line at present, make electricity
Pond has the function of generating electricity on two sides.Although PERC technologies greatly improve the back side performance of battery, to the front of battery
Without significantly improving, the especially front electrode of battery, if it is main at present formed using silk-screen printing by the way of nearly hundred thin grid with
Dry main grid, this process cause the area on cell piece surface 5%~7% to be formed to block light, make p-type PERC double-side cells
Odds for effectiveness fails to give full play to.
What MWT battery technology mainly solved is the light occlusion issue of battery front side, is punched on silicon chip, utilized pore electrod
The electric current that positive thin grid line is collected is directed to the back side of battery.Although MWT battery technology reduces battery front side primary gate electrode
Light shielded area, but the thin grid line of battery front side still has about 3% light shielded area, and thin grid line is usually expensive silver,
It is unfavorable for the cost of manufacture for reducing cell piece.In addition the electrical leakage problems of MWT battery fail to solve very well.Problem above causes
MWT does not obtain large-scale application always as the core technology for improving battery front side.
Invention content
In view of the above-mentioned deficiencies in the prior art, the technical problem to be solved by the present invention is that provide a kind of no front
The P-type crystal silicon back contacts double-side cell structure and production method of grid line, the battery combine P-type crystal silicon the back of the body passivation it is two-sided and
Metal electrode winding technique, and a kind of new electrode structure is devised in battery front side, solve well front gate line block,
The problems such as back side is leaked electricity.
The present invention uses following technical scheme：
A kind of P-type crystal silicon back contacts double-side cell structure of no front gate line, P-type crystal silicon chip wrap successively from top to down
It includes：Transparent conductive film, antireflective coating, front passivating film, N-type layer, p-type matrix, backside passivation film, the just superfine grid line in the back side and the back of the body
Face anode main gate line, the P-type crystal silicon on piece are equipped with through-hole, be provided in the through-hole for connect battery front side cathode and
Back side cathode crosses pore electrod, and the surface layer of the N-type layer is equipped with the local heavy doping N+ areas by regular figure distribution, described transparent
Conductive film penetrates the antireflective coating and front passivating film and the local heavy doping N+ areas and the top electrical contact for crossing pore electrod
Battery cathode is formed, the transparent conductive film is used to the electronics that battery front side collects being directed at battery by the pore electrod of crossing
The back side, the backside passivation film include the first backside passivation film and the second backside passivation film, and the just superfine grid line in the back side penetrates
First backside passivation film and the second backside passivation film and the p-type matrix form local Ohmic contact, and with back side anode
Main gate line, which links together, forms anode.
Further, the hole size is identical, and the P-type crystal silicon chip is penetrated through in thickness direction, wait the row such as line-spacings away from
Array arrangement, a diameter of 100~500um of the single through-hole, quantity are 4 × 4~10 × 10.
Further, the just superfine grid line in the back side be one or more groups of line segments being mutually parallel, the length of the line segment
For 10~80mm, width is 30~300um, and the spacing between two neighboring line segment is 1~4mm.
Further, the just superfine grid line in the back side is aluminium, silver, copper, nickel, conductive agent or metal alloy.
Further, part heavy doping N+ area's array arrangements are in the N-type layer, the part heavy doping N+ areas
Sheet resistance is 20~60 Ω/, and the array pattern in the part heavy doping N+ areas is kind one-dimensional figure, X-Y scheme or kind one-dimensional figure
The combination of shape and X-Y scheme.
Further, the kind one-dimensional figure is line segment, phantom line segments, camber line or grid line shape；The line of the kind one-dimensional figure
Width is 20~200um, and length is 0.05~1.5mm；It is 0.5~2mm with linear spacing two neighboring in a line, in same row
Two neighboring linear spacing is 0.5~2mm；
The X-Y scheme is circle, ellipse, spindle, annular, polygon, polygonal or sector, the two dimension are several
The size of what figure is 20~200um, and two neighboring centre of figure is away from for 0.5~2mm.
Further, the thickness of the transparent conductive film is 50~500nm；The thickness of the antireflective coating for 50~
100nm；The thickness of the front passivating film is 5~50nm, and the thickness of first backside passivation film is 5~40nm；Described
The thickness of two backside passivation films is 50~150nm.
Further, the back side anode main gate line is mutually parallel and equidistantly arranges, and with the just superfine grid in the back side
Line intersects vertically, and the number of the back side anode main gate line is 3~15, and the width of the single back side anode main gate line is
0.5~5mm.
Further, the P-type crystal silicon chip is monocrystalline or polycrystalline boron-doping, gallium, a kind of more or multiple element silicon of aluminium
Piece, the thickness of the P-type crystal silicon chip is 90~190um.
A kind of method of P-type crystal silicon back contacts double-side cell structure for preparing no front gate line, includes the following steps：
S1, the through-hole for being formed several same sizes using laser in P-type crystal silicon on piece, the through-hole are passed through in thickness direction
Lead to the P-type crystal silicon chip, wait the row such as line-spacings away from array arrangement；
S2, using chemical liquid burn into plasma etching, metal catalytic or laser etching method to the P-type crystal silicon
Piece carries out surface-texturing processing；
S3, it is spread using low pressure, normal pressure diffusion, ion implanting, laser doping or impurity slurry coating method progress phosphorus doping
Processing, forms N-type layer, dopant POCl on the front of the P-type crystal silicon chip and through-hole wall surface layer3、PH3Or phosphorus slurry；
S4, erosion or dopant local coating process are anti-carved using laser doping, secondary thermal diffusion, local ion implanting, mask
Local heavy doping is formed in the front of the P-type wafer, the figure of the heavy doping is kind one-dimensional figure, X-Y scheme or class one
Tie up the combination of figure and X-Y scheme；
S5, paraffin mask is made in the through-hole and neighboring area using spraying or print process, protects hole wall and positive face
The doped layer of neighboring area；
S6, be etched away using wet etching or dry etching the positive phosphorosilicate glass of the P-type crystal silicon chip, the back of the body knot and
Mask；
S7, the P-type crystal silicon chip after etching is made annealing treatment in the lehr, in the P-type crystal silicon chip
Surface grow one layer of fine and close thermal oxidation silicon, while the foreign atom of doped layer is redistributed；
S8, the front passivating film of 5~50nm and subtracting for 50~100nm are successively deposited in the front of the P-type crystal silicon chip
Reflectance coating, in the backside passivation film of 5~150nm of backside deposition of the P-type wafer, the front passivating film is silicon nitride, oxygen
One or more laminations in SiClx, silicon oxynitride, non-crystalline silicon are formed, and the antireflective coating is silicon nitride, silica, nitrogen oxidation
One or more laminations in silicon, titanium oxide, silicon carbide are formed, and the backside passivation film includes the first backside passivation film and second
Backside passivation film, first backside passivation film is aluminium oxide, one or more pellicular cascades of silica, amorphous silicon membrane,
Second backside passivation film is silicon nitride, one or more pellicular cascades of silica, silicon oxynitride silicon thin film；
S9, film is carried out out by the heavy doping figure described in step S4 in the front of the P-type crystal silicon chip using laser；
Film is carried out out in the backside passivation film of the P-type crystal silicon chip, opens film pattern as one or more groups of line segments being mutually parallel, it is long
It spends for 10~80mm, width is 30~300um, and the spacing between two neighboring line segment is 1~4mm；
S10, first silk-screen printing or electro-plating method is assisted overleaf to make pore electrod using vacuum, via slurry fills up whole
A through-hole, via slurry are the silver paste that performance is worn without burn-through performance or low fever, are dried later；Then using silk-screen printing, spray printing,
Plating or sputtering method make several back side anode main gate line electricity for being mutually parallel and equidistantly arranging at the back side of the P-type wafer
Pole, slurry are silver paste or silver/aluminium paste, are dried later；Finally using silk-screen printing, spray printing, plating or sputtering method in p-type crystalline substance
The back side of body silicon chip opens film figure by laser and makes the just superfine grid line in the back side, and slurry is aluminium paste or silver/aluminium paste, is dried later, is made
Make battery electrode；
S11, it is heat-treated at 300~900 DEG C, the just superfine grid line in the back side is made to form ohm with p-type matrix and is connect
It touches, while is welded together with the back side anode main gate line, form the anode of battery, while via slurry is through Overheating Treatment,
Formed pore electrod；
S12, on the positive antireflective coating of the P-type crystal silicon chip, passivating film using sputtering, vapor deposition, 3D printing,
Printing or spraying process make front transparent conductive film, and the transparent conductive film is ito thin film, AZO films, GZO films, FTO
One or more laminations in film, IWO films and graphene film are formed, the transparent conductive film and part heavy doping N+ areas
And the electrical contact of via electrode tip forms the cathode of battery.
Compared with prior art, the present invention at least has the advantages that：
Double-side cell structure of the present invention is the two-dimentional combination electrode that local heavy doping/transparent conductive film is formed, and part is heavily doped
Miscellaneous region by specific array figure be arranged in the front side emitter of battery extremely on, for collecting electronics, transparent conductive film is located at passivation
On film, antireflective coating, in regional area, transparent conductive film penetrates antireflective coating and passivating film and local heavily doped region and via
Electrode contacts, and the electronics that local heavily doped region is collected from silicon substrate was pooled to pore electrod by transparent conductive film, converges
The electronics of collection is directed at the battery cathode of cell backside by crossing pore electrod again, by its PERC battery two-sided with P-type crystal silicon and MWT
Battery technology is combined, and forms a kind of P-type crystal silicon back contacts double-side cell of no front gate line.The novel battery is not only complete
The full light for avoiding front metal electrode blocks, and electrode roll can also be prevented by the passivating film at the back side around rear electric leakage, can be notable
The transfer efficiency of P-type crystal silicon battery is promoted, and reduces the consumption of silver paste in cell fabrication processes, reduces production cost.
Further, expensive silver paste is saved using local heavy doping, makes the Material Cost of battery reduce；Setting
The light that transparent conductive film eliminates front gate line blocks, and increases power output；Due to the presence of local front court, it is more advantageous to electricity
Son is collected, and reduces the compound of photo-generated carrier.
Further, on the one hand the passivating film at the back side plays P-type silicon matrix good passivation, on the other hand anti-
The electric leakage crossed between pore electrod bottom end and silicon substrate is stopped.
Further, the first backside passivation film uses aluminium oxide, and the second backside passivation film uses silicon nitride, the lamination of formation
Film can make passivating back effect and dorsal light reflex reach best.
Further, film is opened by the enterprising line section shape of overleaf passivating film, and just superfine opening the diaphragm area making back side
Grid line avoids the all-metal layer covering at the back side, it can be achieved that the back side generates electricity, and delta power exports.
Further, the just superfine grid line in the back side is alum gate line, can form back surface field in aluminium silicon interface, be more advantageous to hole receipts
Collection, reduces the compound of photo-generated carrier.
Further, back side anode is intersected vertically with main gate line by just superfine grid line and formed, with traditional grid line graphics class
Seemingly, the silk-screen technology of mainstream can be used, reduce manufacture difficulty.
The invention also discloses a kind of method of P-type crystal silicon back contacts double-side cell structure for preparing no front gate line,
The first laser opening on silicon chip, later successively by making herbs into wool, diffusion, local heavy doping, mask, cleaning, plated film, the positive back side of laser
It opens film, printing, sintering, make transparent conductive film, be eventually fabricated the generating electricity on two sides passivating back p-type crystal silicon electricity of no front gate line
Pond, the light this method avoids anode block, and increase power output, reduce the consumption of silver paste in cell fabrication processes
Amount, reduces production cost.
Below by drawings and examples, technical scheme of the present invention is described in further detail.
Description of the drawings
Fig. 1 is partial cutaway schematic of the present invention along back side anode main gate line direction；
Fig. 2 is the schematic diagram that the present invention collects front electronics using dotted local heavily doped region；
Fig. 3 is the schematic diagram that the present invention collects front electronics using line segment shape part heavily doped region；
Fig. 4 is a kind of backplate pictorial diagram of the present invention.
Wherein：1. transparent conductive film；2. antireflective coating；3. front passivating film；4.N+ regions；5.N type layers；6.P mold bases；
7. backside passivation film；The first backside passivation films of 7-1.；The second backside passivation films of 7-2.；8. the just superfine grid line in the back side；9. the back side is just
Pole main gate line；10. cross pore electrod.
Specific embodiment
The present invention provides a kind of P-type crystal silicon back contacts double-side cell structure of no front gate line, the front electrodes
For the two-dimentional combination electrode that local heavy doping/transparent conductive film is formed, local heavily doped region is arranged in by specific array figure
The front side emitter of battery extremely on, for collecting electronics.Transparent conductive film is located at passivating film, on antireflective coating, in regional area,
Transparent conductive film penetrates antireflective coating and passivating film and is in electrical contact with local heavily doped region and via electrode tip, by local heavy doping
The electronics that region is collected from silicon substrate was pooled to pore electrod by transparent conductive film, and the electronics collected is again by crossing pore electrod
It is directed at the battery cathode of cell backside.
Referring to Fig. 1, P-type crystal silicon chip includes successively from top to down：Transparent conductive film 1, antireflective coating 2, front passivation
The just superfine grid line 8 in film 3, N-type layer 5, p-type matrix 6, backside passivation film 7, the back side and back side anode main gate line 9, the electrically conducting transparent
Film 1 is located at the front passivating film 3, on antireflective coating 2, and the P-type crystal silicon on piece is equipped with through-hole, is set in the through-hole
Be useful for connection battery front side and back side cathode crosses pore electrod 10, and the surface layer of the N-type layer 5 is equipped with by regular figure distribution
Local heavy doping N+ areas 4, the transparent conductive film 1 penetrate the antireflective coating 2 and front passivating film 3 and the local heavy doping
N+ areas 4 and the top electrical contact composition battery cathode for crossing pore electrod 10, the transparent conductive film 1 are used for collect battery front side
Electronics is directed at the back side of battery by the pore electrod 10 of crossing, and the backside passivation film 7 includes the first backside passivation film 7-1 and the
Two backside passivation film 7-2, the just superfine grid line 8 in the back side penetrate the first backside passivation film 7-1 and the second backside passivation film
7-2 forms local Ohmic contact with the p-type matrix 6, and links together with back side anode main gate line 9 and form anode.
Wherein, hole size is identical, and the P-type crystal silicon chip is penetrated through in thickness direction, and line-spacings etc. is waited to arrange away from array arrangement,
A diameter of 100~500um of the single through-hole, quantity are 4 × 4~10 × 10.
Part 4 array arrangement of heavy doping N+ areas is in 5 surface layer of N-type layer, the sheet resistance in the part heavy doping N+ areas 4
For 20~60 Ω/, the array pattern in the part heavy doping N+ areas 4 is kind one-dimensional figure, X-Y scheme or kind one-dimensional figure
With the combination of X-Y scheme.
Wherein, kind one-dimensional figure is line segment, phantom line segments, camber line or grid line shape；The line width of the kind one-dimensional figure for 20~
200um, length are 0.05~1.5mm；It is 0.5~2mm with linear spacing two neighboring in a line, it is two neighboring in same row
Linear spacing is 0.5~2mm；
X-Y scheme is circle, ellipse, spindle, annular, polygon, polygonal or sector, the two-dimensional geometry figure
The size of shape is 20~200um, and two neighboring centre of figure is away from for 0.5~2mm.
Preferably, the thickness of transparent conductive film 1 is 50~500nm；The thickness of antireflective coating 2 is 50~100nm；Front is blunt
The thickness for changing film 3 is 5~50nm, and the first backside passivation film 7-1 thickness is 5~40nm；The second backside passivation film 7-2 thickness
For 50~150nm；
Back side anode main gate line 9 is mutually parallel and equidistantly arranges, and number is 3~15, the single back side anode master
The width of grid line 9 is 0.5~5mm, and the just superfine grid line 8 in the back side intersects vertically at least one back side anode main gate line 9.
The invention also discloses a kind of sides of P-type crystal silicon back contacts double-side cell structure for preparing the no front gate line
Method, first the laser opening on silicon chip, is passing through making herbs into wool, diffusion, local heavy doping, mask, cleaning, plated film, laser just successively later
The back side opens film, printing, sintering, makes transparent conductive film, and the generating electricity on two sides passivating back p-type crystal silicon electricity of no front gate line is made
Pond.The P-type crystal silicon chip is monocrystalline or polycrystalline boron-doping, gallium, a kind of more or multiple element silicon chips of aluminium, the P-type crystal
The thickness of silicon chip is 90~190um.It is as follows：
(1) through-hole of several same sizes is formed using laser in P-type crystal silicon on piece, through-hole penetrates through whole in thickness direction
A silicon chip, please refers to Fig.1 to Fig.4, and through-hole, which is pressed, waits line-spacings etc. to arrange away from array arrangement, a diameter of 100~500um of single through-hole,
Quantity is 4 × 4~10 × 10.
(2) surface-texturing processing is carried out to P-type crystal silicon chip, chemical liquid burn into plasma etching, gold may be used
The methods of belonging to catalysis, laser ablation.
(3) phosphorus doping processing is carried out, N-type layer is formed on the front of silicon chip and through-hole wall surface layer,
Normal pressure diffusion, low pressure diffusion, ion implanting, impurity slurry coating etc. may be used in the method for doping, and dopant is
POCl3, PH3 or other phosphorous slurries etc..Laser doping, low pressure diffusion, normal pressure diffusion, ion note may be used in the method for doping
Enter or impurity slurry coating heat treatment etc. modes.
(4) part heavy doping N+ areas, local heavy doping N+ areas array pattern are formed in the front of silicon chip by specific figure
It can be kind one-dimensional figure：Line segment, phantom line segments, camber line or grid line shape；Or X-Y scheme：Circle, ellipse, spindle, annular,
Polygon, polygonal or sector etc.；Or the combination of kind one-dimensional figure and X-Y scheme.
The line width of the kind one-dimensional geometric figure is 20~200um, and length is 0.05~1.5mm；Adjacent two in a line
A linear spacing is 0.5~2mm, and two neighboring linear spacing is 0.5~2mm in same row；
The size of the two-dimentional geometric figure is 20~200um, and two neighboring centre of figure is away from for 0.5~2mm.
Secondary thermal diffusion may be used in the method for forming local heavy doping, laser opens film doping, local ion implanting, mask
Erosion or the coating of dopant local etc. are anti-carved, correspondingly, local heavy doping can be completed in the process for forming PN junction, can also
It is completed in the processes such as etch cleaner, laser, printing.The sheet resistance of local heavily doped region is 20~60 Ω/.
(5) mask is made in through-hole and neighboring area, to protect the doped layer of hole wall and positive face neighboring area.It uses
Method is spraying or printing etc..Mask is the corrosion resistances chemical substances such as paraffin.
(6) phosphorosilicate glass, back of the body knot and mask of front side of silicon wafer are etched away, wet etching or dry can be used in the method for etching
Method etches.
(7) silicon chip after etching is made annealing treatment in the lehr, grows one layer of fine and close heat on the surface of silicon chip
Silica, while the foreign atom of doped layer is redistributed.
(8) in the front of the P-type crystal silicon chip successively deposition front passivating film of 5~50nm and subtracting for 50~100nm
Reflectance coating；The of the back side of the P-type crystal silicon chip successively the first backside passivation film of 5~40nm of deposition and 50~150nm
Two backside passivation films.
Front passivating film can be one or more film stacks of the films such as silica, silicon nitride, silicon oxynitride, non-crystalline silicon
Layer；
Front surface antireflection film can be the films such as silicon nitride, silica, silicon oxynitride, titanium oxide, silicon carbide one kind or
A variety of pellicular cascades；
First backside passivation film can be one or more pellicular cascades of the films such as aluminium oxide, silica, non-crystalline silicon；
Second backside passivation film can be one or more film stacks of the films such as silicon nitride, silica, silicon oxynitride silicon
Layer.
(9) film is carried out out by the heavy doping figure described in step (4) in front using laser；On passivating film overleaf
Film is carried out out by special pattern, opens film pattern as one or more groups of line segments being mutually parallel, length is 10~80mm, width 30
~300um, the spacing between two neighboring line segment are 1~4mm.
(10) following steps for manufacturing battery electrode：The methods of first assisting silk-screen printing or plating using vacuum is overleaf made
Made pore electrod, via slurry fills up entire through-hole, and via slurry is the silver paste that performance is worn without burn-through performance or low fever, is dried later
It is dry；Then several back side anode main grid line electrodes for being mutually parallel and equidistantly arranging overleaf are made, production method can be used
Silk-screen printing, spray printing, plating or sputtering etc., the number of anode main gate line is 3~15, and the width of single anode main gate line is
0.5~5mm, the slurry that may be used are mainly silver paste or silver/aluminium paste, cross pore electrod and back side anode main gate line electricity in production
Same silver paste extremely can be used, to simplify production technology, dry later；Finally overleaf film figure is opened by laser making the back side just
Superfine grid line, the just superfine grid line in each group of back side intersects vertically at least one back side anode main gate line, such as Fig. 4, production method
Silk-screen printing, spray printing, plating or sputtering etc. can be used, the slurry that may be used is mainly aluminium paste or silver/aluminium paste, is dried later.
(11) it is heat-treated at 300~900 DEG C, the just superfine grid line in the back side is made to form good office with P-type silicon matrix
Portion's Ohmic contact, while be welded together with back side anode main gate line, form the anode of battery.Via slurry through Overheating Treatment,
Formed pore electrod.
(12) sputtering, vapor deposition, 3D printing, printing or spraying process are used on positive antireflective coating/passivating film
Front transparent conductive film is made, the thickness control of transparent conductive film is in 50~500nm.
Transparent conductive film is one in ito thin film, AZO films, GZO films, FTO films, IWO films and graphene film
Kind or a variety of laminations are formed.
Transparent conductive film forms the cathode of battery with local heavily doped region and the electrical contact of via electrode tip.
Embodiment 1：
(1) p type single crystal silicon on piece using laser formed 5 × 5 through-holes equidistantly arranged, single through-hole it is a diameter of
300um。
(2) by p type single crystal silicon piece incorgruous corrosion in 80 DEG C or so of KOH solution after making through-hole, surface gold is obtained
Word tower structure.
(3) with POCl at 800~900 DEG C3Low pressure diffusion is carried out for dopant, on the front of silicon chip and through-hole wall surface layer
Upper formation N-type layer, the sheet resistance after doping are 20 Ω/.
(4) paraffin is sprayed by array pattern and through-hole in N-type layer using the method for ink-jet, as mask.Array pattern is
Spotted array, a diameter of 50um of a single point, spacing between points is 0.8mm.
(5) remove the phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer using wet etching.In the array region for being sprayed with mask
Form heavy doping.
(6) silicon chip after etching at 650 DEG C is made annealing treatment in the lehr, grows one layer on the surface of silicon chip
Fine and close thermal oxidation silicon.
(7) aluminium oxide of 25nm and the silicon nitride of 60nm are successively deposited using the method for PECVD at the back side of silicon chip；In silicon
The silicon nitride of the front deposition 80nm of piece.
(8) film is opened in array pattern of the front as described in step (4) using laser；Specific pattern is pressed on passivating film overleaf
Shape carries out out film, opens film pattern as 5 groups of line segments being mutually parallel, length 25mm, width 100um, two neighboring line segment it
Between spacing be 1.3mm.
(9) following steps for manufacturing battery electrode：1. via is overleaf made using the method that vacuum assists silk-screen printing
Silver electrode is dried later；2. the method using silk-screen printing overleaf makes back side anode main gate line silver electrode, anode main gate line
Number for 5, and the equidistant arrangement that is mutually parallel, the width of single anode main gate line is 2.5mm, is dried later；3. it uses
The method of silk-screen printing overleaf opens film figure by laser and makes the just superfine alum gate line in the back side, dries later.
(10) it is heat-treated at 300~900 DEG C, anode aluminium thin grid line in the back side is made to be formed with P-type silicon matrix good
Ohmic contact, while be welded together with back side anode silver main gate line, form the anode of battery.Simultaneously via slurry through overheat at
Reason, formed pore electrod.
(11) sputtering method is used to make thickness on positive antireflective coating/passivating film conductive for the transparent of 100nm
Film, transparent conductive film are in direct contact at heavily doped region with silicon substrate, and local heavily doped region is connected to become electronics and is collected
Assembly.
Embodiment 2：
(1) p-type polysilicon on piece using laser formed 6 × 6 through-holes equidistantly arranged, single through-hole it is a diameter of
200um。
(2) the p-type polysilicon piece after making through-hole is obtained into more shape micro-nano structures in dry plasma etching device,
It is surface modified in BOE solution later.
(3) with PH3As impurity, it is doped using the method for ion implanting, is made annealing treatment later, in silicon chip
N-type layer is formed on front and through-hole wall surface layer, the sheet resistance after doping is 30 Ω/.
(4) paraffin is sprayed by array pattern and through-hole in N-type layer using the method for ink-jet, as mask.Array pattern is
Line segment shape array, the length of line segment is 1.5mm, width 100um, and the spacing between line segment and line segment is 2mm.
(5) remove the phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer using wet etching.In the array region for being sprayed with mask
Form heavy doping.
(6) silicon chip after etching at 650 DEG C is made annealing treatment in the lehr, grows one layer on the surface of silicon chip
Fine and close thermal oxidation silicon.
(7) silica of 20nm and the silicon nitride of 60nm are successively deposited using the method for PECVD at the back side of silicon chip；In silicon
The silicon nitride of the front deposition 80nm of piece.
(8) film is opened in array pattern of the front as described in step (4) using laser；Specific pattern is pressed on passivating film overleaf
Shape carries out out film, opens film pattern as 6 groups of line segments being mutually parallel, length 20mm, width 80um, between two neighboring line segment
Spacing be 1mm.
(9) following steps for manufacturing battery electrode：1. via is overleaf made using the method that vacuum assists silk-screen printing
Silver electrode is dried later；2. the method using silk-screen printing overleaf makes back side anode main gate line silver electrode, anode main gate line
Number for 6, and the equidistant arrangement that is mutually parallel, the width of single anode main gate line is 2mm, is dried later；3. using silk
The method of wire mark brush overleaf opens film figure by laser and makes the just superfine alum gate line in the back side, dries later.
(10) it is heat-treated at 300~900 DEG C, anode aluminium thin grid line in the back side is made to be formed with P-type silicon matrix good
Ohmic contact, while be welded together with back side anode silver main gate line, form the anode of battery.Simultaneously via slurry through overheat at
Reason, formed pore electrod.
(11) the making thickness that vapor deposition is used on positive antireflective coating/passivating film is transparent for the graphene of 50nm
Conductive film, transparent conductive film are in direct contact at heavily doped region with silicon substrate, and local heavily doped region is connected to become electronics
The assembly of collection.
Embodiment 3：
(1) p type single crystal silicon on piece using laser formed 5 × 5 through-holes equidistantly arranged, single through-hole it is a diameter of
400um。
(2) by the p type single crystal silicon piece after making through-hole in 50 DEG C of Cu (NO3)2/H2O2Incorgruous corruption is carried out in/HF solution
Erosion obtains surface inverted pyramid structure.
(3) with POCl at 800~900 DEG C3Low pressure diffusion is carried out for dopant, on the front of silicon chip and through-hole wall surface layer
Upper formation N-type layer.
(4) paraffin is sprayed in through-hole using the method for ink-jet, as mask.
(5) remove the phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer using wet etching.
(6) aluminium oxide of 20nm and the silicon nitride of 50nm are successively deposited using the method for PECVD at the back side of silicon chip；In silicon
The front of piece successively deposits the silica of 20nm and the silicon nitride of 60nm.
(7) phosphorus dopant that contains of array distribution is made of the method for silk-screen printing in front, array pattern is dotted battle array
Row, a diameter of 80um of a single point, spacing between points is 0.5mm.
(8) array pattern in front is by step (7) carries out INFRARED PULSE LASER IRRADIATION, in the region antireflective coating/passivation
Phosphorus atoms are spread to silicon substrate while film gasification finish, and the local heavily doped region of spotted array is formed in front side of silicon wafer.
Film is carried out out by special pattern on the passivating film at the back side, opens film pattern as 5 groups of line segments being mutually parallel, length 25mm, width
For 80um, the spacing between two neighboring line segment is 2mm.
(9) following steps for manufacturing battery electrode：
1. overleaf making via silver electrode using the method that vacuum assists silk-screen printing, dry later；
2. the method using silk-screen printing overleaf makes back side anode main gate line silver electrode, the number of anode main gate line is
5, and the equidistant arrangement that is mutually parallel, the width of single anode main gate line is 1.5mm, is dried later；
3. overleaf opening film figure by laser using the method for silk-screen printing makes the just superfine alum gate line in the back side, dry later
It is dry.
(10) it is heat-treated at 300~900 DEG C, anode aluminium thin grid line in the back side is made to be formed with P-type silicon matrix good
Ohmic contact, while be welded together with back side anode silver main gate line, form the anode of battery.Simultaneously via slurry through overheat at
Reason, formed pore electrod.
(11) method that sputtering is used on positive antireflective coating/passivating film makes thickness and leads for the AZO of 200nm is transparent
Electrolemma, transparent conductive film are in direct contact at heavily doped region with silicon substrate, and local heavily doped region is connected to become electronics and is received
The assembly of collection.
Embodiment 4：
(1) p-type polysilicon on piece using laser formed 6 × 6 through-holes equidistantly arranged, single through-hole it is a diameter of
350um。
(2) the p-type polysilicon piece after making through-hole is obtained into more shape micro-nano structures in dry plasma etching device,
It is surface modified in BOE solution later.
(3) with POCl at 800~900 DEG C3Low pressure diffusion is carried out for dopant, on the front of silicon chip and through-hole wall surface layer
Upper formation N-type layer.
(4) PULSE HEATING is carried out by special pattern using laser on the phosphorosilicate glass formed in front, makes the region phosphorus silicon
Phosphorus atoms in glass are spread to silicon chip matrix, form heavy doping.The special pattern be line segment shape array, the length of single line segment
It spends for 3mm, width 60um, the spacing between line segment and line segment is 0.8mm.
(5) paraffin is sprayed in through hole using the method for ink-jet, as mask.
(6) remove the phosphorosilicate glass, back of the body knot and paraffin of front side of silicon wafer using wet etching.
(7) silicon chip after etching at 650 DEG C is made annealing treatment in the lehr, grows one layer on the surface of silicon chip
Fine and close thermal oxidation silicon.
(8) aluminium oxide of 20nm and the silicon nitride of 60nm are successively deposited using the method for PECVD at the back side of silicon chip；In silicon
The silicon nitride of the front deposition 80nm of piece.
(9) anti-reflection on local heavily doped region is got rid of in array pattern of the front as described in step (4) using laser
Penetrate film/passivating film；Film is carried out out by special pattern on passivating film overleaf, opens film pattern as 6 groups of line segments being mutually parallel, it is long
It spends for 20mm, width 120um, the spacing between two neighboring line segment is 2mm.
(10) following steps for manufacturing battery electrode：
1. via silver electrode is made using electric plating method；
2. overleaf making back side anode main gate line silver electrode using the method for vapor deposition, the number of anode main gate line is 6,
And the equidistant arrangement that is mutually parallel, the width of single anode main gate line is 2mm；
3. overleaf opening film figure by laser using the method for vapor deposition makes the just superfine alum gate line in the back side.
(11) it is heat-treated at 200~500 DEG C, improves the electric conductivity of the electrode of plating and vapor deposition making.
(12) method that sputtering is used on positive antireflective coating/passivating film makes thickness and leads for the GZO of 200nm is transparent
Electrolemma, transparent conductive film are in direct contact at heavily doped region with silicon substrate, and local heavily doped region is connected to become electronics and is received
The assembly of collection.
The present invention provides a kind of emitter part heavy doping/compound two-dimensional electrode of transparent conductive film, and itself and p-type is brilliant
The two-sided PERC batteries of body silicon and MWT battery technology are combined, and it is two-sided to form a kind of P-type crystal silicon back contacts of no front gate line
Battery.The light that the novel battery not only completely avoids front metal electrode blocks, and can also be prevented by the passivating film at the back side
Electrode roll can be obviously improved the transfer efficiency of P-type crystal silicon battery, and reduce silver paste in cell fabrication processes around rear electric leakage
Consumption reduces production cost.
More than content is merely illustrative of the invention's technical idea, it is impossible to protection scope of the present invention is limited with this, it is every to press
According to technological thought proposed by the present invention, any change done on the basis of technical solution each falls within claims of the present invention
Protection domain within.
Claims (8)
1. the P-type crystal silicon back contacts double-side cell structure of a kind of no front gate line, which is characterized in that P-type crystal silicon chip is from upper
Include successively under and：Transparent conductive film (1), antireflective coating (2), front passivating film (3), N-type layer (5), p-type matrix (6), the back side
The just superfine grid line (8) in passivating film (7), the back side and back side anode main gate line (9), the P-type crystal silicon on piece is equipped with through-hole, described
The pore electrod (10) excessively for connecting battery front side cathode and back side cathode is provided in through-hole, the surface layer of the N-type layer (5) is set
There are the local heavy doping N+ areas (4) being distributed by regular figure, the part heavy doping N+ areas (4) array arrangement is in the N-type layer
(5) on, the sheet resistances of the part heavy doping N+ areas (4) is 20~60 Ω/, the array of figure of the part heavy doping N+ areas (4)
Shape is the combination of kind one-dimensional figure, X-Y scheme or kind one-dimensional figure and X-Y scheme, and the kind one-dimensional figure is line segment, camber line
Or grid line shape；The line width of the kind one-dimensional figure is 20~200um, and length is 0.05~1.5mm；With line two neighboring in a line
The spacing of shape is 0.5~2mm, and two neighboring linear spacing is 0.5~2mm in same row；
The X-Y scheme is ellipse, spindle, annular, polygon or sector, the size of the X-Y scheme is 20~
200um, two neighboring centre of figure is away from for 0.5~2mm；
The transparent conductive film (1) penetrates the antireflective coating (2) and front passivating film (3) and the part heavy doping N+ areas
(4) it and crosses the top electrical contact of pore electrod (10) and forms battery cathode, the transparent conductive film (1) is for battery front side to be collected
Electronics be directed at the back side of battery by the pore electrod (10) of crossing, the backside passivation film (7) includes the first backside passivation film
(7-1) and the second backside passivation film (7-2), the just superfine grid line (8) in the back side penetrate first backside passivation film (7-1) and
Second backside passivation film (7-2) forms local Ohmic contact with the p-type matrix (6), and is connect with back side anode main gate line (9)
Anode is formed together.
2. a kind of P-type crystal silicon back contacts double-side cell structure of no front gate line according to claim 1, feature exist
In：The hole size is identical, and the P-type crystal silicon chip is penetrated through in thickness direction, waits the row such as line-spacings away from array arrangement, single institute
A diameter of 100~500um of through-hole is stated, quantity is 4 × 4~10 × 10.
3. a kind of P-type crystal silicon back contacts double-side cell structure of no front gate line according to claim 1, feature exist
In, the just superfine grid line (8) in the back side is one or more groups of line segments being mutually parallel, and the length of the line segment is 10~80mm,
Width is 30~300um, and the spacing between two neighboring line segment is 1~4mm.
4. a kind of P-type crystal silicon back contacts double-side cell structure of no front gate line according to claim 3, feature exist
In：The just superfine grid line (8) in the back side is aluminium, silver, copper, nickel, conductive agent or metal alloy.
5. a kind of P-type crystal silicon back contacts double-side cell structure of no front gate line according to claim 1, feature exist
In：The thickness of the transparent conductive film (1) is 50~500nm；The thickness of the antireflective coating (2) is 50~100nm；It is described just
The thickness of face passivating film (3) is 5~50nm, and the thickness of first backside passivation film (7-1) is 5~40nm；Second back of the body
The thickness of face passivating film (7-2) is 50~150nm.
6. a kind of P-type crystal silicon back contacts double-side cell structure of no front gate line according to claim 1, feature exist
In：The back side anode main gate line (9) is mutually parallel and equidistantly arranges, and phase vertical with the just superfine grid line (8) in the back side
It hands over, the number of the back side anode main gate line (9) is 3~15, and the width of the single back side anode main gate line (9) is 0.5
~5mm.
7. a kind of P-type crystal silicon back contacts double-side cell structure of no front gate line according to claim 6, feature exist
In：The P-type crystal silicon chip is monocrystalline or polycrystalline boron-doping, gallium, a kind of more or multiple element silicon chips of aluminium, the P-type crystal
The thickness of silicon chip is 90~190um.
8. a kind of method for preparing the P-type crystal silicon back contacts double-side cell structure without front gate line described in claim 1, special
Sign is, includes the following steps：
S1, the through-hole for forming several same sizes using laser in P-type crystal silicon on piece, the through-hole penetrate through institute in thickness direction
P-type crystal silicon chip is stated, waits the row such as line-spacings away from array arrangement；
S2, using chemical liquid burn into plasma etching, metal catalytic or laser etching method to the P-type crystal silicon chip into
The processing of row surface-texturing；
S3, it is spread using low pressure, the progress phosphorus doping processing of normal pressure diffusion, ion implanting, laser doping or impurity slurry coating method,
N-type layer, dopant POCl are formed on the front of the P-type crystal silicon chip and through-hole wall surface layer3、PH3Or phosphorus slurry；
S4, erosion or dopant local coating process are anti-carved in institute using laser doping, secondary thermal diffusion, local ion implanting, mask
The front for stating P-type crystal silicon chip forms part heavy doping N+ areas, and the figure in the heavy doping N+ areas is kind one-dimensional figure, X-Y scheme
The combination of shape or kind one-dimensional figure and X-Y scheme；
S5, paraffin mask is made in the through-hole and neighboring area using spraying or print process, protects hole wall and positive face periphery
The doped layer in region；
S6, the positive phosphorosilicate glass of the P-type crystal silicon chip, back of the body knot are etched away using wet etching or dry etching and is covered
Film；
S7, the P-type crystal silicon chip after etching is made annealing treatment in the lehr, in the table of the P-type crystal silicon chip
One layer of fine and close thermal oxidation silicon of length of looking unfamiliar, while the foreign atom of doped layer is redistributed；
S8, the antireflective in the front of the P-type crystal silicon chip successively front passivating film and 50~100nm of 5~50nm of deposition
Film, in the backside passivation film of 5~150nm of backside deposition of the P-type crystal silicon chip, the front passivating film is silicon nitride, oxygen
One or more laminations in SiClx, silicon oxynitride, non-crystalline silicon are formed, and the antireflective coating is silicon nitride, silica, nitrogen oxidation
One or more laminations in silicon, titanium oxide, silicon carbide are formed, and the backside passivation film includes the first backside passivation film and second
Backside passivation film, first backside passivation film is aluminium oxide, one or more pellicular cascades of silica, amorphous silicon membrane,
Second backside passivation film is silicon nitride, one or more pellicular cascades of silica, silicon oxynitride silicon thin film；
S9, it is opened using laser in the front of the P-type crystal silicon chip by the figure in the heavy doping N+ areas described in step S4
Film；Film is carried out out in the backside passivation film of the P-type crystal silicon chip, opens film pattern as one or more groups of lines being mutually parallel
Section, length are 10~80mm, and width is 30~300um, and the spacing between two neighboring line segment is 1~4mm；
S10, first silk-screen printing or electro-plating method is assisted overleaf to make pore electrod using vacuum, via slurry fills up entire logical
Hole, via slurry are the silver paste that performance is worn without burn-through performance or low fever, are dried later；Then using silk-screen printing, spray printing, plating
Or sputtering method makes several back side anode main gate line electricity for being mutually parallel and equidistantly arranging at the back side of the P-type crystal silicon chip
Pole, slurry are silver paste or silver/aluminium paste, are dried later；Finally using silk-screen printing, spray printing, plating or sputtering method in p-type crystalline substance
The back side of body silicon chip opens film figure by laser and makes the just superfine grid line in the back side, and slurry is aluminium paste or silver/aluminium paste, is dried later, is made
Make battery electrode；
S11, it is heat-treated at 300~900 DEG C, the just superfine grid line in the back side is made to form Ohmic contact with p-type matrix, together
When be welded together with the back side anode main gate line, form the anode of battery, while via slurry was formed through Overheating Treatment
Pore electrod；
S12, on the positive antireflective coating of the P-type crystal silicon chip, front passivating film using sputtering, vapor deposition, 3D printing,
Printing or spraying process make front transparent conductive film, and the transparent conductive film is ito thin film, AZO films, GZO films, FTO
One or more laminations in film, IWO films and graphene film are formed, the transparent conductive film and part heavy doping N+ areas
And the electrical contact of via electrode tip forms the cathode of battery.
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| CN108133976A (en) * | 2018-01-29 | 2018-06-08 | 泰州隆基乐叶光伏科技有限公司 | A kind of monocrystalline mixes gallium back of the body passivating solar battery and preparation method thereof |
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| CN112563347A (en) * | 2020-12-25 | 2021-03-26 | 通威太阳能（成都）有限公司 | Selective emitter of PERC solar cell, PERC solar cell and manufacturing method thereof |
| CN115148837A (en) * | 2022-06-29 | 2022-10-04 | 浙江晶科能源有限公司 | Solar cell, preparation method thereof and photovoltaic module |
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