CN106887492B - Preparation method of GaN-based light-emitting diode epitaxial wafer - Google Patents
Preparation method of GaN-based light-emitting diode epitaxial wafer Download PDFInfo
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- CN106887492B CN106887492B CN201710021557.7A CN201710021557A CN106887492B CN 106887492 B CN106887492 B CN 106887492B CN 201710021557 A CN201710021557 A CN 201710021557A CN 106887492 B CN106887492 B CN 106887492B
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- 238000002360 preparation method Methods 0.000 title claims abstract description 20
- 230000004888 barrier function Effects 0.000 claims abstract description 47
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 238000001816 cooling Methods 0.000 claims abstract description 7
- 230000009467 reduction Effects 0.000 claims abstract description 7
- 229910002704 AlGaN Inorganic materials 0.000 claims description 6
- 230000007423 decrease Effects 0.000 claims description 4
- 230000007547 defect Effects 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 230000000903 blocking effect Effects 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 115
- 235000012431 wafers Nutrition 0.000 description 27
- 238000010586 diagram Methods 0.000 description 4
- 239000011777 magnesium Substances 0.000 description 4
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 3
- 238000009825 accumulation Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000004134 energy conservation Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 238000013467 fragmentation Methods 0.000 description 1
- 238000006062 fragmentation reaction Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 239000007792 gaseous phase Substances 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 238000004020 luminiscence type Methods 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 229910000069 nitrogen hydride Inorganic materials 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- RGGPNXQUMRMPRA-UHFFFAOYSA-N triethylgallium Chemical compound CC[Ga](CC)CC RGGPNXQUMRMPRA-UHFFFAOYSA-N 0.000 description 1
- JLTRXTDYQLMHGR-UHFFFAOYSA-N trimethylaluminium Chemical compound C[Al](C)C JLTRXTDYQLMHGR-UHFFFAOYSA-N 0.000 description 1
- XCZXGTMEAKBVPV-UHFFFAOYSA-N trimethylgallium Chemical compound C[Ga](C)C XCZXGTMEAKBVPV-UHFFFAOYSA-N 0.000 description 1
- IBEFSUTVZWZJEL-UHFFFAOYSA-N trimethylindium Chemical compound C[In](C)C IBEFSUTVZWZJEL-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
- H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- Engineering & Computer Science (AREA)
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Abstract
The invention discloses a preparation method of a GaN-based light-emitting diode epitaxial wafer, and belongs to the technical field of semiconductors. The method comprises the following steps: growing a buffer layer on a substrate; growing an undoped GaN layer on the buffer layer; growing an N-type GaN layer on the undoped GaN layer; sequentially cooling in multiple stages, and growing a stress release layer; the stress release layer comprises a first GaN barrier layer, a superlattice well layer and a second GaN barrier layer, wherein the first GaN barrier layer, the superlattice well layer and the second GaN barrier layer are sequentially grown; the temperature of each stage is kept unchanged, the temperatures of a plurality of stages are sequentially reduced, and the reduction rate of the temperatures of two adjacent stages does not exceed a set value; growing a multi-quantum well layer on the stress release layer; growing a P-type electron barrier layer on the multi-quantum well layer; and growing a P-type GaN layer on the P-type electron blocking layer. The invention can improve the warping degree of the epitaxial wafer and reduce the lattice defect of the epitaxial wafer.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of preparation method of GaN base light emitting epitaxial wafer.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) there is at low cost, energy conservation and environmental protection, make
With the service life it is long the features such as, be widely used in the fields such as illumination, display screen, signal lamp, backlight, as the emerging production of information photoelectron
The new product of great influence power, still leads forward position and hot spot technology in industry.
GaN base LED epitaxial wafer is usually grown on a sapphire substrate, and there are lattice mismatches between sapphire and GaN, the bottom of at
Various defects are just had already appeared in layer growth course, and InGaN Quantum Well in epitaxial wafer in active layer and GaN quantum build it
Between there is also lattice mismatches so that crystal quality is poor, leak channel easy to form.Currently used method is raw in active layer
Before length, the shallow Quantum Well of InGaN is first grown at low ambient temperatures, reduces the lattice mismatch of active layer using the shallow Quantum Well of InGaN,
But effect is limited, the stress in epitaxial wafer can not effectively be discharged.
Summary of the invention
In order to solve problems in the prior art, the embodiment of the invention provides a kind of GaN base light emitting epitaxial wafers
Growing method.The technical solution is as follows:
The embodiment of the invention provides a kind of preparation method of GaN base light emitting epitaxial wafer, the preparation method packet
It includes:
Grown buffer layer on substrate；
Layer of undoped gan is grown on the buffer layer；
N-type GaN layer is grown in the layer of undoped gan；
First successively carry out the cooling in multiple stages, regrowth stress release layer；The stress release layer includes successively growing
The first GaN barrier layer, the superlattices well layer, the 2nd GaN barrier layer that are made of alternately stacked InGaN layer and GaN layer；It is each described
The temperature in stage remains unchanged, and the temperature in multiple stages successively reduces, the reduction speed of the temperature in the two neighboring stage
Rate is no more than setting value；
Multiple quantum well layer is grown on the stress release layer；
The growing P-type electronic barrier layer on the multiple quantum well layer；
The growth P-type GaN layer in the P-type electron barrier layer.
Optionally, the quantity in multiple stages is 3~5.
Optionally, the duration in each stage is 30~60s.
Optionally, the temperature difference in the two neighboring stage is identical.
Optionally, the growth pressure of the first GaN barrier layer is higher than the growth pressure of the 2nd GaN barrier layer.
Preferably, the growth pressure of the 2nd GaN barrier layer is 50~250MPa.
Preferably, the growth pressure of the first GaN barrier layer is 300MPa.
Optionally, the first GaN barrier layer, the superlattices well layer, in the 2nd GaN barrier layer mixed with Si.
Preferably, the doping concentration of Si first gradually decreases along the direction of growth and gradually increases again in the 2nd GaN barrier layer.
Optionally, the preparation method further include:
N-type current extending is grown in the N-type GaN layer, the N-type current extending is the AlGaN of n-type doping
Layer.
Technical solution provided in an embodiment of the present invention has the benefit that
By first carrying out the cooling in multiple stages before growth stress releasing layer, the temperature in each stage is remained unchanged,
The temperature in multiple stages successively reduces, and the reduction rate of the temperature in two neighboring stage is no more than setting value, can be preferable
Ground reduces the stress that accumulation is got up since grown buffer layer, is effectively improved the angularity of epitaxial wafer, reduces the lattice of epitaxial wafer
Defect, especially suitable for being epitaxially-formed epitaxial wafer on the substrate more than 2 inches.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of process signal of the preparation method of GaN base light emitting epitaxial wafer provided in an embodiment of the present invention
Figure；
Fig. 2 is the schematic diagram of the temperature-fall period in multiple stages provided in an embodiment of the present invention；
Fig. 3 is the schematic diagram of epitaxial wafer wavelength uniformity comparison provided in an embodiment of the present invention；
Fig. 4 is the schematic diagram of stress release layer growth pressure variation pattern provided in an embodiment of the present invention；
Fig. 5 is the schematic diagram of the 2nd GaN barrier layer doping way provided in an embodiment of the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment
The embodiment of the invention provides a kind of preparation methods of GaN base light emitting epitaxial wafer to adopt in the present embodiment
With metallo-organic compound chemical gaseous phase deposition (English: Metal organic Chemical Vapor Deposition, letter
Claim: MOCVD) technology growth epitaxial wafer, using trimethyl gallium or triethyl-gallium as gallium source, high-purity ammonia (NH3) it is used as nitrogen
Source, trimethyl indium is as indium source, and trimethyl aluminium is as silicon source, using silane as N type dopant, using two luxuriant magnesium as p-type
Dopant.Referring to Fig. 1, which includes:
Step 101: being epitaxially grown on the substrate buffer layer.
In the present embodiment, substrate can be Sapphire Substrate.
Optionally, substrate can be greater than 2 inches of large-sized substrate, such as 4 inch substrates for size.
Specifically, buffer layer can be GaN layer, can also be made of alternately stacked GaN layer and AlGaN layer.
Step 102: epitaxial growth layer of undoped gan on the buffer layer.
Specifically, layer of undoped gan can be the GaN layer that single layer does not adulterate, or the GaN that multilayer is not adulterated
The growth temperature of layer, each layer GaN layer is different.
Step 103: the epitaxial growth N-type GaN layer in layer of undoped gan.
Specifically, N-type GaN layer can adulterate the GaN layer of Si for single layer, or the GaN layer of multi-layer doping Si, each layer
The doping concentration of Si is different in GaN layer.
Step 104: the epitaxial growth N-type current extending in N-type GaN layer.The step 104 is optional step.
In the present embodiment, N-type current extending is the AlGaN layer of n-type doping, is conducive to current expansion, improves stress
The influence of releasing layer reduction light efficiency.
Step 105: first successively carrying out the cooling in multiple stages, then epitaxial growth stress release layer.
In the present embodiment, stress release layer includes the first GaN barrier layer successively grown, by alternately stacked InGaN layer
With superlattices well layer, the 2nd GaN barrier layer of GaN layer composition.The temperature in each stage remains unchanged, and the temperature in multiple stages is successively
It reduces, the reduction rate of the temperature in two neighboring stage is no more than setting value.
Optionally, the quantity in multiple stages can be 3~5.
Optionally, the duration in each stage can be 30~60s.
Optionally, the temperature difference in two neighboring stage can be identical.
For example, as shown in Fig. 2, the growth temperature of N-type current extending is 1280 DEG C, first by temperature to be no more than setting value
Rate be reduced to 1180 DEG C and keep 30s constant, then temperature is reduced to 1080 DEG C and is protected with the rate for being no more than setting value
Hold that 30s is constant, then temperature be reduced to 980 DEG C and keep 60s constant to be no more than the rate of setting value, and so on carry out
The cooling in 3~5 stages, then regrowth stress release layer.
It should be noted that 4 inch substrates are when carrying out low layer (multiple quantum well layer before grow layer) growth, bottom compared with
High growth temperature will lead to epitaxial wafer and slowly become recessed before multiple quantum well layer, directly grows multiple quantum well layer at this time, can lead
Epitaxial wafer is caused to become convex, stress cannot preferably discharge, and the angularity of epitaxial wafer is larger, cause fragmentation.By growth temperature from N-type
GaN layer or the growth temperature of N-type current extending are reduced to the growth temperature of stress release layer by multiple stages, so that it may
Reduce the stress that accumulation is got up since grown buffer layer well, is effectively improved the angularity of epitaxial wafer, reduces epitaxial wafer
Lattice defect, the epitaxial wafer wavelength uniformity to grow out are preferable.
By the epitaxial wafer of the present embodiment, (growth temperature is directly from N-type GaN layer or N-type current extending with contrast sample
Growth temperature be reduced to the growth temperature of stress release layer) carry out luminescence generated by light (English: photluminescence, referred to as
PL) wavelength measurement, as shown in figure 3, the wavelength uniformity standard deviation (English: Standard of the epitaxial wafer of the present embodiment
Deviation, abbreviation std) it is significantly less than contrast sample, illustrate that the angularity of the epitaxial wafer of the present embodiment reduces.
Optionally, the growth pressure of the first GaN barrier layer can be higher than the growth pressure of the 2nd GaN barrier layer.
Preferably, the growth pressure of the 2nd GaN barrier layer can be 50~250MPa.
Preferably, the growth pressure of the first GaN barrier layer can be 300MPa.
For example, as shown in figure 4, the growth pressure of the first GaN barrier layer is 300MPa；The growth pressure of superlattices well layer is initial
It for 300MPa and remains unchanged, then is gradually decrease to 250MPa；The growth pressure of 3rd GaN barrier layer since 250MPa gradually
It reduces.
The opposite mode for using low-pressure growth of 2nd GaN barrier layer, growth rate is very fast, in the case where same flow, second
The thickness of GaN barrier layer is bigger than the thickness of the first GaN barrier layer, on the one hand can preferably obstruct defect, after on the other hand being
Excellent basis is laid in the growth of continuous multiple quantum well layer, improves the crystal quality of epitaxial wafer.
Optionally, the first GaN barrier layer, superlattices well layer, can be mixed with Si in the 2nd GaN barrier layer.
Preferably, the doping concentration of Si can first gradually decrease along the direction of growth and gradually increase again in the 2nd GaN barrier layer.
For example, as shown in figure 5, the growth time of the 2nd GaN barrier layer is 480s, wherein preceding 200s uses higher doping
Concentration, intermediate 80s use lower doping concentration, and last 200s uses higher doping concentration again.
By the second GaN layer doping way high using height, improves the extended capability of electric current, increase capacity effect, subtract
Few leakage current path, promotes crystal quality, and chip made of the epitaxial wafer under optimal conditions resists quiet under the test condition of 4000V
Electric energy power improves 35% or so.
Step 106: the epitaxial growth multiple quantum well layer on stress release layer.
In the present embodiment, multiple quantum well layer can be made of InGaN quantum well layer and GaN quantum barrier layer.
Step 107: the epitaxial growth P-type electron barrier layer on multiple quantum well layer.
Specifically, P-type electron barrier layer can for p-type doping AlGaN layer, can also by p-type adulterate AlGaN layer and
The GaN layer of p-type doping is alternately laminated to be formed.
Step 108: the growth P-type GaN layer in P-type electron barrier layer.
Specifically, p-type GaN layer can adulterate the GaN layer of Mg for single layer, or the GaN layer of multi-layer doping Mg, each layer
The doping concentration of Mg is different in GaN layer.
The embodiment of the present invention before growth stress releasing layer by first carrying out the cooling in multiple stages, the temperature in each stage
Degree remains unchanged, and the temperature in multiple stages successively reduces, and the reduction rate of the temperature in two neighboring stage is no more than setting
Value can preferably reduce the stress that accumulation is got up since grown buffer layer, be effectively improved the angularity of epitaxial wafer, reduce outer
The lattice defect for prolonging piece, especially suitable for being epitaxially-formed epitaxial wafer on the substrate more than 2 inches.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (9)
1. a kind of preparation method of GaN base light emitting epitaxial wafer, which is characterized in that the preparation method includes:
Grown buffer layer on substrate；
Layer of undoped gan is grown on the buffer layer；
N-type GaN layer is grown in the layer of undoped gan；
First successively carry out the cooling in multiple stages, regrowth stress release layer；The stress release layer includes successively grown
One GaN barrier layer, superlattices well layer, the 2nd GaN barrier layer being made of alternately stacked InGaN layer and GaN layer；Each stage
Temperature remain unchanged, the temperature in multiple stages successively reduces, and the reduction rate of the temperature in the two neighboring stage is not
More than setting value；
Multiple quantum well layer is grown on the stress release layer；
The growing P-type electronic barrier layer on the multiple quantum well layer；
The growth P-type GaN layer in the P-type electron barrier layer；
The growth pressure of the first GaN barrier layer is higher than the growth pressure of the 2nd GaN barrier layer.
2. preparation method according to claim 1, which is characterized in that the quantity in multiple stages is 3~5.
3. preparation method according to claim 1 or 2, which is characterized in that the duration in each stage be 30~
60s。
4. preparation method according to claim 1 or 2, which is characterized in that the temperature difference phase in the two neighboring stage
Together.
5. preparation method according to claim 1, which is characterized in that the growth pressure of the 2nd GaN barrier layer be 50~
250MPa。
6. preparation method according to claim 1, which is characterized in that the growth pressure of the first GaN barrier layer is
300MPa。
7. preparation method according to claim 1 or 2, which is characterized in that the first GaN barrier layer, the superlattices trap
Mixed with Si in layer, the 2nd GaN barrier layer.
8. preparation method according to claim 7, which is characterized in that the doping concentration edge of Si in the 2nd GaN barrier layer
The direction of growth first gradually decreases gradually to be increased again.
9. preparation method according to claim 1 or 2, which is characterized in that the preparation method further include:
N-type current extending is grown in the N-type GaN layer, the N-type current extending is the AlGaN layer of n-type doping.
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| CN115188863B (en) * | 2022-09-09 | 2022-12-06 | 江西兆驰半导体有限公司 | Light emitting diode epitaxial wafer and preparation method thereof |
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| CN105895753B (en) * | 2016-04-29 | 2019-01-15 | 湘能华磊光电股份有限公司 | Improve the epitaxial growth method of LED luminous efficiency |
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