CN106802372B - A method of detection capacitor's capacity variation - Google Patents
A method of detection capacitor's capacity variation Download PDFInfo
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- CN106802372B CN106802372B CN201710154190.6A CN201710154190A CN106802372B CN 106802372 B CN106802372 B CN 106802372B CN 201710154190 A CN201710154190 A CN 201710154190A CN 106802372 B CN106802372 B CN 106802372B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
- G01R27/26—Measuring inductance or capacitance; Measuring quality factor, e.g. by using the resonance method; Measuring loss factor; Measuring dielectric constants ; Measuring impedance or related variables
- G01R27/2605—Measuring capacitance
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Abstract
A method of detection capacitor's capacity variation, be conducive to through simple detection circuits determination or judge the slowly varying of capacitor's capacity or provide the slowly varying variable quantity signal of capacitor's capacity, reduce charging current required precision used in capacitance detecting, save the memory device of capacitance variation information, it is characterized in that, including the use of to testing capacitance charge/discharge, the capacitance variation of testing capacitance is converted to the frequency variation of clock signal to be measured, then a point time-series rules are made the difference to the clock signal to be measured, to determine or judge the capacitance variation of the testing capacitance.
Description
Technical field
The present invention relates to capacitor's capacity detection technique, especially a kind of method of detection capacitor's capacity variation is conducive to lead to
It crosses simple detection circuits determination or judges the slowly varying of capacitor's capacity or provide the slowly varying variable quantity signal of capacitor's capacity,
Charging current required precision used in capacitance detecting is reduced, the memory device of capacitance variation information is saved.
Background technique
It is frequently necessary to be related to sensor capacitance to slowly varying carry out signal detection, such as environmental change in monitoring field
Application, that is to say, that need to detect the slowly varying of sensor capacitance capacitance.There are two main classes for common scheme, and one
Class is by the way that capacitor charging/electric discharge, corresponding conversion is reuse clock signal, respectively to two inside circuit after clock signal
The capacitor of a determination carries out charge/discharge, then by high-precision comparator, compares the highest electricity of charging of two capacitors
Pressure value, so that it is determined that whether testing capacitance capacitance changes.Inventors believe that the shortcomings that the method, is: the variation of 1. testing capacitances
Very slowly, the time of detection just needs the long time that can just embody variation difference, detects at the appointed time in this way
This variation, just needs higher detection accuracy relatively.2. needing for a long time to charge to circuit internal capacitance, but also need
The capacitor of two matcheds is wanted, capacitor's capacity wants meet demand, and cost is very high.3. there are also because not knowing capacitance variations
Direction, so precision comparator, it is also desirable to which at least two could be completed to compare.4. simultaneously to the inclined of circuit internal capacitance charging
Electric current is set, matched is needed, the numerical value otherwise compared is congenital to there is difference, will cause detection error.Another detection side
Method is, corresponding that capacitor both ends pressure difference is converted to clock signal after to capacitor charging/electric discharge, to the clock inside circuit
Signal carries out the counting of two periods respectively, then compares the numerical value of two counters, so that it is determined that capacitance variations.This hair
The shortcomings that bright people thinks, the method, is exactly that cost is larger, needs two counters, while slowly varying to meet, thus this two
The storage depth of a counter requires the information that could complete storage capacitance variation very greatly.In addition, because the position of counter
Number is larger, so that the circuit needed is also just more, so being exactly that cost is excessive generally speaking when comparing numerical bias.
Summary of the invention
The present invention is in view of the deficiencies in the prior art or insufficient, provides a kind of method of detection capacitor's capacity variation,
Be conducive to through simple detection circuits determination or judge the slowly varying of capacitor's capacity or provide the slowly varying change of capacitor's capacity
Change amount signal reduces charging current required precision used in capacitance detecting, saves the memory device of capacitance variation information.
Technical solution of the present invention is as follows:
A method of detection capacitor's capacity variation, which is characterized in that, will be to including the use of to testing capacitance charge/discharge
The capacitance variation for surveying capacitor is converted to the frequency variation of clock signal to be measured, then makes the difference timesharing sequence to the clock signal to be measured
Detection, to determine or judge the capacitance variation of the testing capacitance.
The testing capacitance has capacitor anode and capacitor negative terminal, and the capacitor anode and capacitor negative terminal pass through control switch
Connection, the capacitor anode are separately connected the positive input of current source and comparator, and the current source connects voltage input end,
The negative input of the comparator connects circuit internal reference voltage end, and the output end of the comparator connects the first logic electricity
Road input terminal, the first logic circuit output end connect clock signal node to be measured, described in the clock signal node connection to be measured
The control terminal of control switch, the capacitor negative terminal connect ground terminal.
The clock signal node to be measured is transported to clock signal to be measured as the first clock signal in counter, is utilized
Known clock signal inside circuit makees benchmark and as second clock signal, carries out at Fractional-N frequency to the second clock signal
Count start signal is obtained after reason, counts up-down signal and reset signal, by the count start signal, counts up-down signal
Plus/minus counting is carried out to first clock signal with reset signal, finally according to the remaining numerical value of up/down counter, judgement
The capacitance of the testing capacitance changes.
The capacitance variation judgment mode of the testing capacitance is as follows: if remained in counter in a counting end cycle
Remainder values are more than that then testing capacitance capacitance is changed preset value.
The counter carries out gradation counting to first clock signal in a detection cycle, leads in counting every time
Over-sampling obtains clock number, and successively does plus/minus counting to clock number, makes a saved differences in counter.
The gradation is counted as counting twice, wherein once counting to add, another time is to subtract counting.
The sampling is the sampling to the rising edge clock of first clock signal.
The sampling includes the delay process in sampling period.
Described is finally the difference counted twice according to the remaining numerical value of up/down counter.
Saved differences in counter are integrated, to improve the precision of detection circuit.
The technology of the present invention effect is as follows: a kind of method of detection capacitor's capacity variation of the present invention is realized simply, especially suitable
It is detected in slowly varying capacitor's capacity.
The present invention has the special feature that: capacitor's capacity using to testing capacitance charge/discharge, is changed conversion bit clock signal by 1.
Frequency variation, a point time-series rules then are made the difference to clock signal, with determine or judge capacitor's capacity variation.2. utilizing sampling week
The delay process of phase makes capacitor's capacity variation be easier to detect.3. counting using the plus/minus that takes turns doing to clock, make counter
The interior mode for saving difference, simplifies the storage demand of detection.4. doing the side integrated simultaneously to difference is saved in above-mentioned counter
Formula.5. first doing plus count still to subtract to count can be interchanged, as long as ensuring in a detection cycle in a detection cycle
It is inside that remaining value is the difference counted twice in counter.6. although Fractional-N frequency is done by CK2, to CK1 describe
Confirm the method detection in sampling period, in practice, sets the sampling period with CK1, CK2 is detected, wanted as long as meeting in timing
It asks, is possible to.
Detailed description of the invention
Fig. 1 is to implement electrical block diagram involved in a kind of method of detection capacitor's capacity variation of the present invention.
Fig. 2 is to be believed by second clock signal (the known clock signal that can be used as benchmark inside circuit) the first clock
The process that number (needing the clock signal counted to it, the CK_T clock signal of example as shown in figure 1) carries out count detection is shown
It is intended to.Fractional-N frequency indicates frequency divider or Fractional-N frequency processing in Fig. 2；Up/down counter indicates counter, can carry out plus count and subtract
It counts；Counter values judgement refer in a countings end cycle if numerical value remaining in counter is more than preset value to
Capacitor's capacity is surveyed to be changed.
Fig. 3 be each signal (enable signal, second clock signal, fractional frequency signal, count start signal, count up-down signal,
Reset signal) schematic diagram.Top text from left to right in Fig. 3 are as follows: detection cycle 1；Detection cycle 2." ≈ " is omission mark in Fig. 3
Number.
Fig. 4 is clock count schematic diagram of first clock signal in different cycles.Lower part text from left to right in Fig. 4
Are as follows: in detection cycle, subtract counting, 9 clocks (corresponding 1-9)；In detection cycle, add counting, 11 clocks (corresponding 1-11).
Appended drawing reference lists as follows: 1- testing capacitance (capacitor's capacity is slowly varying)；2- ground terminal；3- capacitor negative terminal；4-
Capacitor anode；5- comparator；The first logic circuit of 6-；7- clock signal node to be measured；VDDVoltage input end or voltage input
Value；IBCurrent source or bias current or bias current value；VCAPCapacitor anode voltage；VREFCircuit internal reference voltage end or
Circuit internal reference voltage；CK_T- clock signal to be measured；S1- control switch；The first clock signal of CK1-；CK2- second clock
Signal；DET_PHASE- count start signal；DET_SENSE- counts up-down signal；DET_RESET- reset signal；OUT- meter
Number result output end；EN- enable signal；PHA<N:1>-fractional frequency signal；00h- a cycle (i.e. 00H)；Second week of 01h-
Phase (i.e. 01H)；The last one period (i.e. FFH) of FFh-.
Specific embodiment
With reference to the accompanying drawing (Fig. 1-Fig. 4) the present invention will be described.
Fig. 1 is to implement electrical block diagram involved in a kind of method of detection capacitor's capacity variation of the present invention.Fig. 2 is
The first clock signal (is needed to it by second clock signal (the known clock signal that can be used as benchmark inside circuit)
The clock signal counted, the CK_T clock signal of example as shown in figure 1) carry out count detection process schematic.Fig. 3 is each letter
Number (enable signal, second clock signal, fractional frequency signal, count start signal, count up-down signal, reset signal) schematic diagram.
Fig. 4 is clock count schematic diagram of first clock signal in different cycles.As shown in Figures 1 to 4, a kind of detection capacitor's capacity
The capacitance variation of testing capacitance 1 is converted to clock signal to be measured including the use of to 1 charge/discharge of testing capacitance by the method for variation
The frequency of CK_T changes, and then makes the difference a point time-series rules to the clock signal CK_T to be measured, to determine or judge described to be measured
The capacitance of capacitor 1 changes.The testing capacitance 1 has capacitor anode 4 and capacitor negative terminal 3, the capacitor anode 4 and capacitor negative terminal
3 are connected by control switch S1, and the capacitor anode 4 is separately connected current source IBWith the positive input (+) of comparator 5, institute
State current source IBConnect voltage input end VDD, negative input (-) connection circuit internal reference voltage end of the comparator 5
VREF, the output end of the comparator 5 connects 6 input terminal of the first logic circuit, when the connection of 6 output end of the first logic circuit is to be measured
Clock signal node 7, the clock signal node 7 to be measured connect the control terminal of the control switch S1, and the capacitor negative terminal 3 connects
Ground terminal 2.
Clock signal CK_T to be measured is transported to counting by the clock signal node to be measured 7
In device, make benchmark using the known clock signal inside circuit and as second clock signal CK2, to the second clock signal
CK2 is carried out obtaining count start signal DET_PHASE after Fractional-N frequency processing, is counted up-down signal DET_SENSE and reset signal
DET_RESET by the count start signal DET_PHASE, counts up-down signal DET_SENSE and reset signal DET_
RESET carries out plus/minus counting to the first clock signal CK1 and judges institute finally according to the remaining numerical value of up/down counter
State the capacitance variation of testing capacitance 1.The capacitance variation judgment mode of the testing capacitance 1 is as follows: in a counting end cycle
Remaining numerical value is more than that then 1 capacitance of testing capacitance is changed preset value in Shi Ruguo counter.The counter is examined at one
It surveys to the first clock signal CK1 progress gradation counting in the period, every time by sampling acquisition clock number in counting, and according to
It is secondary that plus/minus counting is done to clock number, make a saved differences in counter.The gradation is counted as counting twice, wherein once
It is counted to add, another time is to subtract counting.The sampling is the sampling to the rising edge clock of the first clock signal CK1.Institute
State the delay process that sampling includes the sampling period.Described is finally the difference counted twice according to the remaining numerical value of up/down counter
Value.Saved differences in counter are integrated, to improve the precision of detection circuit.
As shown in Figure 1, first passing through a bias current IB, charge to testing capacitance 1, switch S1 is open at this time
Then state is monitored the anode voltage VCAP of capacitor, after VCAP voltage is more than internal reference voltage VREF, comparator
It is flipped, by 1 circuit of logic, generates a clock signal CK_T, while with CK_T signal, control switch S1 closure is right
Testing capacitance 1 discharges.When CK_T becomes high level, starts next pair of testing capacitance 1 and charge.As shown in Fig. 2, CK1 and CK2
It is two clock signals, Fractional-N frequency processing first is carried out to clock CK2, then generates the relevant signal DET_PHASE of three clocks,
DET_SENSE and DET_RESET carries out plus/minus counting, final basis to clock signal CK1 then by these three signals
The remaining numerical value of up/down counter, judges the variation of testing capacitance.
As shown in figure 3, to clock signal CK2, carrying out Fractional-N frequency after enable signal EN is effective, generating fractional frequency signal
PHA<N:1>is controlled in different time domains, is controlled up/down counter, such as first then according to fractional frequency signal
A period 00H, counter are resetted, and the numerical value in counter is removed；In second period 01H, a detection cycle is carried out
Subtract counting (adding counting)；The last one period FFH again, carry out a detection cycle adds counting (subtracting counting), counts this
When counting end cycle, remaining numerical value in counter, if it exceeds preset value, that is, be considered that capacitor's capacity changes.Three letters
Number, DET_PHASE is started counting for control counter；DET_SENSE is selection for control counter plus counts or subtract
It counts, while at the rising edge of signal, doing the numerical sample of counter；DET_RESET is the numerical value for reset count device.
Here the design of Fractional-N frequency, it is mainly in the time domain, slowly varying to capacitor's capacity, an optimization is done on the sampling period, just
Realize that capacitor's capacity changes efficiently sampling with the smallest cost.As shown in figure 4, for counting the period each time, in DET_PHASE
It is -9 that numerical value is saved to have carried out the sampling of 9 rising edge clocks to CK1 in high a cycle, in this hour counter；Under
After one counting period starts, counter increases since -9, samples 11 rising edges, so saving numerical value in counter
It is 2, if default counter values are greater than 1 to export height effectively, the output of this hour counter is high level, and completion detects.Separately
Outside, can also be by being integrated to counter saved differences, such as the value of reset count device again after N number of period in this way can be into
The precision of one step raising detection circuit.
It is hereby stated that described above facilitate those skilled in the art understand that the invention, but not limit the present invention
The protection scope of creation.Any equivalent replacement described above, modification are improved without disengaging the invention substantive content
And/or delete numerous conform to the principle of simplicity and the implementation that carries out, each fall within the protection scope of the invention.
Claims (9)
1. a kind of method of detection capacitor's capacity variation, which is characterized in that, will be to be measured including the use of to testing capacitance charge/discharge
The capacitance variation of capacitor is converted to the frequency variation of clock signal to be measured, then makes the difference the inspection of timesharing sequence to the clock signal to be measured
It surveys, to determine or judge the capacitance variation of the testing capacitance；
The testing capacitance has capacitor anode and capacitor negative terminal, and the capacitor anode and capacitor negative terminal are connected by control switch
It connects, the capacitor anode is separately connected the positive input of current source and comparator, and the current source connects voltage input end, institute
The negative input connection circuit internal reference voltage end of comparator is stated, the output end of the comparator connects the first logic circuit
Input terminal, the first logic circuit output end connect clock signal node to be measured, and the clock signal node to be measured connects the control
The control terminal of switch is made, the capacitor negative terminal connects ground terminal.
2. a kind of method of detection capacitor's capacity variation according to claim 1, which is characterized in that the clock letter to be measured
Number node is transported to clock signal to be measured as the first clock signal in counter, utilizes the known clock signal inside circuit
Make benchmark and as second clock signal, obtains count start signal, meter after carrying out Fractional-N frequency processing to the second clock signal
Number up-down signal and reset signal, when by the count start signal, counting up-down signal and reset signal to described first
Clock signal carries out plus/minus counting, finally according to the remaining numerical value of up/down counter, judges the capacitance variation of the testing capacitance.
3. a kind of method of detection capacitor's capacity variation according to claim 2, which is characterized in that the testing capacitance
It is as follows that capacitance changes judgment mode: to be measured if numerical value remaining in counter is more than preset value in a counting end cycle
Capacitor's capacity is changed.
4. a kind of method of detection capacitor's capacity variation according to claim 2, which is characterized in that the counter is one
Gradation counting is carried out to first clock signal in a detection cycle, clock number is obtained by sampling in counting every time, and
Plus/minus counting successively is done to clock number, makes a saved differences in counter.
5. a kind of method of detection capacitor's capacity variation according to claim 4, which is characterized in that the gradation is counted as
It counts twice, wherein once counting to add, another time is to subtract counting.
6. a kind of method of detection capacitor's capacity variation according to claim 4, which is characterized in that the sampling is to institute
State the sampling of the rising edge clock of the first clock signal.
7. a kind of method of detection capacitor's capacity variation according to claim 4, which is characterized in that the sampling includes adopting
The delay process in sample period.
8. a kind of method of detection capacitor's capacity variation according to claim 2, which is characterized in that the final basis
The remaining numerical value of up/down counter is the difference counted twice.
9. a kind of method of detection capacitor's capacity variation according to claim 4, which is characterized in that being stored in counter
Difference integrates, to improve the precision of detection circuit.
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| CN107543972A (en) * | 2017-09-08 | 2018-01-05 | 乐鑫信息科技（上海）有限公司 | One kind measurement capacitor system and its measuring method |
| CN107632206B (en) * | 2017-09-22 | 2020-01-31 | 重庆纳尔利科技有限公司 | finger touch capacitance detection device and working method thereof |
| CN109444556B (en) * | 2018-11-06 | 2020-12-15 | 湖南品腾电子科技有限公司 | Novel sigma-delta capacitance touch detection circuit |
| CN111670527B (en) * | 2019-01-09 | 2024-06-11 | 深圳市大疆创新科技有限公司 | Discharge circuit for distance measuring device, distributed radar system and movable platform |
| CN110749779B (en) * | 2019-12-05 | 2021-08-24 | 上海芯凌微电子有限公司 | Capacitance change detection method and circuit for capacitive sensor |
| CN113341232B (en) * | 2021-05-31 | 2023-07-28 | 西安电子科技大学 | High-precision capacitance detection method and detection circuit with self-adaptive measuring range |
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| US6081569A (en) * | 1996-02-29 | 2000-06-27 | Alcatel Usa Sourcing, L.P. | Method and apparatus for determining the change in frequency of a reference signal |
| US20080122457A1 (en) * | 2006-11-28 | 2008-05-29 | Kabushiki Kaisha Toshiba | Capacitance difference detecting circuit |
| TWI357501B (en) * | 2008-03-25 | 2012-02-01 | Raydium Semiconductor Corp | Evaluation circuit for capacitance and method ther |
| TWI392876B (en) * | 2008-08-08 | 2013-04-11 | Sony Corp | Capacitance change measuring circuit of capacitive sensor device, capacitive sensor module, method of measuring capacitance change of capacitive sensor device, and electronic device |
| CN101615588A (en) * | 2009-07-31 | 2009-12-30 | 上海集成电路研发中心有限公司 | A kind of integrated circuit resistance and capacitance technological parameter fluctuation detector and using method |
| US8674709B2 (en) * | 2010-05-13 | 2014-03-18 | Silicon Works Co., Ltd. | Circuit and method for measuring capacitance value of touch screen |
| WO2013091909A1 (en) * | 2011-12-23 | 2013-06-27 | Imec | Method and system for measuring capacitance difference between capacitive elements |
| EP2657713B1 (en) * | 2012-04-24 | 2018-08-01 | VEGA Grieshaber KG | Method and device for determining a measurement capacity |
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