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CN106460213B - Cyanogen type electrolytic gold plating bath and the method for forming bump for using it - Google Patents

Cyanogen type electrolytic gold plating bath and the method for forming bump for using it Download PDF

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Publication number
CN106460213B
CN106460213B CN201580022227.9A CN201580022227A CN106460213B CN 106460213 B CN106460213 B CN 106460213B CN 201580022227 A CN201580022227 A CN 201580022227A CN 106460213 B CN106460213 B CN 106460213B
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bump
gold plating
plating bath
film
type electrolytic
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CN106460213A (en
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古川诚人
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EEJA Ltd
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NE Chemcat Corp
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    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D3/00Electroplating: Baths therefor
    • C25D3/02Electroplating: Baths therefor from solutions
    • C25D3/48Electroplating: Baths therefor from solutions of gold
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48After-treatment of electroplated surfaces
    • C25D5/50After-treatment of electroplated surfaces by heat-treatment
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors first coated with a seed layer or a conductive layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/11Manufacturing methods
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Electrochemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Electroplating And Plating Baths Therefor (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)

Abstract

According to the present invention, a kind of cyanogen type electrolytic gold plating bath is provided, is contained: as the cyaniding gold salt of Jin Yuan, 0.1~15g/L of down payment densimeter;Oxalates, 2.5~50g/L based on oxalic acid;Inorganic acid conducts 5~100g/L of salt;0.1~50g/L of water-soluble polysaccharides;And crystallization modifier can form the film hardness after being heat-treated by metal 0.1~100mg/L of densimeter as the au bump of 70~120HV.

Description

Cyanogen type electrolytic gold plating bath and the method for forming bump for using it
Technical field
The present invention relates to cyanogen type electrolytic gold plating baths.In addition, being related to using cyanogen system electricity in patterned semiconductor die on piece Solve the method for forming bump that gold plating bath forms the au bump of regulation hardness.
Background technique
It is mounted on the method on printed circuit board as by semiconductor wafer, there is method for joining electrode.Electrode engagement side Method is that the au bump that will be formed on the integrated circuit of semiconductor wafer and the electrode of substrate formed on printed circuit board connect The method connect.Fig. 2 is an example for showing the structure for the printed circuit board that semiconductor chip is equipped with by method for joining electrode Sectional view.
In Fig. 2,10 it is printed circuit board, 16 is semiconductor chip.In printed circuit board 10, in hard substrate 11 Surface multilayer board wiring pattern 12 and electrode of substrate 14.In semiconductor chip 16, the surface of semiconductor wafer 1 successively Laminate circuits layer 1' and Al (aluminium) electrode 2, passivating film 3.The opening portion of passivating film 3 in the surface of Al electrode 2, stacks gradually TiW sputtered film 4, golden sputtered film 5, au bump 7.
The electrode of substrate 14 of printed circuit board 10 and 7 electrical engagement of au bump of semiconductor chip 16.As electrically connecing It closes, the method or eutectic bonding using anisotropically conducting adhesive 20 can be enumerated.Anisotropically conducting adhesive refers to by Ni/ The resin particle of Au coating covering is evenly dispersed in the bonding agent in the heat-curing resins such as epoxy resin.Eutectic bonding refers to Eutectic is formed by thermo-compression bonding or ultrasonic wave, the electrode engagement that electrode of substrate is engaged with au bump.In Fig. 2, printed wiring The electrode of substrate 14 of substrate 10 and the au bump 7 of semiconductor chip 16 pass through 20 electrical engagement of anisotropically conducting adhesive.
The film hardness of au bump 7 after heat treatment is 60HV or less.The film hardness of au bump 7 after heat treatment according to it is each to Hardness and the material of electrode of substrate 14 of the conducting particles contained in anisotropic conductive adhesion agent 20 etc., it is suitable in 60HV range below Preferably adjust.
In recent years, with the lightweight of the electronic equipments such as mobile phone or laptop, miniaturization, the development of high performance, It is required that the miniaturization of electronic component.In the electronic component being miniaturized, the High Level of the integration density of circuit and small spacing Development.In the printed circuit board and semiconductor wafer that will be provided with the narrow circuit that interelectrode spacing width is 5~20 μm When electrical engagement, the bad phenomenon contacted between adjacent au bump is generated.Its reason is considered as due to by electrode of substrate When being thermally compressed with salient point, au bump is deformed in the in-plane direction.Previous film hardness is come for 60HV au bump below It says, film hardness is too low.Therefore, be unsuitable for and be provided with the narrow circuit of spacing width printed circuit board engagement.Therefore, it Seek the au bump to be formed compared with the au bump manufactured in the past with higher film hardness.
As the electrolytic gold plating bath used when forming au bump, there is the non-cyanogen type electrolytic gold plating with sulfurous acid gold for Jin Yuan Bath and be the cyanogen type electrolytic gold plating bath of Jin Yuan with gold cyanide.The high au bump of film hardness is formed in non-cyanogen type electrolytic gold plating bath Method be well known (patent document 1).Patent Document 1 discloses be added with polyalkylene glycol and/or amphoteric surface The non-cyanogen type electrolytic gold plating bath of activating agent.For the non-cyanogen type electrolytic gold plating bath, impurity is mixed into golden film, inhibits golden film Recrystallizationization.As a result, the golden film of high rigidity can be formed.
Existing technical literature
Patent document
Patent document 1: special open 2009-57631 bulletin
Summary of the invention
Problems to be solved by the invention
Non-cyanogen type electrolytic gold plating bath disclosed in Patent Document 1 is compared with cyanogen type electrolytic gold plating bath, the cost of chemical reagent It is high.In addition, the stability of gold plating bath is low, therefore the difficult management bathed.Therefore, because the appearance of cost effective requirement, bath management Yi Xing, pass through improvement of the photoresist suitable for fine patterning of cyanogen type electrolytic gold plating bath etc., it is desirable to use cyanide electrolysis The operator of gold plating bath increases.
But in cyanogen type electrolytic gold plating bath, even if adding organic additive in the same manner as non-cyanogen type electrolytic gold plating bath, Impurity is hardly eutectoid out on being formed by golden film.Therefore, because being formed by the gold purity is high of golden film, cause to be heat-treated After soften.That is, the cyanogen type electrolytic gold plating bath that can form the golden film of high rigidity is not also practical.
The purpose of the present invention is to provide can form the cyanogen type electrolytic gold plating bath of the high au bump of the film hardness after being heat-treated.
The means to solve the problem
The inventors of the present invention by further investigation as a result, it has been found that, pass through and add oxalates and water in cyanogen type electrolytic gold plating bath Soluble polysaccharide class can form the high au bump of film hardness, so far complete the present invention.Solve the above subject the present invention such as with It is lower described.
[1] cyanogen type electrolytic gold plating bath contains:
As the cyaniding gold salt of Jin Yuan, down payment 0.1~15g/L of densimeter,
Oxalates, 2.5~50g/L based on oxalic acid,
Inorganic acid conduction salt, 5~100g/L,
Water-soluble polysaccharides, 0.1~50g/L, and
Crystallization modifier, by 1~100mg/L of metal densimeter.
[2] cyanogen type electrolytic gold plating bath described in above-mentioned [1], wherein above-mentioned water-soluble polysaccharides are selected from dextrin, α-ring paste It is one kind or two or more in essence, beta-cyclodextrin and glucan.
[3] cyanogen type electrolytic gold plating bath described in above-mentioned [1], wherein above-mentioned crystallization modifier is selected from Tl compound, Pbization It closes one kind or two or more in object and As compound.
[4] method for forming bump, wherein use cyanide electrolysis described in [1] to [3] in patterned semiconductor die on piece After gold plating bath carries out electrolytic gold plating, by carrying out heat treatment in 5~600 minutes at 200~300 DEG C, forming film hardness is 70 The au bump of~120HV.
Invention effect
The film hardness of the au bump formed using cyanogen type electrolytic gold plating bath of the invention is 70~120HV, is suitable for small spacing Electronic component in semiconductor wafer and substrate electrical engagement.In addition, electrolytic gold plating bath of the invention is due to using cyaniding Gold salt, compared with the electrolytic gold plating bath of non-cyanogen system, the management of bath is easy.It, can when using cyanogen type electrolytic gold plating bath of the invention The au bump of high rigidity is formed with low cost.Therefore, the present invention helps to reduce the production cost of small-sized electronic part.
Detailed description of the invention
[Fig. 1] is the sectional view for showing an example of the au bump formed using cyanogen type electrolytic gold plating bath of the invention.
[Fig. 2] is the sectional view for showing an example being installed on semiconductor chip in the state of printed circuit board.
Specific embodiment
Cyanogen type electrolytic gold plating bath of the invention contains the cyaniding gold salt as Jin Yuan, oxalates, inorganic acid conduction salt, water-soluble Property polysaccharide and crystallization modifier.The film of the au bump formed using cyanogen type electrolytic gold plating bath of the invention after heat treatment is hard Degree is 70~120HV.Hereinafter, illustrating each ingredient for constituting cyanogen type electrolytic gold plating bath of the invention.
[cyaniding gold salt]
In cyanogen type electrolytic gold plating bath of the invention, well known cyaniding gold salt can be used as Jin Yuan without restriction. As cyaniding gold salt, potassium auricyanide, gold sodium cyanide, gold cyanide ammonium can be illustrated.
The use level down payment concentration of cyaniding gold salt is calculated as 0.1~15g/L, preferably 4~15g/L.Gold concentration is less than 0.1g/ When L, cathode efficiency is low, and the thickness of golden film becomes unevenly, to cannot get desired golden film thickness.It is explained, golden film is thick Preferably 10~20 μm of degree.When gold concentration is greater than 15g/L, cathode efficiency proportionally increases with gold ion concentration, thus It is inefficent.In addition, due to electroplate liquid taking-up and cause the loss of metal to increase.Therefore, production cost increases.
[conduction salt]
Cyanogen type electrolytic gold plating bath of the invention simultaneously conducts salt with inorganic acid conduction salt and the organic acid at least containing oxalates. When not using oxalates, plated film is slipped between photoresist and chip, is precipitated outside pattern without preferred because generating.That is, plated film The electroplating film of the golden sputtered film for the part slipped into thickens, and the etching process process of the UBM layer after cannot being gold-plated eliminates, and leads sometimes Cause poor flow.When without using inorganic acid conduction salt, the fluctuation of bump height becomes larger without preferred.
Salt is conducted as inorganic acid, uses phosphate.As phosphate, sodium phosphate, potassium phosphate, magnesium phosphate, phosphorus can be illustrated Sour ammonium is, it is preferable to use potassium phosphate.Inorganic acid conducts the use level of salt for 5~100g/L, preferably 10~80g/L, more preferably 20~70g/L.
Salt is conducted as organic acid, at least uses oxalates.As oxalates, potassium oxalate, sodium oxalate, oxalic acid can be illustrated Ammonium.The use level of oxalates is calculated as 2.5~50g/L, preferably 10~30g/L by oxalic acid.When less than 2.5g/L, it is latent to generate plated film Enter, when being greater than 100g/L, plating film outward appearance is easy to become bad.Salt is conducted as the organic acid other than oxalates, lemon can be illustrated Hydrochlorate, formates.As citrate, formates, potassium citrate, potassium formate can be illustrated.These can be used alone, can also be with It is used in combination of two or more.Organic acid conduct salt use level be 5~150g/L, preferably 20~140g/L, more preferably 30~ 130g/L.When conducting the use level of salt more than above range, covering power is deteriorated sometimes, or phenomenon is burnt in golden plated film generation sometimes.
[water-soluble polysaccharides]
In cyanogen type electrolytic gold plating bath of the invention, well known water-soluble polysaccharides can be used.From the sight of accessibility Point considers, can illustrate dextrin, alpha-cyclodextrin, beta-cyclodextrin, glucan.These water-soluble polysaccharides both can be used alone, Two or more kinds may be used.
When the film hardness of au bump after heat treatment is set as the high rigidity of 70~120HV, water-soluble polysaccharides are matched Resultant is preferably 0.1~50g/L, more preferably 0.5~30g/L.When use level is less than 0.1g/L, au bump after heat treatment Film hardness is less than 60HV.Such au bump is easy to deform due to the thermo-compression bonding of substrate and semiconductor wafer.Work as semiconductor die When the circuit of on piece is formed with small spacing, contacted between the au bump of deformation, there may be bad phenomenons in terms of engagement.Separately Outside, the hardness relative to the conducting particles in anisotropically conducting adhesive when the film hardness of au bump is too low, is then being thermally compressed In process, conducting particles is buried in au bump.As a result, conducting particles is not hot pressed between au bump and electrode of substrate It connects.When use level is more than 50g/L, burnt deposit is generated, bad order is caused.
Using the cyanogen type electrolytic gold plating bath of the invention for containing above-mentioned water-soluble polysaccharides, by using being described in detail below Method carry out plating, can be formed heat treatment after film hardness be 70~120HV au bump.
The film hardness of au bump after heat treatment can be controlled by adjusting type and the use level of water-soluble polysaccharides. Its reason is unclear, but is presumably due to above-mentioned defined water-soluble polysaccharides and is used as impurity to be ingested to golden film with easy In property.That is, inhibiting heat treatment by making the water-soluble polysaccharides being cooperated in cyanogen type electrolytic gold plating bath eutectoid in golden film The recrystallization of gold afterwards.Think it is possible thereby to form the high au bump of the film hardness after heat treatment.
The film hardness of au bump consider conducting particles type and with the relativity of the hardness of pairing metal, Yi Ji electricity The various conditions such as the spacing width on road select.
[crystallization modifier]
In cyanogen type electrolytic gold plating bath of the invention, addition Tl compound, Pb compound or As compound are adjusted as crystallization Save agent.As Tl compound, formic acid thallium, thallous malonate, thallium sulfate, thallium nitrate can be illustrated.As Pb compound, lemon can be illustrated Lead plumbate, plumbi nitras, lead sulfate.It is preferable to use plumbi nitras.As As compound, arsenic trioxide can be illustrated.These Tl compounds, Pb compound and As compound both can be used alone, and also two or more kinds may be used.
The use level of crystallization modifier can be suitable for determining within the scope without prejudice to the object of the present invention.In general, dense by metal Degree meter is 0.1mg~100mg/L, preferably 0.5~50mg/L, more preferably 1~30mg/L.Use level is more than 100mg/L When, it is possible to covering power is deteriorated.In addition, the appearance of obtained golden plated film generates spot (unevenness).Use level is less than 0.1mg/L When, phenomenon is burnt in obtained golden plated film generation.
[other compositions]
In cyanogen type electrolytic gold plating bath of the invention, in addition to the above ingredients, the object of the invention can not damaged Contain the ingredients such as pH adjusting agent in range.As pH adjusting agent, can illustrate sodium hydroxide, potassium hydroxide, ammonium hydroxide and phosphoric acid, Citric acid, oxalic acid.
[forming method of au bump]
By using cyanogen type electrolytic gold plating bath of the invention, plating operation is carried out according to conventional methods, thus, it is possible to be formed The golden film that film hardness is 70~120HV, film thickness is 10~50 μm.Cyanogen type electrolytic gold plating bath of the invention will be used, in semiconductor The method that au bump is formed on chip is illustrated referring to Fig.1.
(1) lamination process
Fig. 1 is the sectional view for showing an example of the au bump formed using cyanogen type electrolytic gold plating bath of the invention.Firstly, The formation of semiconductor wafer 1, which has, forms Al electrode 2 on the face of circuit layer 1'.Then, on the surface of circuit layer 1', covering electricity is formed The passivating film 3 of road floor 1' and Al electrode 2.In passivating film 3, in the position that a part for making Al electrode 2 is exposed, opening portion is set 3a.TiW sputtered film 4 is formed on the surface of passivating film 3.Passivating film 3 and 2 quilt of Al electrode exposed from the opening portion 3a of passivating film 3 TiW sputtered film 4 covers.Au sputtered film 5 is formed on the surface of TiW sputtered film 4.TiW sputtered film 4 and Au sputtered film 5 constitute salient point Lower metal (UBM) layer 6.Photoresist film 8 is formed on the surface of UBM layer 6, thus masked (forming exposure mask).On photoresist film 8 The opening portion 8a for exposing a part of Au sputtered film 5 is set.The opening portion 8a of photoresist film 8 is set in photoresist film 8 There are the regions of Al electrode 2 for lower layer.Material as photoresist film 8 is, it is preferable to use negative photoresist etc..
(2) electrolytic gold plating process
The semiconductor wafer 1 of stepped construction will be formed with as plated body, using being suitable for adjusting pH, fluid temperature, electric current The cyanogen type electrolytic gold plating bath of the invention of density carries out electrolytic gold plating to desired film thickness.With gold plating bath of the invention by blank Metallising does not select plated body as long as electric conductivity is high.In particular, being suitable for carrying out patterned silicon using photoresist film 8 Au bump is formed on the circuit of chip or on the circuit of compound wafers such as GaAs chip.
Cyanogen type electrolytic gold plating bath of the invention uses preferably under pH4.0~8.0, more preferably makes under pH5.0~7.0 With.When pH is less than 4.0, cathode efficiency is reduced, and sufficient film thickness is not achieved in gained golden film.When pH is more than 8.0, gained golden film Appearance become redization.
The liquid temperature of cyanogen type electrolytic gold plating bath of the invention is preferably 30~80 DEG C, and more preferably 40~70 DEG C.The liquid of plating bath When temperature is outside above range, cathode efficiency decline, or the stability of gold plating bath is had lost, it is thus not preferred.
Current density when using cyanogen type electrolytic gold plating bath of the invention considers the composition of electroplate liquid, liquid temperature, other conditions And it sets.It is thus impossible to lump together, still, for example, at 55 DEG C of liquid temperature using the electroplate liquid that gold concentration is 8g/L when, electricity Current density is preferably set to 0.5~1.0A/dm2.When not being set as current density appropriate, the characteristic of plating appearance and plated film It is possible that generating abnormal.In addition, plating bath becomes unstable, the decomposition of electroplating bath components is generated sometimes.
After electrolytic gold plating, the photoresist film 8 of semiconductor wafer 1 is dissolved by the solvent removing.By removing photoresist film 8, no Exposed by the UBM layer 6 in the region that au bump 7 covers.The UBM layer 6 of exposing is removed by etching etc..As a result, convex not by gold The region of 7 covering of point, passivating film 3 expose.It is not removed by the process by the UBM layer 6 that au bump 7 covers, maintains stepped construction.
(3) heat treatment procedure
After removing UBM layer 6 and photoresist film 8, the semiconductor wafer 1 for being formed with au bump 7 carries out at 200~300 DEG C Heat treatment.Heat treatment time is 5 minutes or more, preferably 30~600 minutes.Good baking oven of heat treatment (fine oven) etc.. Good baking oven is heat-treated the necessary time due to that can keep, and chamber interior can be kept to the stipulated time at a set temperature, because And it is suitable for the heat treatment.After heat treatment, semiconductor wafer 1 is naturally cooled.Temperature reduce process, being recrystallised of gold, Thus film hardness changes.The film hardness of the au bump obtained by above-mentioned forming method is 70~120HV, with previous gold Salient point is compared, and hardness is high.
Cyanogen type electrolytic gold plating bath of the invention carries out supplement management by the ingredient to Jin Yuan and composition plating solution, can be used It is more than 2 circulations." 1 circulation " refers to that the gold in gold plating bath is all plated the state of consumption.
Embodiment
Hereinafter, specifically describing the present invention by embodiment.The present invention is not limited to these embodiments.
As plated body, become Au/TiW/SiO using blank section group2Silicon wafer.The photoresist film of silicon wafer uses Negative photoresist (JSR society product name: THB-121N).On photoresist film, opened by 20 μm of spacing settings 2 of configuration are patterned Oral area.The opening shape of one opening portion is the rectangle of 20 μm of short side, 100 μm of long side.The opening shape of another opening portion It is the square that side length is 100 μm.
According to composition described in table 1-2, the electroplate liquid of embodiment 1~12, the Comparative Examples 1 to 5 is modulated.In the electroplate liquid of modulation Plated body is impregnated in 1L, under conditions of described in the table 1-2, is carried out electrolysis electroplating operations to golden film with a thickness of 15 μm, then being carried out Heat treatment.The physical property of obtained au bump is measured by method described below.Measurement result is recorded in table 1-2.
(film hardness (Vickers hardness;HV)〕
In 2 au bumps formed on plated body, the square au bump for the use of side length being 100 μm, measurement heat treatment Hardness preceding and that the au bump after heat treatment in 30 minutes is carried out at 250 DEG C.Measurement uses the small hardness test of ミ Star ト ヨ society's system Machine HM-221 is carried out.Determination condition is that will measure pressure head to be kept for 10 seconds under 25gf load.
(bath stability)
After implementing electrolytic gold plating on plated body, the state of visual observations gold plating bath.
Zero: decomposition and precipitating being not observed in gold plating bath.
×: decomposition or precipitating are observed in gold plating bath.
(plating film outward appearance)
Using the appearance for the au bump that micro- sem observation is formed on plated body, visual assessment tone, spot are (uneven It is even), surface roughness.
Zero: exception is not observed in terms of tone, spot.
×: exception is observed in terms of tone, spot.
(plated film slips into)
Using the appearance for the au bump that micro- sem observation is formed on plated body, visual assessment plated film is slipped into.
Zero: plated film is not observed and slips into.
×: observe that plated film slips into.
Table 2
The film hardness of the au bump formed in embodiment 1~12 after heat treatment is high in the range of 70~120HV Hardness.The tone of arbitrary au bump is lemon yellow, and the semi-glossy of (uneven) of being speckless~lacklustre is well Appearance.Bath stability is also good.
The film hardness of the au bump formed in comparative example 1 after heat treatment is less than 70HV, is soft.Tone is lemon Huang obtains the semi-glossy~lacklustre good appearance being speckless.Bath stability is good.
The film hardness of the au bump formed in comparative example 2 after heat treatment is less than 70HV, is soft.In addition, in photoetching Slipping into for plated film is found between glue and chip.The appearance of obtained salient point be speckless, semi-glossy~lacklustre it is good outer It sees.Bath stability is good.
The film hardness of the au bump formed in comparative example 3 after heat treatment is 90HV, is high rigidity.But in photoresist Slipping into for plated film is found between chip.The appearance of obtained salient point be speckless, semi-glossy~lacklustre good appearance. Bath stability is good.
The film hardness of the au bump formed in comparative example 4 after heat treatment is less than 70HV, is soft.In addition, in photoetching Slipping into for plated film is found between glue and chip.The appearance of obtained salient point be speckless, semi-glossy~lacklustre it is good outer It sees.Bath stability is good.
The film hardness of the au bump formed in comparative example 5 after heat treatment is 90HV, is high rigidity.In addition, in photoresist Slipping into for plated film is found between chip.There are spot (uneven) for the appearance of obtained salient point.Bath stability is good.
Symbol description
1 semiconductor wafer
1' circuit layer
2 Al electrodes
3 passivating films
The opening portion of 3a passivating film
4 TiW sputtered films
5 gold medal sputtered films
6 UBM layers
7 au bumps
The surface of 7a au bump
8 photoresist films
The opening portion of 8a photoresist film
10 printed circuit boards
11 hard substrates
12 substrate wiring patterns
14 electrode of substrate
16 semiconductor chips
18 sealing materials
20 anisotropically conducting adhesives

Claims (4)

1. au bump, which is formed, uses cyanogen type electrolytic gold plating bath, which is characterized in that contain:
As the cyaniding gold salt of Jin Yuan, down payment 0.1~15g/L of densimeter,
Oxalates, 2.5~50g/L based on oxalic acid,
Inorganic acid conduction salt, 5~100g/L,
Water-soluble polysaccharides, 0.1~50g/L, and
Crystallization modifier, by 0.1~100mg/L of metal densimeter;
Above-mentioned water-soluble polysaccharides inhibit the recrystallization of the gold after heat treatment.
2. au bump described in claim 1, which is formed, uses cyanogen type electrolytic gold plating bath, wherein above-mentioned water-soluble polysaccharides are selected from paste It is one kind or two or more in essence, alpha-cyclodextrin, beta-cyclodextrin and glucan.
3. au bump described in claim 1, which is formed, uses cyanogen type electrolytic gold plating bath, wherein above-mentioned crystallization modifier is selected from Tlization It closes one kind or two or more in object, Pb compound and As compound.
4. method for forming bump, wherein require 1 to 3 described in any item gold in patterned semiconductor die on piece right to use benefit After salient point formation carries out electrolytic gold plating with cyanogen type electrolytic gold plating bath, by being carried out at 200~300 DEG C at 5~600 minutes heat Reason forms the au bump that film hardness is 70~120HV.
CN201580022227.9A 2014-06-11 2015-05-15 Cyanogen type electrolytic gold plating bath and the method for forming bump for using it Active CN106460213B (en)

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JP2014120323A JP6393526B2 (en) 2014-06-11 2014-06-11 Cyan-based electrolytic gold plating bath and bump forming method using the same
PCT/JP2015/063991 WO2015190218A1 (en) 2014-06-11 2015-05-15 Cyanide electrolytic gold plating bath and bump formation method using same

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CN105543910B (en) * 2015-12-25 2018-01-30 西南石油大学 A kind of nickel tungsten composite deposite and preparation method thereof
WO2022140770A1 (en) * 2020-12-21 2022-06-30 Northwestern University SUPRAMOLECULAR GOLD STRIPPING FROM ACTIVATED CARBON USING α-CYCLODEXTRIN
CN113913879B (en) * 2021-09-30 2022-08-09 深圳市联合蓝海黄金材料科技股份有限公司 Cyanide-free electrogilding solution, use thereof, method for producing gold bumps by electrogilding, gold bumps and electronic components
CN116240597B (en) * 2022-12-29 2024-03-26 华为技术有限公司 Electroplating solution and application thereof
CN115928161B (en) * 2022-12-29 2024-08-27 华为技术有限公司 Gold electroplating solution and application thereof, gold bump, preparation method of gold bump, electronic component and electronic equipment

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JP6393526B2 (en) 2018-09-19
CN106460213A (en) 2017-02-22
WO2015190218A1 (en) 2015-12-17

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