CN106444190B - COA substrate, manufacturing method thereof and liquid crystal panel - Google Patents
COA substrate, manufacturing method thereof and liquid crystal panel Download PDFInfo
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- CN106444190B CN106444190B CN201610933807.XA CN201610933807A CN106444190B CN 106444190 B CN106444190 B CN 106444190B CN 201610933807 A CN201610933807 A CN 201610933807A CN 106444190 B CN106444190 B CN 106444190B
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- 239000000758 substrate Substances 0.000 title claims abstract description 34
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 17
- 239000004973 liquid crystal related substance Substances 0.000 title abstract description 15
- 238000002161 passivation Methods 0.000 claims abstract description 83
- 239000002184 metal Substances 0.000 claims abstract description 37
- 238000000151 deposition Methods 0.000 claims abstract description 5
- 238000009413 insulation Methods 0.000 claims abstract description 3
- 238000000034 method Methods 0.000 claims description 41
- 238000005229 chemical vapour deposition Methods 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 10
- 229920002120 photoresistant polymer Polymers 0.000 claims description 10
- 238000011161 development Methods 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 6
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 5
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 3
- 238000000576 coating method Methods 0.000 claims description 3
- 238000005240 physical vapour deposition Methods 0.000 claims description 3
- 238000012797 qualification Methods 0.000 abstract description 3
- 230000018109 developmental process Effects 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 229910004205 SiNX Inorganic materials 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 238000012545 processing Methods 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000032683 aging Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 210000002858 crystal cell Anatomy 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000006355 external stress Effects 0.000 description 1
- 238000002347 injection Methods 0.000 description 1
- 239000007924 injection Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000012876 topography Methods 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Liquid Crystal (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides a COA substrate.A grid metal layer, a grid insulation layer, an active layer, a source drain metal layer and a source drain are formed on a substrate, and a first passivation layer is formed on the source drain metal layer; depositing a color resistance layer on the first passivation layer, wherein a first through hole and a second through hole are respectively formed in the first passivation layer and the color resistance layer, a second passivation layer is formed on the color resistance layer, a third through hole is formed in the second passivation layer and located on the second through hole, and the aperture of the third through hole is larger than that of the first through hole, so that a staggered area is formed between the first passivation layer and the second passivation layer; the first through hole, the second through hole and the third through hole form a via hole, and transparent conductive layers are arranged on the second passivation layer, the via hole and the exposed source drain metal layer. Compared with the prior art, the invention also provides a manufacturing method of the COA substrate and the liquid crystal panel, the opening rate is improved, the area of the contact hole is increased, the reliability is improved, and meanwhile, the qualification rate is also improved.
Description
Technical Field
The invention relates to the technical field of thin film transistor liquid crystal displays, in particular to a COA substrate, a manufacturing method thereof and a liquid crystal panel.
Background
In the liquid crystal panel industry, the COA (color filter on Array) technology is a structure for fabricating a color filter substrate on an Array substrate, and has been widely used in TFT-LCD, and color resistors are fabricated on the Array side (i.e., an integrated circuit Array substrate, a lower glass substrate in a TFT-LCD screen), which can effectively reduce the Resistance (RC) of a circuit, increase the aperture ratio, and improve the display quality. Under the premise of high resolution and high frequency of the panel, the COA technology has irreplaceable advantages.
The problem of Bubble (Bubble) in the liquid crystal cell is a major problem faced by COA technology, which includes reliability tests, mainly covering deterioration of environmental conditions (high temperature, high humidity, low temperature, low pressure) storage and aging tests. The bubble is in an air form, and can expand and expand after being heated to extrude liquid crystal in the existing area, so that abnormal display is caused; there are generally two main factors for bubble formation: the first factor is that the color resistance layer is manufactured on the Array side, and the color resistance opening (CF open) is deeper, so that liquid crystal is easily not completely filled into the color resistance opening to form a gap, and finally the gap is converted into a bubble; the second factor is that the color resists are organic materials, and gas is released sequentially under the action of external stress changes in subsequent processes and after the processes are finished, so that bubbles are formed.
Currently, the main countermeasures against the above factors are: the liquid drops dropped by the liquid crystal are smaller and the graph is denser during the ODF process (One Drop Fill liquid crystal injection method); 2. a small hole is opened on the color resistor and the second passivation layer (PV2) to let the gas in the color resistor release in the subsequent process. However, the two strategies include the design of the color resist opening (CF open) including the opening of the passivation layer, so the size of the color resist opening needs to be designed in consideration of the size of the via hole (i.e. the contact hole between the transparent conductive layer ITO and the metal layer M2), the machine alignment deviation (i.e. the alignment precision with the previous layer during exposure, during the actual production, the deviation of the processing machine itself occurs, the deviation also occurs between machines of different processes), and the characteristics of the color resist material are overlapped, so a larger opening has to be designed, and the loss of the aperture ratio is caused.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides the COA substrate, the manufacturing method thereof and the liquid crystal panel, so that the product quality is improved, the product qualification rate is improved, the production cost is saved and the production period is shortened.
The invention provides a COA substrate, which comprises a substrate, wherein a grid metal layer, a grid insulation layer, an active layer and a source drain metal layer are sequentially formed on the substrate; a color resistance layer is arranged on the first passivation layer, a first through hole and a second through hole are respectively formed in the first passivation layer and the color resistance layer, the first through hole is communicated with the second through hole, a second passivation layer is formed on the color resistance layer, a third through hole is formed in the second passivation layer corresponding to the second through hole, and the aperture of the third through hole is larger than that of the first through hole, so that a staggered area is formed between the first passivation layer and the second passivation layer; the first through hole, the second through hole and the third through hole form a via hole, and a transparent conducting layer (9) is arranged on the second passivation layer, the inner wall of the via hole and the source drain electrode metal layer exposed through the via hole.
Further, the hole wall of the second through hole is arc-shaped.
The invention also provides a manufacturing method of the COA substrate, which comprises the following steps:
step one, S01, forming a gate metal layer on the substrate;
step two S02, forming a gate insulating layer on the gate metal layer and the substrate uncovered by the gate metal layer;
step three, S03, forming an active layer on the gate insulating layer;
step four S04, forming a source drain metal layer on the gate insulating layer, and patterning the source drain metal layer to form a source drain;
step five S05, forming a first passivation layer on the source drain metal layer through a chemical vapor deposition process;
step six S06, forming a color resistance layer on the first passivation layer through a photomask process, and forming a second through hole through an exposure development process;
seventhly, S07, forming a second passivation layer on the color resistance layer through a chemical vapor deposition process;
eighthly, 08, forming a light resistor on a second passivation layer by adopting coating and exposure processes, etching the first passivation layer and the second passivation layer which are not shielded by the light resistor through an etching process, forming a first through hole on the first passivation layer, forming a third through hole on the second passivation layer, and communicating the first through hole, the second through hole and the third through hole to form a through hole;
ninthly, step 09, stripping the photoresist on the second passivation layer through a stripping process, and forming a transparent conductive layer on the second passivation layer, the inner wall of the via hole and the source/drain metal layer exposed through the via hole through a physical vapor deposition process;
in step ten S10, a pixel electrode is formed by patterning the transparent conductive layer after exposure, development and etching.
Further, the first passivation layer is formed by depositing silicon nitride through a chemical vapor deposition process.
Further, in step six S06, after the second through hole is formed, the hole wall of the second through hole is arc-shaped after high-temperature curing, and an upper end opening of the second through hole is larger than a lower end opening of the second through hole.
Further, the aperture of the first through hole is smaller than that of the third through hole, so that a staggered area is formed between the first passivation layer and the second passivation layer.
The invention also provides a liquid crystal panel which comprises the COA substrate.
Compared with the prior art, the first through hole is formed in the first passivation layer, the third through hole with the aperture larger than that of the first through hole is formed in the second passivation layer, the color resistance layer is provided with the hole, and the transparent conducting layer is covered on the color resistance layer, so that gas in the color resistance can escape from a staggered area between the first through hole and the third through hole in the subsequent manufacturing process, and bubbles are avoided; the size of the color resistance hole (second through hole) can be reduced, and the opening ratio is improved only by considering the influence of machine alignment deviation and the characteristics of the color resistance material; the color resistance open hole (CFopen) aiming at the second passivation layer and the color resistance layer in the COA manufacturing process is combined together, namely the aperture of the upper end opening of the second through hole is equal to that of the third through hole, so that the terrain complexity of the array side (an integrated circuit array substrate, namely a lower glass substrate) can be reduced, namely, in the manufacturing of an integrated circuit, a height difference is formed between a place with a circuit and a place without the circuit; but also increases the contact hole area, improves the reliability and improves the qualification rate.
Drawings
Fig. 1 is a schematic structural diagram of the present invention after forming a first passivation layer and a second passivation layer.
FIG. 2 is a schematic diagram of a structure for forming a photoresist according to the present invention.
FIG. 3 is a schematic structural diagram of a via hole formed after etching away the first passivation layer and the second passivation layer without color block shielding according to the present invention.
Fig. 4 is a schematic structural diagram of forming a transparent conductive layer on a via hole according to the present invention.
FIG. 5 is a schematic plan view of a via hole of the present invention.
FIG. 6 is a flow chart of a method for fabricating a COA substrate according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
As shown in fig. 4 and 5, the COA substrate (Color Filter on Array) of the present invention includes a substrate, a gate metal layer is formed on the substrate by 4 or 5 photo-mask processes on the substrate, a gate insulating layer is formed on the gate metal layer, an active layer is formed on the gate insulating layer, a source drain metal layer 1 is further formed on the gate insulating layer, a source drain is formed after the source drain metal layer 1 is patterned, a first passivation layer 2 is formed on the source drain metal layer 1 by chemical vapor deposition, and the first passivation layer 2 is used to protect a TFT back channel; a color resistance layer 3 is deposited on a first passivation layer 2, a first through hole 4 and a second through hole 5 are respectively formed in the first passivation layer 2 and the color resistance layer 3, the first through hole 4 is communicated with the second through hole 5, a second passivation layer 6 is formed on the color resistance layer 3 through chemical vapor deposition, a third through hole 7 is formed in the second passivation layer 6 on the second through hole 5, the aperture of the third through hole 7 is larger than that of the first through hole 4, a staggered area 11 is formed between the first passivation layer 2 and the second passivation layer 6, and the staggered area 11 is used for gas in color resistance to escape from the part of the hole wall of the staggered area 11 through the second through hole 5 in the subsequent manufacturing process; the first through hole 4, the second through hole 5 and the third through hole 7 form a via hole 8, the first through hole 4 forms a lower end opening of the via hole 8, the second through hole 5 forms a hole wall part of the via hole 8, the third through hole 7 forms an upper end opening of the via hole 8, and a transparent conductive (ITO) layer 9 covers the second passivation layer 6, the via hole 8 and the source and drain electrode metal layer 1 at the via hole 8.
The wall of the second through hole 5 is arc-shaped to form a horn shape, so that the edge of the second through hole 5 is smoothly connected with the upper surface of the color resistance layer 3, and the liquid crystal can be more favorably and fully filled in the through hole without gaps in the subsequent processing.
The first passivation layer 2 and the second passivation layer 6 both adopt silicon nitride SiNx.
The liquid crystal panel of the present invention includes the above COA substrate, which is not described herein again.
In the invention, the aperture of the first through hole 3 is equal to the aperture of the lower end opening of the second through hole 5, the aperture of the third through hole 7 is equal to the aperture of the upper end opening of the second through hole 5, so that the size of the second through hole 5 on the color resistance layer 3 is reduced, in the existing design, the opening positions of the second passivation layer and the first passivation layer are both positioned at the bottom of the color resistance opening, the aperture of the opening of the second passivation layer and the first passivation layer is smaller than the aperture of the color resistance opening, and the via hole is composed of the opening of the second passivation layer and the first passivation layer, therefore, whether the size of the via hole (via hole) can cause larger contraposition deviation or not needs to be considered when designing the size of the color resistance opening, in order to avoid the contraposition deviation, the aperture of the via hole needs to be considered, the aperture of the color resistance opening has to be increased, thereby reducing the contraposition deviation, in the invention, the color resistor opening does not need to comprise openings of a first passivation layer and a second passivation layer, so that the color resistor opening can be designed to be smaller, and the transparent conducting layer is contacted with the source drain electrode metal layer through the via hole formed by the first through hole, the second through hole and the third through hole, so that the size of the via hole does not need to be considered on the aspect of the size of the color resistor opening, and the aperture of the color resistor opening can be smaller than that of the original color resistor opening; the small holes for dissipating bubbles, which are formed in the surface of the color resistance layer 3 in the prior art, are combined with the color resistance holes, and the bubbles are dissipated through the hole wall of the part, located in the staggered area 11, of the second through hole 5 of the color resistance layer 3, so that the problem of other influences caused by excessively complex topography of the array substrate is solved; through the structure, the invention only needs to consider the influence of the alignment deviation of the machine and the characteristics of the color resistance material, so that the aperture opening ratio is improved, the brightness of the backlight plate can be reduced, and the power consumption is saved.
As shown in fig. 6, the method for manufacturing a COA substrate of the present invention includes the steps of:
step one, S01, forming a gate metal layer on the substrate;
step two S02, forming a gate insulating layer on the gate metal layer and the substrate uncovered by the gate metal layer;
step three, S03, forming an active layer on the gate insulating layer;
step four S04, forming a source drain metal layer 1 on the gate insulating layer, and patterning the source drain metal layer 1 to form a source drain;
step five S05, forming a first passivation layer 2 on the source drain metal layer 1 through a chemical vapor deposition process in the prior art to protect the TFT back channel; the first passivation layer 2 is formed by depositing silicon nitride SiNx through a chemical vapor deposition process;
step six S06, forming a photoresist layer 3 on the first passivation layer 2 by using a photomask process in the prior art, forming a second through hole 5 by using an exposure and development process in the prior art, and curing at a high temperature (generally 230 ℃) to enable the hole walls on two sides of the second through hole 5 to be arc-shaped to form a horn shape, wherein the upper end opening of the second through hole 5 is larger than the lower end opening of the second through hole 5;
seventhly, step S07, forming a second passivation layer 6 on the color resistance layer 3 by a chemical vapor deposition process of the prior art; the second passivation layer 6 is formed by depositing silicon nitride SiNx (shown in fig. 1) through a chemical vapor deposition process;
step eight S08, forming a photoresist 10 on the second passivation layer 6 by using a coating and exposure process of the prior art, etching away the first passivation layer 2 and the second passivation layer 6 (shown in fig. 2) which are not blocked by the photoresist 10 by using an etching process of the prior art, preferably, forming a first through hole 4 on the first passivation layer 2, defining a contact hole between the transparent conductive layer 9 and the source/drain metal layer 1, forming a third through hole 7 (shown in fig. 3) on the second passivation layer 6, wherein the aperture of the first through hole 4 is smaller than that of the third through hole 7, so that a staggered area 11 is formed between the first passivation layer 2 and the second passivation layer 6, the staggered area 11 is used for allowing gas in the color resistor to escape through the staggered area 11 in the subsequent process, and the first through hole 4, the second through hole 5 and the third through hole 7 form a through hole 8, the first through hole 4 forms a lower end opening of the via hole 8, the second through hole 5 forms a hole wall part of the via hole 8, and the third through hole 7 forms an upper end opening of the via hole 8;
ninthly, step 09, stripping the photoresist 10 on the second passivation layer 6 by a stripping process of the prior art, and forming a transparent conductive layer 9 (shown in fig. 4) on the second passivation layer 6, the inner wall of the via hole 8 and the source/drain metal layer 1 exposed by the via hole 8 by a physical vapor deposition process of the prior art;
in step ten S10, a pixel electrode is formed by patterning the transparent conductive layer 9 after exposure, development and etching according to the related art.
In the invention, the process of forming the bottom gate in the first step S01 to the fourth step S04 can be manufactured by adopting 4 or 5 photomasks in the prior art; the manner of forming the pixel electrode in the step ten S10 can also be obtained by using the method for forming the pixel electrode in the prior art; in the embodiment of the present invention, the specific manufacturing method of each layer is not particularly limited, and the present invention may be implemented.
While the invention has been shown and described with reference to certain embodiments, those skilled in the art will understand that: various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims and their equivalents.
Claims (2)
1. A method for manufacturing a COA substrate, comprising the steps of:
step one, S01, forming a gate metal layer on the substrate;
step two S02, forming a gate insulating layer on the gate metal layer and the substrate uncovered by the gate metal layer;
step three, S03, forming an active layer on the gate insulating layer;
step four S04, forming an active drain metal layer (1) on the gate insulation layer, and patterning the source drain metal layer (1) to form a source drain;
step five S05, forming a first passivation layer (2) on the source drain metal layer (1) through a chemical vapor deposition process;
sixthly, S06, forming a photoresist layer (3) on the first passivation layer (2) through a photomask process, forming a second through hole (5) through an exposure and development process, and after the second through hole (5) is formed, curing at high temperature to enable the wall of the second through hole (5) to be arc-shaped, wherein the upper end opening of the second through hole (5) is larger than the lower end opening of the second through hole (5);
a seventh step S07 of forming a second passivation layer (6) on the color resist layer (3) by a chemical vapor deposition process;
eighthly, 08, forming a photoresist (10) on a second passivation layer (6) by using coating and exposure processes, etching the first passivation layer (2) and the second passivation layer (6) which are not shielded by the photoresist (10) through an etching process, forming a first through hole (4) on the first passivation layer (2), forming a third through hole (7) on the second passivation layer (6), wherein the first through hole (4), the second through hole (5) and the third through hole (7) are communicated to form a via hole (8), and the aperture of the first through hole (4) is smaller than that of the third through hole (7), so that a staggered area (11) is formed between the first passivation layer (2) and the second passivation layer (6);
ninthly, step 09, stripping the photoresist (10) on the second passivation layer (6) through a stripping process, and forming a transparent conductive layer (9) on the second passivation layer (6), the inner wall of the via hole (8) and the source/drain metal layer (1) exposed through the via hole (8) through a physical vapor deposition process;
step ten S10, forming a pixel electrode by patterning the transparent conductive layer (9) after exposure, development and etching.
2. The method of manufacturing a COA substrate as set forth in claim 1, wherein: the first passivation layer (2) is formed by depositing silicon nitride through a chemical vapor deposition process.
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN107037653A (en) * | 2017-05-11 | 2017-08-11 | 惠科股份有限公司 | Display panel, preparation method thereof and display |
| CN107589581B (en) * | 2017-09-01 | 2020-07-03 | 深圳市华星光电技术有限公司 | Preparation method of color resistance layer of array substrate, array substrate and display panel |
| CN107479286B (en) * | 2017-09-04 | 2020-08-04 | 深圳市华星光电技术有限公司 | Via hole structure for improving gray scale twill |
| US10578784B2 (en) | 2017-09-04 | 2020-03-03 | Shenzhen China Star Optoelectronics Technology Co., Ltd | Color-filter on array (COA) display panel, manufacturing method thereof and COA display device |
| CN107589582A (en) * | 2017-09-04 | 2018-01-16 | 深圳市华星光电技术有限公司 | COA display panels and preparation method thereof, COA display devices |
| CN107463042A (en) * | 2017-09-06 | 2017-12-12 | 深圳市华星光电技术有限公司 | Array base palte and its manufacture method, liquid crystal panel |
| US11099481B2 (en) | 2018-03-09 | 2021-08-24 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. | Mask plate, array substrate, and preparation method thereof |
| CN108508695B (en) * | 2018-03-09 | 2020-10-02 | 深圳市华星光电半导体显示技术有限公司 | Mask plate, array substrate, display and preparation method of array substrate |
| US11163203B2 (en) | 2019-12-06 | 2021-11-02 | Tcl China Star Optoelectronics Technology Co., Ltd. | COA substrate and method of fabricating same |
| CN111077706A (en) * | 2019-12-06 | 2020-04-28 | Tcl华星光电技术有限公司 | COA substrate and manufacturing method thereof |
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| US7808595B2 (en) * | 2007-04-02 | 2010-10-05 | Lg Display Co., Ltd. | Array substrate for liquid crystal display device and manufacturing method of the same |
| TWI336018B (en) * | 2007-11-05 | 2011-01-11 | Au Optronics Corp | Liquid crystal display panel and manufacturing method of opposite substrate thereof |
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