CN106251904A - Memory voltage regulating method and circuit - Google Patents
Memory voltage regulating method and circuit Download PDFInfo
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- CN106251904A CN106251904A CN201610597372.6A CN201610597372A CN106251904A CN 106251904 A CN106251904 A CN 106251904A CN 201610597372 A CN201610597372 A CN 201610597372A CN 106251904 A CN106251904 A CN 106251904A
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- voltage
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- 230000015654 memory Effects 0.000 title claims abstract description 63
- 238000000034 method Methods 0.000 title claims abstract description 24
- 230000001105 regulatory effect Effects 0.000 title abstract description 7
- 230000001276 controlling effect Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 102100039435 C-X-C motif chemokine 17 Human genes 0.000 description 1
- 101000889048 Homo sapiens C-X-C motif chemokine 17 Proteins 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
Classifications
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/30—Power supply circuits
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Abstract
The embodiment of the invention discloses a kind of memory voltage regulating method, the method goes dynamically to obtain memory standards parameter by BIOS, the running voltage being suitable for according to different memory standards parameter determination current memory, BIOS and then be programmed control signal being configured to high level or low level, this control signal is gone to control voltage regulator circuit as input and is carried out memory voltage regulation, thus exports this method of running voltage matched to internal memory.The technical scheme that the present invention provides has the advantage adapting to multiple voltage.
Description
Technical field
The present invention relates to computer realm, particularly relate to memory voltage regulating method and circuit.
Background technology
Along with the development of technology, computer has been widely used in industry, agricultural, business, education, traffic, national defence etc.
Every field, in today of computer highly popularization, the stability of computer, reliability are particularly important.Internal memory
(Memory, also referred to as internal storage), as one of of paramount importance parts of computer, it is peripheral hardware and CPU (Central
Processing Unit, central processing unit) carry out the bridge linked up, its Main Function is to need fortune to be processed for depositing CPU
Count evidence, and the data of the external memory storage such as hard disk exchange.As long as computer is running, central processing unit will be transported needs
The data calculated are transferred in internal memory process, and result are sent out after process completes again.Thus, the stability of internal memory is direct
Have influence on the stability of computer.During inside there is work, need suitable running voltage, the standard of such as DDR3 internal memory
Running voltage be 1.5V, DDR3L for 1.35V.For different internal memories, the running voltage the matched stability to internal memory,
And there is vital effect in service life.
Making a general survey of some computers of main flow on current market and the use pattern of user, the meter of DDR3 internal memory is supported in nominal
Calculation machine, plugs what the internal memory of DDR3L generally also can start shooting and use, but is measured by voltage and find that the internal memory of DDR3L supplies
Piezoelectric voltage is still that 1.5V.Otherwise, the computer of DDR3L internal memory is supported in some nominal, and the internal memory plugging DDR3 is also to open
Machine, but the running voltage that voltage measures discovery DDR3 internal memory is 1.35V.
(standard configuration supports the computer of DDR3 internal memory, and use is but the internal memory of DDR3L in these collocation above-mentioned；Or standard configuration
Supporting the computer of DDR3L internal memory, use is but the internal memory of DDR3), especially highlight DIY (the Do It at personal computer
Yourself, user oneself individually buys computer motherboard, internal memory etc. and installs) on market.The running voltage that internal memory is actual is high
In or less than the running voltage of its standard, although computer can also use, but the stability of computer compares relatively low, can go out
Existing the most several forthright do not start shooting or use during situation about crashing.And, internal memory is for a long time in the case of this non-standard matching voltage
Work, can have a strong impact on the service life of computer.
So existing internal memory power supply plan cannot adapt to the memory voltage of plurality of specifications.
Summary of the invention
Embodiment of the present invention technical problem to be solved is, it is provided that a kind of memory voltage regulating method and circuit.Can
To meet many kinds of running voltages of DDR and DDRL.
In order to solve above-mentioned technical problem, embodiments provide the Voltage Cortrol of a kind of memory voltage regulation circuit
Method, described method comprises the steps:
Obtain the standard operating voltage information of the internal memory inserted；
If this standard operating voltage information is substandard voltage, then controlling BIOS PLC technology signal is low level, as
This standard operating voltage information is high standard voltage, then controlling BIOS PLC technology signal is high level.
Optionally, the standard operating voltage information of the described internal memory obtaining insertion is concrete, including:
BIOS reads the serial of the used internal memory of current computer and there is detecting information, obtains the standard that current memory is supported
Running voltage information.
Optionally, described memory voltage regulation circuit includes: BIOS PLC technology signal, resistance, audion T, buck
Circuit, internal memory, wherein, BIOS PLC technology signal connects one end of the 4th resistance, and the other end of the 4th resistance connects three poles
The base stage of pipe, the grounded emitter of audion, the colelctor electrode of audion connects the other end of the 3rd resistance, one end of the 3rd resistance
Connecting the input of buck circuit, the outfan of buck circuit connects internal memory, and one end of the second resistance connects the one of the 3rd resistance
End, the other end ground connection of the second resistance, one end of the first resistance connects voltage source, and the other end of the first resistance connects the 3rd resistance
One end.Implement the embodiment of the present invention, have the advantages that technical scheme is come by a bleeder circuit real
The selection of existing buck circuit input voltage, thus adapt to the different supply voltage of DDR and DDRL, thus its to have support multiple
The advantage of voltage.
Accompanying drawing explanation
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
In having technology to describe, the required accompanying drawing used is briefly described, it should be apparent that, the accompanying drawing in describing below is only this
Some embodiments of invention, for those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to
Other accompanying drawing is obtained according to these accompanying drawings.
Fig. 1 is the structural representation of a kind of memory voltage regulation circuit that the preferable real-time mode of the present invention first provides；
Fig. 2 is the flow chart of a kind of memory voltage regulating method that the present invention the second better embodiment provides.
Detailed description of the invention
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is carried out clear, complete
Describe, it is clear that described embodiment is only a part of embodiment of the present invention rather than whole embodiments wholely.Based on
Embodiment in the present invention, it is every other that those of ordinary skill in the art are obtained under not making creative work premise
Embodiment, broadly falls into the scope of protection of the invention.
Term " first " in description and claims of this specification and above-mentioned accompanying drawing, " second " etc. are for distinguishing
Different objects rather than be used for describing particular order.Additionally, term " includes " and " having " and their any deformation, it is intended that
It is to cover non-exclusive comprising.Such as contain series of steps or the process of unit, method, system, product or equipment do not have
Have and be defined in the step or unit listed, but the most also include step or the unit do not listed, or the most also wrap
Include other steps intrinsic for these processes, method, product or equipment or unit.
Referenced herein " embodiment " is it is meant that the special characteristic, structure or the characteristic that describe can be wrapped in conjunction with the embodiments
It is contained at least one embodiment of the present invention.It is identical that each position in the description occurs that this phrase might not each mean
Embodiment, be not and the independent of other embodiments mutual exclusion or alternative embodiment.Those skilled in the art explicitly and
Implicitly being understood by, embodiment described herein can combine with other embodiments.
Refering to Fig. 1, it is illustrated in figure 1 a kind of memory voltage regulation circuit knot that the preferable real-time mode of the present invention first provides
Structure schematic diagram, as it is shown in figure 1, BIOS PLC technology signal, resistance, audion T, buck circuit, internal memory, wherein, BIOS can
Programming control signal connects one end of the 4th resistance R4, the base stage of the other end connecting triode T of the 4th resistance R4, audion T
Grounded emitter, the colelctor electrode of audion T connects the other end of the 3rd resistance R3, and one end of the 3rd resistance R3 connects buck electricity
The input on road, the outfan of buck circuit connects internal memory (powering internal memory), and one end of the second resistance R2 connects the 3rd resistance
One end of R3, the other end ground connection of the second resistance R2, one end of the first resistance R1 connects voltage source VCC1, and the first resistance R1's is another
One end connects one end of the 3rd resistance R3.
It realizes principle, and user can select the supply voltage of internal memory by BIOS PLC technology signal, specifically
Realizing principle is, if user selects BIOS PLC technology signal to be low level, then audion T close, voltage source by R1,
R2 turns on, and the voltage of buck circuit input end is the voltage of resistance R2, if user selects BIOS PLC technology signal for height
Level, then audion T conducting, voltage source is turned on by R1, R2 and R3, and now, the input voltage of buck is the electricity of R2//R3
Pressure, it is possible to by selecting switch to control the input voltage of internal memory, always realize the power supply of two kinds of internal memories.
A kind of memory voltage regulating method provided for the present invention the second better embodiment refering to Fig. 2, Fig. 2, the method
Realizing in circuit as shown in Figure 1, the method is as in figure 2 it is shown, comprise the steps:
The standard operating voltage information of the internal memory that step S201, acquisition are inserted；
The implementation of above-mentioned steps S201 is specifically as follows:
(Serial Presence Detect, serial exists to be detectd the SPD of BIOS reading the used internal memory of current computer
Survey.Refer to contain the binary file of memory configurations information, be programmed in eeprom chip) information, obtain current memory
The standard operating voltage information supported.
Step S202, it is high standard operational voltage value (such as: 1.5V) such as this standard operating voltage information, then controls BIOS
PLC technology signal is high level, if this standard operating voltage information is substandard operational voltage value (such as 1.35V), then controls
BIOS PLC technology signal processed is low level.
Above-mentioned BIOS PLC technology signal can have the feature that
A, BIOS PLC technology signal is the logic hardware control signal conducted；
This PLC technology signal can be programmed by b, BIOS, it is achieved read-write operation；
C, this PLC technology signal, as input signal, are connected to " memory voltage regulation circuit ".
Above disclosed it is only one preferred embodiment of the present invention, certainly can not limit the power of the present invention with this
Profit scope, one of ordinary skill in the art will appreciate that all or part of flow process realizing above-described embodiment, and weighs according to the present invention
Profit requires the equivalent variations made, and still falls within the scope that invention is contained.
Claims (3)
1. the method for the Voltage Cortrol of a memory voltage regulation circuit, it is characterised in that described method comprises the steps:
Obtain the standard operating voltage information of the internal memory inserted；
If this standard operating voltage information is substandard voltage, then controlling BIOS PLC technology signal is low level, such as this mark
Quasi-running voltage information is high standard voltage, then controlling BIOS PLC technology signal is high level.
Method the most according to claim 1, it is characterised in that the standard operating voltage information of the internal memory that described acquisition is inserted
Specifically, including:
BIOS reads the serial of the used internal memory of current computer and there is detecting information, obtains the standard work that current memory is supported
Information of voltage.
Method the most according to claim 1, it is characterised in that described memory voltage regulation circuit includes: BIOS is able to programme
Control signal, resistance, audion T, buck circuit, internal memory, wherein, BIOS PLC technology signal connects the one of the 4th resistance
End, the base stage of the other end connecting triode of the 4th resistance, the grounded emitter of audion, the colelctor electrode of audion connects the 3rd
The other end of resistance, one end of the 3rd resistance connects the input of buck circuit, the outfan connection internal memory of buck circuit, and second
One end of resistance connects one end of the 3rd resistance, the other end ground connection of the second resistance, and one end of the first resistance connects voltage source, the
The other end of one resistance connects one end of the 3rd resistance.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610597372.6A CN106251904A (en) | 2016-07-26 | 2016-07-26 | Memory voltage regulating method and circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201610597372.6A CN106251904A (en) | 2016-07-26 | 2016-07-26 | Memory voltage regulating method and circuit |
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| Publication Number | Publication Date |
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| CN106251904A true CN106251904A (en) | 2016-12-21 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201610597372.6A Pending CN106251904A (en) | 2016-07-26 | 2016-07-26 | Memory voltage regulating method and circuit |
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Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101464716A (en) * | 2007-12-19 | 2009-06-24 | 鸿富锦精密工业（深圳）有限公司 | Internal memory voltage control circuit |
| CN101551698A (en) * | 2008-03-31 | 2009-10-07 | 联想(北京)有限公司 | Memory voltage regulating method and computer motherboard |
| CN201331757Y (en) * | 2008-12-29 | 2009-10-21 | 深圳市先冠电子有限公司 | AMD platform motherboard supporting bipolar-RAM model of DDR2 and DDR3 |
| CN102880269A (en) * | 2011-07-13 | 2013-01-16 | 鸿富锦精密工业（深圳）有限公司 | Internal memory power supply system |
| CN102890553A (en) * | 2011-07-19 | 2013-01-23 | 鸿富锦精密工业（深圳）有限公司 | Memory and memory power supply system with same |
| CN105652994A (en) * | 2014-11-11 | 2016-06-08 | 鸿富锦精密工业(武汉)有限公司 | Voltage switching device |
-
2016
- 2016-07-26 CN CN201610597372.6A patent/CN106251904A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101464716A (en) * | 2007-12-19 | 2009-06-24 | 鸿富锦精密工业（深圳）有限公司 | Internal memory voltage control circuit |
| CN101551698A (en) * | 2008-03-31 | 2009-10-07 | 联想(北京)有限公司 | Memory voltage regulating method and computer motherboard |
| CN201331757Y (en) * | 2008-12-29 | 2009-10-21 | 深圳市先冠电子有限公司 | AMD platform motherboard supporting bipolar-RAM model of DDR2 and DDR3 |
| CN102880269A (en) * | 2011-07-13 | 2013-01-16 | 鸿富锦精密工业（深圳）有限公司 | Internal memory power supply system |
| CN102890553A (en) * | 2011-07-19 | 2013-01-23 | 鸿富锦精密工业（深圳）有限公司 | Memory and memory power supply system with same |
| CN105652994A (en) * | 2014-11-11 | 2016-06-08 | 鸿富锦精密工业(武汉)有限公司 | Voltage switching device |
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Application publication date: 20161221 |
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