CN106228543A - The method and device that the live width of wire in PCB image and line-spacing are detected - Google Patents
The method and device that the live width of wire in PCB image and line-spacing are detected Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T7/00—Image analysis
- G06T7/0002—Inspection of images, e.g. flaw detection
- G06T7/0004—Industrial image inspection
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/02—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness
- G01B11/04—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness specially adapted for measuring length or width of objects while moving
- G01B11/046—Measuring arrangements characterised by the use of optical techniques for measuring length, width or thickness specially adapted for measuring length or width of objects while moving for measuring width
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
- G01B11/00—Measuring arrangements characterised by the use of optical techniques
- G01B11/14—Measuring arrangements characterised by the use of optical techniques for measuring distance or clearance between spaced objects or spaced apertures
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/10—Image acquisition modality
- G06T2207/10004—Still image; Photographic image
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06T—IMAGE DATA PROCESSING OR GENERATION, IN GENERAL
- G06T2207/00—Indexing scheme for image analysis or image enhancement
- G06T2207/30—Subject of image; Context of image processing
- G06T2207/30108—Industrial image inspection
- G06T2207/30141—Printed circuit board [PCB]
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Abstract
The invention discloses a kind of method and device detecting the live width of wire in PCB image and line-spacing, wherein, the method detecting live width includes: target PCB image is carried out binaryzation calculation process, generates the binary image of described target PCB image；Live width structural element is built according to default live width threshold value；Using described live width structural element that described binary image carries out morphology opening operation process, the opening operation generating described target PCB image processes image；Described opening operation is processed image and carries out calculus of differences process with described binary image, generate the live width detection image of described target PCB image；The live width testing result of wire in described target PCB image is determined according to described live width detection image.Live width and the line-spacing of wire in PCB image are detected by the method using the present invention to provide, and detection process is simpler quickly.
Description
Technical field
The present invention relates to pcb board detection technique field, particularly relate to a kind of live width and the line-spacing of wire in PCB image be entered
The method and device of row detection.
Background technology
Generally, on the pcb board designed, all it is disposed with various circuit, when each circuit is arranged,
Have certain requirement for the live width of wire in circuit and line-spacing, wherein, live width be for a wire for, along wire
Any straight line of normal direction, the border phase intersection with this wire opposite sides produces two intersection points, by the two intersection point
Between the live width that distance definition is this wire (in such as Fig. 1 distance) between AB 2；Line-spacing is for two or two
For above wire, for two adjacent wires, along any straight line of the normal direction of wire, with two wire phases
After two adjacent borders are intersected, two intersection points can be produced, by the line that distance definition is these two wires between the two intersection point
Away from (in such as Fig. 1 distance) between BC 2.
In the design process of pcb board, if in circuit wire live width design less, circuit easily occur short circuit
Phenomenon, if in circuit wire line-spacing design less, easily produce interference between each wire of circuit, therefore, at pcb board
Design process in, can specify the standard of live width and line-spacing, and wire in the pcb board going detection design to go out according to the standard of regulation
Live width and line-spacing whether there is in violation of rules and regulations defect, and then determine whether its live width and line-spacing meet the standard of regulation.
When the live width of wire in pcb board and line-spacing are detected, the most first the surface of pcb board it is scanned or claps
Take the photograph, it is thus achieved that the gray level image on the surface of pcb board (herein, is defined as the PCB of this pcb board by the gray level image on the surface of pcb board
Image) after, determine live width and the line-spacing of wire in pcb board by the live width of wire and line-spacing in the PCB image of detection pcb board
Whether there is defect in violation of rules and regulations.
In prior art, for the detection of live width, it will usually whether detection live width is in the minimum feature specified and max line
In wide scope.For line-spacing, it will usually detection line-spacing whether more than regulation minimum line away from.Generally all use measure traverse line real
The live width on border and the numerical value of line-spacing, the method numerical value measured and standard figures compared, to wire in PCB image
Live width and line-spacing detect, and detect live width and the line-spacing of wire in PCB image for example with region-growing method, or adopt
Live width and the line-spacing of wire in PCB image are detected by the method calculated with profile, use these detection methods to PCB image
When the live width of middle wire and line-spacing detect, often relating to more complicated geometric operation, calculating process is complicated, operation time
Longer, process is the most loaded down with trivial details.
So, the existing method detecting the live width of wire in PCB image and line-spacing, detection process is more numerous
Trivial.
Summary of the invention
The purpose of the embodiment of the present invention is to provide a kind of side detecting the live width of wire in PCB image and line-spacing
Method and device, to solve in prior art, the method detecting the live width of wire in PCB image and line-spacing, detects process
Comparatively laborious problem.
In order to solve above-mentioned technical problem, the embodiment of the invention discloses following technical scheme:
First aspect, embodiments provides a kind of method detecting the live width of wire in PCB image, should
Method includes:
Target PCB image is carried out binaryzation calculation process, generates the binary image of described target PCB image；
Live width structural element is built according to default live width threshold value；
Use described live width structural element that described binary image carries out morphology opening operation process, generate described target
The opening operation of PCB image processes image；
Described opening operation is processed image and carries out calculus of differences process with described binary image, generate described target PCB
The live width detection image of image；
The live width testing result of wire in described target PCB image is determined according to described live width detection image.
In conjunction with first aspect, in the first possible embodiment of first aspect, described basis presets live width threshold value
Build the process of live width structural element, specifically include:
According to default live width threshold value, determine the value of the first reference dimension of described live width structural element according to the following equation；
K1=(D1/25.4)/R；
Whether the value judging described first reference dimension is odd number, if the value of described first reference dimension is odd number, then
The value of described first reference dimension is defined as the value of the size of described live width structural element；Or, if described first reference scale
Very little value is even number, then will be defined as the value of the size of described live width structural element less than the maximum odd number of this even number；
Wherein, K1 represents the first reference dimension of described live width structural element, and unit is pixel；D1 represents described default line
Wide threshold value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
In conjunction with the first possible embodiment of first aspect, the embodiment that the second in first aspect is possible
In, described according to described live width detection image determine the process of the live width testing result of wire in described target PCB image, specifically
Including:
Judge whether described live width detection image exists the first foreground target；
If there is the first foreground target in described live width detection image, it is determined that wire tool in described target PCB image
There is live width defect in violation of rules and regulations, and described first foreground target position coordinates in described live width detection image is defined as described
The position coordinates at the defect place in violation of rules and regulations of live width described in target PCB image.
Second aspect, embodiments provides a kind of method detecting the line-spacing of wire in PCB image, should
Method includes:
Target PCB image is carried out binaryzation calculation process, generates the binary image of described target PCB image；
Line-spacing structural element is built according to default line-spacing threshold value；
Use described line-spacing structural element that described binary image is carried out closing operation of mathematical morphology process, generate described target
The closed operation of PCB image processes image；
Described closed operation is processed image and carries out calculus of differences process with described binary image, generate described target PCB
The line-spacing detection image of image；
The line-spacing testing result of wire in described target PCB image is determined according to described line-spacing detection image.
In conjunction with second aspect, in the first possible embodiment of second aspect, described basis presets line-spacing threshold value
Build the process of line-spacing structural element, specifically include:
According to default line-spacing threshold value, determine the value of the second reference dimension of described line-spacing structural element according to the following equation；
K2=(D2/25.4)/R；
Whether the value judging described second reference dimension is odd number, if the value of described second reference dimension is odd number, then
The value of described second reference dimension is defined as the value of the size of described line-spacing structural element；Or, if described second reference scale
Very little value is even number, then will be defined as the value of the size of described line-spacing structural element less than the maximum odd number of described even number；
Wherein, K2 represents the second reference dimension of described line-spacing structural element, and unit is pixel；D2 represents described default line
Away from threshold value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
In conjunction with the first possible embodiment of second aspect, the embodiment that the second in second aspect is possible
In, described according to described line-spacing detection image determine the process of the line-spacing testing result of wire in described target PCB image, specifically
Including:
Judge whether described line-spacing detection image exists the second foreground target；
If there is the second foreground target in described line-spacing detection image, it is determined that wire tool in described target PCB image
There is line-spacing defect in violation of rules and regulations, and described second foreground target position coordinates in described line-spacing detection image is defined as described
The position coordinates at the defect place in violation of rules and regulations of line-spacing described in target PCB image.
The third aspect, embodiments provides a kind of device detecting the live width of wire in PCB image, should
Device includes:
First binaryzation calculation process module, for target PCB image is carried out binaryzation calculation process, generates described mesh
The binary image of mark PCB image；
Live width structural element builds module, for according to presetting live width threshold value structure live width structural element；
Opening operation processing module, is used for using described live width structural element that described binary image is carried out morphology and opens fortune
Calculation processes, and the opening operation generating described target PCB image processes image；
First calculus of differences processing module, carries out difference for described opening operation is processed image with described binary image
Calculation process, generates the live width detection image of described target PCB image；
Live width testing result determines module, leads for determining in described target PCB image according to described live width detection image
The live width testing result of line.
In conjunction with the third aspect, in the first possible embodiment of the third aspect, described live width structural element builds
Module specifically for:
According to default live width threshold value, determine the value of the first reference dimension of described live width structural element according to the following equation；
K1=(D1/25.4)/R；
Whether the value judging described first reference dimension is odd number, if the value of described first reference dimension is odd number, then
The value of described first reference dimension is defined as the value of the size of described live width structural element；Or, if described first reference scale
Very little value is even number, then will be defined as the value of the size of described live width structural element less than the maximum odd number of this even number；
Wherein, K1 represents the first reference dimension of described live width structural element, and unit is pixel；D1 represents described default line
Wide threshold value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
In conjunction with the first possible embodiment of the third aspect, the embodiment that the second in the third aspect is possible
In, described live width testing result determine module specifically for:
Judge whether described live width detection image exists the first foreground target；
If there is the first foreground target in described live width detection image, it is determined that wire tool in described target PCB image
There is live width defect in violation of rules and regulations, and described first foreground target position coordinates in described live width detection image is defined as described
The position coordinates at the defect place in violation of rules and regulations of live width described in target PCB image.
Fourth aspect, the invention provides a kind of device detecting the line-spacing of wire in PCB image, this device bag
Include:
Second binaryzation calculation process module, for target PCB image is carried out binaryzation calculation process, generates described mesh
The binary image of mark PCB image；
Line-spacing structural element builds module, for according to presetting line-spacing threshold value structure line-spacing structural element；
Closed operation processing module, is used for using described line-spacing structural element that described binary image is carried out morphology and closes fortune
Calculation processes, and the closed operation generating described target PCB image processes image；
Second calculus of differences processing module, carries out difference for described closed operation is processed image with described binary image
Calculation process, generates the line-spacing detection image of described target PCB image；
Line-spacing testing result determines module, leads for determining in described target PCB image according to described line-spacing detection image
The line-spacing testing result of line.
In conjunction with fourth aspect, in the first possible embodiment of fourth aspect, described line-spacing structural element builds
Module specifically for:
According to default line-spacing threshold value, determine the value of the second reference dimension of described line-spacing structural element according to the following equation；
K2=(D2/25.4)/R；
Whether the value judging described second reference dimension is odd number, if the value of described second reference dimension is odd number, then
The value of described second reference dimension is defined as the value of the size of described line-spacing structural element；Or, if described second reference scale
Very little value is even number, then will be defined as the value of the size of described line-spacing structural element less than the maximum odd number of described even number；
Wherein, K2 represents the second reference dimension of described line-spacing structural element, and unit is pixel；D2 represents described default line
Away from threshold value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
In conjunction with the first possible embodiment of fourth aspect, the embodiment that the second in fourth aspect is possible
In, described line-spacing testing result determine module specifically for:
Judge whether described line-spacing detection image exists the second foreground target；
If there is the second foreground target in described line-spacing detection image, it is determined that wire tool in described target PCB image
There is line-spacing defect in violation of rules and regulations, and described second foreground target position coordinates in described line-spacing detection image is defined as described
The position coordinates at the defect place in violation of rules and regulations of line-spacing described in target PCB image.
The technical scheme that embodiments of the invention provide can include following beneficial effect: it is a kind of right to the invention provides
In PCB image, the live width of wire and line-spacing carry out the method and device detected, in the method that the present invention provides, first to pending
The target PCB image of detection carries out binary conversion treatment, generates the binary image of target PCB image, according to live width or line-spacing
Standard construction goes out structural element, carries out binary image respectively at morphology opening operation according to the structural element constructed afterwards
Reason or closed operation process and obtain processing image, and the process image after finally opening operation or closed operation being processed enters with binary image
Row calculus of differences processes, and obtains live width or line-spacing testing result figure, according to the testing result figure finally obtained, can obtain live width
Or the testing result of line-spacing, whole during, it is not necessary to measure live width and the actual numerical value of line-spacing, without by live width and line-spacing
Actual numerical value and standard figures compare computing, and calculating process does not has a geometric operation of complexity, simpler quickly so that
Process must be detected simpler quickly.
The embodiment of the present invention is it should be appreciated that it is only exemplary reconciliation that above general description and details hereinafter describe
The property released, the disclosure can not be limited.
Accompanying drawing explanation
Accompanying drawing herein is merged in description and constitutes the part of this specification, it is shown that meet the enforcement of the present invention
Example, and for explaining the principle of the present invention together with description.
In order to be illustrated more clearly that the embodiment of the present invention or technical scheme of the prior art, below will be to embodiment or existing
In having technology to describe, the required accompanying drawing used is briefly described, it should be apparent that, for those of ordinary skill in the art
Speech, on the premise of not paying creative work, it is also possible to obtain other accompanying drawing according to these accompanying drawings.
A kind of PCB image that Fig. 1 provides for the embodiment of the present invention；
A kind of flow process to the method that the live width of wire in PCB image detects that Fig. 2 provides for the embodiment of the present invention
Schematic diagram；
A kind of flow process to the method that the line-spacing of wire in PCB image detects that Fig. 3 provides for the embodiment of the present invention
Schematic diagram；
A kind of method that the live width of wire in PCB image and line-spacing are detected that Fig. 4 provides for the embodiment of the present invention
Schematic flow sheet；
A kind of structure to the device that the live width of wire in PCB image detects that Fig. 5 provides for the embodiment of the present invention
Block diagram；
A kind of structure to the device that the line-spacing of wire in PCB image detects that Fig. 6 provides for the embodiment of the present invention
Block diagram；
A kind of device that the live width of wire in PCB image and line-spacing are detected that Fig. 7 provides for the embodiment of the present invention
Structured flowchart.
Detailed description of the invention
For the technical scheme making those skilled in the art be more fully understood that in the present invention, real below in conjunction with the present invention
Execute the accompanying drawing in example, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described enforcement
Example is only a part of embodiment of the present invention rather than whole embodiments.Based on the embodiment in the present invention, this area is common
The every other embodiment that technical staff is obtained under not making creative work premise, all should belong to present invention protection
Scope.
The invention provides a kind of method and device that the live width of wire in PCB image and line-spacing are detected, pass through
The method that the embodiment of the present invention provides, as long as carrying out morphology opening operation or shape respectively to the binary image of target PCB image
State closed operation processes and obtains processing image, afterwards process image and binary image is carried out calculus of differences process,
In live width or line-spacing testing result figure, the live width finally obtained by analysis or line-spacing testing result figure, whether there is prospect mesh
It is marked with and the position coordinates of foreground target, i.e. can determine that in target PCB image, whether wire has live width or line-spacing defect in violation of rules and regulations
And the position coordinates at live width or line-spacing defect place in violation of rules and regulations, whole during, it is not necessary to measure live width and the actual numerical value of line-spacing,
Comparing computing without by the actual numerical value of live width and line-spacing and standard figures, calculating process does not has the geometry fortune of complexity
Calculate, simpler quickly so that detection process simpler quickly.
Below in conjunction with the accompanying drawings, the specific embodiment of the present invention is discussed in detail.
As in figure 2 it is shown, Fig. 2 a kind of live width of wire in PCB image being detected of being illustrated that the present invention provides
The flow chart of method, the method includes:
Step 101, target PCB image is carried out binaryzation calculation process, generate the binary picture of described target PCB image
Picture.
In specific implementation process, need when in certain block pcb board, the live width of wire detects, first pass through scanning or
The mode of shooting, it is thus achieved that the gray level image on the surface of described pcb board, herein, is defined as the gray level image on the surface of pcb board
The PCB image of this pcb board, is defined as the PCB image of the pcb board of current pending detection target PCB image, treats for any one piece
The PCB image of pcb board carrying out detecting can be by as target PCB image.
In order to make image become simple, it is beneficial to simplify the image operation during detecting and processes, in the present embodiment, the most right
Target PCB image carries out binary conversion treatment, after target PCB image is carried out binary conversion treatment, can generate binary conversion treatment result
Image, herein, is defined as this mesh by the binary conversion treatment result images generated after binary conversion treatment by target PCB image
The binary image of mark PCB image.
When target PCB image is carried out binary conversion treatment, target PCB image will constitute all pixels of wire
Gray value is set to 255, and the gray value of other pixel outside wire in target PCB image is set to 0, so, and generation
Binary image is the image that white strip region is alternate with black bar region, white strip Regional Representative's wire, black bar
Interval region between shape Regional Representative's adjacent wires, it follows that the live width of wire detects in target PCB image
Time, as long as detecting that in binary image, whether white strip region exists width defect in violation of rules and regulations, i.e. can determine that target PCB is schemed
In Xiang, whether the live width of wire exists live width defect in violation of rules and regulations.
Step 102, basis are preset live width threshold value and are built live width structural element.
Generally, in the design process of pcb board, in pcb board, the live width of wire there will be the widest or too narrow phenomenon, for
The phenomenon that live width is the widest, generally will not cause serious impact, but the live width of wire once occurs too narrow the use of pcb board
Phenomenon, can have a strong impact on the use of pcb board, and time serious, in pcb board, circuit can be short-circuited, and causes using, therefore, and this
The method that bright embodiment provides, is primarily directed to the live width defect in violation of rules and regulations that in target PCB image, the live width of wire is too narrow, to target
In PCB image, the live width of wire detects, in order to it, the pcb board that the live width that further searches for out wire is too narrow.
In image processing field, by image being carried out morphology opening operation process, it is possible to will image be smaller in size than
The discreet region of the size of structural element is incorporated into the adjacent domain of this discreet region.Based on this, preset according in detecting system
Live width threshold value, after determining the size of standard live width, selects the equivalently-sized structural element of a size and standard live width, right
Binary image carries out morphology opening operation process, it is possible to by white strip region merging technique too narrow for width in binary image extremely
In neighbouring black bar region, will width is too narrow in binary image white strip regional processing be black, so, will
After image after the process of morphology opening operation carries out calculus of differences process with former binary image, it is possible to determine binary picture
In Xiang, white strip region has a position of width in violation of rules and regulations defect, and then determines in target PCB image that wire has live width and disobey
The position of rule defect.
The method detecting the live width of wire in PCB image that the present embodiment provides, based on above-mentioned principle, thus may be used
Know, it is desirable to determine in target PCB image, whether wire has live width defect in violation of rules and regulations, and the position at live width defect place in violation of rules and regulations,
Firstly the need of according to presetting live width threshold value, the structural element needed during constructing detection, herein, target PCB will be schemed
During in Xiang, the live width of wire detects, the structural element of needs is defined as live width structural element.
Live width structural element is sized to the size of standard live width, and the size of standard live width is according to default live width threshold value
Determine with the resolution of image collecting device in detecting system, herein, by the resolution of image collecting device in detecting system
The default resolution being defined as in detecting system.For the shape of live width structural element, can arbitrarily arrange in theory, but due to
In pcb board, the wiring direction of circuit is usually level, and vertical or diagonal, by live width structural element in the embodiment of the present invention
Shape be defined as eight-sided formation.
In specific implementation process, the value of the size of live width structural element can be determined in the following manner:
First, according to default live width threshold value, the first reference dimension of described live width structural element is determined according to the following equation
Value；
K1=(D1/25.4)/R；
Wherein, K1 represents the first reference dimension of described live width structural element, and unit is pixel；D1 represents described default line
Wide threshold value, unit is mil, 1mil=25.4 micron；R represents the default resolution in detecting system, and unit is the every pixel of micron.
After determining the value of the first reference dimension of described live width structural element, i.e. according to above-mentioned formula, calculate and obtain K1
Value after, it is judged that whether the value of described first reference dimension K1 is odd number, if the value of described first reference dimension K1 is strange
Number, then be defined as the value of the size of described live width structural element by the value of described first reference dimension K1；Or, if described first
The value of reference dimension K1 is even number, then will be defined as the size of described live width structural element less than the maximum odd number of this even number
Value.
Step 103, use described live width structural element that described binary image carries out morphology opening operation process, generate
The opening operation of described target PCB image processes image.
Herein, after employing live width structural element is carried out morphology opening operation process to binary image, the figure of generation
Image is processed, after binary image is carried out morphology opening operation process, in two-value as being defined as the opening operation of target PCB image
Change the white strip region in image with width defect in violation of rules and regulations, in opening operation processes image, all become black.
In specific implementation process, use live width structural element that binary image carries out the mode of morphology opening operation process
Including multiple, such as:
First kind of way, for each pixel in binary image, builds and comprises the first of this pixel
Neighborhood, i.e. builds the first computing window comprising this pixel, the size of this first neighborhood (the first computing window)
Identical with the size of live width structural element.
From the beginning of being positioned at the pixel of the first row index and first row index position from binary image, travel through view picture two-value
Change image, each pixel is carried out gray value process, when specifically processing, currently processed pixel is defined as the first mesh
Mark pixel, it is judged that the pixel whether having gray value to be 0 in the first neighborhood that first object pixel is corresponding, if this first
In neighborhood, at least the gray value of a pixel is 0, then the gray value of this first object pixel is set to 0, travels through whole
After width binary image, generate new image, herein the new images generated during this is defined as the of target PCB image
One erosion operation processes image.
In the first erosion operation processes image, for each pixel, build and comprise the second of this pixel
Neighborhood, i.e. builds the second computing window comprising this pixel, the size of this second neighborhood (the second computing window)
Identical with the size of live width structural element.
Process from the beginning of image is positioned at the first row index pixel with first row index position from the first erosion operation, time
Go through view picture the first erosion operation and process image, each pixel is carried out gray value process, when specifically processing, by currently processed
Pixel be defined as the second target pixel points, it is judged that whether the second neighborhood that the second target pixel points is corresponding has gray value be
The pixel of 255, if at least the gray value of a pixel is 255 in this second neighborhood, then by this second object pixel
The gray value of point is set to 255, after traversal view picture the first erosion operation processes image, generates at the opening operation of target PCB image
Reason image.
The second way, for the pixel that each gray value is 0 in binary image, carries out the first boundary pixel
Point confirms, during concrete confirmation, the pixel currently confirmed is defined as the 3rd target pixel points, builds and comprise the 3rd mesh
Mark pixel is at the one or four interior neighborhood, it is judged that the pixel whether having gray value to be 255 in the one or four neighborhood, if this
One or four neighborhoods have the pixel that gray value is 255, then the 3rd target pixel points is defined as the first boundary pixel point.
After determining all first boundary pixel point in binary image, in each first boundary pixel point being
The heart, builds the 3rd neighborhood (the 3rd computing window) comprising this first boundary pixel point, the 3rd neighborhood (the 3rd computing window
Mouthful) size identical with the size of live width structural element.By all first boundary pixel point in binary image
And the gray value of all pixels in the 3rd neighborhood corresponding to each first boundary pixel point is disposed as 0, generate new
Image, herein, the new images generated during this is defined as target PCB image second erosion operation process image.
In the second erosion operation processes image, it is the pixel of 255 to each gray value, carries out the second boundary pixel
Point confirms, during concrete confirmation, the pixel currently confirmed is defined as the 4th target pixel points, builds and comprise the 4th mesh
Mark pixel at the two or four interior neighborhood, it is judged that the pixel whether having gray value to be 0 in the two or four neighborhood, if this second
Four neighborhoods have the pixel that gray value is 0, then the 4th target pixel points is defined as the second boundary pixel.
After determining that the second erosion operation processes all the second boundary pixels in image, with each the second boundary picture
Centered by vegetarian refreshments, build and comprise the 4th neighborhood (the 4th computing window) of this second boundary pixel, the 4th neighborhood (the
Four computing windows) size identical with the size of live width structural element.Second erosion operation is processed in image
The gray scale of all pixels in all the second boundary pixels and the 4th neighborhood corresponding to each the second boundary pixel
Value is disposed as 255, and the opening operation generating target PCB image processes image.
In the second way, only need to use the live width structural element fortune to the boundary pixel point place in binary image
Calculation window carries out gray value and processes, it is not necessary to each pixel is carried out gray value process, greatly reduces computing
Amount, improves arithmetic speed.
Step 104, described opening operation is processed image and described binary image carry out calculus of differences process, generate described
The live width detection image of target PCB image.
Split calculation process image and binary image carry out in calculus of differences processing procedure, process image for opening operation
In with in binary image, corresponding two the identical pixels of position coordinates, if the gray value phase of the two of correspondence pixels
With, after two width images are carried out calculus of differences process, in the result image of generation, the ash of the pixel of same position coordinate
Angle value is 0, is shown as black；If the gray value of the two of correspondence pixels is different, after two width images carry out calculus of differences, raw
In the result image become, the gray value of the pixel of same position coordinate is 255, is shown as white.
If in target PCB image, the live width of wire has live width defect in violation of rules and regulations, corresponding in corresponding binary image
White strip region just has width in violation of rules and regulations defect, after binary image is carried out morphology opening operation process, generation open fortune
Calculation processes in image, and the gray value with the width pixel of the position of defect in violation of rules and regulations will change, split calculation process
After image and binary image carry out calculus of differences, the gray value of the pixel of this position is 255, is shown as white.Therefore, only
Split calculation process image and binary image is wanted to carry out calculus of differences process, by the result image that analysis generates,
Whether there is the foreground target of white, i.e. can determine that in target PCB image, whether the live width of wire has live width defect in violation of rules and regulations,
Thus, herein, after split calculation process image and binary image are carried out calculus of differences process, the result figure of generation
Picture, is defined as the live width detection image of target PCB image.
Step 105, according to described live width detection image determine the live width testing result of wire in described target PCB image.
After generating the live width detection image of target PCB image, it is judged that whether live width detection image exists the of white
One foreground target；If there is the first foreground target in live width detection image, it is determined that in target PCB image, wire has really
Live width defect in violation of rules and regulations, and it was determined that target PCB image occurs the position coordinates of live width defect in violation of rules and regulations, it is simply that before first
Scape target live width detection image in position coordinates, therefore, it can by the first foreground target live width detection image in position
Put coordinate and be defined as the position coordinates at live width defect place in violation of rules and regulations in target PCB image.
The method that the present embodiment provides, as long as carrying out morphology opening operation process to the binary image of target PCB image
Obtain processing image, afterwards process image and binary image are carried out calculus of differences process, i.e. can get live width testing result
Figure, by whether the live width testing result figure that analysis finally obtains has the position coordinates of foreground target and foreground target,
I.e. can determine that in target PCB image, whether wire has live width defect in violation of rules and regulations and the position coordinates at live width defect place in violation of rules and regulations,
During whole, it is not necessary to measure the actual numerical value of the live width of wire in PCB image, without by the actual numerical value of live width and standard
Numerical value compares computing, does not has the geometric operation of complexity in calculating process, so that detection process is simpler quickly.
As it is shown on figure 3, Fig. 3 a kind of line-spacing of wire in PCB image being carried out of being illustrated that the embodiment of the present invention provides
The flow chart of the method for detection, the method includes:
Step 201, target PCB image is carried out binaryzation calculation process, generate the binary picture of described target PCB image
Picture.
In specific implementation process, need when in certain block pcb board, the line-spacing of wire detects, first pass through scanning or
The mode of shooting, it is thus achieved that the gray level image on the surface of described pcb board, defines the PCB image of the pcb board of current pending detection
For target PCB image, the PCB image of the pcb board of any one piece of pending detection can be by as target PCB image.
In order to make image become simple, it is beneficial to simplify the image operation during detecting and processes, in the present embodiment, the most right
Target PCB image carries out binary conversion treatment, after target PCB image is carried out binary conversion treatment, can generate binary conversion treatment result
Image, i.e. generates the binary image of this target PCB image.
When target PCB image is carried out binary conversion treatment, target PCB image will constitute all pixels of wire
Gray value is set to 255, and the gray value of other pixel outside wire in target PCB image is set to 0, so, and generation
Binary image is the image that white strip region is alternate with black bar region, white strip Regional Representative's wire, black bar
Interval region between shape Regional Representative's adjacent wires, it follows that the line-spacing of wire detects in target PCB image
Time, as long as detecting that in binary image, whether black bar region exists width defect in violation of rules and regulations, i.e. can determine that target PCB is schemed
In Xiang, whether the line-spacing of wire exists line-spacing defect in violation of rules and regulations.
Step 202, basis are preset line-spacing threshold value and are built line-spacing structural element.
Generally, in the design process of pcb board, in pcb board, once there is too narrow phenomenon in the line-spacing of wire, can serious shadow
Ring the use of pcb board, can interfere between wire neighbouring in pcb board time serious, cause using, therefore, the present invention
The method that embodiment provides, is primarily directed to the line-spacing defect in violation of rules and regulations that in target PCB image, the line-spacing of wire is too narrow, to target
In PCB image, the line-spacing of wire detects, in order to it, the pcb board that the line-spacing that further searches for out wire is too narrow.
In image processing field, by image is carried out closing operation of mathematical morphology process, it is possible to will image be smaller in size than
The discreet region of the size of structural element is incorporated into the adjacent domain of this discreet region.Based on this, preset according in detecting system
Line-spacing threshold value, determine normal line away from size after, select a size and normal line away from equivalently-sized structural element, right
Binary image carries out closing operation of mathematical morphology process, it is possible to by black bar region merging technique too narrow for width in binary image extremely
In neighbouring white strip region, will width is too narrow in binary image black bar regional processing be white, so, will
After image after closing operation of mathematical morphology process carries out calculus of differences process with binary image, it is possible to determine binary image
Middle black bar region has the position of width defect in violation of rules and regulations, and then determines that in target PCB image, wire has line-spacing in violation of rules and regulations
The position of defect.
The method detecting the line-spacing of wire in PCB image that the present embodiment provides, based on above-mentioned principle, thus may be used
Know, it is desirable to determine in target PCB image, whether wire has line-spacing defect in violation of rules and regulations, and the position at line-spacing defect place in violation of rules and regulations,
Firstly the need of according to presetting line-spacing threshold value, the structural element needed during constructing detection, herein, target PCB will be schemed
During in Xiang, the line-spacing of wire detects, the structural element of needs is defined as line-spacing structural element.
Line-spacing structural element be sized to normal line away from size, normal line away from size according to default line-spacing threshold value
Determine with the resolution of image collecting device in detecting system, herein, by the resolution of image collecting device in detecting system
The default resolution being defined as in detecting system.For the shape of line-spacing structural element, can arbitrarily arrange in theory, but due to
In pcb board, the wiring direction of circuit is usually level, and vertical or diagonal, by line-spacing structural element in the embodiment of the present invention
Shape be defined as eight-sided formation.
In specific implementation process, the value of the size of line-spacing structural element can be determined in the following manner:
First, according to default line-spacing threshold value, the second reference dimension of described line-spacing structural element is determined according to the following equation
Value；
K2=(D2/25.4)/R；
Wherein, K2 represents the second reference dimension of described line-spacing structural element, and unit is pixel；D2 represents described default line
Away from threshold value, unit is mil, 1mil=25.4 micron；R represents the default resolution in detecting system, and unit is the every pixel of micron.
After determining the value of the second reference dimension of described line-spacing structural element, i.e. according to above-mentioned formula, calculate and obtain K2
Value after, it is judged that whether the value of described second reference dimension K2 is odd number, if the value of described second reference dimension K2 is strange
Number, then be defined as the value of the size of described line-spacing structural element by the value of described second reference dimension K2；Or, if described second
The value of reference dimension K2 is even number, then will be defined as the size of described line-spacing structural element less than the maximum odd number of this even number
Value.
Step 203, use described line-spacing structural element that described binary image is carried out closing operation of mathematical morphology process, generate
The closed operation of described target PCB image processes image.
Herein, after employing line-spacing structural element is carried out closing operation of mathematical morphology process to binary image, the figure of generation
Image is processed, after binary image is carried out closing operation of mathematical morphology process, in two-value as being defined as the closed operation of target PCB image
Change the black bar region in image with width defect in violation of rules and regulations, in closed operation processes image, all become white.
In specific implementation process, use line-spacing structural element that binary image carries out the mode of closing operation of mathematical morphology process
Including multiple, such as:
First kind of way, for each pixel in binary image, builds and comprises the 5th of this pixel
Neighborhood, i.e. builds the 5th computing window comprising this pixel, the size of the 5th neighborhood (the 5th computing window)
Identical with the size of line-spacing structural element.
From the beginning of being positioned at the pixel of the first row index and first row index position from binary image, travel through view picture two-value
Change image, each pixel is carried out gray value process, when specifically processing, currently processed pixel is defined as the 5th mesh
Mark pixel, it is judged that the pixel whether having gray value to be 255 in the 5th neighborhood that the 5th target pixel points is corresponding, if this
In five neighborhoods, at least the gray value of a pixel is 255, then the gray value of the 5th target pixel points is set to 255,
After traversal view picture binary image, generate new image, herein the new images generated during this is defined as target PCB figure
First dilation operation of picture processes image.
In the first dilation operation processes image, for each pixel, build and comprise the 6th of this pixel
Neighborhood, i.e. builds the 6th computing window comprising this pixel, the size of the 6th neighborhood (the 6th computing window)
Identical with the size of line-spacing structural element.
Process from the beginning of image is positioned at the first row index pixel with first row index position from the first dilation operation, time
Go through view picture the first dilation operation and process image, each pixel is carried out gray value process, when specifically processing, by currently processed
Pixel be defined as the 6th target pixel points, it is judged that whether the 6th neighborhood that the 6th target pixel points is corresponding has gray value be
The pixel of 0, if at least the gray value of a pixel is 0 in the 6th neighborhood, then by the 6th target pixel points
Gray value is set to 0, and after traversal view picture the first dilation operation processes image, the closed operation generating target PCB image processes image.
The second way, for the pixel that each gray value is 255 in binary image, carries out the 3rd border picture
Vegetarian refreshments confirms, during concrete confirmation, the pixel currently confirmed is defined as the 7th target pixel points, builds and comprise the 7th
Target pixel points is at the three or four interior neighborhood, it is judged that the pixel whether having gray value to be 0 in the three or four neighborhood, if this
Three or four neighborhoods have the pixel that gray value is 0, then the 7th target pixel points is defined as the 3rd boundary pixel point.
After determining all 3rd boundary pixel point in binary image, in each the 3rd boundary pixel point being
The heart, builds the 7th neighborhood (the 7th computing window) comprising the 3rd boundary pixel point, the 7th neighborhood (the 7th computing window
Mouthful) size identical with the size of line-spacing structural element.By all 3rd boundary pixel point in binary image
And the gray value of all pixels in the 7th neighborhood corresponding to each the 3rd boundary pixel point is disposed as 255, generate
New image, herein, is defined as the second dilation operation process figure of target PCB image by the new images generated during this
Picture.
In the second dilation operation processes image, it is the pixel of 0 to each gray value, carries out the 4th boundary pixel point
Confirm, during concrete confirmation, the pixel currently confirmed is defined as the 8th target pixel points, builds and comprise the 8th target
Pixel is at the four or four interior neighborhood, it is judged that the pixel whether having gray value to be 255 in the four or four neighborhood, if the 4th
Four neighborhoods have the pixel that gray value is 255, then the 8th target pixel points is defined as the 4th boundary pixel point.
After determining that the second dilation operation processes all 4th boundary pixel point in image, with each the 4th border picture
Centered by vegetarian refreshments, build and comprise the eight neighborhood (the 8th computing window) of the 4th boundary pixel point, this eight neighborhood (the
Eight computing windows) size identical with the size of line-spacing structural element.Second dilation operation is processed in image
The gray scale of all pixels in all 4th boundary pixel point and eight neighborhood corresponding to each the 4th boundary pixel point
Value is disposed as 0, and the closed operation generating target PCB image processes image.
In the second way, only need to use the line-spacing structural element fortune to the boundary pixel point place in binary image
Calculation window carries out gray value and processes, it is not necessary to each pixel is carried out gray value process, greatly reduces computing
Amount, improves arithmetic speed.
Step 204, described closed operation is processed image and described binary image carry out calculus of differences process, generate described
The line-spacing detection image of target PCB image.
Closed operation is processed image and carries out in calculus of differences processing procedure with binary image, image is processed for closed operation
In with in binary image, corresponding two the identical pixels of position coordinates, if the gray value phase of the two of correspondence pixels
With, after two width images are carried out calculus of differences process, in the result image of generation, the ash of the pixel of same position coordinate
Angle value is 0, is shown as black；If the gray value of the two of correspondence pixels is different, after two width images carry out calculus of differences, raw
In the result image become, the gray value of the pixel of same position coordinate is 255, is shown as white.
If in target PCB image, the line-spacing of wire has line-spacing defect in violation of rules and regulations, corresponding in corresponding binary image
Black bar region just has width in violation of rules and regulations defect, after binary image is carried out closing operation of mathematical morphology process, generation close fortune
Calculation processes in image, and the gray value with the width pixel of the position of defect in violation of rules and regulations will change, and processes closed operation
After image and binary image carry out calculus of differences, the gray value of the pixel of this position is 255, is shown as white.Therefore, only
Closed operation processed image and binary image and carry out calculus of differences process, by the result image that analysis generates,
Whether there is the foreground target of white, i.e. can determine that in target PCB image, whether the line-spacing of wire has line-spacing defect in violation of rules and regulations,
Thus, herein, closed operation will be processed after image and binary image carry out calculus of differences process, the result figure of generation
Picture, is defined as the line-spacing detection image of target PCB image.
Step 205, according to described line-spacing detection image determine the line-spacing testing result of wire in described target PCB image.
After generating the line-spacing detection image of target PCB image, it is judged that whether line-spacing detection image exists the of white
Two foreground targets；If there is the second foreground target in line-spacing detection image, it is determined that in target PCB image, wire has really
Line-spacing defect in violation of rules and regulations, and it was determined that target PCB image occurs the position coordinates of line-spacing defect in violation of rules and regulations, it is simply that before second
Scape target line-spacing detection image in position coordinates, therefore, it can by the second foreground target line-spacing detection image in position
Put coordinate and be defined as the position coordinates at target PCB image center line distance defect place in violation of rules and regulations.
The method that the present embodiment provides, as long as carrying out closing operation of mathematical morphology process to the binary image of target PCB image
Obtain processing image, afterwards process image and binary image are carried out calculus of differences process, i.e. can get line-spacing testing result
Figure, by whether the line-spacing testing result figure that analysis finally obtains has the position coordinates of foreground target and foreground target,
I.e. can determine that in target PCB image, whether wire has line-spacing defect in violation of rules and regulations and the position coordinates at line-spacing defect place in violation of rules and regulations,
During whole, it is not necessary to measure the actual numerical value of the line-spacing of wire in PCB image, without by the actual numerical value of line-spacing and standard
Numerical value compares computing, does not has the geometric operation of complexity in calculating process, so that detection process is simpler quickly.
When being embodied as, in a concrete implementation process can to PCB image in the live width of wire and line-spacing all enter
Row detection, concrete detection scheme is with reference to following embodiment.
As shown in Figure 4, what Fig. 4 was illustrated that the embodiment of the present invention provides is a kind of to the live width of wire in PCB image and line
Away from carrying out the flow chart of the method detected, the method includes:
Step 301, target PCB image is carried out binaryzation calculation process, generate the binary picture of described target PCB image
Picture.
Step 302, basis are preset live width threshold value and are built live width structural element, build line-spacing structure according to default line-spacing threshold value
Element.
Step 303, use described live width structural element that described binary image carries out morphology opening operation process, generate
The opening operation of described target PCB image processes image；Use described line-spacing structural element that described binary image is carried out form
Closed operation processes, and the closed operation generating described target PCB image processes image.
Step 304, described opening operation is processed image and described binary image carry out calculus of differences process, generate described
The live width detection image of target PCB image；Described closed operation is processed image carry out at calculus of differences with described binary image
Reason, generates the line-spacing detection image of described target PCB image.
Step 305, according to described live width detection image determine the live width testing result of wire in described target PCB image；
The line-spacing testing result of wire in described target PCB image is determined according to described line-spacing detection image.
In the present embodiment, the carrying out practically process of each step is referred to above-mentioned two embodiment, passes through the present embodiment
The method provided, detects live width and the line-spacing of wire in PCB image, and computing is simpler, and whole detection process is more
Simple and quick.
Corresponding with the above-mentioned method that the live width of wire in PCB image is detected, the embodiment of the invention also discloses
A kind of device that the live width of wire in PCB image is detected.With above-mentioned the line-spacing of wire in PCB image detected
Method is corresponding, the embodiment of the invention also discloses a kind of device detecting the line-spacing of wire in PCB image.
As it is shown in figure 5, Fig. 5 a kind of live width of wire in PCB image being carried out of being illustrated that the embodiment of the present invention provides
The structured flowchart of the device of detection, this device includes:
First binaryzation calculation process module 401, for target PCB image carries out binaryzation calculation process, generates institute
State the binary image of target PCB image；
Live width structural element builds module 402, for according to presetting live width threshold value structure live width structural element；
Opening operation processing module 403, is used for using described live width structural element that described binary image is carried out morphology
Opening operation processes, and the opening operation generating described target PCB image processes image；
First calculus of differences processing module 404, is carried out with described binary image for described opening operation is processed image
Calculus of differences processes, and generates the live width detection image of described target PCB image；
Live width testing result determines module 405, for determining in described target PCB image according to described live width detection image
The live width testing result of wire.
Further, live width structural element build module 402 specifically for:
According to default live width threshold value, determine the value of the first reference dimension of described live width structural element according to the following equation；
K1=(D1/25.4)/R；
Whether the value judging described first reference dimension is odd number, if the value of described first reference dimension is odd number, then
The value of described first reference dimension is defined as the value of the size of described live width structural element；Or, if described first reference scale
Very little value is even number, then will be defined as the value of the size of described live width structural element less than the maximum odd number of this even number；
Wherein, K1 represents the first reference dimension of described live width structural element, and unit is pixel；D1 represents described default line
Wide threshold value, unit is mil, 1mil=25.4 micron；R represents the default resolution in detecting system, and unit is the every pixel of micron.
Further, live width testing result determine module 405 specifically for:
Judge whether described live width detection image exists the first foreground target；
If there is the first foreground target in described live width detection image, it is determined that wire tool in described target PCB image
There is live width defect in violation of rules and regulations, and described first foreground target position coordinates in described live width detection image is defined as described
The position coordinates at the defect place in violation of rules and regulations of live width described in target PCB image.
Use the device that the present embodiment provides, it is possible to the binary image of target PCB image is carried out morphology opening operation
Process obtains processing image, can carry out calculus of differences process by processing image with binary image afterwards, obtain live width detection
Result figure, by whether having the position of foreground target and foreground target in the live width testing result figure that analysis finally obtains sits
Mark, i.e. can determine that in target PCB image, whether wire has live width defect in violation of rules and regulations and the position seat at live width defect place in violation of rules and regulations
Mark, uses this device to when the live width of wire detects in target PCB image, it is not necessary to measure wire in target PCB image
The actual numerical value of live width, compares computing without by the actual numerical value of live width and standard figures, the most multiple during detection
Miscellaneous geometric operation so that detect simpler quickly.
As shown in Figure 6, what Fig. 6 was illustrated that the embodiment of the present invention provides a kind of is carried out the line-spacing of wire in PCB image
The structured flowchart of the device of detection, this device includes:
Second binaryzation calculation process module 501, for target PCB image carries out binaryzation calculation process, generates institute
State the binary image of target PCB image；
Line-spacing structural element builds module 502, for according to presetting line-spacing threshold value structure line-spacing structural element；
Closed operation processing module 503, is used for using described line-spacing structural element that described binary image is carried out morphology
Closed operation processes, and the closed operation generating described target PCB image processes image；
Second calculus of differences processing module 504, is carried out with described binary image for described closed operation is processed image
Calculus of differences processes, and generates the line-spacing detection image of described target PCB image；
Line-spacing testing result determines module 505, for determining in described target PCB image according to described line-spacing detection image
The line-spacing testing result of wire.
Further, line-spacing structural element build module 502 specifically for:
According to default line-spacing threshold value, determine the value of the second reference dimension of described line-spacing structural element according to the following equation；
K2=(D2/25.4)/R；
Whether the value judging described second reference dimension is odd number, if the value of described second reference dimension is odd number, then
The value of described second reference dimension is defined as the value of the size of described line-spacing structural element；Or, if described second reference scale
Very little value is even number, then will be defined as the value of the size of described line-spacing structural element less than the maximum odd number of described even number；
Wherein, K2 represents the second reference dimension of described line-spacing structural element, and unit is pixel；D2 represents described default line
Away from threshold value, unit is mil, 1mil=25.4 micron；R represents the default resolution in detecting system, and unit is the every pixel of micron.
Further, line-spacing testing result determine module 505 specifically for:
Judge whether described line-spacing detection image exists the second foreground target；
If there is the second foreground target in described line-spacing detection image, it is determined that wire tool in described target PCB image
There is line-spacing defect in violation of rules and regulations, and described second foreground target position coordinates in described line-spacing detection image is defined as described
The position coordinates at the defect place in violation of rules and regulations of line-spacing described in target PCB image.
Use the device that the present embodiment provides, it is possible to the binary image of target PCB image is carried out closing operation of mathematical morphology
Process obtains processing image, can carry out calculus of differences process by processing image with binary image afterwards, obtain line-spacing detection
Result figure, by whether having the position of foreground target and foreground target in the line-spacing testing result figure that analysis finally obtains sits
Mark, i.e. can determine that in target PCB image, whether wire has line-spacing defect in violation of rules and regulations and the position seat at line-spacing defect place in violation of rules and regulations
Mark, uses this device to when the line-spacing of wire detects in target PCB image, it is not necessary to measure wire in target PCB image
The actual numerical value of line-spacing, compares computing without by the actual numerical value of line-spacing and standard figures, the most multiple during detection
Miscellaneous geometric operation so that detect simpler quickly.
Corresponding with method part, when being embodied as, a device can be used the live width of wire in PCB image and line
Away from detecting, concrete device is with reference to following embodiment.
As it is shown in fig. 7, Fig. 7 be illustrated that the embodiment of the present invention provides a kind of to the live width of wire in PCB image and line
Away from carrying out the structured flowchart of the device detected, this device includes:
3rd binaryzation calculation process module 601, for target PCB image carries out binaryzation calculation process, generates institute
State the binary image of target PCB image；
Structural element builds module 602, for according to presetting live width threshold value structure live width structural element, according to default line-spacing
Threshold value builds line-spacing structural element；
Opening and closing operation processing module 603, is used for using described live width structural element that described binary image is carried out form
Opening operation processes, and the opening operation generating described target PCB image processes image；Use described line-spacing structural element to described two
Value image carries out closing operation of mathematical morphology process, and the closed operation generating described target PCB image processes image；
3rd calculus of differences processing module 604, is carried out with described binary image for described opening operation is processed image
Calculus of differences processes, and generates the live width detection image of described target PCB image；Described closed operation is processed image and described two-value
Change image and carry out calculus of differences process, generate the line-spacing detection image of described target PCB image.
Testing result determines module 605, for determining wire in described target PCB image according to described live width detection image
Live width testing result；The line-spacing testing result of wire in described target PCB image is determined according to described line-spacing detection image.
When the live width of wire in target PCB image and line-spacing are detected by the device using the present embodiment to provide, specifically
The operation performed is referred to the embodiment of above-mentioned two device, uses the device that the present embodiment provides, to wire in PCB image
Live width and line-spacing when detecting, detection process is simpler quickly.
Each embodiment in this specification all uses the mode gone forward one by one to describe, identical similar portion between each embodiment
Dividing and see mutually, what each embodiment stressed is the difference with other embodiments.Especially for device or
For system embodiment, owing to it is substantially similar to embodiment of the method, so describing fairly simple, relevant part sees method
The part of embodiment illustrates.Apparatus and system embodiment described above is only schematically, wherein as separating
The unit of part description can be or may not be physically separate, and the parts shown as unit can be or also
Can not be physical location, i.e. may be located at a place, or can also be distributed on multiple NE.Can be according to reality
The needing of border selects some or all of module therein to realize the purpose of the present embodiment scheme.Those of ordinary skill in the art
In the case of not paying creative work, i.e. it is appreciated that and implements.
It should be noted that in this article, such as the relational terms of " first " and " second " or the like is used merely to one
Individual entity or operation separate with another entity or operating space, and not necessarily require or imply these entities or operate it
Between exist any this reality relation or order.And, term " includes ", " comprising " or its any other variant are intended to
Contain comprising of nonexcludability, so that include that the process of a series of key element, method, article or equipment not only include those
Key element, but also include other key elements being not expressly set out, or also include for this process, method, article or set
Standby intrinsic key element.In the case of there is no more restriction, statement " including ... " key element limited, it is not excluded that
Other identical element is there is also in including the process of key element, method, article or equipment.
Below it is only the detailed description of the invention of the present invention, it is noted that those skilled in the art are come
Saying, under the premise without departing from the principles of the invention, it is also possible to make some improvements and modifications, these improvements and modifications also should be regarded as
Protection scope of the present invention.
Claims (12)
1. the method that the live width of wire in PCB image is detected, it is characterised in that including:
Target PCB image is carried out binaryzation calculation process, generates the binary image of described target PCB image；
Live width structural element is built according to default live width threshold value；
Use described live width structural element that described binary image carries out morphology opening operation process, generate described target PCB
The opening operation of image processes image；
Described opening operation is processed image and carries out calculus of differences process with described binary image, generate described target PCB image
Live width detection image；
The live width testing result of wire in described target PCB image is determined according to described live width detection image.
Method the most according to claim 1, it is characterised in that described basis is preset live width threshold value and built live width structural element
Process, specifically include:
According to default live width threshold value, determine the value of the first reference dimension of described live width structural element according to the following equation；
K1=(D1/25.4)/R；
Whether the value judging described first reference dimension is odd number, if the value of described first reference dimension is odd number, then by institute
State the value that the value of the first reference dimension is defined as the size of described live width structural element；Or, if described first reference dimension
Value is even number, then will be defined as the value of the size of described live width structural element less than the maximum odd number of this even number；
Wherein, K1 represents the first reference dimension of described live width structural element, and unit is pixel；D1 represents described default live width threshold
Value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
Method the most according to claim 2, it is characterised in that described according to described live width detection image determine described target
The process of the live width testing result of wire in PCB image, specifically includes:
Judge whether described live width detection image exists the first foreground target；
If there is the first foreground target in described live width detection image, it is determined that in described target PCB image, wire has line
Wide defect in violation of rules and regulations, and described first foreground target position coordinates in described live width detection image is defined as described target
The position coordinates at the defect place in violation of rules and regulations of live width described in PCB image.
4. the method that the line-spacing of wire in PCB image is detected, it is characterised in that including:
Target PCB image is carried out binaryzation calculation process, generates the binary image of described target PCB image；
Line-spacing structural element is built according to default line-spacing threshold value；
Use described line-spacing structural element that described binary image is carried out closing operation of mathematical morphology process, generate described target PCB
The closed operation of image processes image；
Described closed operation is processed image and carries out calculus of differences process with described binary image, generate described target PCB image
Line-spacing detection image；
The line-spacing testing result of wire in described target PCB image is determined according to described line-spacing detection image.
Method the most according to claim 4, it is characterised in that described basis is preset line-spacing threshold value and built line-spacing structural element
Process, specifically include:
According to default line-spacing threshold value, determine the value of the second reference dimension of described line-spacing structural element according to the following equation；
K2=(D2/25.4)/R；
Whether the value judging described second reference dimension is odd number, if the value of described second reference dimension is odd number, then by institute
State the value that the value of the second reference dimension is defined as the size of described line-spacing structural element；Or, if described second reference dimension
Value is even number, then will be defined as the value of the size of described line-spacing structural element less than the maximum odd number of described even number；
Wherein, K2 represents the second reference dimension of described line-spacing structural element, and unit is pixel；D2 represents described default line-spacing threshold
Value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
Method the most according to claim 5, it is characterised in that described according to described line-spacing detection image determine described target
The process of the line-spacing testing result of wire in PCB image, specifically includes:
Judge whether described line-spacing detection image exists the second foreground target；
If there is the second foreground target in described line-spacing detection image, it is determined that in described target PCB image, wire has line
Away from violation defect, and described second foreground target position coordinates in described line-spacing detection image is defined as described target
The position coordinates at the defect place in violation of rules and regulations of line-spacing described in PCB image.
7. the device that the live width of wire in PCB image is detected, it is characterised in that including:
First binaryzation calculation process module, for target PCB image is carried out binaryzation calculation process, generates described target
The binary image of PCB image；
Live width structural element builds module, for according to presetting live width threshold value structure live width structural element；
Opening operation processing module, is used for using described live width structural element to carry out described binary image at morphology opening operation
Reason, the opening operation generating described target PCB image processes image；
First calculus of differences processing module, carries out calculus of differences for described opening operation is processed image with described binary image
Process, generate the live width detection image of described target PCB image；
Live width testing result determines module, for determining wire in described target PCB image according to described live width detection image
Live width testing result.
Device the most according to claim 7, it is characterised in that described live width structural element build module specifically for:
According to default live width threshold value, determine the value of the first reference dimension of described live width structural element according to the following equation；
K1=(D1/25.4)/R；
Whether the value judging described first reference dimension is odd number, if the value of described first reference dimension is odd number, then by institute
State the value that the value of the first reference dimension is defined as the size of described live width structural element；Or, if described first reference dimension
Value is even number, then will be defined as the value of the size of described live width structural element less than the maximum odd number of this even number；
Wherein, K1 represents the first reference dimension of described live width structural element, and unit is pixel；D1 represents described default live width threshold
Value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
Device the most according to claim 8, it is characterised in that described live width testing result determine module specifically for:
Judge whether described live width detection image exists the first foreground target；
If there is the first foreground target in described live width detection image, it is determined that in described target PCB image, wire has line
Wide defect in violation of rules and regulations, and described first foreground target position coordinates in described live width detection image is defined as described target
The position coordinates at the defect place in violation of rules and regulations of live width described in PCB image.
10. the device that the line-spacing of wire in PCB image is detected, it is characterised in that including:
Second binaryzation calculation process module, for target PCB image is carried out binaryzation calculation process, generates described target
The binary image of PCB image；
Line-spacing structural element builds module, for according to presetting line-spacing threshold value structure line-spacing structural element；
Closed operation processing module, is used for using described line-spacing structural element to carry out described binary image at closing operation of mathematical morphology
Reason, the closed operation generating described target PCB image processes image；
Second calculus of differences processing module, carries out calculus of differences for described closed operation is processed image with described binary image
Process, generate the line-spacing detection image of described target PCB image；
Line-spacing testing result determines module, for determining wire in described target PCB image according to described line-spacing detection image
Line-spacing testing result.
11. devices according to claim 10, it is characterised in that described line-spacing structural element build module specifically for:
According to default line-spacing threshold value, determine the value of the second reference dimension of described line-spacing structural element according to the following equation；
K2=(D2/25.4)/R；
Whether the value judging described second reference dimension is odd number, if the value of described second reference dimension is odd number, then by institute
State the value that the value of the second reference dimension is defined as the size of described line-spacing structural element；Or, if described second reference dimension
Value is even number, then will be defined as the value of the size of described line-spacing structural element less than the maximum odd number of described even number；
Wherein, K2 represents the second reference dimension of described line-spacing structural element, and unit is pixel；D2 represents described default line-spacing threshold
Value, unit is mil；R represents the default resolution in detecting system, and unit is the every pixel of micron.
12. devices according to claim 11, it is characterised in that described line-spacing testing result determine module specifically for:
Judge whether described line-spacing detection image exists the second foreground target；
If there is the second foreground target in described line-spacing detection image, it is determined that in described target PCB image, wire has line
Away from violation defect, and described second foreground target position coordinates in described line-spacing detection image is defined as described target
The position coordinates at the defect place in violation of rules and regulations of line-spacing described in PCB image.
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