CN105988499B - Source side voltage regulator - Google Patents
Source side voltage regulator Download PDFInfo
- Publication number
- CN105988499B CN105988499B CN201510143903.XA CN201510143903A CN105988499B CN 105988499 B CN105988499 B CN 105988499B CN 201510143903 A CN201510143903 A CN 201510143903A CN 105988499 B CN105988499 B CN 105988499B
- Authority
- CN
- China
- Prior art keywords
- voltage
- transistor
- amplifier
- output
- reference voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Continuous-Control Power Sources That Use Transistors (AREA)
Abstract
The present invention relates to a kind of source side voltage regulators.The voltage regulator is produced as the output voltage of the voltage level of the design lower than supply voltage.Reference voltage generator generates the reference voltage between ground connection and supply voltage.Divider generates the feedback voltage between supply voltage and output voltage.Amplifier generates amplifier output voltage based on the difference between reference voltage and feedback voltage.Buffer buffer amplifier output voltage.Channel transistor receives buffer voltagc in its control node to drag down the average load current for appearing in output node.Capacitance connection is between power supply and output voltage in order to provide peak load current.Load current detection transistor receives buffer voltagc in its control node to sense load current.Compensation transistor is for compensating leakage current.The load current of sensing is converted to the voltage control signal for being applied to compensation transistor by internal load.
Description
Technical field
The present invention relates to integrated circuits, more particularly to a kind of voltage regulator.
Background technique
P channel, such as P type metal oxide semiconductor (PMOS) transistor are the control of low cost, low complex degree
The preferable selection of device such as DC motor controller and decompression charge stage.However, this just needs to stablize and accurate voltage adjusting
Device is used as the power supply of PMOS driving circuit.
Detailed description of the invention
By the description of following specific embodiment, appended claims and attached drawing, the other embodiment of the present invention will
It is clear that similar appended drawing reference indicates same or similar element in the accompanying drawings.
Fig. 1 is the schematic block diagram of voltage regulator according to an embodiment of the invention；
Fig. 2 is the schematic circuit of the reference voltage generator of Fig. 1 voltage regulator；
Fig. 3 be Fig. 1 voltage regulator can operation transconductance amplifier schematic circuit；
Fig. 4 is the schematic circuit of the buffer of Fig. 1 voltage regulator；And
Fig. 5 is the schematic circuit of the divider of Fig. 1 voltage regulator.
Specific embodiment
Disclosed herein is the embodiments being specifically described of the invention.However, specific structural and function disclosed herein
The specific descriptions of energy property are only representative, are to describe exemplary embodiments of the present invention.The present invention can be with more
The selectable form of kind is realized without being only limited to embodiment described here.Further, term used herein above
Limitation exemplary embodiments of the present invention are not intended to just for the sake of description specific embodiment.
Used herein above, " one " of singular "one" and "the" means also to include plural form, unless on
Hereinafter explicitly point out other meanings.It will be further appreciated that term " includes " "comprising" is by the feature presented, step
Or element is listed, but it is not excluded that the presence or increase of other one or more features, step or element.Also it should infuse
Meaning, in some alternative embodiments, the function action can not according to sequence represented in attached drawing into
Row.For example, according to related function/effect, shown in continuous two width figure can actually be performed simultaneously or have completely
When can execute in reverse order.
In one embodiment, the present invention is a kind of voltage regulator, generates output voltage, the output in output node
The voltage level of the design of voltage is lower than the supply voltage of voltage regulator.Reference voltage generator receives supply voltage and ground connection
The reference voltage of voltage and generation between ground connection and supply voltage.Divider be connected to supply voltage and output voltage it
Between to generate the feedback voltage between power supply and output voltage.Amplifier is connected for receiving reference voltage and feedback
Voltage and based on reference to and feedback voltage difference generate amplifier output voltage.Buffer is connected for reception amplifier
Output voltage and the voltage for generating buffering.Channel transistor is connected between output and ground voltage and is connected for
The voltage of buffering is received in its control node to pull down the average load current that (sink) appears in its output node.Capacitor
It is connected between power supply and output voltage to provide peak load current at output node.Load current detection transistor
It is connected between power supply and ground voltage and is connected for receiving the voltage of buffering at its control node for incuding
Appear in the load current of output node.Compensation transistor is connected between power supply and output voltage to compensate output and connect
The leakage current of the drain current path in the output node downstream formed between ground voltage.Internal load and load current detection transistor
It is connected in series between power supply and ground nodes so that the load current of induction is transformed to voltage control signal and is applied to compensation
The control node of transistor.
Fig. 1 is the schematic block diagram of voltage regulator 100 according to an embodiment of the invention.Voltage regulator 100 connects
It receives supply voltage VDD and ground voltage VSS and generates power source reference output voltage Vo, power source reference output voltage Vo is
The voltage level of design lower than supply voltage VDD.
Reference voltage generator 1110 generates reference voltage Vref, the reference as supply voltage VDD.Reference voltage
Vref be applied to can operation trsanscondutance amplifier (OTA) 120 negative input, which receives anti-in positive terminal
Feedthrough voltage Vfb.For feedback voltage Vfb as produced by divider 140, the gain of voltage regulator 100 is arranged in divider 140.OTA
120 enough gains are provided adjust output voltage Vo to the design for being lower than supply voltage VDD voltage level.
N-shaped main channel element NMOS_A be used to pull down by the average negative of the circuit downstream (not shown) of VDD and Vo power supply
Carry electric current.Shunt capacitance Cbypass is used to provide for peak load current.N-shaped load current detection element NMOS_B is used for
Inductive load electric current.Internal load is in this embodiment resistive load RL, be used to be transformed to control by the load current of induction
Voltage G_C processed is used to compensate from Vo (i.e. from output node) to VSS's (ground connection) for N-shaped auxiliary pull-up element NMOS_C
Potential leakage current so as to if in meaning circuit downstream in office there are big drain current path if can be to avoid failure.Buffer 130
It is used to be isolated the gain stage of OTA 120 and the grid of NMOS_A to improve loop stability.
In operation, when output voltage Vo rises, divider 140 promotes feedback voltage Vfb to rise, this promotes OTA
120 output voltage O1 rises, this promotes the output voltage G_AB of buffer BUF to rise, this promotes to flow through NMOS_B and NMOS_
The electric current of A rises, this promotes to control signal G_C decline, this promotes the electric current decline for flowing through NMOS_C, and then promotes output voltage
Vo decline.
Similarly, when output voltage Vo declines, divider 140 promotes feedback voltage Vfb to decline, this promotes OTA 120
Output voltage O1 decline, this promotes the output voltage G_AB of buffer BUF to decline, this promotes to flow through NMOS_B's and NMOS_A
Electric current decline, this promotes to control signal G_C rising, this promotes the electric current for flowing through NMOS_C to rise, and then promotes output voltage Vo
Rise.
In this way, voltage regulator 100 adjusts output voltage Vo according to the following formula to track supply voltage:
VDD-Vo=K* (VDD-Vref),
Wherein K is the gain of voltage regulator 100, is determined by divider 140.
Fig. 2 is the schematic circuit of the reference voltage generator 110 of Fig. 1.Reference voltage generator 110 (i) receives electricity
Source voltage VDD, ground voltage VSS and the reference voltage Vbg of ground connection reference, such as usually band gap available in integrated circuits
Reference voltage, it is insensitive to the variation of technique, voltage and temperature (PVT), and (ii) generates the reference voltage of power source reference
Vref。
In operation, amplifier AMP, can be it is common can operation transconductance amplifier, adjust and be used for n-type transistor
The control voltage Vgate of MN0 so as to force feedback voltage V mir be equal to reference voltage Vbg so that flowing through the electric current of voltage R1 is
Vbg/R1.The same electric current Vbg/R1 flows through transistor MN0 and resistance R2, is connected between node VDD and Vref, this
Sample, voltage difference is Vbg*R2/R1 between supply voltage VDD and power source reference voltage Vref.In a possible implementation,
Vbg=1.2V, R1=12kohm, and R2=30kohm, the voltage drop on R2 is 3V, therefore, in this embodiment, power supply ginseng
The reference voltage Vref examined will be less than supply voltage VDD 3V.
Fig. 3 be Fig. 1 can operation transconductance amplifier 120 schematic circuit.OTA 120 (i) receives supply voltage
VDD, ground voltage VSS, from reference voltage generator 110 negative input node INM reference voltage Vref, and from point
Depressor 140 positive input node INP feedback voltage Vfb, and (ii) output node OUT generate OTA output voltage O1.
In operation, when feedback voltage Vfb becomes larger than reference voltage Vref, then (i) flowing through n-type transistor MN2
Electric current will increase, and (ii) flow through n-type transistor MN1 electric current will reduce.As a result, (i) flowing through the electric current of MP3 will increase
And the electric current that (ii) flows through MP1 will be reduced.In this way, next, the mirror image that (i) will be promoted to flow through p-type mirrored transistor MP4 is electric
Stream will increase and (ii) flows through the image current reduction of p-type mirrored transistor MP2.In this way, next, will promote to flow through N-shaped
The electric current of transistor MN3 is reduced, and the image current for flowing through N-shaped mirrored transistor MN4 will be promoted to reduce, OTA will be promoted defeated
Voltage O1 rises out.
Similarly, when feedback voltage Vfb becomes smaller than reference voltage Vref, then (i) flowing through n-type transistor MN2's
Electric current will reduce and (ii) flow through n-type transistor MN1 electric current will increase.As a result, (i) flowing through the electric current of MP3 will be reduced simultaneously
And (ii) flow through MP1 electric current will increase.In this way, next, (i) will be promoted to flow through the image current of p-type mirrored transistor MP4
The image current that reduction and (ii) flow through p-type mirrored transistor MP2 increases.In this way, next, will promote to flow through N-shaped crystal
The electric current of pipe MN3 increases, this will promote the image current for flowing through N-shaped mirrored transistor MN4 to increase, and will promote OTA output electricity
Press O1 decline.
To which when feedback voltage Vfb becomes larger than reference voltage Vref, OTA output voltage O1 increases, and vice versa.
Because OTA 120 is configured in voltage regulator 100 in the form of closed circuit, respectively in the voltage Vfb of node INP and INM
And Vref, it will be driven to identical, matching is flowed through the electric current of MN4 by the electric current for flowing through MP4 in this way.
Fig. 4 is the schematic circuit of the buffer 130 of Fig. 1.Buffer 130 (i) receives buffer supply voltage VDD_
BUF (it can be supply voltage VDD or other available supply voltages), ground voltage VSS, and exist from OTA 120
The OTA output voltage O1 and (ii) of its input node IN generates buffer output voltage G_AB in output node OUT.Certain
In implementation, buffer 130 is traditional unity gain buffer, is indicated in the received voltage level O1 of input node IN
It is identical as its output voltage G_AB in output node OUT.
In operation, when the voltage O1 of input node IN rises, the electric current for flowing through p-type transistor MP1 is reduced, and is made
The electric current for flowing through n-type transistor MN1 and N-shaped mirrored transistor MN2 is reduced.Simultaneously as constant-current source ITAIL, flows through p-type crystal
The electric current of pipe MP2 increases, and the voltage G_AB of output node OUT is promoted to rise.As a result, the electric current for flowing through MP2 will start to reduce
Currents match until flowing through MP2 flows through the electric current of MN2.To which when input voltage O1 rises, output voltage G_AB also increases
Add.
Similarly, when the voltage O1 of input node IN decline, the electric current for flowing through p-type transistor MP1 increases, and promotes to flow
The electric current for crossing n-type transistor MN1 and N-shaped mirrored transistor MN2 increases.Simultaneously as constant-current source ITAIL, flows through p-type transistor
The electric current of MP2 is reduced, and the voltage of the voltage G_AB of output node OUT is promoted to decline.As a result, flowing through the electric current of MP2 will start
It is increased up and flows through the currents match of MP2 and flow through the electric current of MN2.To, when input voltage O1 decline, output voltage G_AB
Decline.
Fig. 5 is the schematic circuit of the divider 140 of Fig. 1.Divider 140 (i) receives supply voltage VDD and output
Voltage Vo and (ii) generate feedback voltage Vfb, and the impedance of voltage level and resistance RA and RB has functional relation, wherein voltage
The gain of adjuster 100 is given by K=(RA+RB)/RA.
Although the present invention is described in the situation of the voltage regulator of Fig. 1-5 100, those skilled in the art
It will be understood that the present invention need not be confined to the specific embodiment.For example, bipolar transistor can be used to replace MOS crystal
Pipe.Moreover, Fig. 2-5 shows the particular implementation of respective element in Fig. 1.What those skilled in the art will be appreciated that
It is alternative embodiment is possible for each of those elements.
In certain embodiments, at least one of reference voltage generator 110 and divider 140 are programmable,
So that the voltage level of the design of the output voltage Vo lower than supply voltage VDD is adjustable.For example, reference voltage is sent out
Raw device 110 can be programmable, be realized by the resistance R1 and/or resistance R2 of Fig. 2 using programmable resistance.Similarly,
Divider 140 can be programmable, be realized by the resistance RA and/or resistance RB of Fig. 5 using programmable resistance.
Also for the purpose of description, term " coupling " " being couple to " " being coupled to " " connection " " being connected to " " connected " refers to
Be that any way known in the art or can permit for later technology development are transmitted between two or more elements
Any way of energy, although and the insertions of one or more add ons is also it is contemplated that being not required.Relatively
, term " directly coupling " " being directly connected to " etc. means that there is no this add ons.
In addition, for the purposes of the present invention, it is to be appreciated that all canopy poles be all by fixed voltage power bracket (or
The multiple ranges of person) and ground connection power supply, unless having other diagrams.Ground connection is considered the electricity with about zero volts
Source, and there is the power supply of any required voltage can be replaced with ground connection.
For the purposes of the present invention, signal and corresponding node, port or path can be indicated with same names and can be mutual
Exchange.
For the purpose of elaboration, transistor is properly viewed as single device.However, those skilled in the art can be with
What is understood is that transistor will have multiple sizes (for example, canopy pole width and length) and characteristic (for example, threshold voltage, gain etc.)
It and may include multiple transistors being connected in parallel to obtain required electrical characteristic from the combination.Further, institute
The transistor shown can be Darlington.
As used in the specification and claims, term " channel node " is generally referred to as metal oxidation
The source electrode of object semiconductor (MOS) transistor unit (also referred to as MOSFET) or drain electrode, term " channel " are referred to by source electrode
The path of device between drain electrode, term " control node " are generally referred to as the grid of MOSFET.Similarly, as right is wanted
Used in asking, term " source electrode " " drain electrode " and " canopy pole " should be understood that source electrode, drain electrode and the canopy pole of MOSFET, or
Emitter, collector and the base stage of bipolar device when the embodiment of the present invention is realized using bipolar transistor Manifold technology.
Unless provide other it is specific indicate, each numerical value and range should be understood that about, as in the numerical value or
Word " about " " approximation " before range.
It will be further appreciated that those skilled in the art can in order to explain the embodiment of the present invention and be described and by
Details, material and arrangement in the part of elaboration make a variety of changes, do not depart from this hair that following claims is covered
The range of bright embodiment.
In this specification comprising any claim, term " each " can be used to refer to multiple aforementioned components
Or one or more special characteristics in step.It is not excluded for when using the reference of open-ended term " comprising ", term " each "
Element or step that is additional, not describing a, it is understood, therefore, that device can have member that is additional, not describing
Part, a kind of method can have additional, steps not described, and element or step that is additional here, not describing does not have institute
The specific feature of one or more stated.
Mean the specific feature described jointly with embodiment, knot herein with reference to " one embodiment " or " embodiment "
Structure or characteristic are comprised at least one embodiment of the present invention.Word " in one embodiment " is in multiple positions of specification
It sets and occurs not needing being understood as identical embodiment, nor is it necessary that the individual of mutual exclusion other embodiments or can
The embodiment of selection.Term " embodiment " is also the same so.
The embodiment that the claim of this application is covered is limited to that (1) this specification can be realized and (2) and meets
The embodiment of legal provisions theme.Even if irrealizable embodiment and corresponding to non-legal theme embodiment its fall into protection
Within the scope of be also explicitly excluded.
Claims (10)
1. a kind of voltage regulator generates output voltage in output node, which is lower than for voltage regulator
The voltage level of the design of supply voltage, the voltage regulator include:
Reference voltage generator receives supply voltage and ground voltage, and generates between ground voltage and supply voltage
Reference voltage；
Divider is connected between supply voltage and output voltage anti-between supply voltage and output voltage to generate
Feedthrough voltage；
Amplifier is coupled to receive reference voltage and feedback voltage and is produced based on the difference between reference voltage and feedback voltage
Raw amplifier output voltage；
Buffer is coupled to receive amplifier output voltage and generates the voltage of buffering；
Channel transistor is connected between output voltage and ground voltage, and is connected in the control of the channel transistor
Node processed receives the voltage of buffering to drag down the average load current for appearing in output node；
Capacitor is connected between supply voltage and output voltage to provide peak load current in output node；
Load current detection transistor is connected between supply voltage and ground voltage and is connected to examine in the load current
The control node for surveying transistor receives the voltage of buffering to sense the load current for appearing in output node；
Transistor is compensated, is connected between supply voltage and output voltage to compensate between output voltage and ground voltage
From the leakage current of the drain current path in output node downstream；And
Internal load is connected in series between supply voltage and ground voltage to sense with load current detection transistor
Load current is converted to the voltage control signal for being applied to the control node of compensation transistor.
2. voltage regulator according to claim 1, in which:
Resistance ratios of the gain of divider based on divider；
Gain of the voltage level of design based on reference voltage and divider；And
At least one of reference voltage generator and divider are programmable, so that the voltage level of design is adjustable
's.
3. voltage regulator according to claim 1, wherein internal load includes being connected to supply voltage and compensation crystal
Resistance between the control node of pipe.
4. voltage regulator according to claim 1, wherein reference voltage generator is based on received band gap reference voltage
Generate reference voltage.
5. voltage regulator according to claim 4, wherein reference voltage generator includes:
Second amplifier is coupled to receive band gap reference voltage and the second feedback voltage and based on band gap reference voltage and second
Difference between feedback voltage generates the second amplifier output voltage；
Transistor is connected to receive the second amplifier output voltage in the control node of the transistor；
First resistor is connected between transistor and ground voltage, wherein the second feedback voltage is in transistor and the first electricity
The voltage level of point of intersection between resistance；And
Second resistance is connected between supply voltage and transistor, wherein reference voltage be second resistance and transistor it
Between point of intersection voltage level.
6. voltage regulator according to claim 1, wherein amplifier be can operation trsanscondutance amplifier (OTA).
7. voltage regulator according to claim 1, wherein buffer is the buffer of unit gain.
8. voltage regulator according to claim 1, wherein buffer is from channel transistor and load current detection crystal
Pipe isolated amplifier is to improve the loop stability in voltage regulator.
9. voltage regulator according to claim 1, in which:
Impedance ratio of the gain of divider based on divider；
The voltage level of the design is the gain based on reference voltage and divider；
Reference voltage generator is based on the received band gap reference voltage of institute and generates the reference voltage；
Reference voltage generator includes:
Second amplifier is coupled to receive the band gap reference voltage and the second feedback voltage, and is based on band gap reference voltage
And the second difference between feedback voltage generates the second amplifier output voltage；
Transistor is connected to receive the second amplifier output voltage in the control node of the transistor；
First resistor is connected between transistor and ground voltage, wherein the second feedback voltage is in transistor and the first electricity
Hinder the voltage level of the point of intersection between device；And
Second resistance is connected between supply voltage and transistor, wherein reference voltage be second resistance and transistor it
Between point of intersection voltage level；
Amplifier be can operation trsanscondutance amplifier (OTA)；And
Buffer is the buffer of unit gain, by amplifier and channel transistor and load current detection transistor isolation so as to
Improve the loop stability in voltage regulator.
10. voltage regulator according to claim 9, wherein at least one of reference voltage generator and divider are can to compile
Journey, so that the voltage level of design is adjustable.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510143903.XA CN105988499B (en) | 2015-02-16 | 2015-02-16 | Source side voltage regulator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510143903.XA CN105988499B (en) | 2015-02-16 | 2015-02-16 | Source side voltage regulator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN105988499A CN105988499A (en) | 2016-10-05 |
| CN105988499B true CN105988499B (en) | 2019-08-16 |
Family
ID=57040323
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510143903.XA Expired - Fee Related CN105988499B (en) | 2015-02-16 | 2015-02-16 | Source side voltage regulator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN105988499B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114594357B (en) * | 2020-12-03 | 2024-06-21 | 圣邦微电子（北京）股份有限公司 | Drain-source voltage detection circuit and switching circuit of power tube |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101082824A (en) * | 2006-06-01 | 2007-12-05 | 罗姆股份有限公司 | Power supply device and electric appliance therewith |
| CN101807853A (en) * | 2009-02-17 | 2010-08-18 | 精工电子有限公司 | Voltage regulator |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200903988A (en) * | 2007-07-03 | 2009-01-16 | Holtek Semiconductor Inc | Low drop-out voltage regulator with high-performance linear and load regulation |
-
2015
- 2015-02-16 CN CN201510143903.XA patent/CN105988499B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101082824A (en) * | 2006-06-01 | 2007-12-05 | 罗姆股份有限公司 | Power supply device and electric appliance therewith |
| CN101807853A (en) * | 2009-02-17 | 2010-08-18 | 精工电子有限公司 | Voltage regulator |
Also Published As
| Publication number | Publication date |
|---|---|
| CN105988499A (en) | 2016-10-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN204538970U (en) | Low drop out voltage regurator | |
| US9030186B2 (en) | Bandgap reference circuit and regulator circuit with common amplifier | |
| CN101341453B (en) | Constant voltage circuit and method of controlling output voltage of constant voltage circuit | |
| CN108075737B (en) | Low output impedance, high speed, high voltage generator for driving capacitive loads | |
| US8742819B2 (en) | Current limiting circuitry and method for pass elements and output stages | |
| EP2857923B1 (en) | An apparatus and method for a voltage regulator with improved output voltage regulated loop biasing | |
| US8665020B2 (en) | Differential amplifier circuit that can change current flowing through a constant-current source according to load variation, and series regulator including the same | |
| CN106200732A (en) | Generate the circuit of output voltage and the method to set up of the output voltage of low dropout voltage regulator | |
| KR20100096014A (en) | Voltage regulator | |
| KR20110035942A (en) | Voltage regulator | |
| US9354648B2 (en) | Constant-voltage circuit | |
| KR20100080958A (en) | Reference bias generating apparatus | |
| TWI780282B (en) | Overcurrent limiting circuit, overcurrent limiting method, and power supply circuit | |
| CN111290467B (en) | Process compensated gain boost voltage regulator | |
| CN101599742A (en) | Amplifier and offset regulating circuit | |
| CN104753481B (en) | Differential operational amplifier and bandgap reference voltage generating circuit | |
| CN104102266A (en) | Reference voltage generating circuit | |
| CN102385413A (en) | Low-voltage bandgap reference voltage generating circuit | |
| TWI463792B (en) | Amplifier circuit with overshoot suppression | |
| CN110045777B (en) | Reverse current prevention circuit and power supply circuit | |
| KR101362474B1 (en) | Cmos subbandgap reference | |
| CN105988499B (en) | Source side voltage regulator | |
| US9588540B2 (en) | Supply-side voltage regulator | |
| CN108141207A (en) | voltage comparator | |
| CN110221647A (en) | A kind of voltage-stablizer |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| CB02 | Change of applicant information |
Address after: Texas in the United States Applicant after: NXP America Co Ltd Address before: Texas in the United States Applicant before: Fisical Semiconductor Inc. |
|
| CB02 | Change of applicant information | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20190816 Termination date: 20210216 |
|
| CF01 | Termination of patent right due to non-payment of annual fee |