CN105959071A - Method and device for calibrating receiver chip - Google Patents
Method and device for calibrating receiver chip Download PDFInfo
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- CN105959071A CN105959071A CN201610251280.2A CN201610251280A CN105959071A CN 105959071 A CN105959071 A CN 105959071A CN 201610251280 A CN201610251280 A CN 201610251280A CN 105959071 A CN105959071 A CN 105959071A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B17/00—Monitoring; Testing
- H04B17/20—Monitoring; Testing of receivers
- H04B17/21—Monitoring; Testing of receivers for calibration; for correcting measurements
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- Computer Networks & Wireless Communication (AREA)
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Abstract
The present invention relates to a method and device for calibrating a receiver chip. The method comprises the steps that a chip to be tested receives the preset signal sent by a standard chip and transmits the preset signal to a DSP chip to analyze, and according to the testing result sent by a testing machine platform, the DC bias current and I/O channel bias mode parameter are adjusted. The invention provides the method and device for calibrating the receiver chip, the chip can be used to transmit and receive the signal of the chip to be tested and analyze the signal, the instrument in a conventional calibration and test mode is replaced, and the automation of the calibration and test is realized through a firmware.
Description
Technical field
The present invention relates to Internet of Things WIFI chip field, particularly relate to the calibration steps of a kind of receiver chip
And device.
Background technology
Due in chip manufacturing proces the diversity of device and temperature and external environment condition for chip internal
The impact of device work, even if same series-produced radio frequency chip also has certain difference in performance
The opposite sex.In order to ensure the concordance of product, all can be to the simulation of WIFI radio frequency chip before product is paid
Circuit carries out direct current biasing, the calibration of homophase I/ orthogonal Q two-way phase and amplitude, to correct because manufacturing
During process deviation impact time analog circuit is worked, and also can carry out performance test and ensure
The product conformity energy requirement paid.
Specific instrument typically can be used radio frequency chip being calibrated and tests when to send and connect
The performance of radio frequency chip is measured by the radiofrequency signal of specific format.This method needs to be equipped with extra instrument
Device, adds the cost of test.Simultaneously instrument can only a corresponding radio frequency chip, if do not bought
Multiple stage instrument, it is impossible to accomplish that multi-disc is tested simultaneously, it is also difficult to promote calibration and the efficiency of test.
Summary of the invention
Technical problem
In view of this, the technical problem to be solved in the present invention is, how to provide the school of a kind of receiver chip
Quasi-method and apparatus, enables receiver chip to carry out self calibration to improve radio-frequency performance.
Solution
For solving above technical problem, the present invention provides the calibration side of a kind of receiver chip in first aspect
Method, including:
Chip to be measured receives the preset signals that standard chips sends, and described preset signals is transferred to numeral
Signal processing chip resolves；
The test result that described chip to be measured sends according to tester table, adjusts direct current biasing parameter and I/Q
The inclined mould parameter of passage；
Wherein, the test result that described tester table sends is to institute according to described digital signal processing chip
State preset signals to carry out resolving and obtaining.
In a kind of possible implementation, chip to be measured receive standard chips send preset signals it
Before, also include:
Described preset signals is saved in the rf_bist_mem module of described standard chips by described standard chips
In；
Described digital signal processing chip resolves, including: described digital signal processing chip calculates institute
State the DC component of preset signals and the described inclined mould of I/Q passage；And after described parsing, also include:
Test result is fed back to described tester table, described test result by described digital signal processing chip
Including described DC component and the described inclined mould of I/Q passage.
In a kind of possible implementation, in described digital signal processing chip feedback test result to institute
After stating tester table, also include:
Described tester table determines described DC component and the described inclined mould of I/Q passage according to described test result
The need of adjustment, and when needs adjust, described test result is sent to described chip to be measured.
In a kind of possible implementation, receive, at described chip to be measured, the default letter that standard chips sends
Before number, also include:
Described chip to be measured and described standard chips, according to the notice of tester table, enter test pattern.
In a kind of possible implementation, described calibration steps, also include:
Described standard chips, according to the notice of tester table, launches described preset signals to described core to be measured
Sheet.
For solving above technical problem, the present invention provides the calibration cartridge of a kind of receiver chip in second aspect
Put, including:
Standard chips, is used for sending preset signals；
Chip to be measured, is connected with described standard chips, for receiving the default letter that described standard chips sends
Number, and described preset signals is transferred to digital signal processing chip resolves；
Described digital signal processing chip, is connected with described chip to be measured, for entering described preset signals
Row resolves；
Described chip to be measured, is additionally operable to the test result sent according to tester table, adjusts direct current biasing ginseng
Number and the inclined mould parameter of I/Q passage；And
Described tester table, is connected with described digital signal processing chip and described chip to be measured, described survey
The test result that test-run a machine platform sends is to carry out described preset signals according to described digital signal processing chip
Resolve and obtain.
In a kind of possible implementation, described standard chips is additionally operable to be saved in described preset signals
In the rf_bist_mem module of described standard chips；
Described digital signal processing chip is additionally operable to calculate the DC component of described preset signals and described I/Q
The inclined mould of passage；And after described parsing, test result is fed back to described tester table, described survey
Test result includes described DC component and the described inclined mould of I/Q passage.
In a kind of possible implementation, described tester table is additionally operable to determine according to described test result
Described DC component and the described inclined mould of I/Q passage are the need of adjustment, and when needs adjust by described
Test result is sent to described chip to be measured.
In a kind of possible implementation, described chip to be measured and described standard chips, it is additionally operable to basis
The notice of tester table, enters test pattern.
In a kind of possible implementation, described standard chips, it is additionally operable to the notice according to tester table,
Launch described preset signals to described chip to be measured.
Beneficial effect
The calibration steps of a kind of receiver chip according to present invention offer and device, connect by chip to be measured
Receive preset signals that standard chips sends and preset signals is transferred to dsp chip resolves；And
The test result sent according to tester table, adjusts direct current biasing parameter and the inclined mould parameter of I/Q passage, energy
Enough utilize chip emission and receive the signal of chip to be measured and resolve, thus replacing conventional calibration and survey
Instrument in die trial formula, and realize calibration and the automatization of test by firmware.
The calibration steps of a kind of receiver chip according to present invention offer and device, by increasing standard core
Sheet (golden chip) can realize multi-plate chip rapidly and test simultaneously, improves testing efficiency and saves
Cost.
According to below with reference to the accompanying drawings to detailed description of illustrative embodiments, the further feature of the present invention and side
Face will be clear from.
Accompanying drawing explanation
The accompanying drawing of the part comprising in the description and constituting description together illustrates with description
The exemplary embodiment of the present invention, feature and aspect, and for explaining the principle of the present invention.
Fig. 1 illustrates the structural representation of the calibrating installation of the receiver chip that the embodiment of the present invention provides；
Fig. 2 illustrates the flow chart of the calibration steps of the receiver chip that the embodiment of the present invention provides；
Fig. 3 illustrates the illustraton of model of transmitter；
Fig. 4 illustrates the illustraton of model of receiver；
Fig. 5 illustrates the schematic diagram of digital baseband receiving path.
Detailed description of the invention
Various exemplary embodiments, feature and the aspect of the present invention is described in detail below with reference to accompanying drawing.Attached
Reference identical in figure represents the same or analogous element of function.Although enforcement shown in the drawings
The various aspects of example, but unless otherwise indicated, it is not necessary to accompanying drawing drawn to scale.
The most special word " exemplary " means " as example, embodiment or illustrative ".Here as
Any embodiment illustrated by " exemplary " should not necessarily be construed as preferred or advantageous over other embodiments.
It addition, in order to better illustrate the present invention, detailed description of the invention below gives numerous
Detail.It will be appreciated by those skilled in the art that do not have some detail, the present invention is equally
Implement.In some instances, method well known to those skilled in the art, means, element are not made in detail
Thin description, in order to highlight the purport of the present invention.
Embodiment 1
Based on communication system for the requirement of cost, area, power consumption and integrated level, zero intermediate frequency transceiver with
It is relative to the simpler structure of super-heterodyne architecture transceiver, higher bandwidth, less area and lower
Power consumption receive in a communications system and use widely.But it is because its better simply structure, compares appearance
It is vulnerable to the pollution of various noise.Such as direct current biasing can cause signal to deteriorate, and causes receiver rear class
Saturated, and the imbalance of homophase I/ orthogonal Q two paths amplitude or phase place all can cause demodulated signal star
The deterioration of seat figure.Therefore, for WIFI radio frequency chip, algorithm calibration direct current biasing and I/Q are used not
Balance can well improve the performance of radio circuit.
Fig. 1 illustrates the structural representation of the calibrating installation of the receiver chip that the embodiment of the present invention provides, as
Shown in Fig. 1, this calibrating installation 1 includes: golden chip 11, tester table 12, chip to be measured 13,
Digital Signal Processing dsp chip 14.
Standard chips, such as golden chip 11, be connected with chip 13 to be measured, dsp chip 14 with
Be connected with chip 13 to be measured, tester table 12 respectively with dsp chip 14, standard chips (such as golden
Chip 11) and chip to be measured 13 connect.Dsp chip 14 can also be connected with golden chip 11.
In a kind of possible implementation, tester table 12 can be directed into by specific pin
Row is launched signal specific or receives the operation of storage signal.The antenna end of chip 13 to be measured will and golden
The antenna end of chip 11 is connected, and communicates with golden chip 11 with reception signal to send.Tester table
12 can be communicated with synchronous calibration and test process with chip 13 to be measured by specific pin equally.Test
Dsp chip 15 in version then be used for calculate the signal that chip 13 to be measured sends or receives frequency,
The information such as amplitude, phase contrast, and feed back to tester table 12 to determine calibration and the survey of chip 13 to be measured
Test result.
Fig. 2 illustrates the flow chart of the calibration steps of the receiver chip that the embodiment of the present invention provides, such as Fig. 2
Shown in, the method includes:
By pin, step S1, tester table 12 notify that chip 13 and golden chip 11 to be measured enters
Test pattern.
Step S2, rf_bist_mem module in golden chip 11 write the default letter to be sent
Number.
Step S3, golden chip 11 launch described preset signals to chip 13 to be measured, chip 13 to be measured
Receive described preset signals and store.
In a kind of possible implementation, golden chip 11 can be according to the notice of tester table 12
Launch described preset signals.
Described preset signals is transferred to dsp chip 14 and resolves by step S4, chip to be measured 13.
Preferably, chip 13 to be measured can send this signal with the notice of tester table 12.
Step S5, dsp chip 14 calculate DC component and the inclined mould of I/Q passage of this signal.Preferably,
The signal data of this chip 13 and golden chip 11 to be measured is compared by dsp chip 14, by terms of
Calculate this DC component and the inclined mould of I/Q passage.
Step S6, dsp chip 14 feed back result of calculation to tester table 12, and this test result includes this
DC component and this inclined mould of I/Q passage.
In a kind of possible implementation, feed back result of calculation to described survey at described dsp chip 14
After test-run a machine platform 12, also include:
According to this result of calculation, step S7, tester table 12 determine that this DC component and this I/Q passage are inclined
Mould is the need of adjustment, and this test result is sent to described chip to be measured 13 when needs adjust.
Step S8, chip to be measured 13 receive the test result that tester table sends.
Chip 13 to be measured configures the parameter in DC_ADJ module and leads to adjust direct current biasing parameter and I/Q
The inclined mould in road is (English: mismatch) parameter.
The calibrating installation 1 of a kind of receiver chip that the embodiment of the present invention provides and the calibration of receiver chip
Method, receives the preset signals of standard chips 11 transmission by chip 13 to be measured and preset signals is transmitted
Resolve to dsp chip 14；And the test result according to tester table 12 transmission, adjust straight
Stream offset parameter and the inclined mould parameter of I/Q passage；Wherein, the test result that tester table 12 sends is root
According to dsp chip 14, preset signals is resolved and obtain, thus utilize chip emission and reception to treat
Survey the signal of chip 13 and resolve, thus replacing the instrument in conventional calibration and test pattern, and
Calibration and the automatization of test is realized by firmware.
The calibrating installation 1 of a kind of receiver chip that the embodiment of the present invention provides and the calibration of receiver chip
Method, can realize multi-plate chip rapidly by increase standard chips (golden chip 11) and survey simultaneously
Examination, raising testing efficiency is the most cost-effective.
Fig. 3 illustrates the illustraton of model of transmitter.As it is shown on figure 3, this transmitter 2 includes: the first numeral base
Band the 21, first direct current biasing and I/Q mismatch compensation circuit 22, digital-analog convertor 23, first are low
Bandpass filter the 24, first frequency mixer 25, power amplifier 26.
Wherein, the first digital baseband 21, the data that will send for modulation so that data fit through
Wireless antenna sends.RF_BIST_MEM: be used for storing the sampling letter required for calibration and test computing
Number.(abbreviation: DC_ADJ) 22, by calibrating and joining for first direct current biasing and I/Q mismatch compensation circuit
Put the direct current biasing compensating in receiving path and IQ mismatch.Digital-analog convertor (English:
Digital-Analog Converter, abbreviation: DAC) 23 convert digital signals into analogue signal.The
One low pass filter (English: Low-Pass Filter, abbreviation: LPF) 24, it is used for suppressing out-of-band interference
Signal.First frequency mixer 25, uses local oscillation signal to be mixed data signal modulation to penetrating with zero intermediate frequency signals
Again and again in section.(English: Power Amplifier, abbreviation: PA) 26, by frequency mixer for power amplifier
Output signal amplifying power and be sent on antenna.
Zero-intermediate-frequency transmitter simple in construction, integrated level is high, but the quickest for direct current biasing and IQ mismatch
Sense.Direct current biasing can cause transmitting terminal local oscillator leakage occur, in carrier signal can with local frequency phase
Same signal, causes serious direct current biasing at receiving terminal, affects the performance of receiver.Therefore school is passed through
The direct current biasing of transmitter is done compensation and can be good at improving the transmission in whole communication system by quasi-circuit
Accuracy.And because signal is to be passed by orthogonal two paths of signals I road and Q road in zero-intermediate-frequency transmitter
Defeated, in two-way transmission circuit, device performance does not mates the width that likely can cause orthogonal two paths of signals
Degree and the mismatch of phase place, cause generating useless lower sideband signal in emission process, and impact receives circuit
Performance.Therefore, at transmitting terminal, I/Q mismatch is done compensation and can improve the performance of transmission channel.Sending out
Penetrating in machine structure, before DAC, DC_ADJ module is used for adjusting direct current biasing (the English DC of transmitter
And I/Q passage mismatch Offset).
Fig. 4 illustrates receiver module figure, and the embodiment of the present invention is applicable to the receiver shown in Fig. 4.Such as figure
Shown in 4, this receiver 3 includes: low-noise amplifier 31, local oscillator the 32, second frequency mixer
33, the second low pass filter 34, analog-digital converter the 35, second direct current biasing and I/Q mismatch compensation
Circuit the 36, second digital baseband 37.
Wherein, low-noise amplifier (English: Low-Noise Amplifier, abbreviation: LNA) 31,
Receive and amplify the radiofrequency signal received on radio-frequency antenna.Local oscillator 32 is (English: Local
Oscillator, abbreviation: LO).Local oscillator 32, is used for producing local oscillation signal.Second frequency mixer 33,
The radiofrequency signal using local oscillation signal and RF filter to receive carries out mixing and is transformed into zero intermediate frequency signals.The
Two low pass filters (English: Low-Pass Filter, abbreviation: LPF) 34, it is used for suppressing out-of-band interference
Signal.Analog-digital converter (English: Analog-Digital Converter, abbreviation: ADC) 35,
Analogue signal in zero intermediate frequency is converted into digital signal.Second direct current biasing and I/Q mismatch compensation circuit
(abbreviation: DC_ADJ) 36 compensates the direct current biasing in receiving path by calibration and configuration and IQ loses
Join.Second digital baseband 37, the signal that demodulation will receive on antenna, revert to the original of transmitter transmitting
Data.RF_BIST_MEM: be used for storing the sampled signal required for calibration and test computing.
Due to zero intermediate frequency reciver switching bandwith signal to zero intermediate frequency, too much bias voltage can deteriorate letter
Number, and the circuit after mixing can be caused saturated, such as LPF or ADC etc..Therefore compensating direct current is inclined
Put within circuit is operated in ideal operation region after ensure that mixing, thus improve receiver performance.
And IQ mismatch is also the key factor affecting zero-if architecture receiver performance.In zero intermediate frequency
In structure, as shown in Figure 4, the zero intermediate frequency signals of frequency mixer output can be divided into two-way to transmit, due to I/Q
Two-way delivering path median filter, the device such as amplifier and ADC there may exist the difference in performance,
Make there will be the problem of amplitude or phase mismatch by orthogonal two paths of signals, cause demodulated signal
The deterioration of planisphere.In receiver module, DC_ADJ module is also used to adjust the DC of recipient
Offset and I/Q passage mismatch.The number to I/Q two-way is carried out by calibration flow process configuration DC_ADJ
Word signal carries out the compensation in amplitude and phase place, can effectively improve the demodulation performance of digital baseband.
Fig. 5 illustrates the schematic diagram of digital baseband receiving path, as it is shown in figure 5, radio circuit (English:
Radio-Frequency, abbreviation: RF), receiving radio data from antenna, and be converted to digital signal.
Preamble detecting, detection radio circuit transmission signal, if there is the data defined in wireless transmission protocol/
The frame head of management frame, then notify that follow-up baseband circuit starts demodulating data.Serioparallel exchange, just OFDM
Signal stream is divided into the time-domain signal stream that N road is parallel, and each of which road time-domain signal is orthogonal with N number of
A subcarrier in subcarrier is corresponding.Fast fourier transform is (English: Fast Fourier
Transform, abbreviation: FFT), time-domain signal parallel for N road is converted into frequency-region signal and exports
The frequency-region signal that N road is parallel.Channel estimation/equalization, the transmission being wirelessly transferred according to transmission Signal estimation
Channel parameter, and use the channel parameter of estimation to compensate, the data received with correction signal in nothing
Skew in line transmission channel.The data of reception are mapped on planisphere and according to planisphere by demapping
Decode the data stream of correspondence.The data stream that output N road is parallel.Parallel-serial conversion, exports de-mapping device
N circuit-switched data stream be merged into a circuit-switched data stream.Chnnel coding demodulate, according in wireless transmission protocol in advance
The channel coding method demodulated channel coding of definition, becomes initial data by data stream recovery.
Vector magnitude (English: Error Vector Magnitude, abbreviation: EVM) test-error to
Measure examination, specifically represent the IQ component and ideal signal component produced when signal is demodulated by receiver
Degree of closeness, be a kind of index considering modulated signal quality.Vector magnitude [EVM] is defined as by mistake
The ratio of the root-mean-square value of difference vector average power signal and the root-mean-square value of ideal signal mean power, and with
The form of percentage ratio represents.EVM is the least, and signal quality is the best.
Defined by EVM it can be seen that the initial data of EVM test is to enter the number before de-mapping device
According to, i.e. data stream after channel estimation/equalization, the therefore RF_BIST_MEM when testing EVM
The data of record need from channel estimation/equalization module with post-sampling.And just need the receiving path of receiving terminal
Often work.
The above, the only detailed description of the invention of the present invention, but protection scope of the present invention is not limited to
In this, any those familiar with the art, can be easily in the technical scope that the invention discloses
Expect change or replace, all should contain within protection scope of the present invention.Therefore, the protection of the present invention
Scope should be as the criterion with described scope of the claims.
Claims (10)
1. a calibration steps for receiver chip, including:
Chip to be measured receives the preset signals that standard chips sends, and described preset signals is transferred to numeral
Signal processing chip resolves；
The test result that described chip to be measured sends according to tester table, adjusts direct current biasing parameter and I/Q
The inclined mould parameter of passage；
Wherein, the test result that described tester table sends is to institute according to described digital signal processing chip
State preset signals to carry out resolving and obtaining.
Calibration steps the most according to claim 1, it is characterised in that receive mark at chip to be measured
Before the preset signals that quasi-chip sends, also include:
Described preset signals is saved in the rf_bist_mem module of described standard chips by described standard chips
In；
Described digital signal processing chip resolves, including: described digital signal processing chip calculates institute
State the DC component of preset signals and the described inclined mould of I/Q passage；And after described parsing, also include:
Test result is fed back to described tester table, described test result by described digital signal processing chip
Including described DC component and the described inclined mould of I/Q passage.
Calibration steps the most according to claim 2, it is characterised in that at described digital signal
After reason chip feedback test result gives described tester table, also include:
Described tester table determines described DC component and the described inclined mould of I/Q passage according to described test result
The need of adjustment, and when needs adjust, described test result is sent to described chip to be measured.
4. according to the calibration steps according to any one of claim 1-3, it is characterised in that described
Before chip to be measured receives the preset signals that standard chips sends, also include:
Described chip to be measured and described standard chips, according to the notice of tester table, enter test pattern.
5. according to the calibration steps according to any one of claim 1-4, it is characterised in that also include:
Described standard chips, according to the notice of tester table, launches described preset signals to described core to be measured
Sheet.
6. a calibrating installation for receiver chip, including:
Standard chips, is used for sending preset signals；
Chip to be measured, is connected with described standard chips, for receiving the default letter that described standard chips sends
Number, and described preset signals is transferred to digital signal processing chip resolves；
Described digital signal processing chip, is connected with described chip to be measured, for entering described preset signals
Row resolves；
Described chip to be measured, is additionally operable to the test result sent according to tester table, adjusts direct current biasing ginseng
Number and the inclined mould parameter of I/Q passage；And
Described tester table, is connected with described digital signal processing chip and described chip to be measured, described survey
The test result that test-run a machine platform sends is to carry out described preset signals according to described digital signal processing chip
Resolve and obtain.
Calibrating installation the most according to claim 6, it is characterised in that described standard chips is also used
In described preset signals is saved in the rf_bist_mem module of described standard chips；
Described digital signal processing chip is additionally operable to calculate the DC component of described preset signals and described I/Q
The inclined mould of passage；And after described parsing, test result is fed back to described tester table, described survey
Test result includes described DC component and the described inclined mould of I/Q passage.
Calibrating installation the most according to claim 7, it is characterised in that described tester table is also used
According to described test result determine described DC component and the described inclined mould of I/Q passage the need of adjustment,
And when needs adjust, described test result is sent to described chip to be measured.
9. according to the calibrating installation according to any one of claim 6-8, it is characterised in that described in treat
Survey chip and described standard chips, be additionally operable to the notice according to tester table, enter test pattern.
10. according to the calibrating installation according to any one of claim 6-9, it is characterised in that described mark
Quasi-chip, is additionally operable to the notice according to tester table, launches described preset signals to described chip to be measured.
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| CN115086135A (en) * | 2022-06-09 | 2022-09-20 | 深圳市领创星通科技有限公司 | IQ imbalance calibration method and device, electronic equipment and storage medium |
| CN115086135B (en) * | 2022-06-09 | 2023-12-29 | 深圳市领创星通科技有限公司 | IQ imbalance calibration method and device, electronic equipment and storage medium |
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