CN105957016B - A kind of method and device for being stretched to image - Google Patents
A kind of method and device for being stretched to image Download PDFInfo
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- CN105957016B CN105957016B CN201610430196.7A CN201610430196A CN105957016B CN 105957016 B CN105957016 B CN 105957016B CN 201610430196 A CN201610430196 A CN 201610430196A CN 105957016 B CN105957016 B CN 105957016B
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- G06T3/4084—Scaling of whole images or parts thereof, e.g. expanding or contracting in the transform domain, e.g. fast Fourier transform [FFT] domain scaling
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Abstract
The invention discloses a kind of methods for being stretched to image, comprising the following steps: S1) configuration information and original image timing generation stretching image sampling time sequence are stretched according to image resolution ratio and stretch image timing；S2) reading original digital image data according to the stretching image sampling time sequence and cache is image buffer storage data；S3 image buffer storage data output) is read according to the stretching image timing and stretches image data.The present invention can quickly realize that carrying out horizontal stretch, stretched vertically or horizontal vertical to image stretches, and horizontal stretch, stretched vertically, horizontal vertical stretch 3 kinds of modes and support pixel replication mode and image replication mode, are greatly improved the efficiency and accuracy of image stretch.
Description
Technical Field
The present invention relates to the field of image signal processing technology, and more particularly, to a method and an apparatus for performing horizontal stretching, vertical stretching, or horizontal and vertical stretching on an image resolution.
Background
In order to meet the display requirements of some special application occasions, such as a vehicle-mounted navigator and a handheld electronic display device, a production line needs to produce some display modules with special resolution ratios, and in the production process of the display modules with the special resolution ratios, the display performance of the display modules needs to be checked to perform point screen detection. Because these special resolutions can be stretched by ordinary resolution ratio and form, so on the production line these special resolution ratio's display module assembly generally improve or the concatenation forms on the display module assembly's of common resolution ratio basis, therefore these special resolution ratio's display module assembly often has the same display characteristic with the display module assembly of common resolution ratio, in order to detect these special resolution ratio's display module assembly's display performance on the display module assembly production line, need show on these special resolution ratio's display module assembly and carry out contrast detection with the same detection picture of common resolution ratio's display module assembly.
At present, in order to display the picture with the special resolution on the display modules with the special resolution on a production line, an original image needs to be manually modified, each pixel of the original image is copied into a plurality of pixels in the horizontal and vertical directions, or the original image is copied into a plurality of images in the horizontal and vertical directions and then is stored as a new image, and the new image is displayed on the display modules with the special resolution.
Disclosure of Invention
Aiming at the defects of the prior art, the invention discloses a method and a device for stretching an image, which can rapidly realize horizontal stretching, vertical stretching or horizontal and vertical stretching of the image, and 3 modes of the horizontal stretching, the vertical stretching and the horizontal and vertical stretching all support a pixel copying mode and an image copying mode, so that the efficiency and the accuracy of the image stretching can be greatly improved.
To achieve the above object, the present invention provides a method for stretching an image, comprising the steps of:
s1) generating a stretching image sampling time sequence and a stretching image time sequence according to the image resolution stretching configuration information and the original image time sequence;
s2) reading original image data according to the stretching image sampling time sequence and caching the original image data into image caching data;
s3) reading the image buffer data according to the stretched image timing to output stretched image data.
As a further optional technical solution, the above solution further includes step S4: and synchronously processing the stretching image time sequence and the stretching image data to output a stretching image time sequence signal and a stretching image data signal which are synchronously transmitted.
As a further optional technical solution, in the above solution, the image resolution stretching configuration information in step S1 includes a horizontal stretching configuration instruction and a horizontal stretching multiple N, where N is a positive integer; step S1 specifically includes the following steps:
stretching the data effective area and the blanking area of each line of image time sequence in the original image time sequence by N times according to the horizontal stretching configuration instruction and the horizontal stretching multiple N to obtain N times of horizontal stretching image time sequence; and simultaneously, stretching the blanking area of each line of image time sequence in the original image time sequence to ensure that the duration of the data effective area of each line of image time sequence and the stretched blanking area is the same as the duration of each line of image time sequence in the N times of horizontal stretching image time sequence, thereby obtaining the N times of horizontal stretching image sampling time sequence.
As a further optional technical solution, the reading of the image cache data in step S3 in the above scheme specifically includes the following steps:
repeatedly reading the image cache data in each cache address for N times according to the N times of horizontal stretching image time sequence and the cache sequence of the original image data;
or,
and circularly reading the image cache data in each cache address of each line of image data for N times according to the N times horizontal stretching image time sequence and the cache sequence of each line of image data in the original image data.
As a further optional technical solution, in the above solution, the image resolution stretching configuration information in step S1 includes a vertical stretching configuration instruction and a vertical stretching multiple M, where M is a positive integer; step S1 specifically includes the following steps:
s1a) inserting M-1 original image time sequences after the original image time sequence according to the vertical stretching configuration instruction and the vertical stretching multiple M, and simultaneously using the original image time sequences as M times of vertical stretching image time sequences and M times of vertical stretching image sampling time sequences;
or,
s1b) inserting M-1 lines of image time sequences after each line of image time sequence of the original image time sequence according to the vertical stretching configuration instruction and the vertical stretching multiple M to obtain M times of vertical stretching image time sequence; and simultaneously, stretching the blanking area of each line of image time sequence in the original image time sequence to ensure that the duration of the data effective area of each line of image time sequence and the stretched blanking area is the same as the duration of each line of image time sequence in the M times of vertical stretching image time sequence, thereby obtaining the M times of vertical stretching image sampling time sequence.
As a further optional technical solution, the reading of the image cache data in step S3 in the above scheme specifically includes the following steps:
sequentially reading the image cache data in each cache address according to the M times of the vertical stretching image time sequence in the step S1a and the cache sequence of the original image data;
or,
the image buffer data at each buffer address of each line of image data in the original image data is cyclically read M times in the order of buffering each line of image data according to the M times vertical stretching image timing described in step S1 b.
The invention also provides a device for stretching the image, which comprises an image stretching time sequence generation module, an original image data generation module, an image data cache module and a stretched image data generation module which are arranged in the programmable logic device; wherein,
the image stretching time sequence generating module is used for generating a stretching image sampling time sequence and a stretching image time sequence according to the image resolution stretching configuration information and the original image time sequence;
the original image data generating module is used for reading original image data according to the stretched image sampling time sequence and writing the original image data into the image data caching module to be cached as image caching data;
the stretched image data generation module is used for reading the image cache data according to the stretched image time sequence and outputting stretched image data.
As a further optional technical solution, the image data caching module includes a first image data caching submodule and a second image data caching submodule, and the stretched image data generating module includes a first stretched image data generating submodule and a second stretched image data generating submodule; wherein,
the first image data caching submodule is used for caching the original image data read by the original image data generating module according to the sampling time sequence of the horizontal stretching image into horizontal stretching image caching data;
the first stretching image data generation submodule is used for reading the horizontal stretching image cache data according to a horizontal stretching image time sequence and outputting horizontal stretching image data;
the second image data caching submodule is used for caching the original image data read by the original image data generating module according to the sampling time sequence of the vertically stretched image into vertically stretched image caching data;
the second stretching image data generation submodule is used for reading the vertical stretching image buffer data according to the vertical stretching image time sequence and outputting the vertical stretching image data.
As a further optional technical solution, the second image data cache submodule is further configured to cache the horizontally stretched image data output by the first stretched image data generating submodule as horizontally and vertically stretched image cache data; the second stretching image data generation sub-module is also used for reading the horizontal and vertical stretching image buffer data and outputting the horizontal and vertical stretching image data.
As a further optional technical solution, the first image data caching submodule and the second image data caching submodule are both dual-port RAMs.
The invention has the following advantages:
(1) the invention supports horizontal stretching, vertical stretching and horizontal vertical stretching of image signals, and the horizontal stretching, the vertical stretching and the horizontal vertical stretching all support a pixel replication mode and an image replication mode;
(2) the invention can realize the rapid configuration of the image stretching multiple and the image stretching mode by the upper layer;
(3) the invention can be realized by programmable logic devices such as FPGA chips, and the like, has stable and reliable work, easy realization of the technical scheme and higher cost performance;
(4) the stretched image based on the invention can be directly converted into image signals of interface standards such as LVDS, MIPI, DP, V-BY-ONE and the like.
Drawings
Fig. 1 is a block diagram of an apparatus for generating LVDS stretched image signals of multiple LINK transmission modes according to an embodiment of the present invention;
FIG. 2 is a timing diagram of an original image according to an embodiment of the present invention;
FIG. 3 is a timing diagram illustrating a horizontal stretch-pixel copy mode according to an embodiment of the present invention;
FIG. 4 is a timing diagram illustrating horizontal stretch-image copy mode according to an embodiment of the present invention;
FIG. 5 is a timing diagram illustrating an embodiment of a vertical stretch-picture copy mode;
FIG. 6 is a timing diagram illustrating a vertical stretch-pixel copy mode according to an embodiment of the present invention;
FIG. 7 is a timing diagram illustrating a horizontal and vertical stretch-pixel copy mode according to an embodiment of the present invention;
FIG. 8 is a timing diagram illustrating an embodiment of the horizontal and vertical stretch-image copy mode.
In the figure: the system comprises an upper layer configuration module-1, an original image time sequence generation module-2, an image stretching time sequence generation module-3, an original image data read-write control module-4, a high-speed DDR memory chip-5, an original image data generation module-6, a first image data cache submodule-7, a first stretched image data generation submodule-8, a second image data cache submodule-9, a second stretched image data generation submodule-10, a stretched image output module-11, a LINK image conversion module-12 and an LVDS image signal conversion module-13.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In this embodiment, an example of generating an LVDS stretched image signal with multiple LINK transmission modes is taken as an example for description, it should be noted that, the step of converting the stretched image signal generated BY using the method or the apparatus of the present invention into an image signal with interface standards such as DP, MIPI or V-BY-ONE, and the step of converting the image signal into an image signal with interface standards such as DP, MIPI or V-BY-ONE are well known in the prior art, and this embodiment is not described in detail.
As shown in fig. 1, the apparatus for generating LVDS stretched image signals with multiple LINK transmission modes according to the present invention includes an FPGA chip and a high-speed DDR memory chip 5 electrically connected to the FPGA chip, where the FPGA chip is provided with an upper configuration module 1, an original image timing generation module 2, an image stretch timing generation module 3, an original image data read-write control module 4, an original image data generation module 6, a first image data cache submodule 7, a second image data cache submodule 9, a first stretched image data generation submodule 8, a second stretched image data generation submodule 10, a stretched image output module 11, a LINK image conversion module 12, and an LVDS image signal conversion module 13. It should be noted that, in this embodiment, the FPGA chip is only one preferred scheme, and the FPGA chip may also be replaced by programmable logic devices such as APAL, GAL, and CPLD.
In the above embodiment, after the device of the present invention is powered on, the upper layer software packages, transmits and encodes and verifies the original resolution image data to generate an original resolution image data packet, and sends the original resolution image data packet to the original image data read-write control module 4 through the upper layer configuration module 1, the original image data read-write control module 4 unpacks and decodes the original resolution image data packet to restore the original image data, and stores the original image data into the high-speed DDR memory chip 5, and the original image data read-write control module 4 stores all the original image data into the high-speed DDR memory chip 5 and then informs the upper layer software through the upper layer configuration module 1.
In the above embodiment, the upper layer software sends the original resolution image timing sequence parameter to the original image timing sequence generation module 2 through the upper layer configuration module 1, sends the image resolution stretching configuration information to the image stretching timing sequence generation module 3, sends Link image setting parameters (Link numbers: single, double, and four LINKs; Link data distribution mode: parity distribution, sequential arrangement distribution, etc.) to the Link image conversion module 12, and sends LVDS transmission and encoding parameters (transmission standards: VESA, JEIDA; encoding parameters: output LVDS signal pre-emphasis, drive strength, etc.) to the LVDS image signal conversion module 13.
In the above embodiment, the original image timing generation module 2 receives the original resolution image timing parameters sent from the upper layer configuration module 1 to generate the original image timing (Vsync, Hsync, DE), and then sends the original image timing to the image stretching timing generation module 3, the image stretching timing generation module 3 generates a stretched image sampling timing (a horizontally stretched image sampling timing, a vertically stretched image sampling timing, or a horizontally and vertically averaged stretched image sampling timing) and a stretched image timing (a horizontally stretched image timing, a vertically stretched image timing, or a horizontally and vertically averaged stretched image timing) based on the image resolution stretching configuration information (stretching mode setting: horizontally stretching, vertically stretching, or horizontally and vertically averaged stretching; stretching mode setting: pixel copying or image copying; stretching factor setting: horizontally stretching factor or vertically stretching factor) and the original image timing.
In the above embodiment, the horizontal stretching operation is performed first, and then the vertical stretching operation is performed, and when the upper layer software only performs the horizontal stretching setting, the image stretching timing generation module 3 only generates the horizontal stretching image timing and the horizontal stretching image sampling timing; when the upper layer software only carries out vertical stretching setting, the image stretching time sequence generating module 3 only generates a vertical stretching image time sequence and a vertical stretching image sampling time sequence; when the upper layer software sets horizontal and vertical stretching, the image stretching time sequence generating module 3 generates a horizontal and vertical stretching image sampling time sequence, a horizontal stretching image time sequence and a horizontal and vertical stretching image time sequence, namely, the horizontal stretching operation is firstly carried out, then the vertical stretching operation is carried out, and the vertical stretching image time sequence is carried out on the basis of the horizontal stretching image time sequence.
In the above embodiment, to explain the operation procedure of stretching an image, the process of stretching an image having a resolution of 2 × 2 is explained, the pixels of the image are shown in table 1, and the original image timing of the image and the original image data corresponding to the original image timing are shown in fig. 2.
TABLE 1
| D00 | D01 |
| D10 | D11 |
Horizontal stretching operation-pixel copy mode:
in the above embodiment, when the upper layer software only performs horizontal stretching setting, and the image resolution stretching configuration information sent by the upper layer software to the image stretching timing sequence generating module 3 through the upper layer configuration module 1 is a horizontal stretching configuration instruction (horizontal stretching mode and pixel replication mode), and is horizontally stretched by 2 times, as shown in fig. 3, the image stretching timing sequence generating module 3 stretches the data effective area and the blanking area of each line of image timing sequence in the original image timing sequence by 2 times according to the image resolution stretching configuration information to obtain a 2-time horizontally stretched image timing sequence; simultaneously, stretching the blanking area of each line of image time sequence in the original image time sequence to ensure that the duration of the data effective area of each line of image time sequence and the stretched blanking area is the same as the duration of each line of image time sequence in the 2 times horizontal stretching image time sequence, and obtaining 2 times horizontal stretching image sampling time sequence; then, the image stretching timing generation module 3 sends the 2-time horizontal stretching image sampling timing to the original image data generation module 6, and sends the 2-time horizontal stretching image timing to the first stretching image data generation submodule 8. After the original image data generation module 6 receives the 2 times horizontal stretching image sampling time sequence, the original image data is read from the high-speed DDR memory chip 5 through the original image data read-write control module 4 in the data effective area of each row of image time sequence in the 2 times horizontal stretching image sampling time sequence, and sequentially writes the original image data into each address of the first image data cache submodule 7 to cache as image cache data, after all the image data of each line of the original image data is written into each address of the first image data cache sub-module 7, the first stretched image data generation sub-module 8 repeatedly reads the image buffer data in each buffer address 2 times under the control of the 2-fold horizontal stretched image timing sequence and according to the buffer address sequence of the original image data, and directly outputs the 2-fold horizontal stretched image data, where the 2-fold horizontal stretched image data is shown in table 2.
TABLE 2
| D00 | D00 | D01 | D01 |
| D10 | D10 | D11 | D11 |
Horizontal stretching operation-image copy mode:
in the above embodiment, when the upper layer software only performs horizontal stretching setting, and the image resolution stretching configuration information sent by the upper layer software to the image stretching timing sequence generating module 3 through the upper layer configuration module 1 is a horizontal stretching configuration instruction (horizontal stretching mode and image copying mode), and is horizontally stretched by 2 times, as shown in fig. 4, the image stretching timing sequence generating module 3 stretches the data effective area and the blanking area of each line of image timing sequence in the original image timing sequence by 2 times according to the image resolution stretching configuration information to obtain a 2-time horizontally stretched image timing sequence; simultaneously, stretching the blanking area of each line of image time sequence in the original image time sequence to ensure that the duration of the data effective area of each line of image time sequence and the stretched blanking area is the same as the duration of each line of image time sequence in the 2 times horizontal stretching image time sequence, and obtaining 2 times horizontal stretching image sampling time sequence; then, the image stretching timing generation module 3 sends the 2-time horizontal stretching image sampling timing to the original image data generation module 6, and sends the 2-time horizontal stretching image timing to the first stretching image data generation submodule 8. After the original image data generating module 6 receives the 2 times horizontal stretching image sampling time sequence, the original image data is read from the high-speed DDR memory chip 5 through the original image data read-write control module 4 in the data effective area of each line of image time sequence in the 2 times horizontal stretching image sampling time sequence, and the original image data is sequentially written into each address of the first image data cache submodule 7 to be cached as image cache data, when all the line of image data of the original image data is written into each address of the first image data cache submodule 7, the first stretching image data generating submodule 8 directly outputs the 2 times horizontal stretching image data under the control of the 2 times horizontal stretching image time sequence and according to the cache address sequence of each line of image data in the original image data, circularly reads the image cache data in each cache address of the line of image data for 2 times, the 2-fold horizontal stretch image data is shown in table 3.
TABLE 3
| D00 | D01 | D00 | D01 |
| D10 | D11 | D10 | D11 |
In the above embodiment, the first image data buffer submodule 7 sends the 2-time horizontal stretching image data to the stretching image output module 11, and the image stretching timing generation module 3 also sends the 2-time horizontal stretching image timing to the stretching image output module 11, and the stretching image output module 11 performs synchronous processing on the 2-time horizontal stretching image data and the 2-time horizontal stretching image timing to output a stretching image timing signal and a stretching image data signal which are transmitted synchronously.
Vertical stretching operation-image copy mode:
in the above embodiment, when the upper layer software only performs vertical stretching setting, and the image resolution stretching configuration information sent by the upper layer software to the image stretching timing sequence generating module 3 through the upper layer configuration module 1 is a vertical stretching configuration instruction (vertical stretching mode and image copying mode), and vertical stretching is 2 times, as shown in fig. 5, the image stretching timing sequence generating module 3 inserts 1 original image timing sequence in the original image timing sequence according to the image resolution stretching configuration information to obtain a 2-time vertical stretching image timing sequence, and meanwhile, takes the 2-time vertical stretching image timing sequence as a 2-time vertical stretching image sampling timing sequence; then, the image stretching timing generation module 3 sends the 2-fold vertical stretching image sampling timing to the original image data generation module 6, and sends the 2-fold vertical stretching image timing to the second stretching image data generation sub-module 10. After the original image data generation module 6 receives the 2 times vertical stretching image sampling time sequence, the original image data is read from the high-speed DDR memory chip 5 through the original image data read-write control module 4 in the data effective area of each line of image time sequence in the 2 times vertical stretching image sampling time sequence, and sequentially writes the original image data into each address of the second image data cache submodule 9 to cache as image cache data, after each line of image data of the original image data is completely written into each address of the second image data cache sub-module 9, the second stretched image data generation sub-module 10 sequentially reads the image buffer data of each address in the second image data buffer sub-module 9 under the control of the 2-fold vertical stretched image timing sequence and according to the buffer order of the original image data to directly output the 2-fold vertical stretched image data, where the 2-fold vertical stretched image data is shown in table 4.
TABLE 4
| D00 | D01 |
| D10 | D11 |
| D00 | D01 |
| D10 | D11 |
Vertical stretching operation-pixel copy mode:
in the above embodiment, when the upper layer software only performs the vertical stretching setting, and the image resolution stretching configuration information sent by the upper layer software to the image stretching timing sequence generating module 3 through the upper layer configuration module 1 is the vertical stretching configuration instruction (vertical stretching mode and pixel replication mode), and the vertical stretching is 2 times, as shown in fig. 6, the image stretching timing sequence generating module 3 inserts 1 image timing sequence of the line after the image timing sequence of the original image timing sequence according to the image resolution stretching configuration information to obtain the vertical stretching image timing sequence of 2 times, and at the same time, the image stretching timing sequence generating module 3 stretches the blanking region of each image timing sequence in the original image timing sequence according to the image resolution stretching configuration information, so that the duration of the data effective region and the stretched blanking region of each image timing sequence is the same as the duration of each image timing sequence in the vertical stretching image timing sequence of 2 times, obtaining a 2-time vertical stretching image sampling time sequence; then, the image stretching timing generation module 3 sends the 2-fold vertical stretching image sampling timing to the original image data generation module 6, and sends the 2-fold vertical stretching image timing to the second stretching image data generation sub-module 10. After the original image data generation module 6 receives the 2 times vertical stretching image sampling time sequence, the original image data is read from the high-speed DDR memory chip 5 through the original image data read-write control module 4 in the data effective area of each line of image time sequence in the 2 times vertical stretching image sampling time sequence, and the original image data is sequentially written into each address of the second image data cache submodule 9 to be cached as image cache data, when all the image data of each line of the original image data is written into each address of the second image data cache submodule 9, the second stretching image data generation submodule 10 directly outputs the 2 times vertical stretching image data under the control of the 2 times vertical stretching image time sequence and according to the cache sequence of each line of image data in the original image data, circularly reads the image cache data in each cache address of the line of image data N times, the 2-fold vertically stretched image data is shown in table 5.
TABLE 5
| D00 | D01 |
| D00 | D01 |
| D10 | D11 |
| D10 | D11 |
In the above embodiment, the second stretched image data generation submodule 10 sends the 2 times vertical stretched image data to the stretched image output module 11, and the image stretch timing generation module 3 also sends the 2 times vertical stretched image timing to the stretched image output module 11, and the stretched image output module 11 performs synchronous processing on the 2 times vertical stretched image data and the 2 times vertical stretched image timing to output a stretched image timing signal and a stretched image data signal which are transmitted synchronously.
Horizontal vertical stretching operation-pixel copy mode:
in the above embodiment, when the upper layer software performs horizontal and vertical stretching settings, and the image resolution stretching configuration information sent by the upper layer software to the image stretching timing sequence generating module 3 through the upper layer configuration module 1 is a horizontal and vertical stretching configuration instruction (a horizontal and vertical stretching mode and a pixel replication mode), and the horizontal and vertical stretching is 2 times, as shown in fig. 7, the image stretching timing sequence generating module 3 performs, according to the image resolution stretching configuration information, a 2-fold horizontal stretching operation on the original image timing sequence in the pixel replication mode, and then performs a 2-fold vertical stretching operation, so as to obtain a 2-fold horizontal and vertical stretching image sampling timing sequence, a 2-fold horizontal stretching image timing sequence, and a 2-fold horizontal and vertical stretching image timing sequence. Then, the image stretching timing sequence generating module 3 sends the 2 times horizontal and vertical stretching image sampling timing sequence to the original image data generating module 6, sends the 2 times horizontal stretching image timing sequence to the first stretching image data generating submodule 8, and sends the 2 times horizontal and vertical stretching image timing sequence to the second stretching image data generating submodule 10. The original image data generating module 6 receives the 2-time horizontal vertical stretching image sampling time sequence, reads original image data from the high-speed DDR memory chip 5 through the original image data read-write control module 4 in the data effective area of each line of image time sequence in the 2-time horizontal vertical stretching image sampling time sequence, sequentially writes the original image data into each address of the first image data cache submodule 7 to cache the original image data into image cache data, when all the image data of each line of the original image data are written into each address of the first image data cache submodule 7, the first stretching image data generating submodule 8 reads the image cache data in each cache address of the first image data cache submodule 7 under the control of the 2-time horizontal stretching image time sequence and writes the image cache data into the second image data cache submodule 9, and then the second stretching image data generating submodule 10 reads the second image data cache data under the control of the 2-time horizontal vertical stretching image time sequence The image buffer data in each buffer address of the memory module 9 outputs 2-fold horizontally vertically stretched image data as shown in table 6.
TABLE 6
| D00 | D00 | D01 | D01 |
| D00 | D00 | D01 | D01 |
| D10 | D10 | D11 | D11 |
| D10 | D10 | D11 | D11 |
Horizontal vertical stretching operation-image copy mode:
in the above embodiment, when the upper layer software performs horizontal and vertical stretching settings, and the image resolution stretching configuration information sent by the upper layer software to the image stretching timing sequence generating module 3 through the upper layer configuration module 1 is a horizontal and vertical stretching configuration instruction (a horizontal and vertical stretching mode and an image copying mode), and the horizontal and vertical stretching is 2 times, as shown in fig. 8, the image stretching timing sequence generating module 3 performs, according to the image resolution stretching configuration information, a 2-fold horizontal stretching operation on the original image timing sequence in the image copying mode, and then performs a 2-fold vertical stretching operation, so as to obtain a 2-fold horizontal and vertical stretching image sampling timing sequence, a 2-fold horizontal stretching image timing sequence, and a 2-fold horizontal and vertical stretching image timing sequence. Then, the image stretching timing sequence generating module 3 sends the 2 times horizontal and vertical stretching image sampling timing sequence to the original image data generating module 6, sends the 2 times horizontal stretching image timing sequence to the first stretching image data generating submodule 8, and sends the 2 times horizontal and vertical stretching image timing sequence to the second stretching image data generating submodule 10. The original image data generating module 6 receives the 2-time horizontal vertical stretching image sampling time sequence, reads original image data from the high-speed DDR memory chip 5 through the original image data read-write control module 4 in the data effective area of each line of image time sequence in the 2-time horizontal vertical stretching image sampling time sequence, sequentially writes the original image data into each address of the first image data cache submodule 7 to cache the original image data into image cache data, when all the image data of each line of the original image data are written into each address of the first image data cache submodule 7, the first stretching image data generating submodule 8 reads the image cache data in each cache address of the first image data cache submodule 7 under the control of the 2-time horizontal stretching image time sequence and writes the image cache data into the second image data cache submodule 9, and then the second stretching image data generating submodule 10 reads the second image data cache data under the control of the 2-time horizontal vertical stretching image time sequence The image buffer data in each buffer address of the memory module 9 outputs 2-fold horizontally vertically stretched image data as shown in table 7.
TABLE 7
| D00 | D00 | D01 | D01 |
| D10 | D10 | D11 | D11 |
| D00 | D00 | D01 | D01 |
| D10 | D10 | D11 | D11 |
In the above embodiment, the second stretched image data generation submodule 10 sends the 2-fold horizontal and vertical stretched image data to the stretched image output module 11, and the image stretching timing generation module 3 also sends the 2-fold horizontal and vertical stretched image timing to the stretched image output module 11, and the stretched image output module 11 performs synchronous processing on the 2-fold horizontal and vertical stretched image data and the 2-fold horizontal and vertical stretched image timing to output a stretched image timing signal and a stretched image data signal which are transmitted synchronously.
In the above embodiment, after receiving the stretched image timing signal and the stretched image data signal which are output and synchronously transmitted, the LINK image conversion module 12 distributes the stretched image data to a plurality of LINKs according to the LINK image setting parameters sent by the upper configuration module 1 to obtain a plurality of LINK image data, and at the same time, divides the stretched image timing into the timings of the plurality of LINKs.
In the above embodiment, the LVDS image signal conversion module 13 performs the LVDS transmission encoding operation and the parallel-to-serial conversion operation on the image data of each link according to the LVDS transmission and encoding configuration command sent by the upper configuration module 1, and converts the image data into the serial LVDS image signal.
It will be readily understood by those skilled in the art that the details of the present invention which have not been described in detail herein are not to be interpreted as limiting the scope of the invention, but as merely illustrative of the presently preferred embodiments of the invention.
Claims (10)
1. A method for stretching an image, comprising the steps of:
s1) generating a stretching image sampling time sequence and a stretching image time sequence according to the image resolution stretching configuration information and the original image time sequence;
s2) reading original image data according to the stretching image sampling time sequence and caching the original image data into image caching data;
s3) reading the image buffer data according to the stretched image timing to output stretched image data;
the image resolution stretching configuration information includes: a horizontal stretch configuration command, a horizontal stretch factor, and/or a vertical stretch configuration command and a vertical stretch factor.
2. The method for stretching an image according to claim 1, further comprising step S4: and synchronously processing the stretching image time sequence and the stretching image data to output a stretching image time sequence signal and a stretching image data signal which are synchronously transmitted.
3. The method according to claim 1, wherein the image resolution stretching configuration information in step S1 includes a horizontal stretching configuration instruction and a horizontal stretching multiple N, where N is a positive integer; step S1 specifically includes the following steps:
stretching the data effective area and the blanking area of each line of image time sequence in the original image time sequence by N times according to the horizontal stretching configuration instruction and the horizontal stretching multiple N to obtain N times of horizontal stretching image time sequence; and simultaneously, stretching the blanking area of each line of image time sequence in the original image time sequence to ensure that the duration of the data effective area of each line of image time sequence and the stretched blanking area is the same as the duration of each line of image time sequence in the N times of horizontal stretching image time sequence, thereby obtaining the N times of horizontal stretching image sampling time sequence.
4. The method according to claim 3, wherein reading the image buffer data in step S3 specifically includes the following steps:
repeatedly reading the image cache data in each cache address for N times according to the N times of horizontal stretching image time sequence and the cache sequence of the original image data;
or,
and circularly reading the image cache data in each cache address of each line of image data for N times according to the N times horizontal stretching image time sequence and the cache sequence of each line of image data in the original image data.
5. The method according to claim 1, wherein the image resolution stretching configuration information in step S1 includes a vertical stretching configuration command and a vertical stretching multiple M, where M is a positive integer; step S1 specifically includes the following steps:
s1a) inserting M-1 original image time sequences after the original image time sequence according to the vertical stretching configuration instruction and the vertical stretching multiple M, and simultaneously using the original image time sequences as M times of vertical stretching image time sequences and M times of vertical stretching image sampling time sequences;
or,
s1b) inserting M-1 lines of image time sequences after each line of image time sequence of the original image time sequence according to the vertical stretching configuration instruction and the vertical stretching multiple M to obtain M times of vertical stretching image time sequence; and simultaneously, stretching the blanking area of each line of image time sequence in the original image time sequence to ensure that the duration of the data effective area of each line of image time sequence and the stretched blanking area is the same as the duration of each line of image time sequence in the M times of vertical stretching image time sequence, thereby obtaining the M times of vertical stretching image sampling time sequence.
6. The method according to claim 5, wherein reading the image buffer data in step S3 specifically includes the following steps:
sequentially reading the image cache data in each cache address according to the M times of the vertical stretching image time sequence in the step S1a and the cache sequence of the original image data;
or,
the image buffer data at each buffer address of each line of image data in the original image data is cyclically read M times in the order of buffering each line of image data according to the M times vertical stretching image timing described in step S1 b.
7. The device for stretching the image is characterized by comprising an image stretching time sequence generation module, an original image data generation module, an image data cache module and a stretched image data generation module which are arranged in a programmable logic device; wherein,
the image stretching time sequence generating module is used for generating a stretching image sampling time sequence and a stretching image time sequence according to the image resolution stretching configuration information and the original image time sequence;
the original image data generating module is used for reading original image data according to the stretched image sampling time sequence and writing the original image data into the image data caching module to be cached as image caching data;
the stretched image data generation module is used for reading the image cache data according to the stretched image time sequence and outputting stretched image data.
8. The apparatus according to claim 7, wherein the image data buffer module comprises a first image data buffer submodule and a second image data buffer submodule, and the stretched image data generation module comprises a first stretched image data generation submodule and a second stretched image data generation submodule; wherein,
the first image data caching submodule is used for caching the original image data read by the original image data generating module according to the sampling time sequence of the horizontal stretching image into horizontal stretching image caching data;
the first stretching image data generation submodule is used for reading the horizontal stretching image cache data according to a horizontal stretching image time sequence and outputting horizontal stretching image data;
the second image data caching submodule is used for caching the original image data read by the original image data generating module according to the sampling time sequence of the vertically stretched image into vertically stretched image caching data;
the second stretching image data generation submodule is used for reading the vertical stretching image buffer data according to the vertical stretching image time sequence and outputting the vertical stretching image data.
9. The apparatus according to claim 8, wherein the second image data buffer sub-module is further configured to buffer the horizontally stretched image data output by the first stretched image data generating sub-module into horizontally and vertically stretched image buffer data; the second stretching image data generation sub-module is also used for reading the horizontal and vertical stretching image buffer data and outputting the horizontal and vertical stretching image data.
10. The apparatus according to claim 8 or 9, wherein the first image data buffer sub-module and the second image data buffer sub-module are dual port RAMs.
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